SUITABLE FOR AUTOMOTIVE APPLICATIONS SHARED DIGITAL COMMUNICATION BUS

Abstract

An illustrative network includes: n nodes coupled to a signal conductor, where n is an integer greater than one; and a bus controller configured to transmit periodic pulses over the signal conductor, each pulse initiating a data transmission slot.Each of the multiple nodes has a node ID and is configured to determine which of the data transmission slots correspond to that node ID by: driving the signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty; and after driving or detecting a pulse representing a resynchronization request, tracking a data transmission slot count value that treats the first data transmission slot after a resynchronization request as the first data transmission slot in a series of frames, each of which has n data transmission slots, with each data transmission slot in the frame having a slot count value that corresponds to one of the respective node IDs.

Description

TECHNICAL AREA

[0001] The present disclosure relates to network communication systems and methods, in particular to such systems and methods that provide automatic coordination between multiple nodes on a control-synchronized bus for time-division multiplexing. BACKGROUND

[0002] Modern automobiles are equipped with an impressive number and variety of sensors, including "high-speed" sensors that employ a resolver with an analog interface for in-phase and quadrature-phase output signals. To provide protection against electromagnetic interference and emissions, each of the output signals is typically transmitted as a differential signal over a twisted pair of wires, requiring multiple twisted pairs and relatively expensive filters to maintain electromagnetic compatibility.

[0003] In US Patent 11,985,219, “Digital communications bus suitable for automotive applications,” the inventors of the present invention proposed a digital interface for such sensors to provide the required data rates with robust operation and reduced implementation costs. The proposed interface works well but relies on a dedicated point-to-point bus from the controller to the sensor. Adapting the proposed solution to allow bus sharing would enable a further reduction in wiring costs, provided this can be achieved without loss of performance, loss of reliability, or an increase in interface manufacturing costs. SUMMARY

[0004] Accordingly, a shared digital communication bus suitable for automotive applications, as well as bus controllers and sensors that utilize the bus and its associated communication methods, are disclosed herein. An illustrative network includes: n nodes coupled to a shared signal conductor, where n is an integer greater than one; and a bus controller configured to transmit periodic pulses over the shared signal conductor, each pulse initiating a data transmission slot.Each of the multiple nodes has a node ID and is configured to determine which of the data transmission slots correspond to that node ID by: driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty; and after driving or detecting a pulse representing a resynchronization request, tracking a data transmission slot count value that treats the first data transmission slot after a resynchronization request as the first data transmission slot in a series of frames, each of which has n data transmission slots, with each data transmission slot in the frame having a slot count value that corresponds to one of the respective node IDs.

[0005] An illustrative sensor includes: a bus interface coupled to a shared signal conductor to detect periodic pulses from a bus controller, each pulse initiating a data transmission slot; and a controller having a node ID and configured to determine which of the data transmission slots correspond to that node ID by: driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty, where n is a total number of sensors connected to the shared signal conductor;and after triggering or detecting a pulse representing a resynchronization request, tracking a data slot count value, which treats a first data slot after the resynchronization request as the first data slot in a series of frames, each of which has n data slots, each data slot in the frame having a slot count value corresponding to a respective node ID.

[0006] An illustrative method for digital communication includes: detecting periodic pulses on a shared signal conductor, each pulse initiating a data transmission slot; and determining which of the data transmission slots correspond to a local node ID by: driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty, where n is a total number of sensors connected to the shared signal conductor;and after triggering or detecting a pulse representing a resynchronization request, tracking a data slot count value, which treats a first data slot after the resynchronization request as the first data slot in a series of frames, each of which has n data slots, each data slot in the frame having a slot count value corresponding to a respective node ID.

[0007] All of the foregoing can be used individually or in combination, and they can further employ one or more of the following optional features in any suitable combination: 1. Each of the multiple nodes is configured to set the data slot count based on a node ID included in a data transmission from another node. 2. Each data slot is designed to hold multiple bytes. 3. The pulse representing a resynchronization request has a position corresponding to a second of the multiple bytes. 4. Each node is configured to treat a data slot as empty if a first byte and a pulse representing a resynchronization request are missing from that data slot. 5. The shared signal conductor is one of a pair of differential signal conductors. 6. Each of the n nodes includes a sensor. 7.Each of the n nodes takes a measurement at a synchronized time relative to the beginning of each frame. 8. Each of the n nodes aligns a bus clock signal to the periodic transmit pulses. 9. The procedure includes generating a local clock signal, aligning the local clock signal to the periodic pulses, and transmitting digital data during the data transmission slots corresponding to the local node ID. 10. Determining includes resetting the data transmission slot count after detecting that one of the periodic pulses is prolonged. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a block diagram of an illustrative Controller Area Network. Fig. Figure 2 is a circuit diagram of an illustrative digital communication bus. Fig. Figure 3 is a time diagram showing various illustrative signal waveforms in the system. Fig. Figure 4 is a diagram of clock synchronization phases. Fig. Figure 5 is a flowchart illustrating a data transmission procedure. Fig. Figure 6 is a time diagram for an example of the start of a shared bus. Fig. Figure 7 is a time graph that compares different start scenarios for a given sensor. Fig. Figure 8 is a time diagram for another example of the start of a shared bus. DETAILED DESCRIPTION

[0008] The following description and accompanying drawings are provided for clarification and not to limit the disclosure. In other words, they provide the basis for a person skilled in the art to understand all modifications, equivalents, and alternatives that fall within the scope of protection of the claims.

[0009] Fig. Figure 1 shows an illustrative Controller Area Network (CAN) as found in an automotive context. An electronic control unit (ECU) 102 is coupled to various sensors 103 via a shared bus and to a LiDAR (light detection and distance measurement unit) 104 and a camera 105 via point-to-point connections in a central computing architecture. Various distributed computing architectures, such as tree, ring, mesh, and daisy-chain, may also be suitable. To provide automated driver assistance, the ECU 102 can further be connected to a set of actuators, such as a turn signal actuator 106, a steering actuator 108, a brake actuator 110, and an accelerator pedal actuator 112. The ECU 102 can also be coupled to an interactive interface 114 to accept user input and provide a display of the various measurements and the system status.Using the interface, sensors and actuators, the ECU 102 can provide automated parking, assisted parking, lane change assistance, obstacle and blind spot detection and other desirable features.

[0010] Fig. Figure 2 is a schematic representation of an illustrative data bus with a bus controller 202 (such as the ECU 102) on a first printed circuit board (PCB) 204, which is coupled to several sensors 206, 216 on respective PCBs 208, 218 or other suitable sensor switching logic substrates. The first PCB 204 includes a low-dropout voltage regulator (LDO voltage regulator) 210 and a ground connection to supply power to the sensor PCBs 208, 218 via their respective V+ and GND conductors. A shared pair of differential signal conductors A, B carries a downlink signal from the bus controller 202 to the sensors 206, 216 and an uplink signal from the sensors to the bus controller.

[0011] The first and last PCBs can include termination circuits 212 and 214 to provide impedance matching and / or electromagnetic compatibility by attenuating higher frequencies. The termination circuits are shown here as two equal impedances Z1 connected in series between conductors A and B, with an optional impedance Z2 coupled between the intermediate node and ground. The impedances Z1 and Z2 can be chosen to provide the desired low-pass cutoff frequency.

[0012] The illustrated bus control 202 connects a transceiver 220 for alternately sending a downlink signal TX. C and receiving an uplink signal RX CA universal asynchronous receiver / transmitter module (UART module) 222 formats the downlink signal to transmit synchronization pulses from the microcontroller (MCTRL) 224 and decodes the uplink signal to provide responses and measurement data from the sensors 206 and 216 to the microcontroller 224. Optionally (e.g., for RS485 transceivers), the UART module 222 provides a T / R signal to the transceiver 220 to switch between transmit and receive modes. CAN-compatible transceivers do not require a signal to switch between transmit and receive modes. An oscillator 226 provides a clock signal to the UART module 222. The UART operations are performed according to the clock signal, and thus the clock signal determines the timing of symbol transitions in the downlink signal.

[0013] Each of the illustrated sensors 206, 216 similarly connects to a transceiver 230 for alternately receiving the downlink signal RX. Sand sending the uplink signal TX S a, optionally operating in response to a T / R signal from a UART module 232. As discussed below, a controller 234 receives the synchronization pulses that define data transmission slots for sensor measurement data and provides measurements from a converter switching logic 235 to the UART 232, which are to be converted into upload messages. An oscillator 236 provides a clock signal for use by the UART 232. As described below, the clock signal generated by the oscillator 236 can be synchronized with periodic synchronization pulses from the bus controller 202, enabling the UART 232 to generate uplink messages with symbols synchronized with the clock signal generated by the oscillator 226.

[0014] Each of the multiple sensors 206, 216 is assigned a node ID in the range from 0 to n-1, where n is the number of sensors that share the differential signal pair A / B. The node ID can be assigned by configuring jumpers on the sensor PCBs 208, 218, hardwiring external pins of the packaged sensors 206, 216, firmware programming, or any other suitable technique to ensure that each sensor has a unique node ID within the given range.

[0015] Fig. Figure 3 illustrates the timing relationship between the various signal waveforms that can be present on the digital communication bus. After power-on or reset, the bus controller sends periodic synchronization pulses, as shown in waveform TX. CThese pulses are used to define data transmission slots and can also serve as a time reference signal for the sensors. The illustrated pulses are three bit intervals wide, but this is not a requirement. As described in more detail below, the initial pulse sent by the bus controller can optionally be extended (e.g., to a width of more than five bit intervals) to signal a bus reset and halt all sensor transmissions, thus forcing a restart of the sensor transmission coordination process. The bus controller can also later use the extended synchronization pulse as a mechanism to force a bus reset, for example, after detecting excessive noise or other indications of a bus collision (transmissions from different sensors in a given data transmission slot).This reset mechanism can advantageously avoid interrupting sensor clock synchronization, thus facilitating a rapid return to normal bus operation after a fault. More serious bus communication errors may require a power cycle (hard restart) of the bus nodes, which is likely to increase the delay until the bus returns to normal operation.

[0016] The RX waveform S This shows the periodic synchronization pulses received by a given sensor with a slight delay due to propagation delay through the conductors and interface electronics. The sensor responds with an uplink waveform TX. SShown here as a template for three standard UART bytes, each with a single start bit preceding the least significant bit and a stop bit following the most significant bit. Additional stop bits may be preferred in some systems, and in others, skipping the stop bits may be preferred. Other message formats would also be suitable, such as a larger or smaller number of bytes, a different bit order, and / or different word lengths between the start and stop bits. The RX waveform C displays the uplink waveform with a delay to represent the travel time from the sensor to the bus controller.

[0017] The last bend of Fig. Figure 3 shows the differential voltage between signal conductors A and B. The sensor can use the interval between the leading edges of the synchronization pulses as the synchronization period measurement (PM), from which the bit period (or more generally, "symbol period") is derived, and can use the trailing edges of the synchronization pulses as the zero-phase adjustment for the transmission symbol clock.

[0018] The synchronization and alignment process can be performed over several synchronization pulse cycles, as in Fig. Figure 4 shows an initial calibration period. After power-up or sensor reset, the sensor begins acquiring period measurements between the leading edges of the pulses. In one considered embodiment, the sensor uses a phase-locked loop (PLL) with a local voltage-controlled oscillator (VCO) coupled to a counter or frequency divider. The control voltage is set to a standard mid-range value, and the most significant bit of an adjustment value is set. If the next synchronization pulse arrives before the counter expires, the control voltage is increased by the adjustment value to raise the local oscillator frequency. Conversely, if the counter expires before the next synchronization pulse arrives, the control voltage is decreased by the adjustment value to lower the local oscillator frequency.The adjustment value is then halved so that only its second-highest bit is activated. The process is repeated until only the least significant bit of the adjustment value is activated.

[0019] Once the minimum adjustment value is reached and applied, the sensor can transition from calibration mode to tracking mode. During tracking mode, the sensor determines which of the data transmission slots correspond to the node ID of that sensor and uses these slots to send measurement data to the bus controller. The sensor continues to monitor the period between synchronization pulses and adds or subtracts the minimum adjustment value to or from the control voltage after each period measurement. In some implementations, the sensor can detect when the adjustments regularly change sign and can then apply an error filter or otherwise increase the number of synchronization pulses used for each control voltage adjustment.

[0020] Fig. Figure 5 is a flowchart illustrating a data communication procedure that can be implemented by any sensor device. In block 502, the sensor initializes a variable to count empty slots. In block 504, it is determined whether it is functioning correctly; otherwise, it terminates all transmissions and stops until the next power-on or hard reset.

[0021] Otherwise, the sensor in block 506 monitors the bus for a synchronization pulse from the bus controller. When a synchronization pulse is detected in block 506, the sensor adjusts its local clock based on the synchronization pulse in block 508. A suitable clock calibration technique is described in U.S. Patent 11,985,219, "Digital communications bus suitable for automotive applications." If the sensor in block 510 determines that the synchronization pulse is prolonged, the sensor sets the slot count value in block 512 to n-1, where n is the number of sensors. From block 512, the control flow returns to block 504. This path allows the bus controller to resynchronize the bus as needed for rapid recovery after a bus fault, such as a bus collision.

[0022] If the sensor in block 510 determines that the pulse is not extended, the sensor in block 514 determines whether the local clock is sufficiently synchronized with the synchronization pulses; otherwise, the controller returns to block 504. This path ensures that the sensor achieves bus clock synchronization before transmitting any data.

[0023] Otherwise, in block 516, the sensor determines whether it is tracking the slot count. If so, in block 518, the sensor increments the slot count (modulo n) to obtain the slot count for the current data transmission slot. If the slot count matches the sensor's node ID, the sensor uses the current data transmission slot to send digital measurement data to the controller in block 520 before returning to block 504. The data preferably includes a field for the node ID of the sensor sending the measurement data. If the slot count does not match the sensor's node ID, the sensor returns directly to block 504.

[0024] If the sensor determines in block 516 that the slot count is unknown, it checks in block 522 whether the current data transmission slot is empty. If it is not empty, i.e., if another sensor is using the data transmission slot, the sensor monitors the data transmission in block 524 to capture the node ID of the sensor using the slot and sets the slot count equal to the captured node ID before returning to block 504. If the current slot is empty, indicated by the absence of an initial data byte, the sensor increments the empty slot counter in block 526 and compares the empty slot count to the number of sensors n. The empty slot counter indicates the number of consecutive empty slots, and n consecutive empty slots indicate that none of the sensors have started using their data transmission slots.The first sensor to detect n consecutive empty slots sends a signal in block 528 representing a resynchronization request. The request signal can be a long pulse spanning the entire duration of a data byte (including start and stop bits, if present). In some implementations, the request signal is positioned to occupy the same space that a second byte would occupy if a sensor used the slot to transmit data to the bus controller.In block 530, each of the sensors responds to the request signal by setting its slot count value to n-1 and incrementing its slot count value modulo n, thus treating the first data transmission slot after a resynchronization request as the first data transmission slot in a series of frames, each of which has n data transmission slots, with each data transmission slot in the frame having a slot count value that corresponds to one of the respective node IDs.

[0025] If the count value for empty slots has not yet reached n, the sensor in block 532 monitors the data transmission slot for a signal representing a resynchronization request. If no request is detected, the sensor returns to block 504. Otherwise, the sensor in block 530 initializes the slot count value before returning to block 502.

[0026] Fig. Figure 6 shows an example of a process for starting a shared bus that uses the disclosed automatic synchronization technique. The upper diagram shows the TX. C -Signal (referred to as TxD control) with a series of synchronization pulses from the bus controller. The next four diagrams show the TX SSignals for four sensors (designated TxD-Sensor0, TxD-Sensor1, TxD-Sensor2, and TxD-Sensor3), each including a corresponding sensor start and calibration time that varies between sensors. In this example, Sensor1 completes its start and calibration first and is the first to send a resynchronization request (not shown) and begin transmitting data (Sensor1 data). Next, Sensor3 completes its start and is able to set its slot counter based on the timing of Sensor1's data. Sensor3 begins transmitting data in its data transmission slots. Sensor0 and Sensor2 complete their starts last and are able to set their slot counters based on the next transmission of data, which in this example is Sensor3 data.

[0027] At this point, each sensor has determined its associated data transmission slots and is using them to provide measurement data to the bus controller. The last diagram in Fig. 6 shows the RX C The RxD signal (referred to as RxD control) contains the combined measurement data from each sensor on the shared bus. It's important to note that the bus controller never needed to use the bus for downlink commands or any data other than the synchronization pulses that define the data transmission slots. The sensors automatically achieved coordinated data transmission.

[0028] Fig. Figure 7 is a timing diagram comparing different start scenarios for a given sensor, in this case Sensor2. As in the previous example, these scenarios assume the presence of four sensors on the shared bus. Diagram 702 shows the TX C-Signal for each of the four scenarios. Each of the four scenarios 704-710 has an upper chart that shows the RX S -Signal for Sensor2 is shown, and a lower diagram showing the TX S -Signal for Sensor2 indicates.

[0029] In the first scenario (704), the first data transmission slot is empty after Sensor2 has completed calibration, and the next data transmission slot contains Sensor3 data (including a node ID field that identifies Sensor3 as the sender). Sensor2 captures the node ID and initializes its slot counter accordingly, enabling it to transmit Sensor2 data in the correct data transmission slot.

[0030] In the second scenario, 706, Sensor2 observes four empty data transmission slots after completing calibration. In the fourth data transmission slot, Sensor2 sends a resynchronization request pulse ("flag") and initializes its slot counter, enabling it to transmit Sensor2 data in the correct data transmission slot. It is possible for multiple sensors to transmit a resynchronization request pulse almost simultaneously by chance. Since the same signal is sent by the multiple sensors, no damage is caused by such collisions.

[0031] In the third scenario, 708, Sensor2 detects a resynchronization request pulse from one of the other sensors in the third data transmission slot. In response, Sensor2 initializes its slot count, enabling it to transmit Sensor2 data in the correct data transmission slot.

[0032] In the fourth scenario, 710, Sensor2 observes three empty data transmission slots, and it would have sent a resynchronization request pulse in the fourth data transmission slot if it had not first detected Sensor3 data. Sensor2 captures the node ID and initializes its slot counter accordingly, thus enabling it to transmit Sensor2 data in the correct data transmission slot.

[0033] To better illustrate the controller's ability to pause and reset sensor transmissions, the following is shown. Fig. Figure 8 is another example of a process for starting a shared bus. The diagram above shows the TX. C -Signal (referred to as TxD control) with a series of long synchronization pulses from the bus controller. The next four diagrams show the TX SSignals for four sensors (designated TxD-Sensor0, TxD-Sensor1, TxD-Sensor2, and TxD-Sensor3), each including a corresponding sensor start and calibration time that varies between sensors. In this example, Sensor1 completes start and calibration first and can detect the long synchronization pulses from the controller, causing Sensor1 to repeatedly reset its slot count without transmitting any sensor data. Sensor0 also completes start and calibration while the controller is still transmitting long synchronization pulses, and similarly resets its slot count and does not transmit any sensor data until a short synchronization pulse is received.

[0034] Sensor 2 and Sensor 3 complete their startup and calibration after the controller begins sending short synchronization pulses. These sensors are able to set their slot counters based on the timing of the data transmissions from Sensor 0 and Sensor 1. Sensor 2 and Sensor 3 begin transmitting sensor data in their respective data transmission slots. At this point, each sensor has determined its associated data transmission slots and is using them to provide measurement data to the bus controller. The last diagram in Fig. 8 shows the RX C -Signal (referred to as RxD control) with the combined measurement data from each of the sensors on the shared bus.

[0035] The clock synchronization achieved between the sensors and the bus controller is expected to enable significantly higher data transmission rates, including rates exceeding approximately 8 Mbit / s on buses that otherwise conform to the CAN FD automotive bus standard. Unlike other bus types, such as those where a bus controller uses a request / response protocol to selectively retrieve data from multiple addressable sensor devices, the disclosed synchronized interface clock configuration allows multiple sensors, employing a minimal yet robust signaling protocol, to continuously supply measurement information to the controller without restricting the way in which the sensor acquires the measurement information.

[0036] In systems where synchronous measurements are desired, the sensors can be configured to coordinate their data acquisition relative to one of the data transmission slots. For example, each sensor can be configured to acquire a measurement immediately before the synchronization pulse for the data transmission slot assigned to Sensor0. Although the sensor measurements are transmitted sequentially, the corresponding measurement times for all sensors would be simultaneous or at least concurrent.

[0037] In systems requiring high temporal precision, sensor data can be transmitted with measurement timestamps. In some implementations, the sensor measurement cycles can be synchronized with the pulses from the bus controller, and the timestamp can be transmitted as a time offset from a given data transmission slot in each data frame of n associated data transmission slots.

[0038] The person skilled in the art will recognize, from the foregoing description and the accompanying drawings, equivalents, variations, and alternative embodiments that fall within the scope of protection of this disclosure and the accompanying claims. For example, the disclosed controller, the disclosed sensors, and the disclosed bus need not be limited to the automotive context but are also suitable for other contexts in which networks are used. The bus nodes need not be sensors but can instead be network nodes that provide digital communications to a bus controller for any purpose and in a wide variety of contexts, including commercial buildings, industrial plants, medical facilities, surveillance networks, telecommunications networks, ships, aircraft, spacecraft, and monitoring networks for bridges and other structures. Although the in Fig.While the five processes shown and described are treated as sequential for illustrative purposes, in practice the processes can be rearranged, and the method can be carried out using several simultaneously operating components with integrated circuits. The sequential discussion is not intended to be restrictive. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] US 11,985,219 [0003, 0021]

Claims

[1] Network that includes: n nodes coupled to a shared signal conductor, where n is an integer greater than one; and a bus controller configured to transmit periodic pulses over the shared signal conductor, with each pulse initiating a data transmission slot, where each of the n nodes has a node ID and is configured to determine which of the data transmission slots correspond to that node ID, the determination including: Driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty; and After triggering or detecting a pulse representing a resynchronization request, tracking a data slot count value, which treats a first data slot after a resynchronization request as the first data slot in a series of frames, each of which has n data slots, with each data slot in the frame having a slot count value that corresponds to one of the respective node IDs. [2] Network according to claim 1, wherein as part of determining each of the multiple nodes is configured to set the data transmission slot count value based on a node ID contained in a data transmission from another node. [3] Network according to claim 1, wherein each data transmission slot is designed to receive multiple bytes and wherein the pulse representing a resynchronization request has a position corresponding to a second of the multiple bytes. [4] Network according to claim 3, wherein each node is configured to treat a data transmission slot as empty if a first byte is missing in that data transmission slot. [5] Network according to claim 1, wherein the shared signal conductor is one of a pair of differential signal conductors. [6] Network according to claim 1, wherein each of the n nodes comprises a sensor. [7] Network according to claim 6, wherein each of the n nodes captures a measurement at a synchronized time relative to the beginning of a frame. [8] Network according to claim 1, wherein each of the n nodes aligns a bus clock signal to the periodic transmit pulses. [9] Sensor that includes: a bus interface coupled to a shared signal conductor to detect periodic pulses from a bus controller, each pulse initiating a data transmission slot; and a controller that has a node ID and is configured to determine which of the data transmission slots correspond to that node ID, including the determination: Driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty, where n is a total number of sensors connected to the shared signal conductor; and After triggering or detecting a pulse representing a resynchronization request, tracking a data slot count value, which treats a first data slot after the resynchronization request as the first data slot in a series of frames, each of which has n data slots, with each data slot in the frame having a slot count value that corresponds to a respective node ID. [10] Sensor according to claim 9, wherein as part of determining the controller is configured to determine the data transmission slot count value based on a node ID contained in a data transmission from another sensor. [11] Sensor according to claim 9, wherein each data transmission slot is designed to receive multiple bytes and wherein the pulse representing a resynchronization request has a position corresponding to a second of the multiple bytes. [12] Sensor according to claim 11, wherein each node is configured to treat a data transmission slot as empty if a first byte is missing in that data transmission slot. [13] Sensor according to claim 9, wherein the shared signal conductor is one of a pair of differential signal conductors. [14] Sensor according to claim 9, wherein the controller is configured to align a bus clock signal to the periodic pulses. [15] Sensor according to claim 9, wherein determining further includes: resetting the data transmission slot count value after detecting that one of the periodic pulses has been prolonged by the bus control. [16] Methods for digital communication, which include: Detecting periodic pulses on a shared signal conductor, with each pulse initiating a data transmission slot; and Determine which of the data transmission slots correspond to a local node ID, where determining includes: Driving the shared signal conductor with a pulse representing a resynchronization request when n-1 consecutive data transmission slots are empty, where n is a total number of sensors connected to the shared signal conductor; and After triggering or detecting a pulse representing a resynchronization request, tracking a data slot count value, which treats a first data slot after the resynchronization request as the first data slot in a series of frames, each of which has n data slots, with each data slot in the frame having a slot count value that corresponds to a respective node ID. [17] Method for digital communication according to claim 16, wherein determining further includes setting the data transmission slot count value based on a node ID contained in a data transmission from another sensor. [18] Method for digital communication according to claim 16, wherein each data transmission slot is designed to receive multiple bytes and wherein the pulse representing a resynchronization request has a position corresponding to a second of the multiple bytes. [19] Method for digital communication according to claim 18, wherein each node is configured to treat a data transmission slot as empty if a first byte is missing in that data transmission slot. [20] Method for digital communication according to claim 16, further comprising: Generating a local clock signal; Aligning the local clock signal with the periodic pulses and Sending digital data during data transmission slots that correspond to the local node ID. [21] Method for digital communication according to claim 16, wherein determining includes resetting the data transmission slot count after detecting that one of the periodic pulses is prolonged.

Images