Control, method and computer program for a precharging process in a converter stage
The implementation of a pre-charge operation in converter stages addresses inefficiencies during start-up and load droop by ensuring a stable power supply for high-side switches, improving efficiency and reducing losses in converter stages.
Patent Information
- Application Number
- DE102024201759
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-26
- Publication Date
- 2025-08-28
AI Technical Summary
Conventional converter stages face inefficiencies and robustness issues during start-up and load droop situations, particularly due to the inability to provide sufficient power supply for switching operations, leading to problems like uncontrolled switching and increased losses.
A pre-charge operation is implemented by controlling the high-side and low-side switches during a negative half-wave of the input AC voltage to charge the supply capacitor of the bootstrap circuit, ensuring a stable power supply for the high-side fast arm switch before normal switching operations.
This approach enhances the efficiency and robustness of converter stages by ensuring uninterrupted switching and reducing power losses, particularly in GaN devices, by preventing the use of parasitic diodes and maintaining stable gate driver impedance.
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Abstract
Description
Technical area
[0001] Embodiments include controllers, methods, and computer programs for performing precharging operations in converter stages.
[0002] Embodiments include controllers, methods, and computer programs for bootstrap capacitor charging for totem pole PFC (Power Factor Correction) stages and other H-bridge topologies. background
[0003] Converter stages are important devices for efficiently delivering power to a load. One example is power factor correction (PFC) converters, such as totem-pole PFC stages, which are used to increase the power factor of a load.
[0004] Accordingly, it is important to be able to provide such conversions in any type of operating situation. However, conventional solutions have shortcomings, particularly in some situations, such as during startup or after load shedding.
[0005] Therefore, there is a need for an improved concept for operating a converter stage that allows to improve the efficiency and robustness of the converter stage, for example, particularly with respect to different operating conditions, such as during start-up or a load dump situation.
[0006] Such a need is met by the subject matter of the independent claims. Further embodiments are defined by the subject matter of the dependent claims. Brief description
[0007] Embodiments include a controller configured to control operation of a converter stage. The converter stage includes a high-side fast-leg switch and a low-side fast-leg switch connected in series between a high-side output terminal and a low-side output terminal, with a fast-leg node between the high-side fast-leg switch and the low-side fast-leg switch, the fast-leg node coupled to a first terminal of an AC input source.The converter stage further comprises a high-side slow-leg switch and a low-side slow-leg switch connected in series between the high-side output terminal and the low-side output terminal, with a slow-leg node between the high-side slow-leg switch and the low-side slow-leg switch, the slow-leg node being coupled to a second terminal of the AC input source.
[0008] Additionally, the converter stage includes an inductor coupled between the fast branch nodes and the slow branch nodes in series with the AC input source, a fast branch high-side driver configured to drive the fast branch high-side switch, a bootstrap circuit coupled between the fast branch nodes and the fast branch high-side driver to power the fast branch high-side driver, and an output capacitor coupled between the high-side output terminal and the low-side output terminal.
[0009] Furthermore, an AC input voltage of the AC signal input source is defined as a potential difference between the first terminal of the AC signal input source and the second terminal of the AC signal input source.
[0010] The controller is configured to, during a normal switching operation, control the high-side switch of the slow branch to an OFF state during a positive half-cycle of the input AC voltage and to an ON state during a negative half-cycle of the input AC voltage, and to control the low-side switch of the slow branch to an ON state during the positive half-cycle of the input AC voltage and to an OFF state during the negative half-cycle of the input AC voltage. Furthermore, the controller is configured to control the high-side switch of the fast branch and the low-side switch of the fast branch depending on a charge state of the inductor to alternately charge and discharge the inductor to the output capacitor.
[0011] Furthermore, the controller is configured to perform a precharge operation, for example, before starting the normal switching operation, by controlling the high-side switch of the slow branch, the low-side switch of the slow branch, and the high-side switch of the fast branch to the OFF state and the low-side switch of the fast branch to the ON state during a negative half-cycle of the input AC voltage to precharge a supply capacitor of the bootstrap circuit.
[0012] It should be noted that the inductor can be coupled, for example, between the first terminal of the AC input source and the node of the fast branch, or between the second terminal of the AC input source and the node of the slow branch. Optionally, the converter stage can comprise a first and a second inductor, with the first inductor coupled between the AC input source and the node of the fast branch, and the second inductor coupled between the AC input source and the node of the slow branch.
[0013] Providing sufficient power to switch some switches may not always be possible according to conventional concepts. In some situations, such as during startup and / or during a load shedding situation, it may not be possible to switch the high-side switch of the fast branch according to such conventional concepts.
[0014] The problem occurs, for example, during startup when a corresponding supply capacitor is not charged. At this time, the high-side switch of the fast branch cannot be turned on in some situations because no supply is available for its gate driver.
[0015] Providing a specific precharge operation can enable such problems to be overcome. Therefore, for example, before starting the normal switching operation, e.g., during startup and / or during a load dump situation, according to embodiments, the converter stage can be set to a specific precharge state with respect to the switches to allow a charging current to charge the supply capacitor of the high-side switch driver of the fast branch.
[0016] This can be achieved by controlling the high-side switch of the slow branch, the low-side switch of the slow branch and the high-side switch of the fast branch to the OFF state and the low-side switch of the fast branch to the ON state during a negative half-cycle of the input AC voltage.
[0017] A charging current to enable unimpeded switching during normal switching is introduced according to embodiments by introducing a pre-charging mode. Therefore, there is a need to improve the efficiency and robustness of the converter stage. Short description of the drawings
[0018] The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the embodiments. In the following description, various embodiments are described with reference to the following drawings. Fig. 1 shows a schematic view of a converter stage according to embodiments; Fig. Figure 2 shows a schematic view of the converter stage of Fig. 1 during a positive AC signal input half-wave according to an embodiment; Fig. 3 shows a schematic view of the converter stage of Fig. 1 during the positive AC input half-wave, for example following the Fig. 2 shown situation, according to an embodiment; Fig. Figure 4 shows a schematic view of the converter stage of Fig. 1 during the negative AC input half-wave, for example following the Fig. 3 shown situation, according to an embodiment; Fig. Figure 5 shows a schematic view of the converter stage of Fig. 1 during the negative AC input half-wave, for example following the Fig. 4 shown situation, according to an embodiment; Fig. 6 shows a schematic view of a converter stage with additional, optional features according to an embodiment; Fig. Figure 7 shows a schematic view of a first aspect of the converter stage of Fig. 6 according to embodiments; Fig. Figure 8 shows a schematic view of a second aspect of the converter stage of Fig. 6 according to embodiments; Fig. 9 shows a schematic representation of signals over time (t) for converter stages for a pre-charging operation and normal switching operation according to embodiments; Fig. 10 shows schematic representations of signals over time (t) for a pre-charging process and normal switching process for converter stages in a load dump situation with restart during the negative AC signal input half-wave according to embodiments; Fig. 11 shows schematic representations of signals over time (t) for a pre-charging process and normal switching process for converter stages in a load dump situation with restart during the positive AC signal input half-wave according to embodiments; Fig. 12 shows a schematic representation of signals over time (t) for a precharge operation and normal switching operation for converter stages, wherein the low-side switch of the fast branch is in the ON state only for a portion of the negative AC input half-wave, according to embodiments; and Fig. 13 shows a schematic block diagram of a method for controlling the operation of a converter stage according to an embodiment. Detailed description of the implementation examples
[0019] The same or equivalent elements or elements with the same or equivalent functionality are designated by the same or equivalent reference numerals in the following description, even if the same appear in different figures.
[0020] In the following description, numerous details are set forth to provide a more detailed explanation of embodiments. However, it will be apparent to those skilled in the art that embodiments may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form and not in detail to avoid obscuring embodiments. Additionally, features of the various embodiments described hereinafter may be combined with one another unless specifically stated otherwise.
[0021] Fig. Figure 1 shows a schematic view of a converter stage according to one embodiment. As an example, a simplified schematic representation of a totem pole PFC stage is shown in Fig. 1, however, embodiments are not limited to such specific converter stage topologies. In general, embodiments can address any type of half-bridge topology.
[0022] Fig. 1 shows a converter stage 100 comprising a high-side switch 121 (HS_F) of the fast branch and a low-side switch 122 (LS_F) of the fast branch connected in series between a high-side output terminal 103 and a low-side output terminal 104, a high-side switch 111 (HS_S) of the slow branch and a low-side switch 112 (LS_S) of the slow branch connected in series between the high-side output terminal 103 and the low-side output terminal 104, an inductor 130 (also referred to as inductor L) coupled between a first terminal 101 of an AC signal input source 200 and a node 123 of the fast branch between the high-side switch 121 of the fast branch and the low-side switch 122 of the fast branch, and an output capacitor 140 (also called capacitor C3),which is coupled between the high-side output terminal 103 and the low-side output terminal 104.,
[0023] A node 113 of the slow branch between the high-side switch 111 of the slow branch and the low-side switch 112 of the slow branch is coupled to a second terminal 102 of the AC signal input source 200, wherein an AC input voltage V AC of the AC signal input source 200 is defined as a potential difference between the first terminal 101 of the AC signal input source and the second terminal 102 of the AC signal input source. A voltage between the high-side output terminal 103 and the low-side output terminal 104 is defined as V DC specified.
[0024] For simplicity, a fast branch high-side driver configured to drive the fast branch high-side switch 121 and a bootstrap circuit coupled between the fast branch node 123 and the fast branch high-side driver to power the fast branch high-side driver are not shown, but are described with respect to Fig. 6 is discussed in more detail.
[0025] For a better understanding of embodiments, a normal operation of the converter stage 100 is first discussed before a detailed explanation of the precharging of the supply capacitor of the bootstrap circuit follows.
[0026] During normal operation, a controller for controlling the converter stage 100 is configured, according to embodiments, to set the high-side switch 111 of the slow branch to an OFF state during a positive half-cycle of the input AC voltage and to an ON state during a negative half-cycle of the input AC voltage, to set the low-side switch 112 of the slow branch to an ON state during the positive half-cycle of the input AC voltage and to an OFF state during the negative half-cycle of the input AC voltage, and to control the high-side switch 121 of the fast branch and the low-side switch 122 of the fast branch depending on a charge state of the inductor 130 to alternately charge the inductor and discharge it to the output capacitor 140.
[0027] It will be Fig. 2 to Fig. 5, which show the basic operation of a totem pole PFC stage as used in Fig. 1 is shown.
[0028] Fig. Figure 2 shows a schematic view of the converter stage of Fig. 1 during a positive AC signal input half-wave according to one embodiment. A waveform of the input voltage V AC over time is shown in the diagram 201, where the arrow 202 indicates the time for which a current flow in the stage 100 is indicated by the arrows 105. Furthermore, a course of the current I L of the inductor 130 is shown in the diagram 131 over time.
[0029] During the positive AC input half-wave, switch LS_S 112 is closed, while switch LS_F 122 is closed to charge inductor L 130 with current. The ON time of switch LS_F 122 can be kept constant across the AC input waves to ensure PFC functionality.
[0030] Fig. 3 shows a schematic view of the converter stage of Fig. 1 during the positive AC input half-wave, for example following the Fig. 2 shown situation, according to an embodiment.
[0031] In Fig. 3, the switch LS_F 122 is opened, for example, after a constant ON time, and the switch HS_F 121 is closed. The current stored in the inductor L 130 is now discharged into the output capacitor C3 140. HS_F 121 is kept ON, for example, as long as the inductor current is positive (see 131). When the inductor current reaches 0, the switch HS_F 121 is opened and the switch LS_F 122 is closed again to recharge the inductor (see Fig. 2). During the positive half-cycle, the switch LS_F 122 is used to charge, and the switch HS_F 121 is used to discharge the inductor L 130.
[0032] Fig. Figure 4 shows a schematic view of the converter stage of Fig. 1 during the negative AC input half-wave, for example following the Fig. 3, according to an embodiment. During the negative AC signal input half-wave, the switch HS_S 111 is closed. The switch HS_F 121 is closed to charge the inductor L 130, now with a negative current (see reversed direction of the arrows 105 compared to Fig. 2 and Fig. 3). The constant ON time can be applied to the HS_F 121 switch to ensure PFC operation.
[0033] Fig. Figure 5 shows a schematic view of the converter stage of Fig. 1 during the negative AC input half-wave, for example following the Fig. 4 shown situation, according to an embodiment. As in Fig. As shown in Figure 5, switch HS_F 121 is open, for example, after a constant ON time, and switch LS_F 122 is closed. The negative current stored in inductor L 130 is now discharged into the output capacitor C3 140, similar to the positive AC input half-cycle. LS_F 122 is kept ON, for example, as long as the inductor current is negative. When the inductor current reaches 0, switch LS_F 122 is opened, and switch HS_F 121 is closed again to recharge inductor 130 (see Fig. 4). During the negative half-cycle, the switch HS_F 121 is used to charge, and the switch LS_F 122 is used to discharge the inductor L 130, inversely to the positive AC input half-cycle.
[0034] Next, Fig. 6, which shows a schematic view of a converter stage with additional, optional details according to an embodiment. Fig. 6 shown converter stage 300, the converter stage 100 of Fig. 1 to Fig. 5 with further details.
[0035] Fig. 6 shows a converter stage 300 comprising a high-side switch 321 of the fast branch and a low-side switch 322 of the fast branch connected in series between a high-side output terminal 303 and a low-side output terminal 304, a high-side switch 311 of the slow branch and a low-side switch 312 of the slow branch connected in series between the high-side output terminal 303 and the low-side output terminal 304, an inductor 330 (also referred to as inductor L) coupled between a first terminal 301 of an AC signal input source 200 and a node 323 of the fast branch between the high-side switch 321 of the fast branch and the low-side switch 322 of the fast branch, a high-side driver 350 of the fast branch configured to drive the high-side switch 321 of the fast branch to control a bootstrap circuit 360,coupled between the fast branch node 323 and the fast branch high-side driver to power the fast branch high-side driver, and having an output capacitor 340 coupled between the high-side output terminal 303 and the low-side output terminal 304.
[0036] A slow-leg node 313 between the high-side switch of the slow-leg and the low-side switch of the slow-leg is coupled to a second terminal 302 of the AC input source 200, and an AC input voltage of the AC input source 200 is defined as a potential difference between the first terminal 301 of the AC input source and the second terminal 302 of the AC input source.
[0037] In one embodiment, the bootstrap circuit 360 includes a supply capacitor 361 and a diode 362. The fast leg high-side driver 350 further includes, as optional features, a level shifter 351 and an amplifier 352. The converter stage 300 further includes, as optional features, a slow leg high-side driver 370 configured to drive the slow leg high-side switch 311, and a bootstrap circuit 380 (e.g., a slow leg bootstrap circuit) coupled between the slow leg node 313 and the slow leg high-side driver for supplying power to the slow leg high-side driver.
[0038] As further optional features, the slow-leg bootstrap circuit 380 includes a slow-leg supply capacitor 381 and a diode 382. Furthermore, the slow-leg high-side driver 370 includes, as optional features, a level shifter 371 and an amplifier 372. Furthermore, the converter stage 300 includes, as optional features, a slow-leg low-side driver 391, as an example in the form of an amplifier configured to drive the slow-leg low-side switch 312, and a fast-leg low-side driver 392, as an example in the form of an amplifier configured to drive the fast-leg low-side switch 322.
[0039] Furthermore, Fig. 6 shows a controller 400 configured to control the operation of the converter stage 300. The controller 400 has outputs for controlling the respective switches 311, 312, 321, 322. As an optional feature, the respective outputs of the controller 400 are coupled to a respective driver 350, 370, 391, 392. Thus, Fig. 6 illustrates a converter system according to embodiments, including controller 400 and converter stage 300. Again, it should be noted that, in general, according to embodiments, the converter stage may be a totem-pole power factor correction converter. However, embodiments are not limited to such a structure.
[0040] As a further optional feature, ground terminals of the drivers 391, 392 and level shifters 351, 371 and the ground terminal of the controller 400 are coupled to the low-side output terminal 304. Furthermore, as an optional feature, the bootstrap circuit 360 and the controller 400 are connected to a common supply voltage V VCC As an example, the bootstrap circuit 380 is also connected to the supply voltage V VCC In particular, as an example, the respective drivers 391, 392 are also connected to the supply voltage V VCC coupled.
[0041] The controller 400 is configured, during a normal switching operation, to control the high-side switch 311 of the slow branch to an OFF state during a positive half-cycle of the input AC voltage and to an ON state during a negative half-cycle of the input AC voltage, to control the low-side switch 312 of the slow branch to an ON state during the positive half-cycle of the input AC voltage and to an OFF state during the negative half-cycle of the input AC voltage, and to control the high-side switch 321 of the fast branch and the low-side switch 322 of the fast branch depending on a charge state of the inductor 330 to alternately charge the inductor and discharge it to the output capacitor 340. Thus, the controller 400 may be configured to Fig. 1 to Fig. 5 to carry out the procedure discussed.
[0042] Optionally, the bootstrap circuit 360 (and correspondingly, the circuit 380) may include a resistor adjacent to the diode 362, wherein the resistor is coupled in series with the diode to limit a charging current of the supply capacitor 361. Optionally, the controller may be configured to adjust the duration of the precharge operation within the negative half-cycle of the input AC voltage based on the resistance of the resistor and the capacitance of the supply capacitor. Limiting the charging current may provide increased protection against device failure due to excessive currents and / or device heating.
[0043] It should be noted that corresponding elements 1xx, as in Fig. 1 to Fig. 5, may have the same, similar, or corresponding features, functionalities, and details as the elements 3xx. The same applies conversely to the elements 3xx with respect to the elements 1xx.
[0044] The gate driver 350 of the high-side switch (HS_F) 321 of the fast branch can normally use the bootstrap diode (D1) 362 and the capacitor (C1) 361 to obtain a supply voltage during the ON time of the low-side switch (LS_F) 322 of the fast branch. While the low-side switch (LS_F) 322 of the fast branch is OFF, the capacitor C1 361 can supply the gate driver of the high-side switch of the fast branch.
[0045] In this regard, the inventors have recognized that a problem during startup, where it may not be possible to charge the capacitor, can be avoided according to embodiments. At this time, the high-side switch 321 of the fast branch cannot be turned on according to conventional solutions because no supply is available for its gate driver 350.
[0046] Therefore, the controller 400 is configured to perform a precharge operation, for example, before starting the normal switching operation, by controlling the high-side switch 311 of the slow branch, the low-side switch 312 of the slow branch, and the high-side switch 321 of the fast branch to the OFF state and the low-side switch 322 of the fast branch to the ON state during a negative half-cycle of the input AC voltage to precharge the supply capacitor 361 of the bootstrap circuit 360.
[0047] In other words, as an example for the case of a totem pole PFC stage, normal operation may be that the low side switch (LS_S) 312 of the slow leg is ON during the entire positive AC input half cycle and the high side switch (HS_S) 311 of the slow leg is ON during the entire negative AC input half cycle.
[0048] One aspect is to turn ON the low-side switch (LS_F) 322 of the fast branch instead of the high-side switch of the slow branch during the negative AC input half-cycle before starting normal switching (see signal 920 in Fig. 9). This can ensure that the capacitor C1 361 is fully charged, for example via the optional bootstrap diode D1 362, before the process is started (e.g., the normal switching process).
[0049] Thus, in general, a controller according to embodiments, e.g., 400, may optionally be configured to perform the precharge operation before starting the normal switching operation to precharge the supply capacitor 361 from a discharged supply capacitor state to a charged supply capacitor state.
[0050] The discharged state may be a state in which the supply capacitor 361 cannot supply enough power to the high-side driver 350 of the fast branch to enable switching of the high-side switch 121, 321 of the fast branch, and the charged state may be a state in which the supply capacitor can supply enough power to the high-side driver 350 of the fast branch to enable switching of the high-side switch 121, 321 of the fast branch.
[0051] Fig. Figure 6 may show a, for example, almost complete, schematic of a totem-pole PFC stage that uses one controller to control all switches (in other words, further optional features may be present). Since the gate driver inputs of the high-side switches 311, 321 are also floating, like their supplies, a level shifter 351, 371 may be used or even necessary to transfer the GND-referenced high-side gate control signals (e.g., HS_S, e.g., HS_F) to the gate driver inputs. These level shifters can, for example, typically use both supplies in parallel.
[0052] The controller 400 may know the phase of the AC input wave (thus, it may be configured to be provided with such information, or it may be configured to determine such information) and may therefore properly control all gate signals. Therefore, during startup, the controller 400 may ensure that, for example, for a full negative AC input half-wave (or only a portion thereof), the switch LS_F 322 is turned ON, e.g., instead of HS_S 311. This charges the capacitor C1 361 for proper operation of the gate driver 350 of the switch HS_F 321 for the next positive AC input half-wave.
[0053] Thus, in general, a controller according to embodiments may be configured to control the high-side switch of the fast branch, e.g., 121, 321, the low-side switch of the fast branch, e.g., 122, 322, the high-side switch of the slow branch, e.g., 111, 311, and the low-side switch of the slow branch, e.g., 112, 312, based on information about a phase of the input AC voltage. The inventors have recognized that the control based on the phase information can be performed robustly and reliably.
[0054] For further explanation of the converter stage architecture according to embodiments, Fig. 7 and Fig. 8 is referred to. Fig. 7 and Fig. 8 show schematic views of converter stages according to embodiments. As in Fig. 6, Fig. 7 and Fig. As shown in Figure 8, the switches can optionally be implemented with transistors such as MOSFET, GaN (gallium nitride) based transistors, SiC (silicon carbide) based transistors or IGBT. Fig. Figure 7 shows a basic implementation with MOSFET and gate drivers.
[0055] Thus, in particular, the high-side switch 121, 321 of the fast branch optionally comprises at least one of a metal-oxide-semiconductor field-effect transistor, a gallium nitride transistor, a silicon carbide transistor, and / or an insulated-gate bipolar transistor. However, one or more, e.g., even all other, switches of the converter stage may also comprise one or more of these transistor types.
[0056] The gate drivers 391, 392 for the low-side switches 312, 322 can use a supply voltage related to their source potential. However, for all high-side switches 311, 321, the source potential can change during switching. Therefore, the ground of the gate driver 352 for the HS_F switch 321 can be connected to the source node of the HS_F switch, or even must be connected to the same, and can therefore be floating with the switching node. Fig. Figure 8 shows how the HS_F switch gate driver supply voltage HS_V_VCC is derived from the gate driver supply V VCC of the low-side switch.
[0057] The V VCC -Supply in Fig. 8 is connected to the HS_F gate driver 352 via the optional diode D1 362. In addition, a capacitor C1 361 is placed around the gate driver supply (e.g. compared to Fig. 7). During the ON time of the switch LS_F 322, the switching node and therefore the ground of the HS_F gate driver has the same potential as GND. This means that the V VCC supply drives a current through D1 into C1 until HS_F_VCC almost reaches V VCC -supply level is reached. While the LS_F switch 322 is OFF, the gate driver 352 of the HS_F switch 321 can use the energy stored in C1 361 to drive the gate of the HS_F switch. The next time the LS_F switch is ON, the capacitor C1 is sufficiently recharged to ensure continuous power to the gate driver.
[0058] It will be Fig. 9 is referred to. Fig. Figure 9 shows a schematic representation of signals over time (t) for a pre-charging process and normal switching process for converter stages, e.g., converter stages as in Fig. 1 to Fig. 8, according to embodiments.
[0059] Fig. 9 shows an example of the waveform of the alternating signal input voltage V AC 910, a driver signal 920 for the low-side switch LS_F, e.g., 122, e.g., 322, of the fast branch, a driver signal 930 for the high-side switch HS_F, e.g., 121, e.g., 321, of the fast branch, and a current through the inductor L, e.g., I L .
[0060] As in Fig. 9, a controller, e.g., 400, may be configured, according to embodiments, to perform a precharge operation before starting the normal switching operation. Therefore, the controller may set the high-side switch of the slow branch, e.g., 111, e.g., 311, the low-side switch of the slow branch, e.g., 112, e.g., 312, and the high-side switch of the fast branch, e.g., 121, e.g., 321, to the OFF state and the low-side switch of the fast branch, e.g., 122, e.g., 322, to the ON state during a negative half-cycle of the input AC voltage to precharge the supply capacitor, e.g., 361, of the bootstrap circuit, e.g., 360.
[0061] In Fig. 9, such ON precharge switching of the low-side switch of the fast branch is indicated by portion 921 of signal 920 during the negative half-cycle of the input AC voltage.
[0062] As an optional feature, the controller may be configured to start the pre-charging process, e.g., to start in a subsequent half-cycle, e.g., in particular, to start in a subsequent negative half-cycle of the AC input voltage 910, when it is detected that the AC input voltage 910 first reaches an upper threshold 951 (see indicators 960) and / or a lower threshold 952.
[0063] As indicated by signal portion 921, the low-side switch of the fast leg may be turned ON for a significant portion of the negative AC input half-cycle (e.g., up to the full negative half-cycle minus a guard interval at the end and beginning of the negative half-cycle) to allow the backup capacitor to reach a sufficient charge level to enable switching of the high-side switch of the fast leg.
[0064] In particular, according to embodiments, a controller may be configured to perform the precharging operation during a period of a single negative half-cycle of the input AC voltage to precharge the supply capacitor, e.g., 361, of the bootstrap circuit 360 (e.g., with the remaining time being part of a guard interval). The charging duration may enable a sufficient charge level of the supply capacitor to be ensured.
[0065] As in Fig. As shown in Figure 9, after the pre-charging process, for example starting with a subsequent positive half-wave of the input AC voltage, the controller can initiate the normal switching process (starting from t Schalten), with the low-side switch of the fast branch switching between ON and OFF states multiple times within a half-cycle of the input AC voltage, as indicated by signal section 922 (e.g., in contrast to the optional single activation during the pre-charge process, see solid line of section 921).
[0066] Starting from the signal section 922, Fig. 9 Signal representations according to the normal switching process show how in connection with Fig. 1 to Fig. 5 discussed.
[0067] In relation to Fig. 9, it should be noted that, in general, a controller according to embodiments, e.g., 400, may be configured to perform the precharge operation during a single negative half-cycle of the AC input voltage 910 to precharge the supply capacitor, e.g., 361, from the discharged state of the supply capacitor to the charged state of the supply capacitor. The supply capacitor may be charged from a low charge state, e.g., 5%, to a significant charge state or a sufficient charge state, e.g., 70%, to enable switching of the high-side switch of the fast branch. Thus, to achieve a "sufficient" charge state, even a shortened charge pulse, e.g., as in Fig. 12 shown.
[0068] The following Fig. 9 for the converter stage, as in Fig. 6. Regarding Fig. 6 shows Fig. 9 shows an example of a scope figure, for example, the start-up sequence of the converter stage 300. The signal 920 may represent the LS_F signal from the controller 400. A side effect of starting operation with the positive AC input half-cycle may be that the LS_S switch 312 is turned ON for the entire positive AC input half-cycle (although it should be noted that the LS_S switch 312 may optionally be in the ON state for only a portion of the positive AC input half-cycle). This may ensure that C2 381 can be fully charged via D2 382 for proper operation of the HS_S switch gate driver 370 for the following negative AC input half-cycle.
[0069] Thus, optionally for robust operation of the high-side switch of the slow branch, a controller according to embodiments may be configured to switch from the pre-charging operation to the normal switching operation at the beginning of a positive half-cycle of the input AC voltage.
[0070] A PFC stage, e.g., 300, could interrupt the switching operation in the event of a load dump situation. This can ensure that the voltage across the output capacitor C3, e.g., 340, no longer increases during the no-load state. When the load returns, the PFC stage should or may even need to restart operation as quickly as possible, for example, to prevent a critical voltage drop across the output capacitor C3. This means that the level of the HS_F gate driver supply should or must remain sufficient to enable an (optionally immediate) restart of the HS_F switch after the pause time has ended.
[0071] To ensure this, the same switching scheme as during startup according to embodiments can be applied to the switches. This means that during the pause time during the negative AC signal input half-wave, the switch LS_F 322 can be kept ON while both switches of the slow branch are kept OFF.
[0072] Fig. 10 and Fig. 11 shows examples of such a scenario. Thus, in general, according to embodiments, a controller may optionally be configured to detect a load drop between the high-side output terminal, e.g., 103, 303, and the low-side output terminal, e.g., 104, 304, and, in response to the load drop, switch from the normal switching operation to the pre-charging operation. Thus, the controller may be configured to measure a signal indicating a load drop situation or may receive information about a load drop from another entity.
[0073] Fig. Figure 10 shows schematic representations of signals over time (t) for a pre-charging process and normal switching process for converter stages, e.g., converter stages as in Fig. 1 to Fig. 8, in a load dump situation with restart during the negative AC signal input half-wave according to embodiments.
[0074] Fig. Figure 11 shows schematic representations of signals over time (t) for a pre-charging process and normal switching process for converter stages, e.g., converter stages as in Fig. 1 to Fig. 8, in a load dump situation with restart during the positive AC signal input half-wave according to embodiments.
[0075] On the upper half of Fig. 10 and Fig. 11 is a switching of the pre-charging process to the normal switching process at time t Schalten shown. On the lower half of Fig. 10 and Fig. 11 the signals are shown in the respective upper half on a smaller time scale around the time (see bracket 960) of switching t Schalten shown around.
[0076] In Fig. 10, a restart of operation is performed or even required during the negative AC signal input half-wave. Therefore, the LS_F switch 322 is turned OFF (see signal 920), the LS_S switch 391 is turned ON (not shown in the figure), and normal operation can start immediately.
[0077] Fig. Figure 12 shows a plot of signals over time (t) for a pre-charging process and normal switching process for converter stages, e.g., converter stages as in Fig. 1 to Fig. 8, wherein the low-side switch of the fast branch is in the ON state only for a portion of the negative AC input half-cycle, according to embodiments.
[0078] Fig. 12 shows an example of the waveform of the alternating signal input voltage V AC1210, a driver signal voltage 1220 for the low-side switch LS_F, e.g., 122, e.g., 322, of the fast branch, a driver signal voltage 1230 for the high-side switch HS_F, e.g., 121, e.g., 321, of the fast branch, a driver signal voltage 1270 for the low-side switch LS_S, e.g., 112, e.g., 312, of the slow branch, and a driver signal voltage 1280 for the high-side switch HS_S, e.g., 111, e.g., 311, of the slow branch over time. As shown in Fig. 12, the HS_VCC precharge pulse 1290, which may be a precharge pulse for HS_F_VCC (see Fig. 6) have a duration shorter than the full negative half-cycle of the input AC voltage.
[0079] Furthermore, guard intervals 1295 may exist between switching states of switches. In particular, guard intervals may exist between switching states of switches between the precharge operating mode and the normal switching mode.
[0080] As in Fig. 12, a controller according to embodiments may be configured to control, during the presence of a load dump, the high-side switch of the slow leg, e.g., 111, 311, the low-side switch of the slow leg, e.g., 112, 312, the high-side switch of the fast leg, e.g., 121, 321, and the low-side switch of the fast leg, e.g., 122, 322, to the OFF state during a positive half-cycle of the input AC voltage. Advantages of implementation examples:
[0081] Embodiments allow charging of the HSVCC before starting normal switching mode. In this regard, it should be noted that the gate driver should or even must be provided with a supply voltage to enable switching of the high-side switch of the fast branch. If this supply voltage is missing, discharging the inductance (e.g., in the form of an inductor coil) can be performed via the parasitic source-drain diode (e.g., of the high-side switch of the fast branch). This diode has a voltage drop of around 1 V in the case of a MOSFET, so losses occur that can heat the transistor. In the case of a GaN transistor, the voltage drop depends on the gate voltage and can easily range from a few volts to over 10 V. This causes additional problems in terms of power dissipation and device heating.
[0082] Thus, embodiments enable the prevention of such a discharge via the body diode of the high-side switch of the fast branch and thus switching losses and thermal problems.
[0083] Furthermore, a gate driver has a more stable (e.g., smaller) impedance to maintain the gate signal at 0 V (terminals) when supplied with a voltage. This reduces the problem of a high-side switch being erroneously turned on due to capacitive coupling via the Miller capacitance when the node at the source input rapidly increases several hundred V within nanoseconds.
[0084] Regarding the size of the HSVCC capacitance (e.g., the supply capacitor for the high-side switch of the fast branch): During the negative AC input half-cycle, the switching times of the low-side switch of the fast branch are very short in the zero-crossing region (e.g., due to the high voltage difference from 0 V to V_bus across the inductor), so sufficient recharging of the HSVCC capacitors (e.g., supply capacitor 361) cannot be guaranteed. Additionally, the switching times of the high-side switch of the fast branch can be very long (e.g., due to the low input voltage in the zero-crossing region), so that, especially for GaN switches that may require an additional constant gate current, all the energy during this time can or even must be provided by the HSVCC capacitor. In addition, the leakage current of the high-side driver is present during this time.These factors can determine the size of the capacitor, e.g. 361.
[0085] It will be repeated again Fig. 12 referred to. Fig. Figure 12 shows the four switches across the input voltage, e.g., 1210, corresponding to 910. The HSVCC precharge pulse (e.g., pulse for charging the supply capacitor 361) can or even must be performed during the negative AC input half-wave, while the high-side switch of the slow branch is off. The duration of the precharge pulse can be determined by how quickly the HSVCC capacitor can be charged, since the charging current is normally limited by a resistor in series with D1 (see Fig. 6) can be limited.
[0086] Fig. 13 shows a schematic block diagram of a method for controlling the operation of a converter stage according to an embodiment.
[0087] Fig.13 shows a method 1300 for controlling the operation of a converter stage comprising a high-side switch of the fast branch, e.g. 121, 321, and a low-side switch of the fast branch, e.g. 122, 322, connected in series between a high-side output terminal, e.g. 103, 303, and a low-side output terminal, e.g. 104, 304, a high-side switch of the slow branch, e.g. 111, 311, and a low-side switch of the slow branch, e.g. 112, 312, connected in series between the high-side output terminal and the low-side output terminal, an inductor, e.g. 130, 330, connected between a first terminal, e.g. 101, 301, of an AC signal input source, e.g. B. 200, and a node of the fast branch, e.g. 123, 323, coupled between the high-side switch of the fast branch and the low-side switch of the fast branch, a high-side driver of the fast branch, e.g.350 configured to drive the high-side switch of the fast branch, a bootstrap circuit, e.g. 360, coupled between the fast branch node and the high-side driver of the fast branch to supply power to the high-side driver of the fast branch, and an output capacitor, e.g. 140, 340, coupled between the high-side output terminal and the low-side output terminal, wherein a slow branch node, e.g. 113, 313, is coupled between the high-side switch of the slow branch and the low-side switch of the slow branch to a second terminal, e.g. B. 102, 302, of the alternating signal input source, wherein an input alternating voltage of the alternating signal input source is defined as a potential difference between the first terminal of the alternating signal input source and the second terminal of the alternating signal input source.
[0088] The method 1300 includes, during a normal switching operation, controlling 1310 the high-side switch of the slow leg to an OFF state during a positive half-cycle of the AC input voltage and to an ON state during a negative half-cycle of the AC input voltage, controlling the low-side switch of the slow leg to an ON state during the positive half-cycle of the AC input voltage and to an OFF state during the negative half-cycle of the AC input voltage, and controlling the high-side switch of the fast leg and the low-side switch of the fast leg depending on a charge state of the inductor to alternately charge and discharge the inductor to the output capacitor.
[0089] Furthermore, the method 1300 comprises performing, 1320, a precharge operation, for example, before starting the normal switching operation, by controlling the high-side switch of the slow branch, the low-side switch of the slow branch, and the high-side switch of the fast branch to the OFF state and the low-side switch of the fast branch to the ON state during a negative half-cycle of the input AC voltage in order to precharge a supply capacitor, e.g., 361, of the bootstrap circuit. Further comments
[0090] Regarding the business relevance of embodiments, it should be noted that embodiments can be used for any type of totem-pole PFC operation using a bootstrap diode for a high-side gate driver. For such applications, embodiments can ensure always proper operation of the high-side switching of the fast branch.
[0091] Embodiments provide a solution that is widely applicable to any type of half-bridge topologies using a bootstrap diode principle for a high-side gate drive supply.
[0092] An advantage of embodiments, e.g., compared to the use of a dedicated high-side gate drive supply with an isolated transformer (such as a flyback), may be that embodiments are less costly. Furthermore, compared to conventional solutions, embodiments allow the high-side switch to be activated during power-up to prevent the parasitic source-drain diode from having to take over the current, which can be critical, for example, for GaN devices due to their high voltage drop.
[0093] Embodiments can be used for any application using half-bridge topologies for a totem pole PFC and any other type of inverter.
[0094] Furthermore, it should be noted that, in general, embodiments allow the activation of the low-side switch of the fast branch, LS_F, during the entire negative AC input half-cycle. This may be possible according to embodiments because the high-side switch HS_S of the slow branch can remain in the OFF state. This may enable the charging of even large bootstrap capacitances (e.g., supply capacitors, e.g., 361).
[0095] Thus, embodiments generally enable the conversion of larger amounts of power compared to conventional solutions, among other things due to improved charging of the switching supply capacitor to reduce losses via power delivery via switch body diodes. This can be particularly important for GaN switches, thus enabling their use at higher power classes.
[0096] Examples of implementation are summarized below.
[0097] Embodiments comprise a controller, e.g., 400, configured to control operation of a converter stage, e.g., 100, 300, comprising: a high-side switch of the fast branch, e.g., 121, 321, and a low-side switch of the fast branch, e.g., 122, 322, connected in series between a high-side output terminal, e.g., 103, 303, and a low-side output terminal, e.g., 104, 304, with a node of the fast branch, e.g., 123, 323, between the high-side switch of the fast branch and the low-side switch of the fast branch, the node of the fast branch being connected to a first terminal, e.g., 101, 301, of an AC signal input source, e.g., B. 200, a high-side switch of the slow branch, e.g. 111, 311, and a low-side switch of the slow branch, e.g. 112, 312, which are connected between the high-side output terminal, e.g.103, 303, and the low-side output terminal, e.g. 104, 304, are connected in series, with a slow leg node between the slow leg high-side switch and the slow leg low-side switch, the slow leg node, e.g. 113, 313, being coupled to a second terminal, e.g. 102, 302, of the AC signal input source, e.g. 200, an inductor, e.g. 130, 330, coupled between the fast leg node and the slow leg node in series with the AC signal input source, a fast leg high-side driver, e.g. 350, configured to drive the fast leg high-side switch, e.g. B. 121, 321, a bootstrap circuit, e.g. 360, which is connected between the nodes of the fast branch, e.g. 123, 323, and the high-side driver of the fast branch, e.g.350, to supply power to the high-side driver of the fast branch, and an output capacitor, e.g., 140, 340, coupled between the high-side output terminal, e.g., 103, 303, and the low-side output terminal, e.g., 104, 304, and wherein an AC input voltage of the AC signal input source, e.g., 200, is defined as a potential difference between the first terminal, e.g., 101, 301, of the AC signal input source and the second terminal, e.g., 102, 302, of the AC signal input source. Furthermore, the controller is configured to perform a precharge operation, e.g., before starting the normal switching operation, by controlling the high-side switch of the slow branch, e.g., B. 111, 311, the low-side switch of the slow branch, e.g. 112, 312, and the high-side switch of the fast branch, e.g. 121, 321, into the OFF state and the low-side switch of the fast branch, e.g.122, 322, into the ON state during a negative half-cycle of the input AC voltage to precharge a supply capacitor, e.g. 361, of the bootstrap circuit, e.g. 360.
[0098] According to embodiments, the controller is configured to perform the precharge operation before starting the normal switching operation in order to precharge the supply capacitor, e.g., 361, from a discharged state of the supply capacitor to a charged state of the supply capacitor, wherein the discharged state is a state in which the high-side driver of the fast branch, e.g., 350, cannot be supplied with enough power by the supply capacitor to enable switching of the high-side switch of the fast branch, e.g., 121, 321, and wherein the charged state is a state in which the high-side driver of the fast branch, e.g., 350, can be supplied with enough power by the supply capacitor to enable switching of the high-side switch of the fast branch, e.g., 121, 321.
[0099] According to embodiments, the controller is configured to perform the precharging operation during a negative half-cycle of the input AC voltage in order to precharge the supply capacitor, e.g., 361, from the discharged state of the supply capacitor to the charged state of the supply capacitor.
[0100] According to embodiments, the controller is configured to perform the precharge operation during a single negative half-cycle of the input AC voltage to precharge the supply capacitor, e.g., 361, from a low charge state to a sufficient charge state to enable switching of the high-side switch of the fast branch.
[0101] According to embodiments, the bootstrap circuit, e.g., 360, comprises a diode, e.g., 362, and a resistor, wherein the resistor is coupled in series with the diode to limit a charging current of the supply capacitor, e.g., 361, and wherein the duration of the precharging process within the negative half-cycle of the input AC voltage is adjusted based on the resistance value of the resistor and the capacitance of the supply capacitor.
[0102] According to embodiments, the controller is configured to perform the precharging operation during a period of a single negative half-cycle of the input AC voltage in order to precharge the supply capacitor, e.g., 361, of the bootstrap circuit, e.g., 360.
[0103] According to embodiments, the controller is configured to switch from the pre-charging operation to the normal switching operation at the beginning of a positive half-cycle of the input AC voltage.
[0104] According to embodiments, the controller is configured to detect a load drop between the high-side output terminal, e.g., 103, 303, and the low-side output terminal, e.g., 104, 304, and to switch from the normal switching operation to the pre-charging operation in response to the load drop.
[0105] According to embodiments, the controller is configured to control, during the presence of the load dump, the high-side switch of the slow branch, e.g., 111, 311, the low-side switch of the slow branch, e.g., 112, 312, the high-side switch of the fast branch, e.g., 121, 321, and the low-side switch of the fast branch, e.g., 122, 322, to the OFF state during a positive half-cycle of the input AC voltage.
[0106] According to embodiments, the controller is configured to control the high-side switch of the fast branch, e.g., 121, 321, the low-side switch of the fast branch, e.g., 122, 322, the high-side switch of the slow branch, e.g., 111, 311, and the low-side switch of the slow branch, e.g., 112, 312, based on information about a phase of the input AC voltage.
[0107] Embodiments include a converter system comprising a controller, e.g., 400, according to embodiments, and in particular optionally according to one of the embodiments discussed above, and the converter stage, e.g., 100, 300.
[0108] According to embodiments, the converter stage, e.g., 100, 300, is a totem pole power factor correction converter.
[0109] According to embodiments, the high-side switch of the fast branch, e.g., 121, 321, comprises at least one of a metal oxide semiconductor field-effect transistor, a gallium nitride transistor, a silicon carbide transistor, and / or an insulated gate bipolar transistor.
[0110] Embodiments include a method, e.g., 1300, for controlling the operation of a converter stage, e.g., 100, 300, comprising: a high-side fast-leg switch, e.g., 121, 321, and a low-side fast-leg switch, e.g., 122, 322, connected in series between a high-side output terminal, e.g., 103, 303, and a low-side output terminal, e.g., 104, 304, with a fast-leg node, e.g., 123, 323, between the high-side fast-leg switch and the low-side fast-leg switch, the fast-leg node being connected to a first terminal, e.g., 101, 301, of an AC input source, e.g., B. 200, a high-side switch of the slow branch, e.g. 111, 311, and a low-side switch of the slow branch, e.g. 112, 312, which are connected between the high-side output terminal, e.g.103, 303, and the low-side output terminal, e.g. 104, 304, are connected in series, with a slow leg node between the slow leg high-side switch and the slow leg low-side switch, the slow leg node, e.g. 113, 313, being coupled to a second terminal, e.g. 102, 302, of the AC signal input source, e.g. 200, an inductor, e.g. 130, 330, coupled between the fast leg node and the slow leg node in series with the AC signal input source, a fast leg high-side driver, e.g. 350, configured to drive the fast leg high-side switch, e.g. B. 121, 321, a bootstrap circuit, e.g. 360, which is connected between the nodes of the fast branch, e.g. 123, 323, and the high-side driver of the fast branch, e.g.350, to supply power to the high-side driver of the fast branch, and an output capacitor, e.g., 140, 340, coupled between the high-side output terminal, e.g., 103, 303, and the low-side output terminal, e.g., 104, 304, and wherein an AC input voltage of the AC signal input source, e.g., 200, is defined as a potential difference between the first terminal, e.g., 101, 301, of the AC signal input source and the second terminal, e.g., 102, 302, of the AC signal input source.
[0111] The method further comprises performing a precharge operation, for example, before starting the normal switching operation, by controlling, for example, 1340, the high-side switch of the slow branch, the low-side switch of the slow branch, and the high-side switch of the fast branch to the OFF state and the low-side switch of the fast branch to the ON state during a negative half-cycle of the input AC voltage to precharge a supply capacitor, for example, 361, of the bootstrap circuit.
[0112] Embodiments comprise a computer program for performing a method according to embodiments and in particular optionally the method discussed above when the computer program runs on a computer. Implementation alternatives:
[0113] Although some aspects have been described in the context of a device, it should be understood that these aspects also represent a description of the corresponding method, so that a block or component of a device can also be understood as a corresponding method step or as a feature of a method step. Analogously, aspects described in the context of or as a method step also represent a description of a corresponding block, detail, or feature of a corresponding device. Some or all of the method steps may be performed by (or using) a hardware device, such as a microprocessor, a programmable computer, or an electronic circuit. In some embodiments, some or more of the key method steps may be performed by such a device.
[0114] Depending on specific implementation requirements, embodiments of the invention may be implemented in hardware or software. The implementation may be performed using a digital storage medium, such as a floppy disk, a DVD, a Blu-ray Disc, a CD, a ROM, a PROM, an EPROM, an EEPROM, or a FLASH memory, a hard disk, or other magnetic or optical storage device storing electronically readable control signals that can interact or cooperate with a programmable computer system to perform the respective method. Therefore, the digital storage medium may be computer-readable.
[0115] Some embodiments according to the invention thus comprise a data carrier having electronically readable control signals capable of interacting with a programmable computer system such that one of the methods described herein is carried out.
[0116] In general, embodiments of the present invention can be implemented as a computer program product with a program code, wherein the program code is effective to perform one of the methods when the computer program product is run on a computer. The program code can also be stored, for example, on a machine-readable medium.
[0117] Other embodiments include the computer program for performing one of the methods described herein, wherein the computer program is stored on a machine-readable carrier.
[0118] In other words, an embodiment of the method according to the invention is thus a computer program which has a program code for carrying out one of the methods described herein when the computer program runs on a computer.
[0119] A further embodiment of the method according to the invention is thus a data carrier (or a digital storage medium or a computer-readable medium) on which the computer program for performing one of the methods described herein is recorded. The data carrier, the digital storage medium, or the recorded medium is typically tangible and / or non-transitory.
[0120] A further embodiment of the method according to the invention is thus a data stream or a sequence of signals that represents the computer program for carrying out one of the methods described herein. The data stream or the sequence of signals can be configured, for example, to be transmitted via a data communication connection, for example, via the Internet.
[0121] A further embodiment comprises a processing device, for example a computer or a programmable logic device, which is configured or adapted to carry out one of the methods described herein.
[0122] A further embodiment comprises a computer on which the computer program for performing one of the methods described herein is installed.
[0123] A further embodiment according to the invention comprises a device or system configured to transmit a computer program for performing at least one of the methods described herein to a recipient (e.g., electronically or optically). The recipient may, for example, be a computer, a mobile device, a storage device, or a similar device. The device or system may, for example, comprise a file server for transmitting the computer program to the recipient.
[0124] In some embodiments, a programmable logic device (e.g., a field-programmable gate array, an FPGA) may be used to perform some or all of the functionality of the methods described herein. In some embodiments, a field-programmable gate array may interact with a microprocessor to perform any of the methods described herein. In general, the methods are preferably performed by any hardware device.
[0125] The devices described herein may be implemented, for example, using a hardware device, or using a computer, or using a combination of a hardware device and a computer.
[0126] The devices described herein, or any component of the devices described herein, may be implemented at least partially in hardware and / or in software.
[0127] The methods described herein may be implemented, for example, using a hardware device, or using a computer, or using a combination of a hardware device and a computer.
[0128] The methods described herein, or any component of the methods described herein, may be performed at least partially by hardware and / or by software.
[0129] The above-described embodiments are merely illustrative of the principles of the present invention. It is understood that modifications and variations of the arrangements and details described herein will be apparent to others skilled in the art.
[0130] Therefore, it is intended that the invention be limited only by the scope of the following claims and not by the specific details presented in the description and explanation of the embodiments herein.
Claims
[1] Controller (400) configured to control operation of a converter stage (100, 300) having the following features: a high-side switch (121, 321) of the fast branch and a low-side switch (122, 322) of the fast branch connected in series between a high-side output terminal (103, 303) and a low-side output terminal (104, 304), with a node (123, 323) of the fast branch between the high-side switch of the fast branch and the low-side switch of the fast branch, the node of the fast branch being coupled to a first terminal (101, 301) of an AC signal input source (200), a high-side switch (111, 311) of the slow branch and a low-side switch (112, 312) of the slow branch connected in series between the high-side output terminal (103, 303) and the low-side output terminal (104, 304), with a slow branch node between the high-side switch of the slow branch and the low-side switch of the slow branch, the slow branch node (113, 313) being coupled to a second terminal (102, 302) of the AC input source (200), an inductor (130, 330) coupled between the nodes (123, 323) of the fast branch and the nodes (113, 313) of the slow branch in series with the alternating signal input source (200), a high-side driver (350) of the fast branch configured to drive the high-side switch (121, 321) of the fast branch, a bootstrap circuit (360) coupled between the nodes (123, 323) of the fast branch and the high-side driver (350) of the fast branch to supply power to the high-side driver of the fast branch, and an output capacitor (140, 340) coupled between the high-side output terminal (103, 303) and the low-side output terminal (104, 304), wherein an AC input voltage of the AC signal input source (200) is defined as a potential difference between the first terminal (101, 301) of the AC signal input source and the second terminal (102, 302) of the AC signal input source, where the controller is configured to: during a normal switching operation, Controlling the high-side switch (111, 311) of the slow branch to an OFF state during a positive half-cycle of the input AC voltage and to an ON state during a negative half-cycle of the input AC voltage, Controlling the low-side switch (112, 312) of the slow branch to an ON state during the positive half cycle of the input AC voltage and to an OFF state during the negative half cycle of the input AC voltage and Controlling the high-side switch (121, 321) of the fast branch and the low-side switch (122, 322) of the fast branch in dependence on a charge state of the inductor (130, 330) to alternately charge the inductor and discharge it to the output capacitor (140, 340); and Performing a pre-charging operation, for example before starting the normal switching operation, by controlling the high-side switch (111, 311) of the slow branch, the low-side switch (112, 312) of the slow branch and the high-side switch (121, 321) of the fast branch to the OFF state and the low-side switch (122, 322) of the fast branch to the ON state during a negative half-cycle of the input AC voltage in order to pre-charge a supply capacitor (361) of the bootstrap circuit (360). [2] The controller (400) of claim 1, configured to: Performing the pre-charging operation before starting the normal switching operation to pre-charge the supply capacitor (361) from a discharged state of the supply capacitor to a charged state of the supply capacitor, wherein the discharged state is a state in which the supply capacitor cannot supply enough power to the high-side driver (350) of the fast branch to enable switching of the high-side switch (121, 321) of the fast branch, and wherein the charged state is a state in which enough power can be supplied to the high-side driver (350) of the fast branch through the supply capacitor to enable switching of the high-side switch (121, 321) of the fast branch. [3] The controller (400) of claim 2, configured to: Performing the precharging operation during a single negative half-cycle of the input AC voltage to precharge the supply capacitor (361) from the discharged state of the supply capacitor to the charged state of the supply capacitor. [4] Controller (400) according to one of claims 1 to 3, which is configured to: Performing the precharging operation during a single negative half-cycle of the input AC voltage to precharge the supply capacitor (361) from a low charge state to a significant charge state. [5] Controller (400) according to one of claims 2 to 4, wherein the bootstrap circuit (360) comprises a diode (362) and a resistor, the resistor being coupled in series with the diode to limit a charging current of the supply capacitor (361); and where the duration of the pre-charging process within the negative half-wave of the input AC voltage is set based on the resistance value of the resistor and the capacitance of the supply capacitor. [6] Controller (400) according to one of the preceding claims, which is configured to: Performing the precharging operation during a period of a single negative half-cycle of the input AC voltage to precharge the supply capacitor (361) of the bootstrap circuit (360). [7] Controller (400) according to one of the preceding claims, which is configured to: Switching from the pre-charge process to the normal switching process at the beginning of a positive half-cycle of the input AC voltage. [8] Controller (400) according to one of the preceding claims, which is configured to: detecting a load drop between the high-side output terminal (103, 303) and the low-side output terminal (104, 304), and Switch, in response to the load drop, from the normal switching operation to the pre-charging operation. [9] Controller (400) according to claim 8, configured to: during the presence of the load dump, controlling the high-side switch (111, 311) of the slow leg, the low-side switch (112, 312) of the slow leg, the high-side switch (121, 321) of the fast leg and the low-side switch (122, 322) of the fast leg to the OFF state during a positive half-cycle of the input AC voltage. [10] Controller (400) according to one of the preceding claims, which is configured to: Controlling the high-side switch (121, 321) of the fast branch, the low-side switch (122, 322) of the fast branch, the high-side switch (111, 311) of the slow branch and the low-side switch (112, 312) of the slow branch based on information about a phase of the input AC voltage. [11] Converter system comprising a controller (400) according to any one of the preceding claims and the converter stage (100, 300). [12] A converter system according to claim 11, wherein the converter stage (100, 300) is a totem pole power factor correction converter. [13] A converter system according to any one of claims 11 or 12, wherein the high-side switch (121, 321) of the fast branch comprises at least one of a metal oxide semiconductor field effect transistor, a gallium nitride transistor, a silicon carbide transistor and / or an insulated gate bipolar transistor. [14] A method (1300) for controlling operation of a converter stage (100, 300) comprising: a high-side switch (121, 321) of the fast branch and a low-side switch (122, 322) of the fast branch connected in series between a high-side output terminal (103, 303) and a low-side output terminal (104, 304), with a node (123, 323) of the fast branch between the high-side switch of the fast branch and the low-side switch of the fast branch, the node of the fast branch being coupled to a first terminal (101, 301) of an AC signal input source (200), a high-side switch (111, 311) of the slow branch and a low-side switch (112, 312) of the slow branch connected in series between the high-side output terminal (103, 303) and the low-side output terminal (104, 304), with a slow branch node between the high-side switch of the slow branch and the low-side switch of the slow branch, the slow branch node (113, 313) being coupled to a second terminal (102, 302) of the AC input source (200), an inductor (130, 330) coupled between the nodes (123, 323) of the fast branch and the nodes (113, 313) of the slow branch in series with the alternating signal input source (200), a high-side driver (350) of the fast branch configured to drive the high-side switch (121, 321) of the fast branch, a bootstrap circuit (360) coupled between the nodes (123, 323) of the fast branch and the high-side driver (350) of the fast branch to supply power to the high-side driver of the fast branch, and an output capacitor (140, 340) coupled between the high-side output terminal (103, 303) and the low-side output terminal (104, 304), wherein an AC input voltage of the AC signal input source (200) is defined as a potential difference between the first terminal (101, 301) of the AC signal input source and the second terminal (102, 302) of the AC signal input source, the method comprising the following steps: during a normal switching operation, Controlling (1310) the high-side switch of the slow branch to an OFF state during a positive half-cycle of the input AC voltage and to an ON state during a negative half-cycle of the input AC voltage, Controlling (1320) the low-side switch of the slow branch to an ON state during the positive half-cycle of the input AC voltage and to an OFF state during the negative half-cycle of the input AC voltage and controlling (1330) the high-side switch of the fast branch and the low-side switch of the fast branch in dependence on a charge state of the inductor to alternately charge and discharge the inductor to the output capacitor; and Carrying out a pre-charging process, for example before starting the normal switching process, by controlling (1340) the high-side switch of the slow branch, the low-side switch of the slow branch and the high-side switch of the fast branch to the OFF state and the low-side switch of the fast branch to the ON state during a negative half-cycle of the input AC voltage to precharge a supply capacitor (361) of the bootstrap circuit. [15] A computer program for performing the method according to claim 14, when the computer program runs on a computer.
Citation Information
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