Arrangement for generating and transmitting control signals

Abstract

Arrangement for generating control signals (22) for controlling an electric motor (10), comprising at least one microcontroller (12), at least two driver units (14) and at least one bus, wherein the at least one microcontroller (12) and the at least two driver units (14) are connected to each other via the at least one bus and a unit (30) for generating the control signals (22) is provided in the at least two driver units (14).

Description

The invention relates to an arrangement for generating and transmitting drive signals for driving a plurality of output stages for an electric motor.Prior ArtIn many vehicle components, such as the brake, the electric power steering system, etc., the actuator system is implemented via electric drives. These electric drives typically consist of three-phase or integer multiples of three-phase EC motors (EC: electrically commutated) and their drive units.For the actuation of the drive, DC / AC converters are used, which in turn regularly have a computing unit, a plurality of output stages and driver units with which the output stages are actuated. The output stage drivers are controlled via a bus, typically the SPI bus, and also via discrete signals.It is to be expected that higher demands are made on the availability of these drives in by-wire systems.In known embodiments, the following actuators are required for by-wire vehicles:an actuator on the steering rack SRA (steering rack actuator),a driver feedback unit and a steering request sensor SWA (steering wheel actuator),optionally an actuator on the rear steering rack SRA rear (steering rack actuator rear),a brake actuator at the front left (braking actuator FL),a brake actuator at the front right (braking actuator FR),a brake actuator at the rear left (braking actuator RL),a brake actuator at the rear right (braking actuator RR).Furthermore, it must be taken into account that a control device must be active or fail active in an x-by-wire application. This means that in the event of an I / O fault (I / O: electric / electronic), the functions steering and braking must continue to be available. For this reason, the motors of the SRA and the SWA are six-phase in embodiments. Note that there are also three-phase SWAs. The motor control of the SRA and of the SWA is therefore effected via two power stages or power stages (PS), for example. B6 bridges, and accordingly via two driver units or output stage drivers, for example. Gate driver unit (GDU). A schematic illustration of this is given in FIG. 1, which is explained in greater detail below.The publication DE 10 2009 045 023 A1 describes a method for communication between a microcontroller and an output-stage module via a communication connection. In this case, the microcontroller transmits a signal sequence via a microsecond bus.A data transmission device is known from the publication DE 197 33 748 C2. The device serves for unidirectional serial data transmission from a transmitting device of a microcontroller to an output stage IC of a motor vehicle control device.The publication EP 1 817 208 B1 describes an integrated circuit in a control device with a first evaluation of at least one acceleration signal for enabling at least one ignition output stage.Disclosure of the InventionAgainst this background, an arrangement for generating and transmitting drive signals for driving a plurality of output stages having the features of claim 1 and a method for generating drive signals having the features of claim 7 are presented.The arrangement presented is based on the finding that highly available drive systems, such as by-wire applications or applications in the field of steering and brake, require redundant supply, control and diagnosis of the power electronics. This redundancy is also required in the hardware architecture. The redun data architecture elements or electronic components are connected to one another via a large number of interfaces and signals. In particular, the output stage driver should be connected to more than one arithmetic unit. This means that instead of approximately 20 signals, approximately 40 signals must now be contacted.The arrangement presented serves for generating control signals for controlling an output stage for an electric motor. The arrangement has at least one microcontroller, at least two driver units and at least one bus. In this case, the at least one microcontroller and the at least two driver units are connected to one another via the at least one bus. Furthermore, a unit for generating the drive signals is typically provided in each of the at least two driver units.The bus offers the possibility of bidirectional communication between several subscribers. In this case, three or more subscribers, i.e. microcontrollers and driver units, are typically provided. The bus allows arbitration. Furthermore, it can be specified that information on the bus carried by the signals on the bus is assigned only to specific subscribers. Furthermore, fault-tolerant operation can be ensured.The bus can be configured such that a direct and / or an indirect connection is configured between the at least one microcontroller and the at least one driver unit. There is then typically an indirect connection between individual subscribers and / or in parallel thereto, so that if one of the two connections fails, further communication between these subscribers can be ensured.Bus communication is thus introduced between microcontroller and output stage driver. This bus can have a ring structure (daisy chain) or a tree structure (multidrop).Further advantages and embodiments of the invention will become apparent from the description and the appended drawings.It is understood that the features mentioned above and those still to be explained below can be used not only in the respectively specified combination, but also in other combinations or alone, without departing from the scope of the present invention.Brief Description of the DrawingsFIG. 1 shows a schematic, greatly simplified illustration of a control for an electric motor according to the presented method. FIGS. 2, 3, 4, 5, 6 to 7 show embodiments of the presented arrangement for generating drive signals having different ring structures. FIGS. 8, 9, 10 to 11 show embodiments of the presented arrangement for generating control signals having different tree structures. FIG. 12 shows a schematic illustration of an exemplary hardware architecture without a bus. FIG. 13 shows a schematic illustration of an exemplary hardware architecture with bus.Embodiments of the InventionThe invention is schematically illustrated in the drawings on the basis of embodiments and is described in detail below with reference to the drawings.FIG. 1 shows, in a greatly simplified, purely schematic illustration, an activation according to the presented method for an electric machine, in this case an electric drive or an electric motor 10. The driver unit 14, which may be connected to the driver unit, for example. Gate driver units (GDU) generate control signals 22 for the output stage 16, which is designed, for example, as a bridge. For this purpose, a unit 30 for generating the drive signals 22 is provided in the driver unit 14. The output stage 16 in turn generates the current signals 24 and thus the current for operating or supplying the motor 10 or the phases of the motor 10.The unit 30 generates the PWM signals for switching on and off the MOSFETs of the B6 bridge by means of timers. The unit 30 may reside in both the driver unit 14 and the microcontroller 12.Surrounded by a dashed line is an arrangement 32 for generating drive signals 22 for driving the output stage 16, which in turn supplies the motor 10, i.e. the output stage 16 for the motor 10.The illustration shows only one driver unit (14) for simplifying the illustration. In the arrangement presented, at least two driver units (14) are provided.FIG. 2 shows a motor configuration for by-wire steering and braking on the front axle. The illustration shows, as driver units, a first gate driver unit GDU 1 50, a second gate driver unit GDU 2 52, a third gate driver unit GDU 3 54, a fourth gate driver unit GDU 4 56, a fifth gate driver unit GDU 5 58 and a sixth gate driver unit GDU 6 60. Furthermore, the illustration shows a first output stage PS 1 70, a second output stage PS 2 72, a third output stage PS 3 74, a fourth output stage PS 4 76, a fifth output stage PS 5 78 and a sixth output stage PS 6 80. Furthermore, a first electric motor 90 for SRA, a second electric motor 92 for SWA are illustrated, a third electric motor 94 for an electromechanical brake (EMB) front left (FL) and a fourth electric motor 96 for an EMB front right (FR).Ring structures are conceivable for a motor configuration according to FIG. 2, as are shown in the next figures. It should be noted that the ring structure 6 according to FIG. 8 offers the highest availability.FIG. 3 shows the motor configuration from FIG. 2 having a microcontroller 110 and a first bus 114 and a second bus 116, which form a ring structure (ring structure 2) and which enable the transmission of control signals between the microcontroller 110 and the gate driver units 50 to 60.FIG. 4 shows the motor configuration from FIG. 2 having a microcontroller 120 and a first bus 124 and a second bus 126, which form a ring structure (ring structure 3) and which enable the transmission of control signals between the microcontroller 120 and the gate driver units 50 to 60.FIG. 5 shows the motor configuration from FIG. 2 having a first microcontroller 130, a second microcontroller 132, and a first bus 134, and a second bus 136, which form a ring structure (ring structure 4) and which enable the transmission of control signals between the microcontrollers 130 and 132 and the gate driver units 50 to 60.FIG. 6 shows the motor configuration from FIG. 2 having a first microcontroller 140, a second microcontroller 142, and a first bus 144, and a second bus 146, which form a ring structure (ring structure 5) and which enable the transmission of control signals between the microcontrollers 140 and 142 and the gate driver units 50 to 60.FIG. 7 shows the ring structure 6. Furthermore, the illustration shows a first driver unit 154, a second driver unit 156, a third driver unit 158 and a fourth driver unit 160 which are designed as gate driver units. A first bus 162 and a second bus 164 are provided for communication between the microcontrollers 150, 152 and the driver units 154, 156, 158 and 160.The first microcontroller 150 has inputs In1 165 and In2 166 and outputs Out1 167 and Out2 168. The second microcontroller 152 has inputs In1 169 and In2 170 and outputs Out1 171 and Out2 172. The first driver unit 154 has inputs InA1 173, InA2 174, InB1 175, InB2 176, and outputs OutA 177 and Out 178.The second driver unit 156 has inputs InA1 179, InA2 180, InB1 181, InB2 182 and outputs OutA 183 and Out 184. The third driver unit 158 has inputs InA1 185, InA2 186, InB1 187, InB2 188 and outputs OutA 189 and Out 190. The fourth driver unit 160 has inputs InA1 191, InA2 192, InB1 193, InB2 194 and outputs OutA 195 and Out 196.This embodiment provides an even greater availability compared to the other embodiments. A failure in a GDU (gate driver unit) does not result in the failure of the entire ring, as would be the case with the other ring structures. The defective GDU may be "skipped.". Another GDU takes over. Then the functionality of the defective GDU. Furthermore, both rings are still functional.In the embodiments according to FIGS. 3, 4, 5, 6 to 7, both direct and indirect connections between the subscribers are realized.Tree structures can also be realized:FIG. 8 shows the motor configuration from FIG. 2 having a microcontroller 210 and a first bus 214 and a second bus 216, which form a tree structure (tree structure 2) and which enable the transmission of control signals between the microcontroller 210 and the gate driver units 50 to 60.FIG. 9 shows the motor configuration from FIG. 2 having a microcontroller 220 and a first bus 224 and a second bus 226 which form a tree structure (tree structure 3) and which enable the transmission of control signals between the microcontroller 220 and the gate driver units 50 to 60.FIG. 10 shows the motor configuration from FIG. 2 having a first microcontroller 230, a second microcontroller 232 and a first bus 234 and a second bus 236, which form a tree structure (tree structure 4) and which enable the transmission of control signals between the microcontrollers 230 and 232 and the gate driver units 50 to 60.FIG. 11 shows the motor configuration of FIG. 2 including a first microcontroller 240, a second microcontroller 242, and a first bus 244 and a second bus 246 that form a ring structure (tree structure 5) and that enable control signals to be transmitted between the microcontrollers 240 and 242 and the gate driver units 50 to 60.In the embodiments of FIGS. 8, 9, 10 to 11, direct and indirect connections are thus realized.One or two buses are thus used to connect the microcontrollers to the output-stage drivers. In contrast to known process tests, the PWM signals are generated in the output-stage driver, i.e. the driver unit. However, the motor control continues to take place in the microcontroller.A simplification of the wiring between microcontrollers and output stage drivers is thus achieved in a control device with which a plurality of actuators in a vehicle are controlled. Despite this simplification, the availability of the overall system can be increased. In the event of failure of one output stage driver, all further output stage drivers can be reached via the bus. In addition, in the event of failure of a computing unit, the second computing unit can actuate and diagnose all output-stage drivers.In addition, the layout of corresponding control units can be simplified, since the wiring between the microcontrollers and the output-stage drivers is considerably simplified.FIG. 12 illustrates an example hardware architecture without a bus. The illustration shows a first microcontroller 300, a second microcontroller 302, a gate driver unit 304 and an output stage 306, which is designed as a B6 bridge. With the arrangement shown, a motor 308 is operated. In the first microcontroller 300, a motor controller 310 and a unit 312 for generating a PWM signal are provided. Accordingly, the second microcontroller 302 comprises a motor controller 320 and a unit 322 for generating a PWM signal. The two microcontrollers 300, 302 output: four SPI signals 330, six PWM signals 332, and four to seven diagnostic signals. The driver unit 304 outputs nine voltage signals 340 and six PWM signals.FIG. 13 shows an embodiment of the presented arrangement, which is denoted overall by the reference numeral 400 and comprises a first microcontroller 402, a second microcontroller 404 and a driver unit 406 which is configured as a gate driver unit. The two microcontrollers 402, 404 and the driver unit 406 are connected to one another via a bus 408.The first microcontroller 402 has a motor controller 410, and the second microcontroller 404 likewise has a motor controller 412. The first microcontroller 402 outputs two to four control signals 420 on the bus 408. Likewise, the second microcontroller 404 outputs two to four control signals 422 on the bus 408. The driver unit 406 controlled via the bus 408 comprises a unit 430 for generating drive signals 432, which in turn comprise nine voltage signals 434 and six PWM signals 436. An output stage 440 is activated, which in this case is designed as a B6 bridge and which supplies an electric motor 450 as well.It has thus been recognized that currently available output stage drivers are not suitable for use in a control device with bus communication between the microcontroller(s) and the GDU. Not all PWM signals can be transmitted via a bus, in particular due to the timing requirements of the PWM signal. Accordingly, the function of generating or generating the drive signal, for example the drive signal, which is then referred to as "PWM generation", is part of the driver unit; reference is made to FIGS. 12 and 13 in this regard.By comparing FIGS. 12 and 13, it can be seen directly that the layout of control units with bus communication between microcontroller and output stage driver is simplified because the number of signals which originate from the microcontroller is reduced from 14 to 17 to two to four signals.References included in the specificationThis list of documents cited by the applicant has been produced in an automated manner and is only included for the better information of the reader. The list is not part of the German patent application or utility model application. The DPMA does not take any adhesion for any faults or omissions.Patent Literature citedDE 10 2009 045 023 A1

[0007] DE 197 33 748 C2

[0008] EP 1 817 208 B1

[0009]

Claims

Arrangement for generating drive signals (22, 432) for driving an output stage (60, 70, 72, 74, 78, 80, 440) for an electric motor (10, 90, 92, 94, 96, 450), having at least one microcontroller (12, 110, 120, 130, 132, 140, 142, 150, 152, 210, 220, 230, 232, 240, 242, 402, 404), at least two driver units (14, 154, 156, 158, 160, 406) and at least one bus (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408), wherein the at least one microcontroller (12, 110, 120, 130, 132, 140, 142, 150, 152, 210, 220, 230, 232, 240, 242, 402, 404) and the at least two driver units (14, 154, 156, 158, 160, 406) via the at least one bus (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408) are connected to one another and a unit (30, 430) for generating the drive signals (22, 432) is provided in the at least two driver units (14, 154, 156, 158, 160, 406).Arrangement according to Claim 1, in which the bus (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408) is configured such that a direct and / or an indirect connection is configured between the at least one microcontroller (12, 110, 120, 130, 132, 140, 142, 150, 152, 210, 220, 230, 232, 240, 242, 402, 404) and the at least two driver units (14, 154, 156, 158, 160, 406).Arrangement according to Claim 1 or 2, in which the unit (30, 430) for generating the drive signals (22, 432) is configured to generate PWM signals.The arrangement of any of claims 1 to 3, wherein the at least one bus (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408) has a ring structure.The arrangement of any of claims 1 to 3, wherein the at least one bus (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408) has a tree structure.Arrangement according to one of Claims 1 to 5, in which two buses (114, 116, 124, 126, 134, 136, 144, 146, 162, 164, 214, 216, 224, 226, 234, 236, 244, 246, 408) are provided.Method for generating drive signals (22, 432) for driving an output stage (60, 70, 72, 74, 78, 80, 440) for an electric motor (10, 90, 92, 94, 96, 450) having an arrangement (32, 400) according to one of Claims 1 to 6.Method according to Claim 7, which is used to generate drive signals (22, 432) for the electric motor (10, 90, 92, 94, 96, 450) of a brake actuator.The method of claim 7 or 8, used to generate drive signals (22, 432) for the electric motor (10, 90, 92, 94, 96, 450) of a steering rack and pinion actuator.Method according to one of Claims 7 to 9, which is used to generate drive signals (22, 432) for the electric motor (10, 90, 92, 94, 96, 450) of a driver feedback unit.

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