Analog-to-digital converter and method for operating an analog-to-digital converter

Abstract

The present invention relates to analog-to-digital converters designed for converting an analog input signal S in into a digital output signal S out , the analog-to-digital converter comprising a phase-matching arrangement, at least one adjustment unit, wherein the adjustment unit is configured to depend on the input signal S in an operating mode of the phase matching arrangement by outputting a setting signal S set to adjust the phase matching arrangement, wherein the phase matching arrangement has several operating modes selectable by the adjustment unit for different attenuation of noise in the analog-to-digital converter.

Description

State of the art

[0001] The present invention relates to an analog-to-digital converter comprising a phase matching arrangement and at least one adjustment unit.

[0002] The prior art describes free-running delta-sigma modulators and incremental delta-sigma modulators. Free-running delta-sigma modulators can typically ensure very high output signal resolution through oversampling and noise shaping. However, this arrangement is not suitable for multiplex systems because the values ​​adjusted by the loop filter remain stored within the loop filter. Alternatively, an incremental delta-sigma modulator, designed for operating multiplex systems, can be used. The incremental delta-sigma modulator periodically resets the loop filter values ​​after a predetermined number of loop iterations, while maintaining the oversampling and noise shaping characteristics.The disadvantage of incremental delta-sigma modulators is that the maximum achievable signal-to-quantization noise ratio (SQNR) will always be lower than that of free-running delta-sigma modulators. One possible solution to this problem would be to switch between single-bit and multi-bit samples to ensure high linearity and high sampling noise suppression. However, this solution increases the footprint of the delta-sigma modulator. Another possibility would be to allow an exponential phase within the first-order modulator. However, this reduces the maximum stable amplitude (MSA) of the modulator. Implementing a multi-bit sampler can counteract this, but this again increases the complexity of the circuit. Disclosure of the invention

[0003] The analog-to-digital converter according to the invention enables the conversion of an analog input signal into a digital output signal with various noise transfer functions.

[0004] The analog-to-digital converter comprises a phase-matching circuit and at least one adjustment unit. The adjustment unit is configured to set an operating mode of the phase-matching circuit, depending on the input signal, by outputting an adjustment signal to the circuit. The phase-matching circuit has several operating modes, selectable by the adjustment unit, for varying degrees of noise attenuation in the analog-to-digital converter. This allows the aforementioned disadvantages to be mitigated while simultaneously retaining the advantages.

[0005] The dependent claims describe preferred embodiments of the invention.

[0006] Preferably, the phase-matching arrangement is configured to perform a reset to clear all phase-matching operations. This enables the implementation of the analog-to-digital converter in multiplexed systems. More preferably, the phase-matching arrangement is configured to change the operating mode during the reset depending on the setting signal S. set to change it. This allows the input signal to be transmitted with different noise transfer functions.

[0007] Furthermore, the operating modes exhibit different coefficients of the phase matching arrangement for fitting a noise transfer function. In other words, each operating mode has a coefficient, and these coefficients differ from one operating mode to the next.

[0008] The phase matching arrangement is preferably designed to adjust the input signal S in and the output signal S outThe phase of the two signals is compared. This allows us to check whether further adjustment of the output signal is necessary. Any required adjustment is initiated accordingly through this comparison.

[0009] Furthermore, the setting unit is designed to measure the input signal S in with a predefined limit signal S th to compare and, based on the comparison, determine the setting signal S set to output. This allows the appropriate noise transfer function to be applied to the incoming input signal.

[0010] Preferably, a number n, where n is greater than or equal to 1, of second setting units with differently predefined limit signals are arranged to enable n + 2 operating modes. This increases the number of possible noise transfer functions, allowing the input signal to be converted into an output signal even more precisely.

[0011] The second setting unit is preferably designed as a comparator. This simplifies the design of the overall system.

[0012] Furthermore, a sampling arrangement is connected downstream of the phase-matching circuit. This allows the analog input signal to be converted into a digital output signal. The sampling arrangement is preferably designed as a quantizer. Using the quantizer, an analog input signal is reconstructed by sampling it.

[0013] The invention further relates to a method for adjusting an analog-to-digital converter, wherein the analog-to-digital converter is configured to convert an analog input signal into a digital output signal and comprises a phase-matching arrangement for attenuating noise in the analog-to-digital converter. The method comprises acquiring the input signal, selecting, depending on the input signal, an operating mode from several operating modes of the phase-matching arrangement for varying noise attenuation in the analog-to-digital converter, generating a setting signal corresponding to the operating mode, and adjusting the operating mode of the phase-matching arrangement by outputting the setting signal to the phase-matching arrangement.

[0014] Preferably, the method further includes performing a reset of the phase matching arrangement to reset all phase matching operations and changing the operating mode during the reset depending on the setting signal.

[0015] In another embodiment of the method, the operating modes have different coefficients of the phase matching arrangement for adapting a noise transfer function.

[0016] Preferably, in a further process step, an input signal is compared with a predefined limit signal and the setting signal is output based on the comparison in order to set the appropriate operating mode.

[0017] The invention further relates to a computer program that is set up to execute the method according to the invention, as well as the embodiments listed accordingly.

[0018] The invention also relates to a computer-readable storage medium on which the computer program is stored in order to make the implementation of the method available in various analog-to-digital converters. Brief description of the drawings

[0019] Exemplary embodiments of the invention are described in detail below with reference to the accompanying drawings. The drawing shows: Fig. 1 a block diagram of an analog-to-digital converter according to the invention, and Fig. 2 a time-lapse diagram of the analog-to-digital converter according to the invention. Embodiments of the invention

[0020] Preferably, all identical components, elements and / or units in all figures are provided with the same reference numerals.

[0021] Fig. Figure 1 shows an analog-to-digital converter 1 configured to convert an analog input signal S ininto a digital output signal S out The analog-to-digital converter 1 has a phase-matching arrangement 2 and at least one adjustment unit 3. The adjustment unit 3 is configured to adjust the phase-matching arrangement based on the input signal S. in to set an operating mode of the phase matching arrangement 2. The phase matching arrangement 2 has several operating modes selectable by the setting unit 3 for different attenuation of noise in the analog-to-digital converter 1.

[0022] The phase matching arrangement 2 is further configured to adjust the input signal S in and the output signal S out to compare the phase alignment of the signals. The adjustment unit 3 is designed to compare the input signal S in with a predefined limit signal S th to compare and, based on the comparison, to generate a setting signal S setto output. The setting unit 3 is configured here as a comparator, but can also be configured as an analog-to-digital converter. In this case, a sampling arrangement 4 is connected downstream of the phase-matching arrangement 2. The sampling arrangement 4 is preferably configured as a quantizer.

[0023] Fig. Figure 2 shows a time history diagram of the analog-to-digital converter 1 according to the invention. Fig. It can be seen from Figure 2 that the phase-matching arrangement 2 is configured to perform a reset to revert all phase-matching operations. Furthermore, the phase-matching arrangement 2 is configured to change the operating mode during the reset depending on the setting signal S. set to change. The operating modes exhibit different coefficients of the phase matching arrangement 2 for adapting a noise transfer function.

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