Method for implementing data traffic control in a chiplet system

Abstract

The invention relates to a method (100) for performing data traffic control in a chiplet system (1), comprising: - Reading (101) a data stream which is directed from one die (4) to another die (5) of the chiplet system (1), - Perform (102) at least one conformity check of the read data stream based on at least one modification criterion, - Modifying (103) the data stream based on a result of at least one conformity check, if at least one modification criterion is met, - Forwarding (104) the data stream to the further die (5) of the chiplet system (1). Furthermore, the invention relates to a device for data traffic control, a chiplet system, a computer program, a device for data processing and a storage medium for this purpose.

Description

[0001] The invention relates to a method for implementing data traffic control in a chiplet system. Furthermore, the invention relates to a device for data traffic control, a chiplet system, a computer program, a data processing device, and a storage medium for this purpose. State of the art

[0002] Traffic shaping is a method for controlling network traffic to ensure optimal performance and reliability. It involves allocating network bandwidth and, for example, manually prioritizing different types of traffic. Alternatively, data streams can be classified at runtime by analyzing specific filter criteria (such as data fields on transfers), transfer length, or transfer rates. These classifications are then used during subsequent data transmission to ensure that critical data is transferred faster and more reliably than less critical data. This traffic shaping reduces network latency and improves overall performance.

[0003] Data traffic control in distributed systems, such as communication backbones, but also in (automotive) manycores "on-chip," is already well-established. The increased integration in chiplet systems presents new challenges, stemming primarily from technical limitations, but also from new collaboration models within an open ecosystem involving numerous business partners. This also necessitates the shared use of third-party and legacy components within a single chiplet system.

[0004] Currently, there is no inter-die traffic control in the context of multi-die solutions. Quality of Service (QoS) information, as used in on-chip traffic control, is no longer directly accessible in the standard transmission protocols used for die-to-die connections and is therefore not applicable to inter-die solutions. Nevertheless, both these low-level protocols and common high-level protocols, such as certain PCIe and CXL modes, must be used to enable an open ecosystem approach through these common standards. However, these standards do not offer any traffic control capabilities, as they were not specifically developed for the automotive domain. At the same time, any newly introduced traffic control method between dies must not violate these standards to avoid compromising compatibility.The de facto mandatory die-to-die protocol at the physical layer (UCle) is a pure die-to-die protocol with unidirectional lanes between exactly two dies. This means that some dies may not be directly connected to a trusted management die, but only routed indirectly via other dies. Disclosure of the invention

[0005] The invention relates to a method with the features of claim 1, a device for data traffic control with the features of claim 5, a chiplet system with the features of claim 7, a computer program with the features of claim 12, a device with the features of claim 13, and a computer-readable storage medium with the features of claim 14. Further features and details of the invention will become apparent from the respective dependent claims, the description, and the drawings.Features and details described in connection with the inventive method naturally also apply in connection with the inventive device for data traffic control, the inventive chiplet system, the inventive computer program, the inventive device and the inventive computer-readable storage medium, and vice versa, so that a mutual reference is always possible with regard to the disclosure of the invention.

[0006] The invention relates in particular to a method for performing data traffic control in a chiplet system, comprising the following steps: - Reading a data stream that is directed from one die to another die of the chiplet system, - Performing at least one conformity check of the read data stream based on at least one modification criterion, where the at least one modification criterion is, for example, a maximum transmission size per unit of time or a maximum gap between observed data of the same class within the read data stream, - Modifying the data stream based on a result of at least one conformity check, if at least one modification criterion is met, - Forwarding the data stream to the next die of the chiplet system.

[0007] A die is, in particular, a semiconductor device manufactured on a silicon wafer and comprising an integrated circuit. A chiplet system is, in particular, a semiconductor system comprising multiple dies mounted on a substrate or interposer and interconnected via an interface. The chiplets can have different functions and can be used to build complex circuits. Data stream reading is performed, in particular, without intermediate storage and without modifying the original values ​​in the read data stream. This advantageously reduces latency caused by data traffic control. The data traffic control device can analyze the data stream between different dies of the chiplet system and adjust it as needed to ensure correct and secure data transmission.Potential errors or inconsistencies can be detected and corrected by performing at least one conformity check and modifying the data stream. The method according to the invention particularly increases the reliability and integrity of data communication within the chiplet system. Furthermore, the data stream can be read from a physical layer of the chiplet system. Modifying the data stream based on the result of the conformity check preferably only occurs if the at least one conformity check indicates that the data stream does not meet at least one modification criterion.

[0008] It may also be possible that carrying out at least one conformity assessment includes the following step: - Detecting the start and / or end of individual information segments in the read data stream, whereby the detection can be implemented in hardware by a start-of-frame detector and counting logic.

[0009] At least one conformity check can then be performed for each detected individual information segment based on at least one modification criterion. In other words, individual information segments within the data stream are identified. Analyzing these individual segments within the framework of the at least one conformity check can enable a more precise and targeted review of the data stream.

[0010] It may be provided within the scope of the invention that modifying the data stream comprises at least one of the following steps: - Discarding individual information segments that meet at least one modification criterion, whereby the discarding can be done with or without feedback to the sender die, i.e., the die from which the data stream originates. - Transforming individual information segments that meet at least one modification criterion in order to achieve conformity of these information segments based on at least one modification criterion, - Transforming individual information segments that meet at least one modification criterion in order to achieve rejection of these information segments by at least one further die.

[0011] This flexibility allows, in particular, precise adaptation of data traffic control to the specific requirements of the chiplet system. Furthermore, the use of at least one modification criterion provides a basis for controlled and targeted data modification.

[0012] Advantageously, the invention may provide that the method further comprises the following step: - Initiating the execution of an authentication of the device for data traffic control, wherein the authentication is carried out using an encryption method, in particular with a hardware security module of the chiplet system.

[0013] Authentication using the encryption method significantly enhances protection against unauthorized access to sensitive data and enables trusted information exchange between the dies of the chiplet system. The hardware security module (HSM) is specifically designed to securely store and manage cryptographic keys and sensitive data. The encryption method utilizes a one-time shared pre-shared secret (PSK) and / or a pre-shared encryption algorithm, including its key coefficients (PSAs). If the traffic control device has redundant connections, a key-splitting scheme can be used after the initial one-time authentication of the traffic control device to the trusted hardware security module.This can make an attack more difficult, as an attacker then needs both splits of a key to carry out an attack.

[0014] The invention also relates to a device for data traffic control for a chiplet system, wherein the device for data traffic control is configured to carry out the method according to the invention. Thus, the device according to the invention offers the same advantages as those described in detail with reference to the method according to the invention. The device for data traffic control can therefore comprise a data processing device, such as an integrated circuit or a microcomputer, configured to carry out the method according to the invention.

[0015] Furthermore, the data traffic control device may include a data path and a control path, which are implemented separately and in parallel within the device. The data path is used for reading and forwarding, while the control path is used for performing at least one conformity check and modification. This parallelization or separation enables, in particular, more efficient handling and control of data traffic within the chiplet system, since the evaluation of filter criteria or modification criteria occurs in parallel with the forwarding of the data stream. The separation also reduces potential conflicts and sources of error by clearly defining the areas of responsibility.Furthermore, this can reduce latency, which can be limited to one or a few clock cycles of the communication clock by the data traffic control according to the invention; in contrast to a converter where entire transfer units must first be stored and unpacked.

[0016] The invention also relates to a chiplet system comprising the data traffic control device according to the invention and at least two dies, wherein the at least two dies are interconnected via the data traffic control device, and wherein the chiplet system preferably further comprises an additional hardware security module. Thus, the chiplet according to the invention offers the same advantages as described in detail with reference to the method and the data traffic control device. Due to its modular architecture and integrated security mechanisms, the chiplet system can be efficiently and securely integrated into a variety of applications, including those of varying criticality. The central control unit, for example, enables coordinated communication and data flow between the dies.The hardware security module ensures the protection of sensitive information, which is particularly relevant in applications with high security requirements.

[0017] Advantageously, the invention provides that the data traffic control device is arranged as a separate die between the at least two dies. The arrangement of the data traffic control device as a separate die particularly enables a modular structuring of the chiplet system and can facilitate the integration of further components into the chiplet system.

[0018] Furthermore, it is advantageous if, within the scope of the invention, the data traffic control device is integrated into one of the at least two dies, particularly behind a physical layer (PHY). This results, in particular, in a more compact and efficient design for the chiplet system while simultaneously allowing it to utilize existing PHY subcomponents. Integrating the data traffic control unit into one of the dies reduces the number of internal components and connections within the chiplet system. The integrated data traffic control device can also enable faster communication between the dies.

[0019] It can be advantageous if, within the scope of the invention, the device for data traffic control is arranged on a critical path of the chiplet system, wherein the critical path is characterized by the fact that it must fulfill at least one requirement regarding latency and / or uninterruptibility. Accordingly, the data traffic control can also be performed in real time and ensure reliable operations over the critical path. Furthermore, it can enable time-critical tasks to be processed effectively with the lowest possible latency and high uninterruptibility.

[0020] Furthermore, it is specifically provided that the chiplet system is a mixed-criticality system in which the at least two dies have different criticalities, different safety requirements, and / or different safety processes and access at least one common resource of the chiplet system, such as memory. The data traffic control according to the invention advantageously ensures in the mixed-criticality system that, despite the lack of safety assessment for consumer subcomponents or dies (i.e., subcomponents with lower safety requirements), the safety objectives of safety-relevant subcomponents or dies are not compromised, either intentionally (security) or unintentionally (e.g., hardware malfunctions are not more likely due to the lack of safety assessment).In this context, safety refers specifically to protection against harm to people, such as the driver or passengers in a vehicle, or other road users like pedestrians. The term "mixed-criticality system" can also be used to describe a system with mixed criticality.

[0021] It is also possible that the chiplet system is designed for installation and use in a vehicle. The vehicle may be, for example, a motor vehicle, a passenger vehicle, and / or an autonomous vehicle. The vehicle may have onboard equipment, for example, for providing autonomous driving functions and / or a driver assistance system. This onboard equipment may be designed to control, accelerate, decelerate, and / or steer the vehicle, at least partially, automatically.

[0022] The invention also relates to a computer program, in particular a computer program product, comprising instructions which, when executed by a computer, cause the computer to execute the method according to the invention. Thus, the computer program according to the invention offers the same advantages as those described in detail with reference to a method according to the invention.

[0023] The invention also relates to a data processing device configured to execute the method according to the invention. The device can, for example, be a computer that executes the computer program according to the invention. The computer can have at least one processor for executing the computer program. Alternatively, a non-volatile data storage device can be provided in which the computer program is stored and from which the computer program can be read by the processor for execution.

[0024] The invention may also relate to a computer-readable storage medium which contains the computer program according to the invention and / or includes instructions which, when executed by a computer, cause the computer to execute the method according to the invention. The storage medium is, for example, designed as a data storage device such as a hard drive and / or non-volatile memory and / or a memory card. The storage medium can, for example, be integrated into the computer.

[0025] Furthermore, the method according to the invention can also be implemented as a computer-implemented method. Alternatively or additionally, at least one of the disclosed method steps can be computer-implemented and / or carried out automatically.

[0026] Further advantages, features, and details of the invention will become apparent from the following description, in which exemplary embodiments of the invention are described in detail with reference to the drawings. The features mentioned in the claims and in the description can each be essential to the invention individually or in any combination. The drawings show: Fig. 1 a schematic visualization of a method, a vehicle comprising a chiplet system, a device, a storage medium and a computer program according to exemplary embodiments of the invention, Fig. 2 a schematic representation of a device for data traffic control according to exemplary embodiments of the invention.

[0027] In Fig. Figure 1 shows a method 100, a vehicle 9 comprising a chiplet system 1 with a hardware security module 6, a device 10, a storage medium 15 and a computer program 20 according to exemplary embodiments of the invention.

[0028] Fig. Figure 1 shows in particular an embodiment of a method 100 for performing data traffic control in a chiplet system. In a first step 101, a data stream is read out, which is directed from one die 4 to another die 5 of the chiplet system 1. In a second step 102, at least one conformity check of the read-out data stream is performed based on at least one modification criterion. In a third step 103, the data stream is modified based on a result of the at least one conformity check if the at least one modification criterion is met. In a fourth step 104, the data stream is forwarded to the other die 5 of the chiplet system 1.

[0029] Fig. Figure 2 shows a schematic representation of a device for data traffic control 2 according to exemplary embodiments of the invention. This device is arranged between a die 4 and a further die 5 and comprises a data path 7 and a control path 8 as well as interfaces to a physical layer 3.

[0030] The present invention, according to exemplary embodiments, describes in particular a technical method and an implementation in digital hardware for implementing traffic shaping / traffic management between different chips, or dies 4, 5, of an (automotive) chiplet system 1. Such traffic management is particularly required to safely implement chiplet systems in the context of so-called "fusion" (or "mixed-criticality") chiplet systems, i.e., chiplet systems with shared resources and the simultaneous combination of dies and applications from different application domains, and thus in particular also different safety criticality levels, without non-safety-critical subsystems being able to impermissibly influence highly critical systems and thereby endanger or violate safety objectives.

[0031] According to exemplary embodiments of the invention, traffic shaping is performed between dies 4 and 5, which can also be implemented as remote dies without violating mandatory standards such as UCle, PCIe, or CXL. This ensures that different criticality domains and chiplets developed according to different safety criticalities (e.g., ADAS vs. IVI) can be operated safely on a common chiplet system with shared resources and without external interference (FFI) of the safety-critical subsystems. This allows the synergy potential of such mixed-criticality chiplet systems to be utilized.

[0032] According to exemplary embodiments, a traffic shaping device 2 (English: "Traffic Shaping Device / IP") is placed, for example, as a separate hardware die between die-to-die connections of two dies 4, 5. Alternatively, the traffic shaping device 2 can be integrated or arranged directly on a die behind a physical layer (English: "physical layer", PHY).

[0033] According to the examples given, data traffic control can be used in a compatible manner by utilizing existing standards and their message bit fields.

[0034] Furthermore, data traffic control is also supported, in particular, on "remote" communication links, i.e., links that are not directly or redundantly connected to trusted management components.

[0035] Furthermore, the data traffic control according to the invention does not result in any significant additional latency in the event of intervention on a critical communication path. This is achieved in particular by separating the potentially modifiable data path 7 from the control path 8 (analysis, filter, mask generator) and implementing it concurrently (in parallel), as shown in exemplary embodiments. Furthermore, the required information is preferably extracted from the data stream during forwarding ("snooping").

[0036] Despite cut-through mechanisms, the method according to the invention preferably still allows the reuse of QoS protocol bit fields that were originally only used intra-die, e.g., in an AXI interconnect or a NoC. This is achieved, for example, by eliminating the need to buffer and then unpack packets to extract these fields. Instead, this information can be extracted on-the-fly using flattening and position counters.

[0037] Furthermore, a solution is described according to exemplary embodiments to enable the data plans to be configured across multiple hops in a chiplet system 1 without unauthorized (intentional = security, faulty = safety) subcomponents being able to falsify or even overwrite them.

[0038] The invention aims in particular to provide a device or method that actively manages access to shared resources (data traffic control), especially shared external storage (DRAM), but also shared resources. In contrast to the prior art, which either targets the backbones of communication networks or is limited to the on-chip connection, the invention specifically targets data traffic control for shared resources. The further Die 5 according to the invention is therefore preferably a shared resource, in particular a shared external storage.

[0039] According to exemplary embodiments of the invention, the method is compatible with existing die-to-die connection solutions for chiplet systems 1, in particular with UCle.

[0040] According to exemplary embodiments of the invention, the data traffic control advantageously does not lead to latency on a critical die-to-die connection path. This is particularly important when retrieving / saving data and instructions from remote chip locations.

[0041] According to exemplary embodiments of the invention, a flexible configuration can be made for various high-level protocols.

[0042] According to exemplary embodiments of the invention, dynamic management of data traffic control can be performed by a trusted resource such as a system management controller die / chiplet. However, the method according to the invention can also be used for dies of chiplet systems 1 that are not directly connected to a trusted management unit (system management controller, SMC).

[0043] Hardware units for traffic control, such as the data traffic control device 2 according to the invention, can be inserted into existing UCIe connections or onto chips downstream of a UCIe block. In particular, UCIe-PHY, i.e., the physical layer 3, is used as the input and output interface in each case. UCle enables, for example, the insertion of the data traffic control device 2 according to the invention without the introduction of another, customer-specific standard. By implementing the data traffic control as a dedicated die (see... Fig. 2) or as on-chip logic according to the UCle output signals (not shown) compliance with data plans can be enabled.

[0044] In the following, UCIe-PHY is used for referencing the physical layer 3 according to the invention, although alternatives such as PCIe or CXL can also be used analogously.

[0045] According to the invention, the data traffic control between the dies can rely on existing on-chip QoS identifiers in order to use this information outside the chip and for remote destinations.

[0046] However, this information is, if present at all, only deeply embedded within UCLe frames, following the various protocol headers of the packet format in which it is encapsulated (e.g., in NoC or bus interconnect format). Since dedicated buffering and subsequent unpacking of the entire packet is preferably undesirable, as this would drastically increase latency on the critical path, a different approach is used.

[0047] Data traffic control can be achieved by modifying the original data stream before it is parallelized back into the original, external UCle link format by a UCle PHY.

[0048] This extraction of such encapsulated information, which occurs independently of the actual data path 7 but on the control path 8, can be considered a "snooping" technique, since the information is extracted without altering the original data with respect to its values. Therefore, the various required extraction logics can be considered "snooping engines."

[0049] Once QoS tagging information has been extracted from the data stream, the two additional functions required for traffic control can be performed by so-called "modifier engines." If no QoS tagging information is available, a combination of other encapsulated fields can be used to create a virtual / implicit tag.

[0050] These "modifier engines" are specifically designed to perform a defined number of conformance checks on the extracted data stream based on various configured test criteria. The modifier engines can incorporate their own hardware counters to monitor gaps between packets in the extracted data stream.

[0051] Now that information is available to distinguish between different data streams, and means exist to verify conformity, a further technical measure involves responding appropriately to non-conforming data streams. Generally, several strategies are possible: On the one hand, non-conforming data traffic can be discarded. This can be done with or without feedback to the sender. Specifically, conformity criteria such as a maximum transmission size or gaps between observed data of the same class can be assessed. Alternatively, the data traffic can be reshaped to achieve conformity with respect to at least one modification criterion.

[0052] Discarding non-compliant traffic is preferred because it effectively stops data flows to (remote) shared resources that exceed their intended communication plan, which can be a general security goal, while not significantly affecting the critical path latency.

[0053] The rejection of non-compliant traffic can be done in a way that is consistent with existing chiplet standards such as UCle and the associated PCle-TLPs and higher-level protocols such as CXL.mem / cache and CXL.io.

[0054] According to embodiments of the invention, non-compliant data are discarded in a first possibility by either forwarding a first instance or subsequent instances of the respective data stream transaction that violates at least one modification criterion, but modifying them in such a way that a datagram of the non-compliant data cannot be successfully received by any sink, preferably while simultaneously adhering to standards.

[0055] A second possibility involves forwarding only the first instance of such a compliance violation, but not all subsequent ones. A third possibility involves modifying flow control information (credit information) carried in these data streams, e.g., in PCle-TLPs and / or CXL datagrams.

[0056] The various variants all prevent data streams from overloading a (remote) shared resource, such as at least one other die 5, like an externally connected memory of a management tile to which the data streams are directed. An "error injection" mask can be used to be transmitted to each of the data points passing through the modification stage during a transmission clock cycle.

[0057] There are several general ways to modify transmissions so that the receiving end, i.e., at least one other die in a connection, rejects an actual transmission in accordance with the standard, including the following: Checksums or normal data fields can be intentionally falsified. Furthermore, destination addresses, functions, and / or subfunctions can be intentionally modified to point to a false ("guard") dummy address or ID, e.g., one that is not allowed to be used. This results in a fully recoverable situation on the receiving end, which does not disadvantage compliant transmissions. Additionally, "valid" or "poisoned" bits, present in many high-level protocols (e.g., in CXL requests and closures, see CXL specification), can be modified to mark data as invalid.

[0058] Discarding or corrupting transmissions can lead to the connection becoming even more congested due to retransmissions than it would be without them. While this directly contradicts the overall goal of protecting shared resources, it can contribute to error mitigation. In particular, if the shared resource is not directly connected to the receiver die but to a further downstream hop, the impact is limited to this very local connection directly linked to the sender, as the traffic shaping hard IP can also prevent retransmissions (e.g., PCIe retransmissions) from propagating further.

[0059] Furthermore, a security mechanism can be implemented according to the exemplary embodiments. The security mechanism can be implemented as follows: Depending on the chosen complexity (from modification mechanisms to externally transparent credit management), the data traffic control can be developed according to an ASIL D development process due to its limited internal complexity. This also includes, in particular, the necessary UCle PHY implementation, since it can be assumed that a simplified PHY, or physical layer 3, can be used because only a limited subset of the functionality is required.

[0060] Incorrect configuration data used by the traffic control system according to the invention may necessitate the implementation of technical mechanisms to prevent intentional (security) or unintentional (safety) remote configurations from being written to the traffic control system.

[0061] This can be exploited by the fact that at least one centrally managed die is part of the overall chiplet system 1, e.g., a system management controller or a hardware security module 6, which can be considered trustworthy. It can be expected that this centrally managed die has certain trusted subcomponents (e.g., TrustZone, Safety Islands...), but in particular secure encryption key storage and key management functions (for example, in a hardware security module 6).

[0062] One challenge now is to enable remote configuration of the data traffic control from such a trusted entity, which can be stored by the data traffic control device 2, to determine which data stream characteristics should be analyzed and which changes should be made.

[0063] In particular, this means that configuration mechanisms can be provided where only trusted entities, such as a trusted management die, can make such configurations. Untrusted (externally provided, outdated, etc.) chiplets, or those not designed to the highest security standards, are preferably prevented from making such configurations.

[0064] One approach according to exemplary embodiments of the invention is based in particular on a once-shared pre-shared secret (PSK) or a pre-shared encryption algorithm including its key coefficients (PSA). It can be assumed that such a PSK can be distributed either during the manufacturing of a vehicle 9 (end-of-line) on the SMC chip (its hardware security module 6 (HSM)) or even during the update cycles that can be assumed for such a system anyway. Such an update can also be used to change the PSK for each traffic control device 2 according to the invention by using the existing chain of trust (using the process described below) for the update process to the new PSK and revoking the old secret upon completion.

[0065] The following approach, according to the exemplary embodiments, assumes in particular that each trusted System Management Controller includes a cryptographically secure hardware security module 6 to perform secure key storage and to provide and revoke derived keys.

[0066] This approach either uses existing UCle sideband channels for configuration data or, alternatively, a "virtual" sideband.

[0067] Below is a way to perform the authentication of the data traffic control device 2 with a hardware security module 6 of the chiplet system 1 using an encryption method.

[0068] First, particularly during system initialization of the chiplet system 1, authentication of the traffic control device 2 and a key exchange with the hardware security module 6 on the system management controller are performed. For this purpose, the hardware security module 6 preferably (repeatedly) sends a challenge c as header information to the traffic control device 2. This header information can be used to initialize the authentication of the traffic control device 2 to the hardware security module 6. The traffic control device 2 can then calculate a random key or, alternatively, use a pre-calculated key from its key storage. This key can be encrypted using PSK / PSA. The challenge c (which may be modified during the process) is also received as c' and encrypted using PSK / PSA. The result is, in particular, P(k1), P(c').The encrypted data P(k1) and P(c') are now preferably sent back to the hardware security module 6, particularly as a logical sideband signal, with the die-to-die connection and higher-level protocol standards used preferably remaining standards-compliant. In parallel, the hardware security module 6 can itself encrypt the sent challenge using PSK / PSA to obtain P(c) as the result. The hardware security module 6 can then compare the received P(c') with its own P(c). If there is a match, the traffic control device 2 is successfully authenticated to the hardware security module 6.

[0069] In addition to P(k1), the data traffic control device 2 can also send any predefined ID as P(ID).

[0070] Now that the Traffic Control Device 2 is authenticated to the Hardware Security Module 6, encrypted follow-up configuration messages can be sent from the Hardware Security Module 6 to the Traffic Control Device 2, where PSK k1 can be used to encrypt (SMC) the communication data plans and filters to be considered by the Traffic Control Device 2.

[0071] The following variations are conceivable to further secure the encryption method: Instead of a single PSK or PSA function P(), a list of n such functions P_n() a can be implemented. This list can be indexed by both the hardware security module 6 and the traffic control device 2. Such a list can be securely generated from the initial authentication and subsequent encryption of messages using P0 and K1 (chain of trust).

[0072] Additionally, both the Traffic Control Device 2 and the Hardware Security Module 6 can store the last successfully used index of Pi in non-volatile memory, with the Hardware Security Module 6 using its internal secure memory and the Traffic Control Device 2 using standard NVM storage.

[0073] Assuming that the hardware security module 6 can indirectly receive updates via the vehicle network from a wired diagnostic adapter or from a cryptographically protected radio (provided the SMC has an HSM to store the necessary keys), the list of n PSK / PSA keys to be used could be updated when the hardware security module 6 is securely connected to a network a. However, the hardware security module 6 must preferably also store the old index i so that a subsequent encrypted transmission to the traffic control device 2 can take place.

[0074] If the traffic control device has two redundant connections, a key-splitting scheme can be used after the initial one-time authentication of the traffic control device 2 to the trusted hardware security module 6. An attacker then needs both splits of a key to carry out an attack. For this purpose, the hardware security module 6 preferably splits the key K into K1 and K2 (e.g., via x-oring), and both keys are then transmitted individually to the traffic control device 2, particularly via two dedicated routes. Only the traffic control device 2 can decrypt the entire message by internally recombining both keys. Such a procedure can be used for secure key exchange as well as for distributed, redundant payload encryption and their combination.

[0075] The preceding explanation of the exemplary embodiments describes the present invention exclusively by way of examples. Of course, individual features of the exemplary embodiments can be freely combined with one another, provided this is technically feasible, without departing from the scope of the present invention.

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