X-type multi-stage converter systems that include nested topologies for mutual inductance cancellation

The nested topology multiphase inverter system addresses voltage imbalances and parasitic inductance issues by synchronizing semiconductor switch pairs to cancel electromagnetic fields, reducing switching losses and interference, and enabling efficient cooling in electrified powertrain systems.

DE102025101074A1Pending Publication Date: 2026-05-28GM GLOBAL TECHNOLOGY OPERATIONS LLC
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
GM GLOBAL TECHNOLOGY OPERATIONS LLC
Filing Date
2025-01-14
Publication Date
2026-05-28

AI Technical Summary

Technical Problem

High-voltage, high-power multilevel inverters with neutral-point clamped configurations generate neutral current oscillations at three times the fundamental frequency, leading to voltage imbalances, parasitic inductance, and electromagnetic interference due to parasitic loop inductance, especially with wide band gap semiconductor materials operating at higher switching frequencies.

Method used

Implementing a multiphase inverter with nested topologies that pair semiconductor switches and synchronize their switching to cancel electromagnetic fields, reducing parasitic and stray inductances, and incorporating ceramic or printed control boards for cooling to minimize thermal stress and interference.

Benefits of technology

The nested topologies effectively reduce parasitic inductance, switching losses, and electromagnetic interference, while allowing for single-sided or double-sided cooling, thereby enhancing the performance and reliability of electrified powertrain systems.

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Abstract

A multiphase inverter comprising a plurality of X-type multi-stage power converters arranged to transfer electrical power between a high-voltage direct current (HVDC) power supply and an electrical machine. Each of the plurality of X-type multi-stage power converters is configured as an integrated solid-state circuit (IC) comprising a plurality of semiconductor switches and clamping diodes. The plurality of semiconductor switches, a positive DC power bus, a negative DC power bus, a first AC bus, a second AC bus, a third AC bus, a fourth AC bus, and the clamping diodes are arranged in a plurality of layers.Such that both the positive DC power bus and the negative DC power bus are in parallel with the auxiliary bus or neutral bus, thereby generating mutual inductance cancellation, which minimizes parasitic inductance by coupling a positive mutual inductance and a negative mutual inductance for commutation loop currents within each of the X-type multi-stage converters.
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Citation Information

Patent Citations

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