POWER FACTOR CORRECTION CONVERTER SYSTEM

Abstract

In one described example, a circuit may include a reference controller and a gain matching device. The reference controller is designed to sample an input voltage from an input stage of the circuit and generate a modulation signal based on the square of the input voltage and the output current of an output stage of the circuit, using an error amplifier. The modulation signal is designed to modulate the conduction state of a switch in a power factor correction (PFC) converter of the circuit, causing the average output current of the circuit's output stage to follow a reference proportional to the square of the input voltage. The gain matching device is designed to adjust the gain of the error amplifier based on the input voltage.

Description

TECHNICAL AREA

[0001] This description refers to a power factor correction (PFC) converter system. BACKGROUND

[0002] Power factor correction (PFC) shapes the input current of a power supply so that it is synchronized with the mains voltage to maximize the active power drawn from the mains. In an ideal PFC circuit, the input current follows the input voltage as pure resistance without input current harmonics. PFC circuits are used in AC power distribution systems to improve power transmission efficiency. Passive PFC circuits use a filter to allow current with a desired frequency or frequency range to pass through, thus improving the power factor. Active PFC circuits modify the waveform of the current drawn by a load to improve the power factor. Switches are used in active PFC circuits. Operating such switches consumes power and affects the efficiency of the PFC circuit. SUMMARY

[0003] In one described example, a circuit may include a reference controller. The reference controller is designed to sample an input voltage from an input stage of the circuit and generate a modulation signal based on the square of the input voltage. This modulation signal is designed to modulate the conduction state of a switch in a power factor correction (PFC) converter of the circuit, causing the average output current of an output stage of the circuit to follow a reference proportional to the square of the input voltage.

[0004] In one described example, a circuit may include a reference controller and a gain matching device. The reference controller is designed to sample an input voltage from an input stage of the circuit and generate a modulation signal based on the square of the input voltage and the output current of an output stage of the circuit, using an error amplifier. The modulation signal is designed to modulate the conduction state of a switch in a power factor correction (PFC) converter of the circuit, causing the average output current of the circuit's output stage to follow a reference proportional to the square of the input voltage. The gain matching device is designed to adjust the gain of the error amplifier based on the input voltage.

[0005] In one described example, a system can include a reference controller. The reference controller can include a voltage sampler, a reference generator, and a gain matching device. The voltage sampler can have an input and an output, the input of which is configured to receive an input voltage. The reference generator can have a first input, a second input, and an output, the first input of which is coupled to the output of the voltage sampler, and the output of which is coupled to an input of a power factor correction (PFC) converter.The gain matching device can include a first input, a second input, a third input and an output, wherein the first input of the gain matching device is designed to receive the input voltage, wherein the second input of the gain matching device is designed to receive a reference voltage, wherein the third input of the gain matching device is designed to receive an output current, and wherein the output of the gain matching device is coupled to the second input of the reference generator. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a block diagram of a power factor correction (PFC) converter system. Fig. Figure 2 is a circuit diagram of a power factor correction (PFC) converter circuit. Fig. Figure 3 is a circuit diagram of a power factor correction (PFC) circuit. Fig. 4A-4B are time diagrams of waveforms generated by the power factor correction (PFC) circuits of Fig. 2-3 are associated. DETAILED DESCRIPTION

[0006] This description refers to power factor correction (PFC) systems and methods. PFC is provided by a reference controller designed to sample an input voltage from an input stage of the circuit and an output current from an output stage. As described here, the term "input stage" refers to a relevant circuit arrangement of a PFC converter system that corresponds to a part of the PFC converter system which receives at least one input (e.g., an input voltage) to provide operational functionality of the PFC converter system. As described here, the term "output stage" refers to a relevant circuit arrangement of a PFC converter system that corresponds to a part of the PFC converter circuitry that provides a regulated output voltage of the PFC converter circuitry based on the operational functionality of the PFC converter system.The reference control generates a modulation signal based on a comparison between the square of the input voltage and the output current, for example, using an error amplifier. This modulation signal is designed to modulate the conduction state of a switch in a PFC converter, causing the average output current of the circuit's output stage to follow a reference signal proportional to the square of the input voltage. Additionally, a gain matching device can be provided and configured to adjust the error amplifier's gain based on the input voltage to mitigate zero-crossing distortion.

[0007] Fig. Figure 1 is a block diagram of a power factor correction (PFC) converter system 100. The PFC converter system 100 can include a voltage source 110, a PFC converter 120, an output stage 130, and a reference controller 140. The PFC converter 120 can include, among other devices, a modulator 122 and a switch 124. The switch 124 can include multiple switches or switching devices (e.g., transistors). The output stage 130 can include a load 132. The reference controller 140 can include a voltage sampler 142 and a reference generator 144, including an error amplifier 146.

[0008] The voltage source 110 is located at an input stage for the PFC converter system 100 and is designed to provide an input voltage V in to be provided at the input stage. At the output stage 130, the output current l charges out an output capacitor and sets the output voltage V outReady at Last 132.

[0009] The reference controller 140 is designed to generate a modulation signal MOD based on the square of the input voltage V. in 2 and the output current I OUT to generate the output stage 130. For example, the voltage sensor 142 is designed to measure the input voltage V in to sample from the input stage. The reference generator 144 is designed to generate the modulation signal MOD based on the square of the input voltage V. in 2 and an output current I out The output stage 130 of the PFC converter system 100 is generated using the error amplifier 146. The modulation signal MOD is designed to modulate the line state of the switch 124 of the PFC converter 120 in order to cause an average output current I out_AVG The output stage 130 follows a reference that is proportional to the square of the input voltage (e.g., a sin μ).2 -reference) is, whereby the output current I out is controlled to achieve PFC.

[0010] In this respect, it is desirable to consider the average output current I out_AVG to regulate, since the output current I out is generally readily available for PFC topologies (unlike other currents, such as input current or inductance current, which are difficult to access for bridgeless topologies). For example, PFC control based on the output current l allows out a simpler control for bridgeless PFC topologies.

[0011] For example, to provide a unit power factor, the modulation signal MOD can be provided such that the average input power and output power are proportional to the square of the input voltage: Pin =Pout=k∗Vin2

[0012] Since the output voltage V outSince the average output current I is essentially constant, the average output current I must be out_AVG proportional to the square of the input voltage: Iout=(k∗Vin2)Vout=N∗Vin2, where N=kVout

[0013] Consequently, if the average output current I out_AVG is forced to use a reference proportional to the square of the input voltage V in 2 to follow, the average input current I in_AVG proportional to the input voltage V in , and the power factor is one.

[0014] The PFC converter 120 can include one input and one output. The input of the PFC converter 120 is coupled to the output of the reference controller 140 or the output of the reference generator 144. The output of the PFC converter 120 is coupled to the load 132. The modulator 122 of the PFC converter 120 is designed to control the switch 124 based on the modulation signal MOD. For example, the modulator 122 can adjust a duty cycle, an activation duration for the switch 124, a frequency, etc., for modulating the switch 124 based on the received modulation signal MOD.

[0015] As described here, the term "activate" in relation to a switch refers to closing the switch to allow current to flow through it. Therefore, activating the switch can be equivalent to providing sufficient bias voltage for a transistor (e.g., a voltage V). GS) greater than a threshold voltage (e.g. a threshold voltage V) T ) to operate in a linear mode or a saturation mode.

[0016] In any case, the modulator 122 is designed to modulate the line state of the switch 124 of the PFC converter 120 in order to cause the average output current I out_AVG the reference is proportional to the square of the input voltage V in 2 follows, which causes I in proportional to V in In other words, the modulator 122 is designed to increase the average output current I. out_AVG to modulate in a way that results in the input current I in the input voltage V IN follows.

[0017] Fig. Figure 2 is a circuit diagram of a power factor correction (PFC) converter circuit. The circuit 200 can include the voltage source 110, the PFC converter 120 including the modulator 122 and the switch 124, and the output stage 130 including the load 132. The output current I is applied to the output stage 130. out the output capacitor C1 and sets the output voltage V out The load 132 is ready. The reference control 140 can include the voltage sensor 142, the reference generator 144, and the error amplifier 146.

[0018] The reference controller 140 can include a first input, a second input, a third input, and an output. The first input of the reference controller 140 is designed to accept an input voltage V. inThe reference controller 140 receives a signal from the voltage source 110. The second input of the reference controller 140 is coupled to an output of a current sensor 134, which is located at the output stage 130. The third input of the reference controller 140 is coupled to the load 132. The output of the reference controller 140 is coupled to an input of the PFC converter 120.

[0019] The voltage sensor 142 can include one input and one output. The input of the voltage sensor 142 is designed to receive the input voltage V. in to be received from the voltage source 110, and corresponds to the first input of the reference control 140.

[0020] The reference generator 144 can include a first input, a second input, a third input, and an output. The first input of the reference generator 144 is coupled to the output of the voltage sensor 142 and is designed to measure the input voltage V. into receive. The second input of the reference generator 144 is coupled to the output of the current sensor 134, which is located at the output stage 130, and is designed to measure the output current I. out to receive, and corresponds to the second input of the reference control 140. The third input of the reference generator 144 is coupled to the output stage 130 with the load 132, and is designed to provide the output voltage V out to receive, and corresponds to the third input of the reference control 140. The reference generator 144 includes a first multiplication circuit M1 with a first input, a second input, and an output. The first and second inputs of the first multiplication circuit M1 are designed to receive the input voltage V. in to be received from the output of the voltage sensor 142. In this way, the output of the first multiplication circuit M1 generates a signal of the square of the input voltage V. in2 based on the input voltage V in In other words, the first multiplication circuit M1 receives an input of the input voltage V. in and generates an output of the square of the input voltage V in 2 ·

[0021] The reference generator 144 includes a second multiplication circuit M2 with a first input, a second input, and an output. The first input of the second multiplication circuit M2 is coupled to the output of the first multiplication circuit M1 (which, for example, carries the signal of the square of the input voltage V). in 2 (provides). The second input of the second multiplication circuit M2 is coupled to an output of a first error amplifier 246, which provides a first error signal. N=kVout from the above equation V out(2) is generated. The output of the second multiplication circuit M2 is a product of the output of the first multiplication circuit M1 (V in 2 ) and the output of the first error amplifier 246 (N=kVout). In this way, the second multiplication circuit M2 is designed to generate a product signal N * V in 2 based on a first error signal from the first error amplifier 246 and the signal of the square of the input voltage V in 2 to generate the product signal N * V in 2 or the output of the second multiplication circuit M2 therefore corresponds to equation (2).

[0022] The first error amplifier 246 has a first input, a second input, and an output. The first input of the first error amplifier 246 is coupled to the load 132 and is designed to provide the output voltage V. outThe signal from load 132 is received via a resistor R1 and corresponds to the third input of the reference control 140. Furthermore, the first input of the first error amplifier 246 is coupled to its output via a capacitor C2. The second input of the first error amplifier 246 is coupled to a reference voltage V2. The first error amplifier 246 generates a difference between the output voltage V2 and the reference voltage V2. out The load 132 and the reference voltage V2 are used as the first error signal N. In other words, the first error amplifier 246 is designed to generate the first error signal N based on the output voltage V. out and to generate the reference voltage V2. The first error signal N of the first error amplifier 246 is coupled to the second input of the second multiplication circuit M2.

[0023] The reference generator 144 includes a second error amplifier 146 with a first input, a second input, and an output. The first input of the second error amplifier 146 is coupled via a resistor R2 to an output of a current sensor 134, which is located at the output stage 130, and is designed to measure the output current I. out to receive. Furthermore, the first input of the second error amplifier 146 is coupled to the output of the second error amplifier 146 via a capacitor C3. The second input of the second error amplifier 146 is coupled to the output of the second multiplication circuit M2 and is designed to receive the product signal N * V. in 2 to receive. Thus, the second error amplifier 146 is designed to amplify the output current I. out with the product signal N * V in 2 to compare and the modulation signal based on the product signal N * V in 2and one with output current I out to generate the associated voltage. The output of the second error amplifier 146 is coupled to the input of the PFC converter 120. In this way, the second error amplifier 146 generates the modulation signal MOD to cause the following for I out , which is measured by current sensor 134, Iout=(k∗Vin2)Vout=N∗Vin2 This is as indicated by equation (2). Furthermore, the output of the reference generator 144 is coupled to the input of the PFC converter 120 and corresponds to the output of the reference controller 140.

[0024] With reference to Fig. 1. This can occur due to ripple components in the output current I. out This can lead to zero-crossing distortion. For example, if the voltage is close to zero, a longer lead time may be required to allow the input current I to pass through. in the input voltage V inThis follows. In other words, the error amplifier 146 may be too slow at approximately the zero crossing to reach the value required for the correct duty cycle. However, the error amplifier 146 may not be able to allow the output to switch to high quickly enough. In this respect, increasing the amplifier bandwidth of the error amplifier 146 around the zero crossing eliminates zero-crossing distortion. In the example of Fig. 1 The reference control 140 includes a gain adjustment device 148 for adjusting or increasing the gain of the error amplifier 146 based on the fact that the input voltage V infalls below a threshold value. In this way, adaptive current error amplifier bandwidth, time constant (TC) modification, or gain adjustment at the error amplifier 146 provide the advantage of minimizing, attenuating, or eliminating zero-crossing distortion or overlap distortion and improving waveform quality by enabling a faster current rise and thus providing improved PFC performance during the zero crossing.

[0025] Fig. Figure 3 is a circuit diagram of a power factor correction (PFC) converter circuit. The circuit is shown in Figure 300. Fig. 3 is the circuit 200 of Fig. 2 similar, except that the reference control 140 is a gain-adjusting device, such as the gain-adjusting device 148 of Fig. 1, includes. With reference to Fig. 1. The reference control 140 can also be a gain adjustment device, such as the gain adjustment device 148 from Fig. 3, include. According to an example, the circuit is 300 of Fig. 3. A PFC converter circuit and includes the PFC converter 120, including the modulator and the switch. The gain-adjusting device 148 can include a first input, a second input, a third input, and an output. The first input of the gain-adjusting device 148 is designed to accept the input voltage V. in to receive. The second input of the gain-matching device 148 is designed to receive a reference voltage V3. The third input of the gain-matching device 148 is designed to receive the output current l outto receive. The output of the gain matching device 148 is coupled to the second input of the reference generator 144 (e.g., to the first input of the second error amplifier 146).

[0026] The gain-adjusting device 148 can include a magnitude circuit 312 with one input and one output. The input of the magnitude circuit 312 corresponds to the first input of the gain-adjusting device 148. The input of the magnitude circuit 312 is designed to accept the input voltage V in to be received from the output of the voltage sensor 142. The magnitude circuit 312 is designed to generate an output signal as an ABS magnitude signal, which is a magnitude of the input signal (e.g., the input voltage V). in ). In this way, the magnitude circuit 312 is designed to generate the ABS magnitude signal based on the input voltage V. IN to generate. For example, if the input voltage V inThe output to the magnitude circuit 312 is a full-wave rectified sine wave. In this way, the gain matching device 148 is designed to adjust the gain of the error amplifier 146 of the reference control 140 based on a rectified input voltage V. RECT to adapt.

[0027] The gain-adjusting device 148 can include a comparator 346 with a first input, a second input, and an output. The first input of the comparator 346 is coupled to the output of the magnitude circuit 312 (e.g., the ABS signal) and supplied with a voltage V. RECTThe second input of comparator 346 is coupled to a reference voltage V3. Comparator 346 is designed to generate a GAIN signal based on the magnitude signal ABS and the reference voltage V3 by comparing the two signals. The output of comparator 346 is designed to generate this GAIN signal and is coupled to a control for a gain-matching switch SW1, which controls the time constant for the second error amplifier 146 based on the GAIN signal.

[0028] For example, it fits if the input voltage V inWhen the reference voltage V3 falls below a threshold value, the gain-adjusting switch SW1 adjusts the gain for the second error amplifier 146. For example, the gain-adjusting switch SW1 is designed to switch between a first and a second position. In the first position, the gain-adjusting switch SW1 connects the current sensor 134 with resistors R3 and R2 in series with the first input of the second error amplifier 146. In the second position, the gain-adjusting switch SW1 connects the current sensor 134 with R2 in series with the first input of the second error amplifier 146. In this way, the gain-adjusting switch SW1 is designed to adjust the gain of the second error amplifier 146 by changing the resistance (e.g., R2 or R3+R2) at the first input of the second error amplifier 146 based on the GAIN signal.Therefore, the gain adjustment switch SW1 adjusts or increases the time constant when the input voltage V. in The gain falls below the reference voltage V3, thereby attenuating zero-crossing distortion. In this way, the gain matching device 148 provides a simple solution and a significant advantage for the PFC performance of the PFC converter system 100 and / or the circuits 200, 300.

[0029] Fig. 4A-4B are time diagrams of waveforms generated by circuits 200 and 300 for power factor correction (PFC) of Fig. 2-3 are associated. In Fig. 4A is a zero-crossing distortion in waveform 402 of the average input current I. in_AVGto see, which is associated with fixed-gain circuits (e.g., without adaptive current error amplifier bandwidth modification or gain matching). The waveform 404 of the gain-matched average input current I in_AVG illustrates a waveform in which zero-crossing distortion is minimized, such as by using the gain matching device 148 from Fig. 3 to provide adaptive gain. As can be seen, waveform 402 includes zero-crossing distortion, while waveform 404 has little to no zero-crossing distortion. In Fig. 4B is the voltage (e.g. V). EA ), which is associated with the second input of the reference generator 144 or the error amplifier 146, for a fixed gain scenario 412 (e.g., without using the gain matching device 148 of Fig. 3) and a scenario 414 with adaptive gain (e.g. using the gain adjustment device 148 from Fig. 3) illustrates this. Around times t1 and t2, for example, the magnitude of waveform 402 lies below a zero-crossing distortion threshold (e.g., reference voltage V3) and thus approaches a zero crossing. In this respect, the voltage (e.g., V) EAThe gain associated with the second input of the error amplifier 146 is larger in the corresponding waveform 412 (e.g., compared to waveform 414) when a fixed gain (e.g., without adaptive current error amplifier bandwidth modification) is present. In the fixed gain scenario, the gain-adjusting switch SW1 is in the second position, connecting the current sensor 134 in series with resistor R2 and the first input of the second error amplifier 146 (e.g., a lower resistance value with respect to both resistor R3 and resistor R2 in the first position, and thus a higher gain). EA ).

[0030] In contrast, the voltage (e.g. V) EAThe gain associated with the second input of the error amplifier 146 is lower in the corresponding waveform 414 (e.g., compared to waveform 412) when adaptive current error amplifier bandwidth modification is present. In the scenario with adaptive current error amplifier bandwidth modification, the gain-adjusting switch SW1 is in the first position, connecting the current sensor 134 in series with resistor R3, resistor R2, and the first input of the second error amplifier 146 (e.g., an increased resistance value relative to resistor R2 alone in the second position, and thus a lower gain). EA ), thereby eliminating zero-crossing distortion or overlap distortion, as in waveform 404 of Fig. 4A can be seen.

[0031] In this description, the term "couple" can cover connections, communications, or signal paths that enable a functional relationship corresponding to this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by a direct connection; or (b) in a second example, device A is coupled to device B via an intermediary component C, provided that the intermediary component C does not change the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.

[0032] In this description, a device that is "configured" to perform a task or function is configured (e.g., programmed and / or hardwired) by a manufacturer at a point in time to perform the function, and / or can be configured (or reconfigured) by a user after manufacture to perform the function and / or other additional or alternative functions. Configuration can be achieved through firmware and / or software programming of the device, through the construction and / or design of hardware components and connections of the device, or a combination thereof. Furthermore, a circuit or device comprising certain components as described herein may instead be designed to be coupled with those components to form the described circuit arrangement or device.For example, a structure that, as described, includes one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors and / or inductors) and / or one or more sources (such as voltage and / or current sources), may instead only include the semiconductor elements in a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package) and is designed to be coupled, either during or after manufacturing, for example by an end user and / or a third party, with at least some of the passive elements and / or the sources to form the described structure.

[0033] The phrase "based on" means "at least partially based on". Therefore, if X is based on Y, then X can be a function of Y and any number of other factors.

[0034] Within the scope of protection of the claims, modifications of the described embodiments as well as other embodiments are possible.

Claims

[1] Circuit comprising the following: a reference controller designed to do the following: Sampling an input voltage from an input stage of the circuit; and Generating a modulation signal based on the square of the input voltage, wherein the modulation signal is designed to modulate the conduction state of a switch of a power factor correction (PFC) converter of the circuit to cause an average output current of an output stage of the circuit to follow a reference proportional to the square of the input voltage. [2] Circuit according to claim 1, further comprising a gain matching device designed to match the gain of an error amplifier of the reference control based on a rectified input voltage. [3] Circuit according to claim 1, wherein the reference control includes a reference generator designed to generate the modulation signal, wherein the reference generator includes a first multiplication circuit designed to generate a signal of the square of the input voltage based on the input voltage. [4] Circuit according to claim 3, wherein the reference generator comprises a first error amplifier designed to generate a first error signal based on an output voltage from an output stage of the circuit and a reference voltage. [5] Circuit according to claim 4, wherein the reference generator comprises a second multiplication circuit designed to generate a product signal based on the first error signal and the signal of the square of the input voltage. [6] Circuit according to claim 5, wherein the reference generator comprises a second error amplifier designed to generate the modulation signal based on the product signal and a voltage associated with an output current of the output stage of the circuit. [7] PFC converter circuit comprising the circuit according to claim 1, wherein the PFC converter circuit comprises: the PFC converter, the PFC converter comprising the following: the switch; and a modulator designed to modulate the line state of the switch based on the modulation signal; and a load designed to receive an output voltage based on an output current from the output stage. [8] Circuit comprising the following: a reference controller designed to do the following: Sampling an input voltage from an input stage of the circuit; and Generating a modulation signal based on the square of the input voltage and the output current of an output stage of the circuit using an error amplifier, wherein the modulation signal is designed to modulate the conduction state of a switch of a power factor correction (PFC) converter of the circuit to cause an average output current of the output stage of the circuit to follow a reference proportional to the square of the input voltage; and a gain matching device designed to adjust the gain of the error amplifier based on the input voltage. [9] Circuit according to claim 8, wherein the reference control includes a reference generator designed to generate the modulation signal, wherein the reference generator includes a first multiplication circuit designed to generate a signal of the square of the input voltage based on the input voltage. [10] Circuit according to claim 9, wherein the reference generator comprises a first error amplifier designed to generate a first error signal based on an output voltage from an output stage of the circuit and a first reference voltage. [11] Circuit according to claim 10, wherein the reference generator comprises a second multiplication circuit designed to generate a product signal based on the first error signal and the signal of the square of the input voltage. [12] Circuit according to claim 11, wherein the gain matching device comprises an magnitude circuit designed to generate a magnitude signal based on the input voltage. [13] Circuit according to claim 12, wherein the gain matching device comprises a comparator designed to generate a gain signal based on the magnitude signal and a second reference voltage. [14] Circuit according to claim 13, wherein the reference generator comprises a second error amplifier designed to generate the modulation signal based on the product signal and a voltage associated with an output current of the output stage of the circuit. [15] Circuit according to claim 14, wherein the gain adjustment device is designed to adjust the gain by adjusting a resistance at an input of the second error amplifier based on the gain signal. [16] Circuit according to claim 15, wherein the gain matching device comprises a gain matching switch designed to adjust the resistance at the input of the second error amplifier by switching between at least a first position and a second position. [17] PFC converter circuit comprising the circuit according to claim 8, wherein the PFC converter circuit comprises: the PFC converter, where the PFC includes the following: the switch; and a modulator designed to modulate the line state of the switch based on the modulation signal. [18] System comprising the following: a memory control system that includes the following: a voltage sensor comprising an input and an output, wherein the input of the voltage sensor is designed to receive an input voltage; a reference generator comprising a first input, a second input and an output, wherein the first input of the reference generator is coupled to the output of the voltage sampler, and wherein the output of the reference generator is coupled to an input of a power factor correction (PFC) converter; and A gain matching device comprising a first input, a second input, a third input and an output, wherein the first input of the gain matching device is configured to receive the input voltage, wherein the second input of the gain matching device is configured to receive a first reference voltage, wherein the third input of the gain matching device is configured to receive an output current, and wherein the output of the gain matching device is coupled to the second input of the reference generator. [19] System according to claim 18, comprising: an output stage that includes a load; and wherein the PFC converter includes an input and an output, the output of the PFC converter being coupled to the load. [20] Circuit according to claim 18, wherein the reference generator comprises: a first multiplication circuit with a first input, a second input and an output; a second multiplication circuit with a first input, a second input and an output; a first error amplifier with a first input, a second input and an output; and a second error amplifier with a first input, a second input and an output, wherein the first input and the second input of the first multiplication circuit are coupled to the output of the voltage sampler and correspond to the first input of the reference generator, wherein the first input of the second multiplication circuit is coupled to the output of the first multiplication circuit, wherein the second input of the second multiplication circuit is coupled to the output of the first error amplifier, wherein the first input of the first error amplifier is coupled to an output stage which includes a load, wherein the second input of the first error amplifier is coupled to a second reference voltage, wherein the first input of the second error amplifier is coupled to a current sensor at the output stage and corresponds to the second input of the reference generator, wherein the second input of the second error amplifier is coupled to the output of the second multiplication circuit and where the output of the second error amplifier is coupled to the input of the PFC converter and corresponds to the output of the reference generator. [21] System according to claim 20, wherein the gain matching device comprises: a magnitude circuit with one input and one output; a comparator with a first input, a second input and an output; and a gain-adjusting switch designed to switch between a first position and a second position, where the input of the magnitude circuit is coupled to the output of the voltage sensor, where the first input of the comparator is coupled to the output of the magnitude circuit, the second input of the comparator is designed to receive the first reference voltage, the output of the comparator is coupled to a control for the gain matching switch, wherein the first position for the gain matching switch couples the first input of the second error amplifier to the current sensor via a first resistor and where the second position for the gain adjustment switch couples the first input of the second error amplifier to the current sensor via a second resistor.

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