Method for producing a wafer-based solar panel and a solar panel

Abstract

Method for manufacturing solar panels / modules comprising the following steps: - inserting a number of semiconductor wafers (100) which are pre-processed to a point where at least their front surface is finished to form semi-finished solar cells and to be mounted on a front glass (104) of a solar panel / module, but which may also include one or more process steps for the back side of the semiconductor wafer (100) up to, but not including, metal coating for forming electrical contacts, - placing and attaching the intended number of pre-processed semiconductor wafers (100) so that they are adjacent to one another and are directed with their front side downwards towards the back of the front glass (104), - Smoothing / planarizing edges of semiconductor wafers (100), - After smoothing / planarizing edges of the semiconductor wafers (100), applying at least one metal layer covering the back side of the front glass (104), including the back side of the preprocessed semiconductor wafers (100), and - structuring the applied metal layer(s) into at least one single region (109) forming the electrical contacts for each solar cell and the module interconnections between adjacent solar cells, wherein the semiconductor wafers (100) have a p-doped region (102) and an n-doped region (101) on the back side, which are manufactured in a semiconductor matrix of monocrystalline or polycrystalline material, wherein pre-processing of the front surface of the semiconductor wafers (100) exclusively comprises one or more of the following process steps: surface texturing, application of surface passivation films (103) and application of an anti-reflective coating, wherein the smoothing / planarizing of edges of the semiconductor wafers (100) is achieved by one of the following process steps: - i) applying a suitable material along the edges and / or in the space between the semiconductor wafers (100) to form a smooth, continuous surface between adjacent semiconductor wafers (100), using inkjet printing or prefabricated elements, or - ii) by coating both the back of the solar cells and the gaps between the solar cells with a polymer material.

Description

[0001] This invention relates to a manufacturing method for wafer-based solar panels. Introduction

[0002] Global fossil oil reserves are expected to gradually deplete in the coming decades. This means that our main energy source of the last century will have to be replaced within a few decades to meet current energy consumption and future increases in global energy demand.

[0003] In addition, many concerns are raised that the use of fossil fuels increases the Earth's greenhouse effect to an extent that could be dangerous. Therefore, the current consumption of fossil fuels should preferably be replaced by energy sources / carriers that are renewable and sustainable for our climate and our environment.

[0004] One such energy source is sunlight, which irradiates the Earth with considerably more energy than humans currently consume and is predictably increasing.

[0005] However, to date, electricity from solar cells is too expensive to compete with nuclear energy, thermal energy, etc. This must change if the considerable potential of electricity from solar cells is to be utilized.

[0006] The cost of electricity from a solar panel is a function of the energy conversion efficiency and the production costs of solar panels. Therefore, the search for affordable solar power should focus on high-efficiency solar cells manufactured using cost-effective manufacturing processes.

[0007] The present invention relates to cost-effective production processes of highly efficient silicon-based solar panels. State of the art

[0008] An efficient and cost-effective method to make electrical contacts suitable for back-contacted photovoltaic devices is to create the electrical contacts by making local openings in the passivation layer(s) on the backside of the wafers that expose the doped regions underneath, depositing a metallic layer over the entire backside of the wafer, covering the passivation layer(s) and the local openings, and then dividing the metallic layer into electrically insulating metallic regions that contact the doped regions of the wafer.

[0009] An example of such a technology is given in US 6,337,283 B1, which discloses a method for fabricating a silicon solar cell with point contact on the backside surface. The method comprises forming two passivation layers on the backside of a silicon wafer having p-doped and n-doped regions, creating contact openings in the passivation layers in the p- and n-doped regions, applying a first metal layer to the passivation layers in such a way that the first metal layer comes into contact with the p-doped regions and the n-doped regions, structuring the first metal layer in such a way that separate contacts for the p-doped and n-doped regions are formed, and applying a first insulation layer to the first metal layer.the creation of contact openings in the insulating layer at the first metal contacts of either the p-doped or the n-doped regions, and finally the application of a second metal layer on the insulating layer to create electrical contact with the separate contacts for either the p-doped or the n-doped regions. The solar cell is in , Fig. 1, in which reference numeral 10 is the wafer, 12 is a passivation layer on the front surface, 14 are regions doped in one way, 16 are the differently doped regions, 18 and 20 are two passivation layers on the back of the wafer, 24a is the first metal layer after patterning, 26 is the insulation layer after patterning, and 28 is the second metal layer that brings the first metal contacts 24a into contact with the region 14 doped in one way of the wafer 10. The manufacturing method is applied for each individual solar cell.

[0010] Methods for contacting doped regions on silicon wafers that involve applying a metal layer over the entire surface of the wafer induce mechanical stresses in the cell due to differences in the thermal expansion coefficients of the silicon wafer and the metal layer. This mechanical stress causes only minor problems for current wafers with typical thicknesses of 140–180 µm, as such thick wafers possess the necessary mechanical strength to avoid significant warping / deformation. However, for films and wafers with thicknesses below approximately 100 µm, this mechanical stress creates problems with unacceptable warping / deformation and / or cell breakage.

[0011] However, for photovoltaic thin films deposited on glass substrates, there are cost-effective production processes in which the semiconductor film, on the one hand, and a metallic layer serving as electrical contacts, on the other, are deposited directly onto the glass substrate, followed by division into cells and electrical contacts. An example of such a technology is presented in US application No. US 2007 / 0 227 578 A1, in which a Mo layer is first deposited on a glass substrate, followed by a semiconductor layer of Cu(In,Ga)Se. The films are then divided into a plurality of interconnected solar cells on the glass substrate by laser scribing or chemical etching. Another example of similar technology is known from US 4 292 092 A.

[0012] In a recent article by Keevers et al. [1], photovoltaic panels using a polycrystalline thin layer of silicon deposited on a glass substrate (also known as crystalline silicon on glass or CSG technology) are disclosed. The article states that the manufacturing process is generally cost-effective and has demonstrated solar panels with a record efficiency of 10.4%. The manufacturing process begins with texturing a surface of the glass substrate by dip-coating with 0.5 µm silicon particles. Then, a layer of SiN xand a layer of p-doped amorphous silicon is deposited onto the textured surface using plasma-enhanced chemical vapor deposition (PECVD). A thin layer of polycrystalline silicon is then formed using solid-state crystallization followed by rapid thermal treatment and rapid inline hydrogenation. The deposited semiconductor layer is then divided into a plurality of individual cells using laser scribing, before a resin layer is applied by roller coating. A plurality of contact openings are then formed in the resin layer using inkjet printing of an etchant, before the panel is completed by depositing an A1 layer using sputtering, followed by scribing to create the interconnects.

[0013] Another example of the use of amorphous silicon films covered by a dielectric layer and a metal layer is shown in US Pat. No. 6,518,596 B1. This document demonstrates the use of a silicon film covered with a silicon nitride film as a passivation layer, and contacting by creating local openings in the passivation layer using a laser, followed by the deposition of a metal layer to create the contacts, and finally the division of the metal layer into separate contacts using laser scribing.

[0014] US Pat. No. 6,096,659 A relates to a method and apparatus for manufacturing thin solar batteries. Using a robot and a suction device, a semi-film is handled without damage and separated from a substrate. The semiconductor films are each placed directly through a transparent resin onto a glass substrate, which serves as the window of a solar battery. P-doped and N-doped electrodes are simultaneously printed onto the semiconductor film.

[0015] The limitation of CSG technology is its relatively low photovoltaic conversion efficiency of approximately 10%. This is half the conversion efficiency achievable with monocrystalline silicon-based solar cells.

[0016] Green MA et al.: Crystalline silicon on glass (CSG) thin-film solar cell modules. In: Solar Energy, 77, 20 04, 857-863 discloses a crystalline silicon-on-glass (CGS) thin-film solar cell module.

[0017] US 2005 / 0 000 561 A1 describes an array of photovoltaic cells arranged side by side between front and rear glass substrates and connected in series by front and rear connecting conductors.

[0018] MÜNZER, K. Adolf [et al.]: Thin monocrystalline silicon solar cells. In: IEEE transactions on electron devices, Vol. 46, 1999, No. 10, pp. 2055-2061; discloses a thin monocrystalline silicon solar cell.

[0019] EP 0 797 258 A2 describes a method for producing a thin-film semiconductor, a solar cell and a light-emitting diode.

[0020] WO 02 / 082 558 A2 relates to a method for producing a semiconductor circuit and to semiconductor circuits produced by this method.

[0021] GUO, Jiun-Hua [et al.]: Edge passivation for small-area high efficiency solar cells. In: 22nd European Photovoltaic solar energy conference, 3-7 September 2007, Milan, Italy, pp. 1348-1351; discloses an edge passivation for solar cells. HAMAMMU, IM ; IBRAHIM, K.: Solar cell edge shunt isolation: A simplified approach. In: ICONIP'02 / Proceedings of the 9th international conference on neural information processing, computational intelligence for the E-age, 19-21 December 2002. Penang, Malaysia. IEEE, 2002. pp. 230-232; describes a simple approach for shunt isolation at solar cell edges. LAMMERT, Michael D.; SCHWARTZ, Richard J.: The interdigitated back contact solar cell: A silicon solar cell for use in concentrated sunlight. In: IEEE transactions on electron devices, Vol. 24, 1977, No. 4, pp. 337-342; discloses back contacts for solar cells. Object of the invention

[0022] The main object of the invention is to provide a cost-effective, wafer-based manufacturing method for solar panels that enables the use of thin wafers of 100 µm or less and that solves the problem of cell warpage / deformation and / or breakage.

[0023] The object of the invention can be realized by the features as set out below in the description of the invention and / or in the appended claims. Description of the invention

[0024] The invention is based on the realization that, from a cost perspective, the advantageous CSG technology can be adapted to be used for wafer-based solar cell production, thus exploiting the labor savings associated with CSG technology and the high conversion efficiency achieved using monocrystalline or polycrystalline wafers. This results from the fact that, using semi-prefabricated solar cells manufactured from wafers that are finished at least on their front side, the metal coating of the cell and module interconnections can be combined in a metal process sequence similar to CSG technology, with the more or less prefabricated wafers attached to the transparent front glass of the solar panel / module.This feature, in addition to solving the problem of warpage / breakage of thin wafers with a deposited metal layer, will also enable significant cost and labor savings for the manufacturing of solar cells and modules, with the electrical contacts of the solar cell on the backside of the wafer being made by combining the metal coating of the cell and module / panel connection in one metal process.

[0025] Thus, one aspect of the present invention relates to a method according to claim 1

[0026] A second aspect of the invention relates to solar panels / modules according to claim 17.

[0027] In this context, the term "pre-processed into semi-finished solar cells prepared for backside metal deposition" refers to semiconductor wafers whose front side has been pre-processed to a finished solar cell state so that they can be attached to the front glass and thus form a functioning front side of the solar panel / module. This may include (but is not limited to) one or more of the following processing steps: surface texturing / damage etching, dopant diffusion, deposition of surface passivation films, deposition of anti-reflective coating, etc. The order and selection of which processing steps are considered necessary to form the front side of a solar cell obviously depend on the type of solar cell being manufactured.Typically, pre-processing of wafers before they are attached to the front glass involves high-temperature diffusion processes and passivation of the surface facing the front glass, because this surface is no longer accessible after attachment to the front glass.

[0028] For the backside of the wafer, the term "pre-processed to semi-finished solar cells ready for backside metal plating" is used, meaning that the backside of the wafer is processed to a semi-finished state that allows the completion of the backside of all cells, including the metal interconnect, after the wafers are attached to the front glass. This means that the only remaining process steps to form the connected solar panels / modules should be process steps performed at the module level, which is performed for all cells of the panel / module in a single operation once they are attached to the front glass.This may include one or more of the following steps: deposition and diffusion of doping elements, deposition and patterning etching of heterojunction contact layers, deposition of a reflective layer on the backside, deposition of surface passivation layers on the backside, localized etching of passivation layers to form contact openings to the doped regions of the underlying wafer, texturing, smoothing and planarizing the wafer edges, and the combined metal deposition and formation of the interconnect.

[0029] Thus, the term "pre-processed into semi-finished solar cells prepared for backside metal deposition" summarizes that the front surface of the wafers has been processed to a finished solar state, making them ready to be attached to the front glass of the module / panel. For the backside of the wafers, all process steps that cannot be performed once the wafers are attached to the front glass must be performed beforehand. Typically, this may include high-temperature indiffusion of doping elements. However, pre-processing of the backside of the wafers can include all process steps up to the deposition of the metal layer (metal deposition), which can be performed once the wafers are attached to the front glass. These can be doping methods such as deposition of a highly doped amorphous silicon layer, laser doping, or ion implantation.

[0030] The invention is not tied to a specific type of solar cell, so any conceivable combination of process steps for semi-finished solar cells, prepared for the metal coating of the backside, can be used and included in the inventive method. This means that the invention can employ any known and conceivable combination of passivation films, doping elements, and anti-reflective coatings for the individual wafers, and the wafers can be made of any conceivable semiconductor material, including (but not limited to) Si, Ge, InP, or GaAs. The same applies to the choice of production method for pre-processing; any conceivable process or any process known to a person skilled in the art for pre-processing the wafers into semi-finished solar cells, prepared for the metal coating of the backside, can be used.

[0031] Similarly, the invention is not tied to the use of one or a set of specific patterns of the applied layer for forming the contacts and interconnections. Any conceivable and known pattern forming contacts and interconnections can be used, as long as they are formed in one operation when all wafers of the solar panel / module are attached to the transparent front substrate of the panel / module. It may be advantageous to smooth / planarize the edge portion of each wafer to avoid sharp corners or the risk of dissolving the metal interconnections, and thus avoid the risk of breaking and / or short-circuiting the interconnections. Smoothing or planarizing the edges can be achieved by removing part of the edge on the front side of the wafer, for example, by mechanical or laser-assisted grinding.Alternatively, smoothing or planarization can be achieved by applying a suitable material to the wafer or by filling the space between adjacent wafers to create a more rounded shape for the edge portion of each wafer. Filling with material can be achieved using conventional techniques such as spin-coat deposition, roller coating, inkjet printing, attaching prefabricated elements, etc.

[0032] As used herein, the term "front" refers to the side of the wafer facing the sun when the solar panel is in operation. The term "back" is the side opposite the front of the wafer, and the term "back-contacted" means that all connections are placed on the back of the wafer. In the context of front glass, the term "front" refers to the side of the transparent front glass facing the sun when the solar panel is in operation, and the term "back" refers to the opposite side, which houses the wafer and then the deposited metal layer(s).

[0033] After completing the metal contact and interconnection process on the back of the front glass, the front glass is further processed into a standard module process, where the cells and interconnections on the back are sealed / protected from the environment by EVA and a protective backsheet (e.g., Tedlar or glass) in a lamination process at elevated temperature in a vacuum. Finally, the laminated module sandwich can be mechanically reinforced by a metal frame and electrically connected / protected by a diode junction box.

[0034] The term "front glass," as used herein, refers to any type of transparent material that can form the front plate of the finished solar panel / module. This means that the front glass should have the necessary mechanical and thermal stability to withstand the stresses associated with supporting the solar cells, the deposition of metal layer(s) during production (deposition of metal layers), and the intended use of the solar panel / module. Additionally, the front glass should be highly transparent and have low reflectance for most or all light frequencies associated with the photovoltaic effect of the cell. The front glass may include an anti-reflective coating, etc. Suitable materials include (but are not limited to) soda-lime glass of any composition, borosilicate glass, quartz, transparent polymeric solids, etc.

[0035] The term "wafer," as used herein, refers to any planar sheet or slice of semiconductor material with a thickness of approximately 20 µm up to a maximum wafer thickness of 200-300 µm. Thus, the term includes sheets / slices of semiconductor materials commonly referred to as "thick films." However, the wafers used in this invention preferably have a planar thickness of approximately 150 µm or less, as long as the semiconductor wafer has sufficient mechanical stability to withstand pre-processing into a semi-finished solar cell. A suitable thickness is 20 to 80 µm. The invention should be understood as wafer-based production up to the point at which the wafers are sufficiently pre-processed to allow attachment to the front glass and the execution of the remaining process steps at the module level.That is, the method according to the invention should be understood as a combination of conventional processes in wafer production and CSG technology.

[0036] Advantageously, the wafers may be substantially rectangular or square in shape and are placed side by side on the front glass with a gap in the range of 0.1 to 2 mm. The invention may employ any known or conceivable photovoltaic semiconductor material in wafer form. Examples of semiconductor materials include, but are not limited to, Si, InP, Ge, GaAs, etc. The semiconductor materials may be monocrystalline or multicrystalline.

[0037] Advantageously, the wafers can be attached to the front glass using a transparent adhesive. Any known or conceivable adhesive can be used. Examples include (but are not limited to) epoxy-based, silicone-based, or sol-gel-based adhesives applied to the front glass in a thickness between 1 and 50 µm, preferably in a thickness of 10 to 20 µm, using one of the following techniques: spin coating, spray coating, roller coating, hot-melt dispensing, or inkjet printing.

[0038] Advantageously, the wafer can be planarized, i.e. the sharp edges on the backside of the wafer can be smoothed to reduce the probability of inducing a fracture in the metal bridge, which forms the electrical contacts across adjacent wafers through the applied metal layer.Smoothing / planarizing the wafer edges on the backside can be achieved by (but is not limited to) one of the following process steps: removing a portion of the backside edges of the wafer, for example, by laser ablation; applying suitable materials along the edges and / or in the space between the wafers to create a smooth, continuous surface between adjacent wafers, for example, by using inkjet printing or attaching prefabricated elements; or by coating both the backside surface of the cells and the gaps between the cells with a polymer material, preferably with a polymer material that has high optical reflectance and a smoothing effect on surface steps. This polymer material can be applied, for example, using spin coating, spray coating, roll coating, or inkjet deposition.The removal of the back edges or the filling of material into the gaps between adjacent wafers should advantageously result in an angle between the sidewall of the wafer and the transparent substrate of less than 70°, preferably in a range of 30 to 60°. In the case of the use of deposited material, this can be achieved either by using inkjet printing or by pressing the wafer against the adhesive on the transparent substrate with a pressure adjusted such that the adhesive is forced into the gaps between consecutive wafers. The adhesive should preferably fill the vertical area of ​​the step between wafer and transparent substrate by more than 50%, preferably more than 70%, and the contact angle between the adhesive and the wafer edge surfaces should be less than 70°, preferably in a range of 30 to 50°.

[0039] The term "p-doped region" refers to a surface region of the wafer in which a doped material resulting in an increased number of positive charge carriers is inserted into the semiconductor matrix at a certain distance below the surface, forming a region of the wafer with a p-type doping surface layer. The term "n-doped region" refers to a surface region of the wafer in which a doped material resulting in an increased number of negative charge carriers (mobile electrons) is inserted into the semiconductor matrix at a certain distance below the surface, forming a region on the wafer with an n-type doping surface layer. The thickness of the doped layer is usually in the range of a few tens of nm to one µm, but this should not be understood as a limitation of the invention. All known and conceivable thicknesses of the doped region can be used.Any type of known and conceivable doping element can also be used. Doping of the wafer can be achieved by in-diffusion of doping elements or, alternatively, by depositing thin layers (in the range of 10 nm) of amorphous silicon that has been doped either n- or p-type. These thin, doped layers form a heterojunction contact with the silicon, which has similar electrical properties to those achieved by adding a doped material directly into the semiconductor matrix.

[0040] The application of metal layer(s) forming the backside of the metal coating can be achieved by vapor deposition techniques, evaporation, sputtering, etc. of a metallic phase on the entire backside of the front glass with the attached semi-finished solar cells. Suitable metals for vapor deposition include nickel, palladium, titanium, silver, gold, aluminum, copper, tungsten, vanadium, chromium, or any combination of these metals. The thickness of the applied metal layer or layered system of metal layers should advantageously have a total thickness in the range of 0.1 to 20 µm, preferably 0.1 to 2 µm in the case of narrow cells (with a width in the range of 5 to 50 mm) and preferably 5 to 20 µm in the case of using cells with widths of 150 mm or more.Other possible techniques for applying metal layer(s) to an entire module in a single operation are electroless or current plating. Suitable metals for plating include nickel, palladium, silver, gold, copper, chromium, tin, or any combination of these materials. The invention is not limited to this selection of metals; any materials that form a good electrical contact with the underlying semiconductor and that are resistant to UV light and any other disruptive forces / physical conditions associated with the normal use of solar panels during the expected lifetime of solar panels and the subsequent manufacturing steps after contact formation may be used. This may include known electrically conductive plastics and / or other polymer compositions such as carbon polymers, etc.

[0041] According to the invention, any process for metal deposition and structuring can be used, as long as the front glass can withstand the usual temperatures and chemical environment. Possible process sequences for metal deposition and structuring at the module level of the front glass can include (but are not limited to) the following steps: - Evaporation or sputtering of a metal stack with a total thickness in the range of 0.1 to 20 µm, followed by the application of a masking material for the wet metal etching process. The mask for metal etching can be either a polymer material (applied by spray, centrifugal, or roller coating) or silicon oxide (applied by chemical vapor deposition or evaporation). The structuring of the etching mask can be achieved by laser ablation, inkjet etching of the mask, or inkjet deposition of additionally patterned polymer layers, followed in each case by wet metal etching. - Alternatively, a thin metal seed layer can be applied by evaporation or sputtering and patterned as described above, followed by plating to a thickness of 1-20 µm, - Alternatively, a thin metal seed layer can be applied by evaporation or sputtering and structured by direct laser scribing, followed by plating to a thickness of 1-20 µm, Alternatively, the metal layer can be patterned by a lift-off process as follows: i) applying a polymer film (by spray / centrifugal / roller coating or as a pre-formed film), ii) patterning by laser ablation, iii) applying a metal layer by sputtering or evaporation, and finally iv) removing the metal between contacts by lifting off the polymer film, either by dissolving the polymer material in a chemical solution or by physically tearing or peeling the film. The metal layer attached to the polymer film can ultimately be recycled. - Metal annealing. An annealing process can be used to improve metal contact with the underlying semiconductor and the conductivity of the metal itself, but this must be sufficiently brief and not too hot to avoid further damage to other elements in the structure, including any adhesive used to attach the cell to the front glass.

[0042] The pattern for etching the metal layer is selected so that two distinct contact areas for each solar cell and interconnection between the cells are created on the metallic layer after etching: one terminal for the p-doped regions and one terminal for the n-doped regions. The chemical etchant should selectively etch the metallic phase to avoid damaging the underlying passivation and / or reflective layer(s) or the front glass. Any acidic or alkaline etchant known to dissolve the metallic phase but not the underlying passivation and / or reflective layer(s) or the front glass can be used as the etchant.

[0043] One option of the invention is to divide each wafer into a number of individual regions or cells in which a number of trenches are formed extending into the wafer by approximately 70% to 100% of the wafer thickness, for example, by using laser scribing, chemical etching, plasma etching, or reactive ion etching. Typical widths of the narrow cells are in the range of 5 to 50 mm. In the case of narrow cells, the metal layer(s) thickness is significantly reduced compared to wider cell alternatives. Typical metal layer(s) thicknesses in the case of narrow cells are in the range of 0.1 to 2 µm depending on the actual cell width. With such thin metal layers, the preferred patterning techniques are: direct laser ablation or by applying a polymer mask using inkjets followed by chemical etching.Regions can be formed by using laser scribing, with laser scribing forming trenches that extend into the wafer by approximately 70 to 100% of the wafer thickness. List of drawings Fig. 1 shows an example of a solar cell with contacts on the back according to the prior art. Fig. Figure 2 shows an example of cutting a Cz rod to produce donor substrates for producing rectangular wafers. Fig. Figure 3 shows a schematic drawing of how to cut a cylindrical Cz bar for pseudo-squaring, seen from the top of the bar in the tensile direction. Fig. Figure 4 shows a schematic drawing of how to cut a half-square Cz rod into donor substrates. Fig. 5 shows a side view of a portion of an exemplary embodiment of a solar panel according to the present invention. Fig. 6 shows an example of a method of planarizing the gap between the adjacent wafers according to the present invention. Fig. 7 shows another example of a method of planarizing the gap between the adjacent wafers according to the present invention. Example of an embodiment of the invention

[0044] The invention will now be described in more detail using an example of an embodiment of the invention. This example should not be interpreted as a limitation of the general idea of ​​combining the contacting and interconnection of solar cells for the entire module in one process step.

[0045] The exemplary embodiment of the invention employs monocrystalline silicon wafers cut from rectangular monocrystalline donor substrates constructed from Czochralski (Cz)-grown rods cut into thick donor substrates, as in Fig. 2a) and Fig. 2b). Each donor wafer is edge-trimmed and planarized after cutting to form thick, rectangularly shaped donor substrates of equal size. This allows two or more donor substrates to be processed simultaneously to form monocrystalline silicon wafers with similar dimensions and uniformly rectangular shapes. Therefore, the formed wafers can be arranged adjacent to each other in a regular pattern on the front glass, with a regular, narrow gap between the wafers, allowing the formation of metal interconnects by applying and patterning a metal layer. Typical donor substrate thicknesses can range from 1 mm to 100 mm.

[0046] How Fig. 2a), the central portion of the monocrystalline rod, designated by reference numeral 1, is cut longitudinally to form a rectangular-shaped donor substrate, designated by reference numeral 2. By the term “rectangular-shaped donor substrate,” we mean a continuous piece of semiconductor (in this case, monocrystalline silicon) with a shape as close as practically possible to a rectangular parallelepiped with a length a, width b, and height c. By “equal-sized,” we mean that the length a, width b, and height c of each substrate are as close as practically possible to the same for all donor substrates. Typical dimensions of Cz-grown monocrystalline rods are cylinders with a diameter in the range of 150 mm to 300 mm and a length of 50 cm to more than 1 m. When large Cz-grown rods are used and longitudinal slices are cut from the central section of the cylinder, as in Fig. 2b), it is possible to cut out a number of rectangular donor substrates, which after trimming have a length between 15 and 100 cm, a width between 15 and 30 cm, and a height between 1 mm and 10 cm. Alternatively, instead of sawing in the longitudinal direction, the thick donor substrates can be formed from the square or pseudosquare Cz rod by sawing in a plane perpendicular to the tensile direction, see Fig. 3 and Fig. 4, which is typical surface dimension of the donor substrates of 10 by 10 cm 2 up to 30 cm 2 and thicknesses from 1 mm to 10 cm.

[0047] As an alternative to monocrystalline wafers, it is conceivable that low-cost solar panels could be based on wafers made of multicrystalline silicon rods, typically (but not necessarily) created using the Bridgeman process. These can have dimensions of up to 70×70×30 cm. 3It is possible to obtain essentially square multicrystalline donor substrates from these rods, with side lengths of up to 65 cm and a thickness of typically 0.1 to 5 cm. By essentially square, we mean as close to a square shape as practically possible.

[0048] At least two methods are known for obtaining a silicon wafer from a silicon donor substrate. These methods involve forming the resulting wafers on the donor substrate and then separating them from the donor substrate and transferring them to a holding substrate. Both methods can be used, but other methods may also be applied, as long as they allow the formation of more or less planar wafers of semiconductor material with thicknesses ranging from 20 to 150 µm on a donor substrate, followed by separation of the resulting wafer from the donor substrate.

[0049] One of the known methods is based on the formation of a porous layer on the surface of the donor substrate, followed by epitaxial growth on the silicon wafer on the porous layer. The epitaxial growth process forms a homogeneous and continuous wafer on the porous layer (i.e., non-porous) with the same crystal order as the donor. The underlying porous layer is mechanically weaker than the grown wafer, making it possible to separate the wafer from the donor using mechanical shear stress, ultrasound, laser heating, etc. With this technology, the donor substrate is reduced by a few tens of nm to a few tens of µm for each wafer liftoff and can therefore be reused many times. Typical donor substrate thicknesses for this technology range from 1 to 5 mm. An example of such a technology is described in US Pat. No. 7,148,119 B1.

[0050] The other method uses ion implantation of hydrogen ions (protons) at a certain depth into the donor substrate, thus forming a buried high-stress layer. This stressed layer can be further weakened by heating the donor substrate, causing the protons to form hydrogen atoms, which weaken the silicon bonds and thus allow a wafer to be lifted off in a controlled cleavage process. An example of such a technology is disclosed in US Pat. No. 6,890,838 B2. The penetration depth of the protons is controlled and adjustable up to 180 µm in the case of a silicon donor substrate by regulating the energy of the proton beam. Therefore, this technique can be used to form wafers with thicknesses ranging from 20 to 150 µm. The silicon material used to form the rods and donor substrates can preferably be a pre-doped material.Typical donor substrate thicknesses for this technology range from 10 to 100 mm.

[0051] After forming a semiconductor wafer on the donor substrate, the wafer can be transferred to a support substrate for processing or individually processed through in-line processes on a freestanding base into semi-finished solar cells, ready for backside metal deposition. The transfer of the wafer to a support substrate depends on the actual wafer thickness. Alternatively, some or all of the processing steps for forming a semi-finished solar cell, ready for backside metal deposition, can be performed on the wafer before separation from the donor substrate. As mentioned above, this process can be formed by any conceivable process or one known to those skilled in the art, and there are no restrictions on the type of passivation film, anti-reflective coating, or formation of the doped regions of the semiconductor wafer used. Therefore, a detailed description of the fabrication up to the semi-finished stage is unnecessary.

[0052] Likewise, although the examples described here are based on wafers on donor substrates, the invention can of course also be applied to conventional wafers sawn from CZ rods or polycrystalline rods / blocks.

[0053] The solar cells according to this embodiment may have an optional front surface layer that is n-doped. The substrate doping may be of either type. An interlocking pattern of n+ and p+ doped regions is formed on the backside of the semiconductor wafer. Both sides of the wafer surface are passivated by one or more layers selected from: a layer of hydrogenated amorphous silicon, hydrogenated amorphous silicon nitride, or silicon oxide. The passivation layers have thicknesses ranging from 1 to 200 nm. The surface passivation layer on the front side also serves as an anti-reflective coating. The amorphous silicon layer may be alloyed with amorphous silicon carbide and / or covered with a layer of amorphous silicon nitride.

[0054] The formation of the monocrystalline silicon wafer with doped regions and the front passivation films are included in the process for forming semi-manufactured wafers prepared for backside metal plating. All of these process steps can be performed while the wafers are attached to the support substrate. The formation of the front layer with n-type diffused dopants can be achieved by using n-doped support substrates and heating the substrate and wafer. Alternatively, all of these process steps can be performed on a freestanding support (not directly bonded to any substrate) if the wafer has sufficient thickness / mechanical stability. The two alternative wafer fabrication technologies will likely differ in the preferred process for fabricating the semi-manufactured cell prior to transfer and attachment to the front glass.

[0055] The next step is to transfer the semi-finished wafers and mount them, with the surface-passivated side facing down, on the front glass, side by side in a regular pattern, creating narrow and uniform gaps between the solar cells, ranging from 0.1 to 2 mm. Following attachment to the front glass, the semi-finished wafers can be divided into a number of narrow solar cells. This is encouraged by the possibility of increasing the solar module output voltage and reducing the metal layer thickness. The division of the wafers into narrow cells can be performed by laser scribing. Alternatively, the wafers can be divided by chemical laser etching, wet silicon etching, plasma etching, or reactive ion etching.

[0056] The entire front glass with the attached wafer of the semi-manufactured cells is then transferred to a PECVD chamber for the application of a corresponding passivation layer. In addition to the surface passivation layer, a polymer coating can be applied to smooth the surface steps and increase the internal reflection characteristics of the back surface of the cell. The polymer coating should be white in color to have good optical properties and increase the internal reflection of the back surface. The white polymer coating can be applied and patterned using inkjet deposition. The patterned white polymer can serve as an etching mask for etching the contact holes in the underlying passivation layer to create electrical contacts between the doped regions of the semiconductor film and the metal layer to be deposited.

[0057] Additionally, in a subsequent step before metal deposition, the surface steps of the gap zones can be smoothed and planarized by i) removing the edge of the silicon wafer, for example by laser grinding, ii) depositing material on the sidewall of the wafer, for example by depositing material with a nozzle (inkjet) or a prefabricated material, or iii) filling the entire gap between the wafers with a suitable material, polymer, glass, epoxy, etc.

[0058] Immediately before metal deposition, the uncovered doped regions of the semiconductor should be cleaned of residues and surface oxides by chemical or plasma etching.

[0059] The metal layer can be deposited by cathodic sputtering of aluminum. After the metal layer is deposited, the metal layer is divided by local selective etching to form a metallic pattern that establishes the electrical contacts on each cell and interconnects between adjacent cells of the solar panel / module. Metal patterning is achieved by inkjet deposition of a patterned etch mask, followed by metal etching.

[0060] The electrical contact between metal and silicon is completed by a contact annealing process, which must be short and not too hot to avoid damage to the structure as well as any adhesive used to attach the wafers to the front glass and the front glass itself.

[0061] The annealing process for forming the metal-silicon contact depends on the metal system used and the resistivity of the silicon contact surface. Typical contact annealing processes have a temperature range of 200-300 °C and a duration of a few minutes to 30 minutes.

[0062] At this point, the solar cells are in working condition, so the solar panel / module can be completed by mounting the front glass into a stable frame.

[0063] A side view of a part of the solar panel according to an exemplary embodiment of the invention is shown in Fig. 5. The panel shown in the figure can be designed as follows: A quantity of monocrystalline silicon wafers with thicknesses ranging from 50 to 100 µm, fabricated from CZ-grown donor substrates, is prefabricated so that each wafer receives an interlocking pattern of n-doped 101 and p-doped 102 zones and one or more applied dielectric surface passivation films 103 on the front side. The wafers are then placed side by side on the front glass with their front side (the surface with the applied passivation layer(s) and optionally also an anti-reflective film) and secured with an adhesive layer.

[0064] Once the prefabricated wafers are attached to the front glass, they are divided into several narrow regions (cells) approximately 10 mm wide using laser ablation. Laser ablation is also used to remove a portion of the back edges of the wafer, so that when viewed from the side, the wafers resemble an isosceles trapezoid (a trapezoid with matching angles). The angle is approximately 70°.

[0065] Fig. Figure 5 shows two such narrow edge-trimmed regions of wafer 100, which are attached to the front glass 104 with an adhesive layer 105. The interlocking pattern of the n- and p-doped regions is shown as hatched areas 101 and 102, respectively. Laser ablation results in trenches 108.

[0066] Once the wafers are divided into narrow regions, the entire backside of the front glass, including the attached wafer, is transferred to a PECVD chamber and coated with a similar surface passivation layer(s) 103a as the front side of the wafer. A reflective polymer coating 107 is then applied to the backside surface passivation layer(s) 103a by patterned inkjet deposition, aligned with the n- and p-doped regions 101 and 102. The next step is the local removal of the backside passivation layer(s) 103a. This is achieved by using a chemical etchant that selectively acts on the passivation layer(s) 103a, with the patterned polymer coating 107 acting as an etch mask.

[0067] When the contact openings are formed, the entire backside of the front glass, including the attached wafer, is coated with a layer of aluminum by vapor deposition. The aluminum layer is approximately 1 µm thick. Finally, the backside of the front glass is manufactured by locally etching the applied aluminum layers into regions 109, so that the adjacent narrow regions of the wafer 100 are serially connected.

[0068] Fig. 6 shows a similar panel as Fig. 5, but now in the stage after edge trimming of the wafer 100. In this case, edge trimming is performed by applying a material 110 that fills the gap between adjacent wafers. Fig. Figure 7 shows a similar situation, but now the edge trimming is performed by pressing the wafers into the adhesive layer 105 so that the adhesive partially penetrates into the area 108 between the wafers.

[0069] After completing the metal contact and bonding process on the back of the front glass, the front glass undergoes a standardized module process in which the cells and interconnections on the back are sealed / protected from the environment using ethylene-vinyl acetate copolymer (EVA) and a protective backsheet (e.g., Tedlar or glass) in a vacuum lamination process at elevated temperature. Finally, the laminated module sandwich can be mechanically reinforced with a metal frame and electrically connected / protected with a diode junction box.

Claims

[1] A method for manufacturing solar panels / modules comprising the following steps: - inserting a number of semiconductor wafers (100) which are pre-processed to a point where at least their front surface is finished to form semi-finished solar cells and to be mounted on a front glass (104) of a solar panel / module, but which may also include one or more process steps for the back side of the semiconductor wafer (100) up to, but not including, metal coating for forming electrical contacts, - placing and attaching the intended number of pre-processed semiconductor wafers (100) so that they are adjacent to one another and are directed with their front side downwards towards the back of the front glass (104), - Smoothing / planarizing edges of semiconductor wafers (100), - After smoothing / planarizing edges of the semiconductor wafers (100), applying at least one metal layer covering the back side of the front glass (104), including the back side of the preprocessed semiconductor wafers (100), and - structuring the applied metal layer(s) into at least one single region (109) forming the electrical contacts for each solar cell and the module interconnections between adjacent solar cells, wherein the semiconductor wafers (100) have a p-doped region (102) and an n-doped region (101) on the back side, which are manufactured in a semiconductor matrix of monocrystalline or polycrystalline material, wherein pre-processing of the front surface of the semiconductor wafers (100) exclusively comprises one or more of the following process steps: surface texturing, application of surface passivation films (103) and application of an anti-reflective coating, wherein the smoothing / planarizing of edges of the semiconductor wafers (100) is achieved by one of the following process steps: - i) applying a suitable material along the edges and / or in the space between the semiconductor wafers (100) to form a smooth, continuous surface between adjacent semiconductor wafers (100), using inkjet printing or prefabricated elements, or - ii) by coating both the back of the solar cells and the gaps between the solar cells with a polymer material. [2] Method according to claim 1, wherein - the pre-processing of the back side of the semiconductor wafer (100) comprises one or more of the following process steps: application and structured etching of heterojunction contact layers, application of reflective coating on the back side, application of surface passivation layers (103) on the back side, localized etching of the surface passivation layers (103) to form contact openings to the doped regions of the underlying semiconductor wafer (100), texturing and smoothing / planarizing edges of the semiconductor wafer (100). [3] The method of claim 1 or 2, wherein applying and patterning the at least one metal layer includes applying a stacked system of metal layers patterned into at least a single region (109) that establishes the electrical contacts for each solar cell and the module interconnections between adjacent solar cells. [4] Method according to claim 1 or 2, wherein - the semiconductor wafers (100) are attached to a transparent substrate by using adhesive having a thickness in the range of 1 to 50 µm, preferably a thickness in the range of 10 to 20 µm, and - the adhesive is applied by one of the following techniques: centrifugal coating, spray coating, roller coating, hot melt application or inkjet printing. [5] A method according to claim 1, wherein using step i), - the applied material is applied between adjacent semiconductor wafers (100) or solar cells by using inkjet printing or a nozzle, and - that the applied material has wetting properties on silicon of the rear surface or the side surfaces of the semiconductor wafers (100) and is applied in an amount that results in a contact angle of less than 70°, preferably in a range of 30° to 50°. [6] Method according to claim 4, wherein - the smoothing / planarization of gaps between edges of the semiconductor wafers (100) is achieved by accumulating enough adhesive in the gaps between consecutive semiconductor wafers (100) by pressing the semiconductor wafers (100) against the adhesive and the transparent substrate, so that adhesive is pressed into the gaps between two consecutive semiconductor wafers (100), wherein - the applied pressure on the semiconductor wafer (100) is adjusted so that adhesive fills a vertical step surface between the semiconductor wafer (100) and the transparent substrate with more than 50%, preferably more than 70%, and - the contact angle between the adhesive and the edge surface of the semiconductor wafer (100) is less than 70°, preferably in a range of 30° to 50°. [7] Method according to one of the preceding claims, wherein the metal layer or the stack of metal layers is applied in a total thickness in the range of 0.1 to 20 µm, by means of - evaporation or sputtering, or - Electroplating or electroless plating. [8] A method according to claim 7, wherein the metal layer is structured by either: - a) applying a cover material to the deposited metal layer, followed by laser ablation of the cover material, followed by the use of an etching liquid to remove the metal exposed thereto, and finally followed by the use of a suitable liquid to remove the cover material, - b) applying a covering material directly having a desired structure using an inkjet process, followed by chemical etching of uncovered areas, or - c) Using laser scribing, which directly creates a desired pattern. [9] A method according to claim 8, wherein when step a) or b) is used, the cover comprises a polymer film applied by centrifugal, spray or roller coating, or silicon oxide applied by chemical vapor deposition or evaporation. [10] A method according to claim 9, wherein the metal layer is subsequently etched in a wet chemical etching process which is highly selective, i.e. only on the metal layer, in order to minimize damage to other parts of the structure by using a combination of alkali solutions or acidic solutions. [11] Method according to claim 9, wherein the polymer film (107) is applied before application of the metal layer(s) and wherein the metal layer(s) are structured in a lift-off process, comprising - applying the polymer film (107) by spray / centrifugal / roller coating or by applying a prefabricated film, - Structuring of the polymer film (107) by laser ablation, - applying the metal layer by evaporation or sputtering, and - removing the metal to form the desired pattern by lifting off the polymer film (107), either by dissolving the polymer film in chemical solution or by physically tearing or peeling off the film. [12] A method according to any one of claims 7 to 11, wherein the metal layer(s) is / are annealed to enable a stable and low-resistance contact between the metal layer(s) and the semiconductor matrix. [13] Method according to one of the preceding claims, wherein the semiconductor wafers (100) are made of multicrystalline or monocrystalline silicon. [14] Method according to claim 13, wherein - each semiconductor wafer (100) is divided into a plurality of narrow regions by the formation of trenches, which extend into the semiconductor wafers (100) by approximately 70 to 100% of the thickness of the semiconductor wafers (100), and - the trenches are formed using laser cutting or ablation, chemical etching, plasma etching or reactive ion etching. [15] Method according to claim 14, wherein - the width of the narrow areas is in a range of 5 to 50 mm, and - the thickness of the applied metal layer(s) forming the electrical contacts is in a range of 0.1 to 2 µm. [16] The method of claim 13, wherein the semiconductor wafers (100) are produced from a donor substrate by either: - forming a porous layer on the donor substrate, epitaxially growing a silicon layer with a thickness in the range of 20 to 150 µm and then separating the semiconductor wafer (100) by using mechanical shear stress, ultrasound or laser heating, or - Implanting hydrogen ions by means of a proton beam with a depth of about 20 - 150 µm in the donor wafer and then separating the semiconductor wafer (100) by using mechanical shear stress, ultrasound or laser heating. [17] Solar panel / module comprising: - a transparent front glass (104), and - a number of semiconductor wafers (100), each of which is processed to form semi-finished solar cells, the front side of the semiconductor wafers (100) being processed in a finished solar cell state, - wherein these semiconductor wafers (100) are mounted side by side on the back of the transparent front glass (104), - wherein the electrical contacts of the solar cells and the intermediate contacts connecting adjacent solar cells of the solar panel / module are formed by a structured metal layer covering the back of the front glass (104), including the back of the attached semi-finished solar cells, and - wherein the semiconductor wafers (100) have a p-doped region (102) and an n-doped region (101) on the back side, which are manufactured in a semiconductor matrix from monocrystalline or polycrystalline material, wherein the front side of the semiconductor wafers (100) exclusively comprises one or more of the following features: surface texturing, applied surface passivation films (103) and an applied anti-reflective coating, wherein edges of the semiconductor wafers (100) are smoothed or planarized and the structured metal layer is applied to the smoothed or planarized edges of the semiconductor wafers (100), wherein the smoothed or planarized edges of the semiconductor wafers (100) are provided by: - i) a suitable material is introduced along the edges and / or in the space between the semiconductor wafers (100) using inkjet printing or prefabricated elements to form a smooth, continuous surface between adjacent semiconductor wafers (100), or - ii) both the back of the solar cells and the gaps between the solar cells are coated with a polymer material. [18] Solar panel / module according to claim 17, wherein the semiconductor wafers (100) are made of one of the following elements: Si, Ge, InP, or GaAs. [19] Solar panel / module according to claim 18, wherein the semiconductor wafers (100) are made of monocrystalline silicon with a thickness of 20 µm to 80 µm. [20] Solar panel / module according to claim 19, wherein the structured metal layer is made of one of the following elements: nickel, palladium, titanium, silver, gold, aluminum, copper, tungsten, chromium, vanadium, tin or any combination of these materials. [21] Solar panel / module according to claim 17, wherein the structured metal layer is replaced by an electrically conductive plastic and / or other polymer compositions such as carbon polymers. [22] Solar panel / module according to one of claims 17 to 21, wherein gaps between the semiconductor wafers (100) mounted on the front glass (104) are planarized by filling with polymer, glass or epoxy.

Images