Semiconductor device manufacturing process and semiconductor device

Abstract

Semiconductor device manufacturing process comprising the following steps: Attaching a semiconductor element (14, 16) to a substrate (12); electrically connecting a signal terminal (T4, T5, T6, T7) and a main terminal (T2, B5) of a terminal complex (70) to the semiconductor element (14, 16), wherein the terminal complex (70) comprises a frame region (72), the signal terminal (T4, T5, T6, T7) connected to an inside of the frame region (72), and the main terminal (T2, B5) with an opening formed therein and which is connected to the inside of the frame region (72) with a greater width than the signal terminal (T4, T5, T6, T7), and forms an encapsulated body in which the substrate (12), the semiconductor element (14, 16) and the terminal complex (70) are integrated; an assembly step for mounting the body to be encapsulated (74) onto a lower mold half (100), such that a plurality of blocks (TB, LB, RB, BB, C1-C4) formed in the lower mold half (100) engage with the signal terminal (T4, T5, T6, T7) and the main terminal (T2, B5) without any intervening gap; wherein at least one of the plurality of blocks (TB, LB, RB, BB, C1-C4) is placed in the opening formed in the main terminal (T2, B5); After the assembly step, placing a bottom surface of an upper mold half (150) on top surfaces of the plurality of blocks (TB, LB, RB, BB, C1-C4), a top surface of the signal terminal (T4, T5, T6, T7) and a top surface of the main terminal (T2, B5) without any gap remaining between them, to form a cavity (170) for placing the substrate (12) and the semiconductor element (14, 16), and a forming step for carrying out a forming by injecting a forming resin into the cavity (170), wherein part of the substrate (12) is exposed to the outside from the forming resin.

Description

Technical field

[0001] This invention relates to a method for manufacturing a semiconductor device, which is used, for example, in switching a large current or the like, and to a semiconductor device manufactured by the method. Background of the state of the art

[0002] Patent document 1 discloses the assembly of a semiconductor element on a conductor frame with a plurality of leads (terminals) and dummy leads. This conductor frame is placed in a mold and then encapsulated in resin. Further semiconductor devices and semiconductor device manufacturing methods are known from patent literature 2 to 6. State of the art patent literature Patent literature 1: JP 2006 - 173 649 A Patent literature 2: US 2008 / 0 122 050 A1 Patent Literature 3: US 6,100,598 A Patent literature 4: JP 2008- 112 932 A Patent Literature 5: US 5,162,894 A Patent literature 6: US 6,291,880 B1 Summary of the invention Problems to be solved by the invention

[0003] A semiconductor device that handles a large current includes main terminals through which a main current flows and signal terminals for transmitting control signals. One end of each of these terminals is connected to a semiconductor element inside the resin, and the other end extends outside the resin. A mold used in forming the resin must have a shape suitable for arranging the terminals. Furthermore, since the arrangement of the main and signal terminals varies depending on the semiconductor device product, the problem arose that a separate mold is required for each semiconductor device product. Manufacturing different molds for different semiconductor device products increases costs. Moreover, since changing molds takes time, it reduces manufacturing efficiency.

[0004] The present invention was designed to solve the problems described above, and it is an object of the present invention to provide a semiconductor device manufacturing method in which encapsulation of a plurality of semiconductor device products can be carried out using a single mold, and a semiconductor device produced by the method. Means of solving the problems

[0005] According to the present invention, a semiconductor device manufacturing method is provided, comprising the following steps: attaching a semiconductor element to a substrate, electrically connecting a signal terminal and a main terminal of a terminal complex to the semiconductor element, wherein the terminal complex comprises a frame region, the signal terminal connected to an inside of the frame region, the main terminal connected to the inside of the frame region with a greater width than the signal terminal, and a dummy terminal connected to the inside of the frame region, and forming an encapsulation body in which the substrate, the semiconductor element, and the terminal complex are integrated, mounting the encapsulation body onto a lower mold half such that a plurality of blocks formed in the lower mold half are connected to the signal terminal,the main terminal and the dummy terminal are engaged without any gap remaining between them; after the assembly step, placing a bottom surface of an upper mold half on top surfaces of the plurality of blocks, a top surface of the signal terminal, a top surface of the main terminal and a top surface of the dummy terminal without any gap remaining between them, in order to form a cavity for placing the substrate and the semiconductor element and to carry out the molding by injecting a molding resin into the cavity.

[0006] According to the present invention, a semiconductor device is also provided, comprising a substrate, a semiconductor element attached to the substrate, a signal terminal for transmitting a signal to switch the semiconductor element between on and off, a main terminal through which a main current of the semiconductor element is passed, wherein the main terminal is configured with a greater width than the signal terminal, a dummy terminal which is not electrically connected to the semiconductor element, and a molded resin which covers the semiconductor element and the substrate, wherein areas of the signal terminal, the main terminal and the dummy terminal are exposed to the outside.

[0007] Further features of the present invention are explained below. Advantageous effects of the invention

[0008] This invention enables the implementation of resin encapsulation in a variety of semiconductor device products with different connection arrangements using a single mold. Brief description of the drawings Fig. Figure 1 shows a top view of a semiconductor device according to an embodiment 1 of the present invention. Fig. Figure 2 shows a top view, which shows the inside of the molding resin of Fig. 1 illustrates. Fig. Figure 3 shows a cross-sectional view of the semiconductor device along a line III-III' of Fig. 2. Fig. Figure 4 shows a top view illustrating that the semiconductor elements were attached to the substrate. Fig. Figure 5 shows a top view of an annex complex. Fig. Figure 6 shows a top view illustrating that the connection complex was attached to the substrate and to the semiconductor elements. Fig. Figure 7 shows a perspective view of the lower half of the form. Fig. Figure 8 shows a top view of the lower half of the mold. Fig. Figure 9 shows a top view of the upper half of the mold. Fig. Figure 10 shows a cross-sectional view illustrating the lower and upper mold halves, which are placed on top of each other and clamped together. Fig. Figure 11 shows a cross-sectional view along a line EE' of Fig. 8. Fig. Figure 12 shows a top view illustrating that the body to be encapsulated was mounted on the lower half of the mold. Fig. Figure 13 shows an enlarged perspective view, which includes part of Fig. 12 illustrated. Fig. Figure 14 shows a cross-sectional view illustrating the body to be encapsulated, the lower mold half and the upper mold half after mold clamping. Fig. Figure 15 shows a cross-sectional view along a line JJ' of Fig. 12. Fig. Figure 16 shows a top view of the body to be encapsulated, which is encapsulated in the molding resin. Fig. Figure 17 shows a perspective view of the semiconductor device, the connection of which is bent. Fig. Figure 18 shows a top view illustrating an adjoining complex. Fig. Figure 19 shows a top view illustrating that the connection complex was attached to the substrate and the semiconductor elements. Fig. Figure 20 shows a top view of the body to be encapsulated, which is encapsulated in the molding resin. Fig. Figure 21 shows a top view of the semiconductor device after a separation step. Fig. Figure 22 shows a top view of the semiconductor device. Fig. Figure 23 shows a cross-sectional view of the semiconductor device according to a modified example. Fig. Figure 24 shows a cross-sectional view of the semiconductor device according to another modified example. Fig. Figure 25 shows a top view of the semiconductor device according to an embodiment 2 of the present invention. Fig. Figure 26 shows a top view of a semiconductor device according to a modified example. Fig. Figure 27 shows a top view of a semiconductor device according to an embodiment 3 of the present invention. Fig. Figure 28 shows a top view of the semiconductor device according to a modified example. Fig. Figure 29 shows a perspective view of the semiconductor device according to an embodiment 4 of the present invention. Fig. Figure 30 shows a perspective view of a semiconductor device according to a modified example. Fig. Figure 31 shows a perspective view of a semiconductor device according to an embodiment 5 of the present invention. Fig. Figure 32 shows a perspective view of a semiconductor device according to a modified example. Fig. Figure 33 shows a perspective view of a semiconductor device according to another modified example. Fig. Figure 34 shows a perspective view of a semiconductor device according to an embodiment 6 of the present invention. Fig. Figure 35 shows a top view of a semiconductor device according to an embodiment 7 of the present invention. Fig. Figure 36 shows a perspective view of a semiconductor device according to a modified example. Fig. Figure 37 shows a top view of a semiconductor device according to an embodiment 8 of the present invention. Fig. Figure 38 shows a perspective view illustrating part of a lower mold half used in embodiment 8 of the present invention. Fig. Figure 39 shows a top view of a semiconductor device according to a modified example. Fig. Figure 40 shows a perspective view of a semiconductor device according to an embodiment 9 of the present invention. Fig. Figure 41 shows a perspective view of a semiconductor device according to a modified example. Fig. Figure 42 shows a top view of a semiconductor device according to an embodiment 10 of the present invention. Fig. Figure 43 shows a top view of a semiconductor device according to an embodiment 11 of the present invention. Fig. Figure 44 shows a top view of a semiconductor device according to an embodiment 12 of the present invention. Fig. Figure 45 shows a top view of a semiconductor device according to an embodiment 13 of the present invention. Fig. Figure 46 shows a top view of a semiconductor device according to a modified example. Fig. Figure 47 shows a perspective view of a semiconductor device according to an embodiment 14 of the present invention. Description of the exemplary implementations

[0009] Semiconductor device manufacturing methods and semiconductor devices according to exemplary embodiments of the present invention are described with reference to the drawings. The same or corresponding elements are identified by the same reference numerals, and their repeated description is unnecessary. Example 1

[0010] Fig. Figure 1 shows a top view of a semiconductor device 10 according to an embodiment 1 of the present invention. The semiconductor device 10 comprises a molding resin 11. In a top view, the molding resin has a rectangular shape. Terminals T1 to T9 are exposed to the outside from a top side of the molding resin 11. Terminals R1 to R18 are exposed to the outside from a right side of the molding resin 11. Terminals L1 to L18 are exposed to the outside from a left side of the molding resin 11. Terminals B1 to B8 are exposed to the outside from a bottom side of the molding resin 11. In this way, the terminals are exposed to the outside from all sides of the molding resin 11.

[0011] Fig. Figure 2 shows a top view of the interior of the molding resin 11. Fig. 1 illustrates. In Fig. In Figure 2, a portion of the molding resin 11 was omitted to show the interior of the molding resin 11. In the following drawings, a portion of the molding resin 11 can be seen as shown in Figure 2. Fig. 2 can also be omitted. A substrate 12, which acts as a heat sink, is located inside the resin 11. The substrate 12 is made of a conductive material, such as a metal. Semiconductor elements 14 and 16 are attached to the substrate 12. The semiconductor element 14 is an IGBT chip with gates 14a and emitters 14b on its front side and a collector connected to the substrate 12 on its back side. The semiconductor element 16 is a diode chip with an anode 16a on its front side and a cathode connected to the substrate 12 on its back side. The semiconductor elements 14 and 16 and the substrate 12 are covered with the resin 11 and are therefore located in the center of the semiconductor device 10.

[0012] Terminals T2 and B5 are main terminals through which the main currents of semiconductor elements 14 and 16 are conducted. Main terminal T2 is attached to the substrate 12, for example, with solder. Main terminal T2 is connected to the collector of semiconductor element 14 and the cathode of semiconductor element 16 through the substrate 12. Main terminal B5 is attached to the emitters 14b and the anode 16a, for example, by means of solder.

[0013] Terminals T4, T5, T6, and T7 are signal terminals for transmitting signals to switch the semiconductor element 14 between on and off. Signal terminals T4, T5, T6, and T7 are connected to gates 14a by means of metal wires 50.

[0014] Terminals T1, T3, T8, T9, R1 to R18, L1 to L18, B1 to B4, and B6 to B8 are dummy terminals that are not electrically connected to semiconductor elements 14 and 16. The main terminals, signal terminals, and dummy terminals are partially exposed to the outside of the resin 11. Main terminals T2 and B5 are wider than the signal terminals and dummy terminals. Main terminal T2 has three openings, and main terminal B5 has four. The widths of the signal terminals and dummy terminals are identical.

[0015] Fig. Figure 3 shows a cross-sectional view of the semiconductor device 10 along a line III-III' of Fig. 2. The collector 14c of the semiconductor element 14 is attached to the substrate 12 with solder 60. The emitters 14b are attached to the main terminal B5 with solder 62. The cathode 16b of the semiconductor element 16 is attached to the substrate 12 with solder 64. The anode 16a is attached to the main terminal B5 with solder 66. It should be noted that an electrically conductive adhesive can be used instead of solder for this purpose.

[0016] Part of the substrate 12 (the back side) is exposed to the outside of the molding resin 11. It should be noted that a ceramic substrate can be provided between the substrate 12 and the semiconductor element 14, and between the substrate 12 and the semiconductor element 16.

[0017] A method for manufacturing the semiconductor device 10 according to an embodiment 1 of the present invention is described. First, the semiconductor elements 14 and 16 are attached to the substrate 12 using solder. Fig. Figure 4 shows a top view illustrating that the semiconductor elements 14 and 16 have been attached to the substrate 12. Subsequently, a connection complex is attached to the substrate 12 and to the semiconductor elements 14 and 16. Fig. Figure 5 shows a top view of a connection complex 70. The connection complex 70 comprises a frame area 72. The main connections T2 and B5, the signal connections T4 to T7 and the dummy connections T1, T3, T8, T9, R1 to R18, L1 to L18, B1 to B4 and B6 to B8 are connected to the inside of the frame area 72.

[0018] Fig. Figure 6 shows a top view illustrating that the terminal complex 70 has been attached to the substrate 12 and to the semiconductor elements 14 and 16. In this step, the signal terminals T4 to T7 are connected to the gates 14a by means of the metal wires 50. Furthermore, the main terminal T2 is connected to the substrate 12 by means of solder, and the main terminal B5 is connected to the emitters 14b and the anode 16a. The signal terminals T4 to T7 and the main terminals T2 and B5 are thus electrically connected to the semiconductor elements 14 and 16 to form an encapsulated body 74 in which the substrate 12, the semiconductor elements 14 and 16, and the terminal complex 70 are integrated.

[0019] Next, the lower half of the mold will be described. Fig. Figure 7 shows a perspective view of a lower mold half 100. The lower mold half 100 has a first surface 102, a second surface 104, which is a surface arranged one step lower than the first surface, and a third surface 106, which is a surface arranged one step lower than the second surface 104. The second surface 104 surrounds the third surface 106. The first surface 102 surrounds the second surface 104.

[0020] The boundary between the second surface 104 and the third surface 106 is a rectangle in plan view. A multitude of blocks are formed along the boundary on the second surface 104. The second surface 104 specifically features blocks TB1 to TB11, blocks RB1 to RB17, blocks LB1 to LB17, and blocks BB1 to BB11, each formed along sides of the rectangle forming the boundary between the second surface 104 and the third surface 106. Additionally, blocks CB1 to CB4 are formed adjacent to the corners of the rectangular boundary. All block gaps (a block gap being the space between one block and another block adjacent to the preceding block) are of equal size.

[0021] Blocks TB1 to TB11, RB1 to RB17, LB1 to LB17, BB1 to BB11, and CB1 to CB4 can collectively be referred to as the "plurality of blocks." The top surfaces of the plurality of blocks and the first surface 102 are surfaces at the same level.

[0022] Fig. Figure 8 shows a top view of the lower half of mold 100. Fig. Figure 9 shows a top view of an upper mold half 150. The upper mold half 150 has a first surface 152 and a second surface 154, which is a surface arranged one step lower than the first surface 152. The shape and area of ​​the second surface 154 are identical to those of the third surface 106 of the lower mold half 100.

[0023] Fig. Figure 10 includes cross-sectional views illustrating the lower mold half 100 and the upper mold half 150, which are placed one above the other and clamped together. Fig. Figure 10A shows a cross-sectional view along a line AA' of Fig. 8. There is a gap between the second surface 104 of the lower mold half 100 and the upper mold half 150. Fig. Figure 10B shows a cross-sectional view along a line BB' of Fig. 8. Since blocks C1, LB and C2 are present, columns 160 are formed in the shape of a comb tooth between the lower mold half 100 and the upper mold half 150.

[0024] Fig. Figure 10C shows a cross-sectional view along a line CC' of Fig. 8. Line CC' is a line running through blocks. A recess 170 is formed between the third surface 106 of the lower mold half 100 and the second surface 154 of the upper mold half 150. Fig. 10D shows a cross-sectional view along a line DD' of Fig. 8. Line DD' is not a line passing through blocks. Block gaps 162 continue from the recess 170 between the third surface 106 of the lower mold half 100 and the second surface 154 of the upper mold half 150.

[0025] Fig. Figure 11 shows a cross-sectional view along a line EE' of Fig. 8. Line EE' is not a line passing through blocks. Block gaps 164 continue from the recess 170 between the third surface 106 of the lower mold half 100 and the second surface 154 of the upper mold half 150. It should be noted that in Fig. 10 and Fig. 11 the lower half of the form 100 and the upper half of the form 150 are hatched for the sake of simplicity of explanation.

[0026] The body 74 to be encapsulated is mounted on the lower mold half 100 described above. This step is referred to as the assembly step. Fig. Figure 12 shows a top view illustrating that the body 74 to be encapsulated has been mounted on the lower mold half 100. In the assembly step, the body 74 to be encapsulated is mounted on the lower mold half 100 so that a plurality of blocks formed in the lower mold half 100 engage with the main terminals, signal terminals and dummy terminals without any remaining gap between them. Fig. Figure 13 shows an enlarged perspective view, which shows blocks TB, C1 and C4 and the terminals T of Fig. Figure 12 illustrates that the three blocks TB2 to TB4 are placed in the three openings of the main connection T2.

[0027] In this way, each block space of the lower half of the mold 100 is filled with a main connection, a signal connection, or a dummy connection of the connection complex 70. For example, eight of the 12 block spaces formed by blocks C1, TB, and C4 are filled with connections T1 and T3 through T9, and four are filled with the main connection T2. ​​The reason the main connection T2 can fill four block spaces is that blocks TB2 through TB4 are located in the three openings of the main connection T2.

[0028] The 18 block spaces formed by blocks C4, RB, and C3 are filled with connections R1 to R18. The 18 block spaces formed by blocks C1, LB, and C2 are filled with connections L1 to L18. Seven of the 12 block spaces formed by blocks C2, B, and C3 are filled with connections B1 to B4 and B6 to B8, and five are filled with connection B5. The reason main connection B5 can fill five block spaces is that blocks BB5 to BB8 are located in the four openings of main connection B5.

[0029] After the assembly step, the top surfaces of the main terminals, signal terminals, and dummy terminals, the top surfaces of the multiple blocks, and the first surface 102 become surfaces of the same height. The top surfaces of the main terminals, signal terminals, and dummy terminals, the top surfaces of the multiple blocks, and the first surface 102 are generally referred to as contact surfaces.

[0030] The lower mold half 100 and the upper mold half 150 are then clamped together. This step is called the mold clamping step. During the mold clamping step, the first surface 152 of the upper mold half 150 is brought into contact with the contact surfaces. Fig. Figure 14 shows a cross-sectional view illustrating the body 74 to be encapsulated, the lower mold half 100 and the upper mold half 150 after mold clamping. Fig. Figure 14A shows a cross-sectional view along a line FF' of Fig. 12. The connections L are located in the gaps between the second surface 104 of the lower mold half 100 and the upper mold half 150. Fig. Figure 14B shows a cross-sectional view along a line GG' of Fig. 12. Line GG' is a line running through blocks LB. The spaces between the blocks are filled with terminals L.

[0031] Fig. Figure 14C shows a cross-sectional view along a line HH' of Fig. 12. Line HH' is a line running through blocks. The substrate 12, the semiconductor elements 14 and 16, and the like are placed in the recess 170. Fig. 14D shows a cross-sectional view along a line II' of Fig. 12. Line II' is not a line running through blocks. The block spaces (block spaces 162 in Fig. 10D) are filled with the T5 and B5 connectors.

[0032] Fig. Figure 15 shows a cross-sectional view along a line JJ' of Fig. 12. The line JJ' is not a line passing through blocks. The block gaps (block gaps 164 in Fig. 11) are filled with the terminals L 14 and R 14. In the forming step, a bottom surface (the first surface 152) of the upper mold half 150 is placed on the top surface of the plurality of blocks, the top surfaces of the main terminals, the top surfaces of the signal terminals and the top surfaces of the dummy terminals without any remaining gap between them to form the recess 170.

[0033] Next, molding resin is injected into the recess 170. This step is called the molding step. After the molding step, the body 74 to be encapsulated, which is encapsulated in the molding resin, is removed from the mold. Fig. Figure 16 shows a top view of the body 74 to be encapsulated, which is encapsulated in the molding resin 11. Fig. In Figure 16, a portion of the molding resin 11 is omitted, so that the inside of the molding resin 11 is visible. Each connection comprises an area covered by the molding resin 11 and an area extending outside the molding resin 11.

[0034] The frame area is then disconnected from the main connections, signal connections, and dummy connections. This step is called the disconnection step. The in Fig. 1 and Fig. 2 The semiconductor device 10 shown is created by separating the frame area 72 from Fig. 16 completed. It should be noted that the connections, as in Fig. 17 shown, can be bent in a suitable manner.

[0035] The present invention enables the resin encapsulation of a variety of semiconductor device products with different connection arrangements using a single mold (comprising the lower mold half 100 and the upper mold half 150). The encapsulation of a semiconductor device having a connection arrangement different from that of semiconductor device 10 in a resin using the lower mold half 100 and the upper mold half 150 is described. Fig. Figure 18 shows a top view illustrating a connection complex 180 with a connection arrangement that differs from that of connection complex 70. Fig. 5 differs. The terminals T, R, L and B are connected on the inside of a frame area 182.

[0036] Terminals T2, R6, L11, and B5 are main terminals. Main terminal T2 has three openings. Main terminal R6 has three openings. Main terminal B5 has four openings. Main terminals R6 and B5 are connected to form a single main terminal. Main terminal L11 has three openings. Terminals T5 through T7 and L5 are signal terminals. The other terminals are dummy terminals.

[0037] Fig. Figure 19 shows a top view illustrating that the connection complex 180 has been attached to the substrate 12 and the semiconductor elements 14 and 15. The body 184 to be encapsulated is completed by attaching the connection complex 180 to the semiconductor elements 14 and 16. The assembly step is then performed. In the assembly step, the body 184 to be encapsulated is mounted onto the lower mold half 100, such that the plurality of blocks formed in the lower mold half 100 engage with the main terminals, signal terminals, and dummy terminals without any gaps between them.

[0038] In this way, each block gap of the lower mold half 100 is filled with a main connection, a signal connection, or a dummy connection of the connection complex 180. Subsequently, the mold clamping step and the forming step are performed to create a Fig. The structure shown in section 20 is obtained. Finally, the separation step is performed to create a semiconductor device of Fig. to complete 21.

[0039] The arrangement of the main connections and the signal connections of connection complex 70 of Fig. 5 and the connecting complex 180 of Fig. The 18 connections are different. However, the connection arrangements of connection complex 70 and connection complex 180 were aligned by forming dummy connections in connection complexes 70 and 180. Consequently, these can be mounted on the same lower mold half 100.

[0040] A terminal assembly having main and signal terminals in positions different from those of terminal assemblies 70 and 180 can, of course, also be mounted on the lower mold half 100 by adding dummy terminals so that the terminals fill all the block spaces of the lower mold half 100. Therefore, resin encapsulation of a variety of semiconductor device products can be achieved using a single mold simply by changing the terminal arrangement of a terminal assembly.

[0041] One in Fig. The semiconductor device shown in Figure 22 is, for example, a semiconductor device that has been encapsulated in resin using the lower mold half 100 and the upper mold half 150. A main terminal T1 with five openings fills six block spaces during the assembly step. Meanwhile, a main terminal B4 with six openings fills seven block spaces during the assembly step. Such an increase in the widths of the main terminals can reduce the current densities in the main terminals.

[0042] Each main terminal according to embodiment 1 of the present invention has openings, and at least one of the plurality of blocks is placed in the openings during the assembly step. Forming openings in the main terminals allows the widths of the main terminals to be increased, thereby making one mold usable for a plurality of products. This enables, for example, the manufacture of a semiconductor device in which main currents of no less than several tens to several hundred amperes pass through the main terminals. Furthermore, a terminal arrangement can be modified as desired, as long as main terminals, signal terminals, and dummy terminals are provided to fill all the inter-block spaces.

[0043] Various modifications can be made to the semiconductor device manufacturing process and the semiconductor device according to embodiment 1 of the present invention. For example, various modifications can be made to the structures on the back faces of the semiconductor elements 14 and 16. Fig. 23 and Fig. Figure 24 shows cross-sectional views of semiconductor devices according to modified examples. Fig. 23 discloses a semiconductor device in which a metal layer 192 is formed on the back of the substrate 12 with an insulating film 190 inserted between them. Fig. Reference 24 discloses a semiconductor device in which metal layers 196 and 198 are formed on both surfaces of an insulating substrate 194. Although an IGBT chip and a diode chip are used as semiconductor elements in embodiment 1 of the present invention, a semiconductor element such as a MOSFET chip or the like can be used. It should be noted that these modifications can also be used in semiconductor fabrication methods and semiconductor devices according to the following embodiments.

[0044] The description of semiconductor device manufacturing processes and semiconductor devices according to the following exemplary embodiments focuses on the differences from exemplary embodiment 1. Example 2

[0045] Fig. Figure 25 shows a top view illustrating the inside of the resin 11 of a semiconductor device according to embodiment 2 of the present invention. A control IC 200 for controlling the semiconductor element 14 is formed inside the resin 11. The control IC 200 is attached to a substrate 202. The signal terminals T2 to T12, L3 and L4 are connected to the control IC 200 by means of metal wires. The control IC 200 is connected to the gates 14a by means of metal wires.

[0046] Terminals B5, B7, and R18 are main terminals. Main terminal B5 has four openings. Main terminals B7 and R18 are connected. Main terminals B7 and R18 each have two openings. During assembly, a block BB11 is placed in a left opening of main terminals B7 and R18, and a block C3 is placed in a right opening. Terminals T1, R1 to R17, L1, L2, L5 to L18, B1 to B4, and B6 are dummy terminals.

[0047] The semiconductor device according to embodiment 2 of the present invention can be manufactured using the same process as the semiconductor device manufacturing method of embodiment 1. More precisely, in the assembly step, each block cavity of the lower mold half 100 is filled with a main terminal, a signal terminal, or a dummy terminal as described above. Consequently, the lower mold half 100 and the upper mold half 150 described in embodiment 1 can be used.

[0048] Fig. Figure 26 shows a top view of a semiconductor device according to a modified example. A gate resistor 210, which connects the control IC 200 and the semiconductor element 14, is provided inside the molded resin 11. The gate resistor 210 is located in a region of the signal terminal R4. The gate resistor 210 is positioned between the control IC and the semiconductor element 14. A gate 14a is connected to the control IC 200 through the gate resistor 210 by means of metal wires.

[0049] The provision of signal terminal R4 and gate resistor 210 facilitates the evaluation of the semiconductor device. Specifically, the gate resistor can be adjusted by changing the specifications of gate resistor 210. Furthermore, a gate signal can be directly input to gate 14a via signal terminal R4. It should be noted that a component, such as a thermistor, can be attached to one of the terminals for evaluating the semiconductor device. Example 3

[0050] Fig. Figure 27 shows a top view illustrating the inside of the mold resin 11 of a semiconductor device according to an embodiment 3 of the present invention. The emitters 14b are connected to the anode 16a by means of metal wires 220. The anode 16a is connected to the main terminal B5 by means of metal wires 222. In the semiconductor device according to embodiment 3 of the present invention, terminals and semiconductor elements can be electrically connected by means of metal wires.

[0051] Fig. Figure 28 shows a top view of a semiconductor device according to a modified example. The signal terminals T3 to T6 are connected to the gates 14a by means of four relay terminals 224. The four relay terminals 224 are connected to the terminals T3 to C6 and the gates 14a, for example, by ultrasonic bonding or by means of an electrically conductive adhesive. Example 4

[0052] Fig. Figure 29 shows a perspective view of a semiconductor device according to an embodiment 4 of the present invention. An external substrate 230 is arranged outside the molded resin 11. Dummy connections T1 to T16, R13 and L13 extend through the external substrate 230 and are connected to it by soldering or welding. The external substrate 230 is, for example, a control board or a cooling fin.

[0053] The semiconductor device of Fig. Component 29 can be produced by performing a fastening step after the separation step to attach the dummy terminals T1 to T16, R13 and L13 to the external substrate 230. In this way, the use of dummy terminals for connection to the external substrate 230 makes it possible to omit elements for their connection. Fig. Figure 30 shows a perspective view of a semiconductor device according to a modified example. An external substrate 233 is arranged below the mold resin 11. The dummy terminals R1, R9, and L9 pass through the external substrate 232 and are attached to it. Example 5

[0054] Fig. Figure 31 shows a perspective view of a semiconductor device according to an embodiment 5 of the present invention. A plurality of dummy terminals have plate-shaped regions R and L outside the mold resin 11. The plate-shaped region R is configured such that all dummy terminals exposed from a right-hand side face of the mold resin 11 are combined. The plate-shaped region L is configured such that all dummy terminals exposed from a left-hand side face of the mold resin 11 are combined.

[0055] The plate-shaped regions R and L and the external substrate 240 have through-holes Ra and La formed therein. Screws and nuts are tightened from above and below the through-holes Ra and La to fasten the plate-shaped regions R and L to the external substrate 240. This semiconductor device can be implemented by performing a fastening step to attach the plate-shaped regions R and L to the external substrate 240 after the separation step. In this way, the plate-shaped dummy terminals can be used for connection to the external substrate 240.

[0056] Fig. Figure 32 shows a perspective view of a semiconductor device according to a modified example. The plate-shaped area R is attached to an external substrate 244 by means of an adhesive 242. The plate-shaped area L is attached to the external substrate 244 by means of an adhesive 246. Grease can be used instead of an adhesive. The plate-shaped areas R and L of Fig. 31 and Fig. The 32 pins are used for connection to the external substrate and simultaneously act as cooling fins. It should be noted that not only dummy connections but also main connections or signal connections can be designed in the form of a cooling fin.

[0057] Fig. Figure 33 shows a perspective view of a semiconductor device according to a further modified example. The dummy terminals exposed from a right side face of the mold resin 11 have a press-fit connection 250, which is connected to the plate-shaped area R. The dummy terminals exposed from a left side face of the mold resin 11 have a press-fit connection 252, which is connected to the plate-shaped area L. The press-fit connections 250 and 252 are inserted into openings 254a and 254b of the external substrate 254 to be press-fitted to the external substrate 254. Providing dummy terminals with the press-fit connections 250 and 252 thus facilitates the connection to the external substrate 254. Example 6

[0058] Fig. Figure 34 shows a perspective view of a semiconductor device according to an embodiment 6 of the present invention. This semiconductor device has a feature in which a plurality of dummy terminals form plate springs outside the mold resin. All dummy terminals exposed from a right-hand side face of the mold resin 11 are combined to form a plate spring R. All dummy terminals exposed from a left-hand side face of the mold resin 11 are combined to form a plate spring L.

[0059] A method for manufacturing this semiconductor device is described. The dummy leads of the semiconductor device have plate-shaped areas outside the mold resin. After the separation step, a bending step is performed to form the plate-shaped areas into the plate springs R and L. The plate springs R and L allow a certain load to be applied when the semiconductor device is mounted on an external substrate, such as a cooling fin, and can improve the mountability of the semiconductor device. It should be noted that disc springs can be formed instead of the plate springs. Example 7

[0060] Fig. Figure 35 shows a top view of a semiconductor device according to an embodiment 7 of the present invention. Sleeves 270, 272, 274, and 276 are formed at the dummy terminals R1, R18, L1, and L18, respectively. The sleeves 270, 272, 274, and 276 form four through-holes that extend vertically through the semiconductor device. The sleeves 270, 272, 274, and 276 are components for mounting the semiconductor device in shafts, cylindrical elements, or the like.

[0061] Fig. Figure 36 shows a perspective view of a semiconductor device according to a modified example. The sleeves 280, 282, 284, and 286, each formed on regions of the dummy terminals R1, R13, L1, and L13, are arranged on the mold resin 11. More precisely, the sleeves can be formed within the mold resin or outside of it. Example 8

[0062] Fig. Figure 37 shows a top view of a semiconductor device according to embodiment 8 of the present invention. The main terminals T2 and B5 have no openings. Consequently, in the block spaces of a lower mold half, the widths of the block spaces in which the main terminals T2 and T5 are placed must be greater than the width of the block space in which a signal terminal or a dummy terminal is placed. Therefore, the semiconductor devices according to embodiments 1 to 7 can be produced using a single mold (comprising the lower mold half 100 and the upper mold half 150), but the semiconductor device according to embodiment 8 must be produced using a mold that differs from the one described above.

[0063] Fig. Figure 38 shows a perspective view illustrating part of a lower mold half used in embodiment 8 of the present invention. The width of the block gap between block TB1 and block TB2 is greater than the widths of other block gaps. In the assembly step, the main connection T2 of a connection complex 290 is placed in the block gap between block TB1 and block TB2.

[0064] In the semiconductor device according to embodiment 8 of the present invention, larger widths can be maintained for the overall main connections because the main connections T2 and B5 have no openings. Consequently, the current densities in the main connections T2 and B5 can be reduced. Using the shape employed in embodiment 8 of the present invention, a semiconductor device of a different product can be manufactured with a connection arrangement that differs from the connection arrangement of the semiconductor device of Fig. 37 differs. In this case, the positions of the main terminals can be identical to the positions of main terminals T2 and B5 of Fig. 37. Alternatively, main terminals with the openings of embodiment 1 can be used, and large-width dummy terminals can be placed at the positions of main terminals T2 and B5 of Fig. 37 are planned.

[0065] Fig. Figure 39 shows a top view of a semiconductor device according to a modified example. This semiconductor device comprises the following dummy terminals: first dummy terminals R1 to R3, R5, R6, R8, R9, R11, R12, L1 to L3, L5, L6, L8, L9, L11, L12 and B1; and second dummy terminals T1, T7, R4, R7, R10, L4, L7, L10, B2 and B4, which have larger widths than the first dummy terminals.

[0066] In the assembly step, the first dummy terminals are placed in the narrow block spaces, and the second dummy terminals are placed in the wide block spaces. Large-width main terminals without openings can be provided by forming main terminals in the areas where the second dummy terminals are formed. For example, a large number of products can be accommodated by replacing a large number of second dummy terminals with main terminals in a product with a higher current capacity. It should be noted that although the main terminals T2 and B3 of the semiconductor device are... Fig. 39 openings may be main connections that do not have openings. Example 9

[0067] Fig. Figure 40 shows a perspective view of a semiconductor device according to an embodiment 9 of the present invention. A terminal 300 is exposed from a top surface of the mold resin 11. The terminal 300 can be a main terminal, a signal terminal, or a dummy terminal. To provide the terminal 300, an opening corresponding to the terminal 300 is formed in the second surface 154 of the upper mold half. It should be noted that the terminal 300 can be exposed from a bottom surface of the mold resin 11.

[0068] In this way, connections can be brought out from any surface of the molding resin 11. Fig. Figure 41 shows a perspective view of a semiconductor device according to a modified example. In this semiconductor device, connections can only be brought out from two side surfaces of the molded resin 11. Example 10

[0069] Fig. Figure 42 shows a top view of a semiconductor device according to an embodiment 10 of the present invention. The main terminal B3 has openings, and the width of the main terminal B3 is maximized in the region where the openings are formed. More precisely, the width X1 of the region of the main terminal B3 where the openings are formed is greater than the width X2 of a region of it where the openings are not formed. Since, in the semiconductor device according to embodiment 10 of the present invention, the region of the main terminal B3 where the openings are formed has a greater width than the region where the openings are not formed, an increase in current density in the region where the openings are formed is prevented. Example 11

[0070] Fig. Figure 43 shows a top view of a semiconductor device according to an embodiment 11 of the present invention. A substrate 310 comprises an additional main terminal 310a and a body region 310b connected to the additional main terminal 310a. The additional main terminal 310a is exposed to the outside from a side surface of the molded resin 11. The semiconductor elements 14 and 16 are attached to the body region 310b. The additional main terminal 310a functions as the main terminal.

[0071] The additional main connection 310a has three openings formed within it. During the assembly step, the blocks are placed in these openings. Furthermore, during the assembly step, the additional main connection 310a fills four gaps between the blocks. In this way, the connection of the main connection and the substrate can be eliminated by forming the additional main connection 310a, which acts as the main connection in a specific area of ​​the substrate 310.

[0072] It should be noted that the additional main connection 310a does not need to have openings. In this case, the additional main connection fills a block cavity that is designed to be quite wide. Regardless of whether the additional main connection has openings or not, it fills at least one block cavity during the assembly step. Example 12

[0073] Fig. Figure 44 shows a top view of a semiconductor device according to an embodiment 12 of the present invention. This semiconductor device comprises the following main terminals: a first terminal B3, which is connected to the front electrodes (the emitter 14a and the anode 16a) of the semiconductor elements 14 and 16; and second terminals B5 and R17, which are electrically connected to the back electrodes (the collector and the cathode) of the semiconductor elements 14 and 16. In addition, a capacitor 320 connects the first terminal B3 to the second terminals B5 and R17 outside the molded resin 11. The capacitor 320 provides protection against a current surge between a p-region and an n-region. Example 13

[0074] Fig. Figure 45 shows a top view of a semiconductor device according to an embodiment 13 of the present invention. This semiconductor device is a 6-in-1 IGBT module with an inverter bridge having six arms. The upper arms are formed on a substrate 400. A lower arm is formed on each of the substrates 402, 404 and 406.

[0075] Fig. Figure 46 shows a top view of a semiconductor device according to a modified example. This semiconductor device is a 2-in-1 IGBT module with a two-arm inverter bridge. The semiconductor device of Fig. 45 and the semiconductor device of Fig. 46 can be produced using the same mold. Example 14

[0076] Fig.Figure 47 shows a perspective view of a semiconductor device according to an embodiment 14 of the present invention. The molding resin 11 has an installation through-hole 11a, which is used for screwing or the like. The provision of the installation through-hole 11a enables easy connection of the semiconductor device to the outside. It should be noted that features of the semiconductor device manufacturing method and the semiconductor devices according to embodiments 1 to 14 described above can be combined in a suitable manner. Reference symbol list 10 Semiconductor device 11 Molding resin T1-T9, R1-R18, L1 connection L18, B1-B8 12 Substrat 14, 16 Semiconductor element 14a Gate 14b Emitter 14c Collector 16a Anode 16b Cathode 50 metal wire 70, 180, 290 Connection Complex 72, 182 frame area 74, 184 body to be encapsulated 100 lower mold half 102 first surface 104 second surface 106 third surface TB1-TB11, RB1-RB17, LB1-LB17, BB1-BB11, C1-C4 block 150 upper mold half 152 first surface 154 second surface 160 gap 162, 164 Block space 170 Exclusion 200 control ICs 202 Substrat 210 Gate resistor 220, 222 metal wire 224 Relay connection R, L connection 230, 232, 240, 244, External Substrate 254 250, 252 press fit connection s 270, 272, 274, 276, sleeve 280, 282, 284, 286 310 substrate 310a additional main connection 310b Body area 320 capacitor

Claims

[1] Semiconductor device manufacturing process comprising the following steps: Attaching a semiconductor element (14, 16) to a substrate (12); electrically connecting a signal terminal (T4, T5, T6, T7) and a main terminal (T2, B5) of a terminal complex (70) to the semiconductor element (14, 16), wherein the terminal complex (70) comprises a frame region (72), the signal terminal (T4, T5, T6, T7) connected to an inside of the frame region (72), and the main terminal (T2, B5) with an opening formed therein and which is connected to the inside of the frame region (72) with a greater width than the signal terminal (T4, T5, T6, T7), and forms an encapsulated body in which the substrate (12), the semiconductor element (14, 16) and the terminal complex (70) are integrated; an assembly step for mounting the body to be encapsulated (74) onto a lower mold half (100), such that a plurality of blocks (TB, LB, RB, BB, C1-C4) formed in the lower mold half (100) engage with the signal terminal (T4, T5, T6, T7) and the main terminal (T2, B5) without any intervening gap; wherein at least one of the plurality of blocks (TB, LB, RB, BB, C1-C4) is placed in the opening formed in the main terminal (T2, B5); After the assembly step, placing a bottom surface of an upper mold half (150) on top surfaces of the plurality of blocks (TB, LB, RB, BB, C1-C4), a top surface of the signal terminal (T4, T5, T6, T7) and a top surface of the main terminal (T2, B5) without any gap remaining between them, to form a cavity (170) for placing the substrate (12) and the semiconductor element (14, 16), and a forming step for carrying out a forming by injecting a forming resin into the cavity (170), wherein part of the substrate (12) is exposed to the outside from the forming resin. [2] Semiconductor device manufacturing method according to claim 1, wherein the connection complex further comprises a dummy connection (T1, T3, T8, T9, R1 to R18, L1 to L18, B1 to B4 and B6 to B8) as part thereof, which is connected to the inside of the frame area (72). [3] Semiconductor device manufacturing method according to claim 1, wherein a width of a region of the main terminal (B3) in which the opening is formed is greater than a width of a region of it in which the opening is not formed. [4] Semiconductor device manufacturing method according to claim 1, wherein the substrate (310) is made of a conductive material, the substrate (310) has an additional main terminal (310a) and a body region (310b) which is connected to the additional main terminal (310a), wherein the body region (310b) has the semiconductor element (14, 16) attached thereto, In the assembly step, the additional main connection (310a) fills at least one of the block gaps formed by the multitude of blocks, and the additional main connection (310a) is exposed from a side surface of the molding resin to an outside. [5] Semiconductor device manufacturing method according to one of claims 1, 3 and 4, further comprising, after the forming step, a separation step for separating the frame area (72) from the signal terminal and from the main terminal. [6] Semiconductor device comprising: a substrate (12); a semiconductor element (14, 16) attached to the substrate (12); a signal connection (T4, T5, T6, T7) for transmitting a signal to switch the semiconductor element (14, 16) between on and off; a main terminal (T2, B5) through which a main current of the semiconductor element is passed, wherein the main terminal (T2, B5) is designed with a larger width than the signal terminal (T4, T5, T6, T7), and a molding resin (11) which covers the semiconductor element (14, 16) and the substrate (12), wherein areas of the signal terminal (T4, T5, T6, T7) and the main terminal (T2, B5) are exposed to an outside, wherein a part of the substrate (12) is exposed to an outside from the molding resin (11); and wherein the main terminal (T2, B5) has an opening outside the molding resin (11). [7] Semiconductor device according to claim 6, wherein the terminals of the semiconductor device comprise the signal terminal (T4, T5, T6, T7), the main terminal (T2, B5) and a dummy terminal (T1, T3, T8, T9, R1 to R18, L1 to L18, B1 to B4, and B6 to B8) which is not electrically connected to the semiconductor element. [8] Semiconductor device according to claim 6 or 7, further comprising a control IC (200) for controlling the semiconductor element inside the molded resin (11). [9] Semiconductor device according to claim 8, further comprising a gate resistor (210) connecting the control IC (200) and the semiconductor element inside the molded resin (11). [10] Semiconductor device according to claim 7, further comprising an external substrate (230) arranged outside the mold resin (11) and attached to the dummy terminal (T, R13, L13). [11] Semiconductor device according to claim 10, wherein the dummy connection (T, R13, L13) passes through the external substrate (230) in order to be attached to the external substrate (230). [12] Semiconductor device according to claim 10, wherein the dummy connector has a plate-shaped area (R, L) outside the mold resin, and the plate-shaped area (R, L) is attached to the external substrate (240). [13] Semiconductor device according to claim 10, wherein the dummy connection has a press-fit connection (250, 252), and the press-fit connection (250, 252) is inserted into an opening (254a, 254b) of the external substrate (254). [14] Semiconductor device according to claim 7, wherein the dummy connector has a plate spring or a disc spring outside the molded resin. [15] Semiconductor device according to one of claims 7 and 10 to 14, wherein a form of a region of the dummy terminal, the main terminal or the signal terminal, which is arranged outside the molded resin, has the form of a cooling fin. [16] Semiconductor device according to one of claims 7 and 10 to 15, wherein a sleeve is formed on a region of the dummy connector. [17] Semiconductor device according to any one of claims 7 and 10 to 16, wherein the dummy terminals have a first dummy terminal (R1 to R3, R5, R6, R8, R9, R11, R12, L1 to L3, L5, L6, L8, L9, L11, L12 and B1) and a second dummy terminal (T1, T7, R4, R7, R10, L4, L7, L10, B2 and B4) which has a greater width than the first dummy terminal (R1 to R3, R5, R6, R8, R9, R11, R12, L1 to L3, L5, L6, L8, L9, L11, L12 and B1). [18] Semiconductor device according to one of claims 7 and 10 to 17, wherein the main terminal (300), the signal terminal or the dummy terminal is exposed from a top and / or a bottom of the molded resin. [19] Semiconductor device according to any one of claims 6 to 18, wherein the width of a region of the main terminal (B3) in which the opening is formed is greater than the width of a region of it in which the opening is not formed. [20] Semiconductor device according to any one of claims 6 to 19, wherein the substrate (310) is made of a conductive material, and the substrate (310) has an additional main terminal (310a) exposed from a side surface of the molding resin (11) to an outside, and a body region (310b) connected to the additional main terminal (310a), wherein the body region (310b) has the semiconductor element attached thereto. [21] Semiconductor device according to any one of claims 6 to 20, wherein the main terminals have a first terminal (B3) that is connected to a front electrode of the semiconductor element and a second terminal (B5, R17) that is electrically connected to a rear electrode of the semiconductor element, and The semiconductor device further comprises a capacitor (320) which connects the first terminal (B3) and the second terminal (B5, R17) outside the molded resin (11). [22] Semiconductor device according to any one of claims 6 to 21, wherein the molding resin has an installation through-hole (11a). [23] Semiconductor device manufacturing method according to claim 2, wherein a width of a region of the main terminal (B3) in which the opening is formed is greater than a width of a region of it in which the opening is not formed. [24] Semiconductor device manufacturing method according to claim 2, wherein the substrate (310) is made of a conductive material, the substrate (310) has an additional main terminal (310a) and a body region (310b) which is connected to the additional main terminal (310a), wherein the body region (310b) has the semiconductor element (14, 16) attached thereto, In the assembly step, the additional main connection (310a) fills at least one of the block gaps formed by the multitude of blocks, and the additional main connection (310a) is exposed from a side surface of the molding resin to an outside. [25] Semiconductor device manufacturing method according to one of claims 2, 23 and 24, further comprising, after the forming step, a separation step for separating the frame area (72) from the signal terminal, the main terminal and the dummy terminal. [26] Semiconductor device manufacturing method according to claim 25, further comprising, after the separation step, a fastening step for attaching the dummy connector to an external substrate. [27] Semiconductor device manufacturing method according to claim 26, wherein in the fastening step the dummy connection (T, R13, L13) passes through the external substrate (230) in order to be fastened to the external substrate (230). [28] Semiconductor device manufacturing method according to claim 26, wherein the dummy connector has a plate-shaped area (R, L) outside the mold resin, and the plate-shaped area (R, L) is attached to the external substrate (240) in the fastening step. [29] Semiconductor device manufacturing method according to claim 26, wherein the dummy connection has a press-fit connection (250, 252), and The press-fit connection (250, 252) is inserted into an opening (254a, 254b) of the external substrate (240) during the fastening step. [30] Semiconductor device manufacturing method according to claim 25, wherein the dummy connector has a plate-shaped area (R, L) outside the mold resin, wherein the semiconductor device manufacturing process further comprises, after the separation step, a step of bending the plate-shaped area (R, L) in order to form the plate-shaped area (R, L) into a diaphragm spring or a disc spring.

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