Semiconductor chip and method for singulating a composite in semiconductor chips

Abstract

Semiconductor chip (100) comprising a semiconductor body (2) comprising a sequence of semiconductor layers, a support body (4) and at least one top contact (8), wherein - the semiconductor chip (100) in projection has a shape that deviates from a rectangular shape; - the semiconductor chip (100) has a base area (10) and a contact area (12) laterally offset from the base area (10), which has at least one top contact (8) at least partially located in the contact area (12), the base area (10) having the shape of a rectangle in projection and the contact area (12) adjoining a side surface of the base area (10); - the contact area (12) in projection is arranged completely within a reference rectangle (16), one side of which is formed by a side of the projected base area (10) and whose height is equal to the maximum height of the projected contact area (12), and wherein the area of ​​the contact area (12) in projection is smaller than the area of ​​the reference rectangle (16); - the contact area (12) in projection is arranged with at least more than 80% of its area within a reference trapezoid arranged in the reference rectangle (16), wherein the height of the reference trapezoid is equal to that of the reference rectangle (16) and the diagonal intersection point of the reference rectangle (16) is arranged outside the reference trapezoid.

Description

[0001] The present application relates to a semiconductor chip and a method for singulating a composite into a plurality of semiconductor chips.

[0002] This patent application claims priority over German patent application 102013111120.3, the disclosure content of which is hereby incorporated by reference.

[0003] Semiconductor chips typically comprise a semiconductor body mounted on a substrate, which often requires a lateral recess to provide a contact accessible from the top of the chip. This results in the surface area of ​​the semiconductor body, and consequently the functional area of ​​the semiconductor chip in many applications, deviating from a desired square or rectangular shape when viewed from above.

[0004] For example, square or rectangular LED chips are known from the prior art in which at least one top-side contact is provided in the form of a bond pad, which is arranged laterally offset from the electromagnetic radiation-generating semiconductor body. This restricts the functional area (in this case, the radiation-emitting or luminescent area) of the respective LED chip in a partial region, so that it deviates from a desired square or rectangular shape. This geometric deviation is also reflected in the conversion element that may be arranged on the semiconductor body.

[0005] For example, the patent applications DE 10 2006 033 502 A1, US 2005 / 0 151 147 A1 and DE 10 2008 005 497 A1 describe semiconductor devices with structures deviating from a rectangular shape.

[0006] Furthermore, rectangular semiconductor chips with a square semiconductor body are known from the prior art, in which a strip for contacting the semiconductor body is provided laterally offset. This strip must have certain minimum dimensions required for contact by a bond wire. Because the bond wire only requires a substantially square contact area, a considerable portion of the elongated strip remains unused.

[0007] One task is to specify a semiconductor chip which, when surface contact is provided, experiences no undesirable limitations regarding the shape of the semiconductor body and / or its functional area, and in the case of an electromagnetic radiation-emitting semiconductor chip, particularly its radiation emission surface. Furthermore, a simple and reliable singulation method for manufacturing such semiconductor chips should be specified.

[0008] Another key challenge is to specify a semiconductor chip that, with an identical design, can be produced in large quantities using a simple singulation process, without wasting valuable surface area of ​​the assembly during the singulation process. The identical design of the semiconductor chips prevents increased logistical effort.

[0009] These tasks are solved, among other things, by a semiconductor chip and a method according to the independent patent claims. Embodiments and advantages are the subject of the dependent patent claims.

[0010] According to at least one embodiment, a semiconductor chip comprises a semiconductor body containing a sequence of semiconductor layers and a substrate, which are arranged vertically relative to one another. The semiconductor chip has a projected shape that deviates from a rectangular shape. In particular, the semiconductor chip can have a projected shape of a polygon with more than four vertices. Furthermore, the semiconductor chip has at least one top-side contact, which is provided for external contacting at least a portion of the semiconductor body (for example, one of the semiconductor layers) and is freely accessible from a top surface of the semiconductor chip.

[0011] The term "top side" of the semiconductor chip refers, in this and subsequent texts, to the side of the semiconductor chip that faces away from the substrate, as viewed from the semiconductor body. Similarly, the term "back side" of the semiconductor chip refers to the side of the semiconductor chip on which the substrate is located, as viewed from the semiconductor body.

[0012] Similarly, here and in the following, projection is understood to mean a vertical projection, i.e., a projection of an element (preferably from a top side of the semiconductor chip) along a vertical direction, i.e., along a direction perpendicular to the principal extension plane of the semiconductor layers of the semiconductor layer sequence.

[0013] Because the semiconductor chip does not have a rectangular shape in projection, the semiconductor body can be rectangular, and in particular square, while still providing sufficient space on the top surface of the semiconductor chip for positioning a top-side contact laterally spaced from the semiconductor body. This also allows a functional area of ​​the semiconductor chip, in particular a radiation emission surface, to be rectangular, and in particular square.

[0014] The semiconductor chip can generally be configured as an integrated circuit. Preferably, the semiconductor chip is configured as an optoelectronic component, for example, a semiconductor solar cell, a light-emitting diode chip, or a laser diode chip. If the semiconductor chip is configured as a radiation-emitting component, as in the latter two cases, the radiation-emitting surface of the semiconductor chip can be rectangular and, in particular, square.

[0015] According to at least one embodiment of the semiconductor chip, the semiconductor chip has a base region and a contact region laterally offset from the base region, wherein the at least one top-side contact is arranged at least partially, preferably completely, in the contact region. A lateral direction is understood here to be a direction that runs along a principal extension plane of the semiconductor layers of the semiconductor layer sequence.

[0016] According to at least one embodiment of the semiconductor chip, the semiconductor body is arranged only in the base region. Preferably, the base region is rectangular in projection, and particularly square. A preferred embodiment is one in which a semiconductor body, rectangular in projection, is arranged in the rectangular base region of the semiconductor chip and is at least partially electrically connected to the top contact, which is offset laterally from the semiconductor body and arranged exclusively in the contact area.

[0017] According to at least one embodiment of the semiconductor chip, only a single top-side contact is arranged in the contact area. This typically requires a back-side contact for further contacting of the semiconductor body, which typically necessitates a conductive substrate.

[0018] According to at least one embodiment of the semiconductor chip, two top-side contacts are arranged in the contact area. For example, each of the two top-side contacts can be electrically connected to a semiconductor layer. In this embodiment, the substrate can be insulating.

[0019] According to at least one embodiment of the semiconductor chip, the base area, when projected, has the shape of a rectangle, with a first side of the rectangle extending along a first vertical direction and a second side of the rectangle extending along a second vertical direction perpendicular to the first direction. The contact area adjoins a side face of the base area. Thus, when projected, the contact area adjoins a side of the rectangle of the projected base area, in this case, the first side.

[0020] Here and in the following, the "width" of an element is understood to be a dimension along the first vertical direction, and the "height" of an element is understood to be a dimension along the second vertical direction.

[0021] In this and the following, a "reference rectangle" is understood to be a rectangle whose one side is formed by a side of the projected base area, in particular by the first side of the rectangle of the base area, and whose height is equal to the maximum height of the projected contact area. If the base area is rectangular, the reference rectangle thus has the same width as the projected base area. This width will be denoted by B in the following.

[0022] According to at least one embodiment of the semiconductor chip, the contact area is arranged entirely within the reference rectangle in projection. The contact area extends within a strip defined by the width of the base area.

[0023] According to at least one embodiment of the semiconductor chip, the area of ​​the contact region in projection is smaller than the area of ​​the reference rectangle. This results in a space saving compared to the rectangular semiconductor chips with laterally offset contact strips described above, since the latter coincides with the reference rectangle defined here in projection.

[0024] According to at least one embodiment of the semiconductor chip, the area of ​​the contact region in projection is less than 75% of the area of ​​the reference rectangle. This results in a further area saving compared to the prior art.

[0025] According to at least one embodiment of the semiconductor chip, the area of ​​the contact region in projection is less than 50% of the area of ​​the reference rectangle. This results in a further area saving compared to the prior art.

[0026] According to at least one embodiment of the semiconductor chip, the contact area is arranged in projection completely or at least with more than 80% (preferably more than 90%) of its area within a reference trapezoid located within the reference rectangle. The height of the reference trapezoid is equal to that of the reference rectangle. Furthermore, the reference trapezoid is located outside the intersection of the diagonals of the reference rectangle; that is, the intersection of the diagonals of the reference rectangle lies outside the reference trapezoid.

[0027] Preferably, more than 40% (preferably more than 45%) of the area of ​​the reference rectangle is uncovered by the contact area, i.e., free of material of the contact area and in particular free of material of the semiconductor chip.

[0028] This results in an inverted (second) reference trapezoid, which is derived from the (first) reference trapezoid by point reflection at the intersection of the diagonals of the reference rectangle. This inverted trapezoid is also located within the reference rectangle and does not overlap with the projected (first) contact area. This free area can be used for a similar (second) contact area of ​​another semiconductor chip, rotated by 180°. This geometry thus enables two identical semiconductor chips, rotated 180° relative to each other, to be arranged with no or only minimal loss of surface area, with the contact areas of the two semiconductor chips being directly adjacent to each other.

[0029] Preferably, the entire area or at least more than 80% (preferably more than 90%) of the area of ​​the inverted (second) reference trapezoid is uncovered by the contact area, i.e., free of material of the contact area and in particular free of material of the semiconductor chip.

[0030] A large number of such semiconductor chips can be produced by an advantageous singulation process in which a rectangular contact strip is divided into two adjacent areas by suitable separation along a singulation pattern which is point-symmetric with respect to the diagonal intersection of the contact strip, which correspond to the two contact areas of two identical semiconductor chips rotated 180° relative to each other.

[0031] According to at least one embodiment of the semiconductor chip, the width of the contact area increases in the projection towards the base area. This allows for a current expansion when contacting the semiconductor body.

[0032] In the following, the reference rectangle is thought to be divided into four identical rectangular subdivisions, each of which has a width B / 4 (i.e., one quarter of the width of the projected base area) and the same height as the reference rectangle.

[0033] According to at least one embodiment of the semiconductor chip, the contact area is arranged in projection completely or with at least more than 80% (preferably more than 90%) of its area within one of the two middle (i.e., the second or third) rectangular subdivisions of the reference rectangle. This means that the three remaining subdivisions of the reference rectangle are (at least predominantly) free of the contact area; that is, these subdivisions do not overlap, or only very slightly overlap, with the projected (first) contact area of ​​the semiconductor chip.

[0034] These free areas can be used for further identical contact areas of three additional semiconductor chips. This geometry thus makes it possible to arrange four identical semiconductor chips, rotated 90° relative to each other, with no or only minimal loss of surface area, and with the contact areas of the four semiconductor chips being directly adjacent to one another.

[0035] A large number of such semiconductor chips can be produced by an advantageous singulation process in which a rectangular contact strip is divided by suitable separation into four adjacent areas, which correspond to the respective contact areas of four identical semiconductor chips rotated 90° relative to each other.

[0036] According to at least one embodiment of the semiconductor chip, the contact area has a projection width of B / 4 - 3t / 4 and a height of B / 4 + t / 4, where t is a (constant) distance. Deviations of up to 20%, preferably only up to 10%, from these dimensions are permissible without unduly impairing the desired effect. Preferably, the projected contact area is substantially rectangular, with the resulting rectangle having the aforementioned dimensions. These dimensions represent an area-optimized solution for singulation with a singulation pattern that has a constant separation diameter t.The aforementioned deviations of up to 20% are primarily due to the fact that a constant diameter of the singulation pattern can never be reproduced at every point on the surface, and depending on the method used, rounding occurs at the corners of the singulation pattern, for example when using a laser cutting process.

[0037] According to at least one embodiment of the semiconductor chip, a crystal forming the support body is oriented such that several or all side surfaces of the support body (in particular side surfaces of the support body in the contact area) are formed by crystal surfaces which have a low risk of breakage, in particular a lower risk of breakage than other crystal surfaces.

[0038] For example, the support body can consist of silicon or germanium, which preferably refractes along a {100} plane (corresponding to the equivalent planes (100), (010), or (001)). In this case, it is provided that several or all side faces of the support body (in particular, side faces of the support body in the contact area) run parallel to the {110} planes of the crystal forming it (corresponding to the equivalent planes (110), (011), or (101)) or are formed by {110} planes of the crystal forming it. Preferably, several or all side faces of the entire semiconductor chip run parallel to the {110} planes (corresponding to the equivalent planes (110), (011), or (101)) of the crystal forming the support body.

[0039] According to at least one embodiment of the semiconductor chip, the semiconductor chip is designed as a thin-film semiconductor chip in which a growth substrate for the semiconductor layer sequence of the semiconductor body is removed and the support body mechanically stabilizes the semiconductor body.

[0040] Furthermore, a method for separating a composite into a plurality of semiconductor chips is described.

[0041] According to at least one embodiment of the method, a composite is provided. The composite extends in a vertical direction between a first main surface and a second main surface. Singulation is carried out, in particular, along a singulation pattern.

[0042] For example, the singulation pattern can be grid-like. However, singulation does not necessarily have to take place along straight dividing lines.

[0043] According to at least one embodiment of the method, the composite has a support. The support contains, for example, a semiconductor material such as silicon, germanium, gallium phosphide, or gallium arsenide, or consists of such a material. The support can be electrically conductive or electrically insulating.

[0044] According to at least one embodiment of the method, the composite comprises a sequence of semiconductor layers. The semiconductor layer sequence is, for example, epitaxially deposited, such as by MOCVD or MBE. The semiconductor layer sequence can be deposited on the support or on a different growth substrate. For example, the semiconductor layer sequence includes an active region intended for generating and / or receiving radiation.

[0045] For example, the semiconductor layer sequence, particularly the active region, contains a III-V compound semiconductor material. III-V compound semiconductor materials are used for ultraviolet radiation generation (Al x In y Ga 1-x-y N) over the visible (Al x In y Ga 1-x-y N, especially for blue to green radiation, or Al x In y Ga 1-x-y P, especially for yellow to red radiation) up to the infrared (Al x In y Ga 1-x-y As) The spectral range is particularly suitable. Here, 0 ≤ x ≤ 1, 0 ≤ y ≤ 1 and x + y ≤ 1 apply, especially with x ≠ 1, y ≠ 1, and / or y ≠ 0. Furthermore, high internal quantum efficiencies can be achieved in radiation generation using III-V compound semiconductor materials, especially those from the aforementioned material systems.

[0046] The first main area is located primarily on the side of the semiconductor layer sequence facing away from the support. Similarly, the second main area is located primarily on the side of the support facing away from the semiconductor layer sequence.

[0047] According to at least one embodiment of the method, separation grooves are formed in the carrier, in particular along the singulation pattern. In the singulated semiconductor chips, the side surfaces of the separation grooves form, in particular, the side surfaces that bound the semiconductor chip in the lateral direction.

[0048] According to one embodiment, mesa trenches are already formed in the semiconductor layer sequence when the separation trenches are created. The mesa trenches define the individual semiconductor bodies that emerge from the semiconductor layer sequence. For example, the mesa trenches extend completely through the semiconductor layer sequence. In other words, the semiconductor layer sequence is already cut through when the separation trenches are formed. The singulation pattern, viewed from above, therefore runs along the mesa trenches. Accordingly, the separation trenches are formed along the mesa trenches.

[0049] The individual semiconductor chips each exhibit, in particular, a part of the semiconductor layer sequence and the substrate.

[0050] According to at least one embodiment of the method, the composite is cut along the singulation pattern using coherent radiation, in particular using a laser cutting process. The material removal by coherent radiation leaves traces of material removal on the side surfaces of the semiconductor chips produced during singulation.

[0051] According to at least one embodiment of the method, the composite is separated along the singulation pattern using a chemical process. In particular, the separation is carried out using a plasma separation process, for example, an inductively coupled plasma (ICP) process or deep reactive ion etching (DRIE). This process is also known as the "Bosch process." Plasma separation processes are particularly advantageous in semiconductor materials, where they can achieve high etch rates.

[0052] According to at least one embodiment of the method, the cutting takes place at least in a first vertical direction along a non-straight path.

[0053] According to at least one embodiment of the method, the cutting takes place in the first vertical direction and in a second vertical direction along a non-straight path.

[0054] According to at least one embodiment of the method, the assembly comprises a plurality of contact strips rectangular in projection and each of the contact strips is divided into at least two adjacent areas by separation along the singulation pattern, resulting in two semiconductor chips with the properties described above.

[0055] According to at least one embodiment of the method, the singulation pattern is point-symmetric with respect to the diagonal intersection of the contact strip.

[0056] According to at least one embodiment of the method, each of the contact strips is divided into four adjacent areas by separation along the singulation pattern, resulting in four semiconductor chips with the properties described above.

[0057] According to at least one embodiment of the method, the singulation pattern is point-symmetric with respect to the diagonal intersection of the contact strip.

[0058] According to at least one embodiment of the method, the separating lines corresponding to the singulation pattern are provided to have a constant diameter.

[0059] The above-described method for singulating a composite in semiconductor chips is particularly suitable for manufacturing the semiconductor chip. Features described in connection with the method can therefore also be applied to the semiconductor chip and vice versa.

[0060] Further features, designs and advantages will become apparent from the following description of the exemplary embodiments in conjunction with the figures.

[0061] They show: Fig. 1, Fig. 2 to Fig. 3 a first embodiment of a semiconductor chip according to the invention; Fig. 4 to Fig. 5 a second embodiment of a semiconductor chip according to the invention; Fig. 6A to D in comparison: State-of-the-art semiconductor chips and according to the two in the Fig. 1, Fig. 2, Fig. 3, Fig. 4 to Fig. 5 embodiments shown; Fig. 7 a possible singulation pattern by which semiconductor chips can be manufactured according to the first embodiment, Fig. 8 and Fig. 9 an arrangement of four semiconductor chips rotated 90° relative to each other according to the second embodiment; Fig. 10 and Fig. 11 a third embodiment of a semiconductor chip according to the invention; Fig. 12. an effect of mechanical forces on the contact area of ​​a semiconductor chip according to the second embodiment; and Fig. 13 a fourth embodiment of a semiconductor chip according to the invention.

[0062] The Fig. 1A and Fig. 1B shows a semiconductor chip according to a first embodiment of the invention in a top view ( Fig. 1A) and in a sectional view along the in Fig. 1A shown line AA ( Fig. 1B). The semiconductor chip, designated as 100 in total, comprises a rectangular semiconductor body 2, which is arranged on a substrate 4. Fig. Figure 1A shows a projection of the semiconductor chip 100 onto an XY plane, revealing that the semiconductor chip has a shape that deviates from a rectangular form. In this case, the shape of the semiconductor chip corresponds to a polygon with six vertices. The support 4 stabilizes the semiconductor body 2 and has the same shape as the semiconductor chip 100 as a whole. A mirror layer 6 is arranged between the support 4 and the semiconductor body 2, which establishes an electrically conductive connection between a (not shown) semiconductor layer of the semiconductor body 2 and a surface contact 8 in the form of a bond pad. The semiconductor chip 100 has a base region 10 that is rectangular in projection, in which the also rectangular semiconductor body 2 is arranged.

[0063] In the following, width refers to the dimension of an element along the X-direction and height to a dimension along the Y-direction. A contact area 12 adjoins a side surface 14 of the base area 10, on which the surface contact 8 is arranged. In the present embodiment, the contact area 12 has the shape of a right-angled trapezoid in projection, with the width of the contact area 12 increasing towards the base area 10.

[0064] The width of the rectangle forming the base area 10 is denoted below by B, and the maximum height of the contact area 12 by h.

[0065] In Fig. Figure 2 shows a reference rectangle 16, which has a width B and a height h, and in which the projected contact area 12 is completely arranged. The area of ​​the projected contact area 12 is smaller than the area of ​​the reference rectangle 16. Fig. Figure 2 shows the two diagonals 18a, 18b of the reference rectangle 16, which form a diagonal intersection point 20. The diagonal intersection point 20 is located outside the projected contact area 12.

[0066] Fig. Figure 3 shows an inverted trapezoid 22, which is obtained by point reflection at the diagonal intersection point 20 from the trapezoid forming the contact area 12. The area covered by the inverted trapezoid 22 can be used for a similar contact area of ​​another (not shown) semiconductor chip rotated by 180°, at least minus a dividing line that separates the two semiconductor chips. Thus, two similar semiconductor chips, rotated 180° relative to each other, can be arranged opposite each other with only a small loss of area, thereby enabling a space-saving singulation process.

[0067] Fig. Figure 4 shows a semiconductor chip according to a second embodiment of the invention. In contrast to the one shown in the Fig. 1, Fig. 2 to Fig. In the embodiment shown in Figure 3, the contact area 12, on which the surface contact 8 is arranged, occupies an even smaller area. Here, the contact area 12 is essentially rectangular in projection.

[0068] Fig. Figure 5 again shows the reference rectangle 16, which has a width B and a height h. Furthermore, four subdivisions 24a, 24b, 24c, and 24d are shown, each rectangular and with a width of B / 4. The projected contact area 12 has a height h and a width b that is less than B / 4. Thus, the projected contact area 12 is completely contained within one of the two middle subdivisions 24b and 24c, in this example subdivision 24c. The free areas in the remaining subdivisions 24a, 24b, and 24d can be used for further similar contact areas of three additional (not shown) semiconductor chips. In the present example, the contact area 12 in projection has a width b = B / 4 - 3t / 4 and a height h = B / 4 + t / 4, which corresponds to an area-optimized solution for singulation with a singulation pattern which has a constant separation diameter t.

[0069] For example, if the width B of the semiconductor chip is 100–1000 µm and the diameter of the separation process t is 40 µm, the following dimensions result: The width b of the contact area 12 is 220 µm, and the height h of the contact area 12 is 260 µm. Such dimensions are suitable for the typically required dimensions of a surface contact (width and height around 150 µm) that can accommodate a bond wire with a thickness of approximately 40 µm.

[0070] The Fig. 6A, Fig. 6B, Fig. 6C, Fig. Figure 6D shows a comparison of semiconductor chips from the prior art and according to the two embodiments described above. Fig. Figure 6A shows a semiconductor chip with a semiconductor body 2, which is laterally recessed to allow contact of the semiconductor body 2 from the top via a top contact 8.

[0071] Fig. Figure 6B shows a rectangular semiconductor chip known from the prior art, with a square semiconductor body 2 and a laterally offset contact strip 8, which in projection has the same area as the reference rectangle defined above. With typical dimensions, this results in a difference compared to the one in Fig. The semiconductor chip shown in Figure 6A exhibits a relative area increase of 16%. Fig. 6C and Fig. Figure 6D shows semiconductor chips according to the invention as shown in the two illustrations. Fig. 1, Fig. 2, Fig. 3, Fig. 4 to Fig. 5 embodiments shown. In this case, with the same typical dimensions, the relative area increases by only 7% ( Fig. 6C) or 4% ( Fig. 6D).

[0072] Fig. Figure 7 shows a possible singulation pattern by which semiconductor chips can be formed according to the first one, in the Fig. 1, Fig. 2 to Fig. The embodiment shown in 3 can be produced. Along the Y-direction, the separating lines corresponding to the singulation pattern run in a straight line (indicated by the straight arrows), while along the X-direction they do not run in a straight line (see the non-straight separating line 28).

[0073] Fig. Figure 8 shows the arrangement of four semiconductor chips rotated 90° relative to each other, according to the second diagram. Fig. 4 and Fig. 5. The dividing lines between the four contact areas 12, corresponding to the singulation pattern, have a substantially constant diameter. A group of four semiconductor chips arranged in this way forms a unit cell, which can be continued periodically, as shown in Fig. Figure 9 is shown. Here, the unit cell is shown in the center of the grid.

[0074] The Fig. 10 and Fig. Figure 11 shows a semiconductor chip 100 according to the invention in a third embodiment. In contrast to the ones shown in the Fig. 1, Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8 to Fig. In the contact area 12 of the 9 semiconductor chips shown, two top-side contacts 8 are arranged, each of which is electrically connected to a semiconductor layer of the semiconductor body 2.

[0075] In Fig. Figure 12 shows the effect of mechanical forces on the contact area 12 of a semiconductor chip 100 according to the second embodiment, indicated by arrows. Because the contact area 12 has only a small width b, there is a risk of it breaking off if a preferred fracture direction of the carrier material 4 runs parallel to the side faces of the semiconductor chip 100. Therefore, it is advantageously provided that the crystal forming the carrier 4 is oriented such that the side faces of the semiconductor chip 100 are formed completely or at least largely by crystal faces that have a lower risk of fracture than other faces. For example, the carrier 4 can be made of silicon or germanium, which preferably fractures along a {100} plane (corresponding to the equivalent planes (100), (010), or (001)).In this case, it is provided that several or all side faces of the semiconductor chip 100 run parallel to the {110} planes (corresponding to the equivalent planes (110), (011) or (101)) of the silicon or germanium crystal forming the support body 4. In the . Fig. These are the side faces of semiconductor chip 100, designated 30, 32 and 34.

[0076] Fig. Figure 13 schematically shows a semiconductor chip 100 according to a fourth embodiment of the invention. In this embodiment, the semiconductor chip 100 has the shape of a hexagon in projection. This achieves a favorable ratio between the cut surface and the luminous surface. Surface contacts 8 are provided on one side of the semiconductor chip 100. A disadvantage of this is that the semiconductor body is not symmetrical and its placement is more prone to errors.

Claims

[1] Semiconductor chip (100) comprising a semiconductor body (2) comprising a sequence of semiconductor layers, a support body (4) and at least one top contact (8), wherein - the semiconductor chip (100) in projection has a shape that deviates from a rectangular shape; - the semiconductor chip (100) has a base area (10) and a contact area (12) laterally offset from the base area (10), which has at least one top contact (8) at least partially located in the contact area (12), the base area (10) having the shape of a rectangle in projection and the contact area (12) adjoining a side surface of the base area (10); - the contact area (12) in projection is arranged completely within a reference rectangle (16), one side of which is formed by a side of the projected base area (10) and whose height is equal to the maximum height of the projected contact area (12), and wherein the area of ​​the contact area (12) in projection is smaller than the area of ​​the reference rectangle (16); - the contact area (12) in projection is arranged with at least more than 80% of its area within a reference trapezoid arranged in the reference rectangle (16), wherein the height of the reference trapezoid is equal to that of the reference rectangle (16) and the diagonal intersection point of the reference rectangle (16) is arranged outside the reference trapezoid. [2] Semiconductor chip (100) according to claim 1, wherein the semiconductor body (2) is rectangular. [3] Semiconductor chip (100) according to claim 1 or 2, wherein the semiconductor chip (100) is an optoelectronic component. [4] Semiconductor chip (100) according to claim 1, wherein two top-side contacts (8) are arranged in the contact area (12). [5] Semiconductor chip (100) according to claim 1, wherein the area of ​​the contact area (12) in projection is less than 75% of the area of ​​the reference rectangle (16). [6] Semiconductor chip (100) according to one of claims 1, 4 or 5, wherein the width of the contact area (12) increases in projection towards the base area (10). [7] Semiconductor chip (100) according to one of claims 1 or 4 to 6, wherein the reference rectangle (16) is divided into four identical rectangular subdivisions, each having a width B / 4, where B is the width of the projected base area (10), and the same height as the reference rectangle (16), and wherein the contact area (12) is arranged in projection with at least more than 80% of its area within one of the two middle rectangular subdivisions of the reference rectangle (16). [8] Semiconductor chip (100) according to claim 7, wherein the contact area (12) has a width B / 4 - 3t / 4 and a height B / 4 + t / 4 in projection, where t is a constant distance and wherein deviations of the said dimensions of up to 10% may occur. [9] Semiconductor chip (100) according to one of the preceding claims, wherein a crystal forming the support body (4) is oriented such that several or all side faces (30, 32, 34) of the support body (4) are formed by crystal faces which have a low risk of breakage. [10] Semiconductor chip (100) according to claim 9, wherein the support body (4) consists of silicon or germanium and several or all of the side surfaces (30, 32, 34) of the support body (4) are formed by {110} planes of the crystal forming it. [11] Method for singulating a composite into a plurality of semiconductor chips (100) along a singulation pattern (15) comprising the steps: a) Providing a composite comprising a support (4) and a sequence of semiconductor layers (2); b) Cutting the composite along the singulation pattern, resulting in a plurality of semiconductor chips according to any of the preceding claims. [12] Method according to claim 11, wherein the composite comprises a plurality of contact strips formed rectangularly in projection and wherein each of the contact strips is divided into at least two adjacent areas by separation along the singulation pattern, so that two semiconductor chips with the properties described in claims 1, 7 or 8 are formed.

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