Idle Time Software Memory Cleanup

Abstract

A computer-implemented method comprising the following: determine (301) a future idle time period (204, 206) in which one or more processors will be in an idle state during the execution of one or more software applications; estimate (302), for the future idle time period (204, 206), a memory allocation for the one or more software applications, wherein the estimated memory allocation is based on a memory allocation over several future planned idle times; select (304) a plurality of predefined software garbage collection events based on the specified future idle time period (204, 206) and the estimated memory allocation, wherein the plurality of predefined software garbage collection events includes object tagging, completion, and garbage collection, and wherein the selected software garbage collection event is an object tagging event; fragmenting the object marking event into a multitude of ascending object marking tasks; and scheduling (306) the selected software garbage collection event to be performed during the future idle time period, wherein a first of the ascending object tagging tasks is initially scheduled for execution during the future idle time period (204, 206); and perform (308) the first of the ascending object marking tasks during the future idle time period (204, 206).

Description

GENERAL STATE OF THE ART

[0001] Garbage collection is a form of automated memory management in which a runtime environment attempts to free memory occupied by data objects that are no longer used by software applications running in the operating environment. One goal of software garbage collection may be to free memory to provide a streamlined operating environment and thereby increase operational efficiency. However, software garbage collection can occur at unpredictable times and thus have a negative impact on the user experience. For example, software garbage collection may interrupt the rendering of a user interface to a user or may occur during a period when the user is interacting with the user interface.In addition, the area marked for garbage collection often varies, and applications may require extended execution times to clean up unused memory.

[0002] The document US 8 364 918 B1 discloses a method and a system for performing a detected garbage collection in a memory. SUMMARY OF REVELATION

[0003] The invention is defined in the independent claims. The dependent claims define embodiments of the invention. The subject technology provides a system and a computer-implemented method for scheduling software garbage collection during processor idle times.In one or more implementations, the method comprises determining a future idle period in which one or more processors are in an idle state during execution of one or more software applications, estimating, for the future idle period, a memory allocation for the one or more software applications, selecting a plurality of predetermined software garbage collection events based on the determined future idle period and the estimated memory allocation, scheduling the selected software garbage collection event to be performed during the future idle period, and performing the selected software garbage collection event during the future idle period. Other aspects include corresponding systems, apparatus, and computer program products for implementing the computer-implemented method.

[0004] In one or more implementations, a system includes one or more processors and memory containing instructions.When executed by the one or more processors, the instructions cause the one or more processors to enable the steps of determining a future idle period in which one or more processors are in an idle state during execution of one or more software applications, estimating, for the future idle period, a memory allocation for the one or more software applications, selecting a plurality of pre-scheduled software garbage collection events based on the determined future idle period and the estimated memory allocation, scheduling the selected software garbage collection event to be performed during the future idle period, and performing the selected software garbage collection event during the future idle period.Other aspects include corresponding devices and computer program products for implementing the above system.

[0005] In one or more implementations, a computer-readable storage medium comprises instructions that, when executed, enable the steps of determining a future idle period in which one or more processors are in an idle state during execution of one or more software applications, estimating, for the future idle period, a memory allocation for the one or more software applications, selecting a plurality of pre-determined software garbage collection events based on the determined future idle period and the estimated memory allocation, scheduling the selected software garbage collection event to be performed during the future idle period, and performing the selected software garbage collection task during the future idle period.Other aspects include corresponding methods, apparatus, and computer program products for implementing the above computer-readable storage medium.

[0006] It is to be understood that other configurations of the subject technology will be readily apparent to those skilled in the art from the following detailed description, in which various configurations of the subject technology are shown and described by way of illustration. As will be appreciated, the subject technology is capable of other and varied configurations, and its many details are capable of modification in many other respects without departing from the scope of the subject technology. Accordingly, the drawings and detailed description are to be considered illustrative and not restrictive. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The following is a detailed description with reference to the attached drawings. Fig. 1 depicts an exemplary system, including exemplary software components for scheduling software garbage collection during processor idle times. Fig. Figure 2 shows a diagram of an exemplary scheduling of outstanding tasks, including idle time tasks. Fig. Figure 3 shows a flowchart of a first exemplary process for scheduling software garbage collection during processor idle times. Fig. Figure 4 is a diagram depicting an exemplary electronic system for use in connection with scheduling software garbage collection during processor idle periods. DETAILED DESCRIPTION

[0008] The detailed description provided below is intended as a description of various configurations of the subject technology and is not intended to represent the only configurations in which the subject technology may be practiced. The accompanying drawings are incorporated herein and are a part of the detailed description. The detailed description includes specific details for the purpose of providing a thorough understanding of the subject technology. It will be apparent, however, to one skilled in the art that the subject technology is not limited to the specific details set forth herein and may be practiced without those specific details. In some instances, well-known structures and components are shown in block diagram form to prevent obscuring the concepts of the subject technology.

[0009] The subject technology includes a mechanism for scheduling software garbage collection during processor idle periods to reduce erratic performance in systems that use garbage collection to make memory available to software applications. A memory manager and a task scheduler (e.g., a backend software component) perform multiple runtime estimates to determine whether and at what times memory used by running software applications should be garbage collected to reduce the negative impact of garbage collection on application performance.In this way, the memory manager and task scheduler determine future processor idle times, how much garbage collection may be required when those idle times occur, prioritize garbage collection events required to complete the estimated garbage collection, and perform scheduling of the prioritized garbage collection events during the determined idle times.

[0010] For example, a scheduler schedules system and application tasks, organizes tasks according to different task types (e.g., creator tasks, generic tasks, etc.), and decides which type of task should be executed at a given time. The task scheduler determines a future period during which a processor will be idle. The scheduler further determines which tasks can be classified as idle tasks; for example, tasks that are not required for the current operation of the system or the execution of applications. Garbage collection, for example, is a task that can be classified as an idle task. The scheduler maintains a list of pending idle tasks and can schedule these tasks during idle periods of task execution.

[0011] The memory manager estimates how much memory has been allocated and how much memory can be allocated for future idle periods determined by the scheduler. Accordingly, garbage collection can be scheduled for appropriate idle periods. For example, the memory manager may determine that x MB of memory has been allocated and that an allocation rate is y MB / ms. If the next idle period is in 3 ms, it estimates that x + 3y MB will be allocated from the next idle period. Based on this calculation, the memory manager can estimate how long it might take to clean the memory, for example, based on past garbage collection events.

[0012] The memory manager can provide time estimates for future multiple garbage collection events, including, but not limited to, a garbage collection mark for newly allocated objects, a garbage collection mark for old objects, garbage collection completion, and memory cleaning. Each time estimate can be based on a respective event and an estimated memory allocation corresponding to an upcoming idle period. Because upcoming idle periods may not be long enough to complete an entire event, the memory manager can divide events into smaller chunks of operations. For example, marking old objects for garbage collection can be divided into ascending marking steps. The memory manager can calculate a time estimate for each step, taking into account the estimated memory allocation over multiple pending idle periods.

[0013] The memory manager can schedule garbage collection events only when memory allocation reaches or is estimated to reach a certain threshold. The allocation threshold can be, for example, a predetermined amount of memory required by a predetermined time (for example, the next idle period) or a predetermined allocation rate limit. The memory manager can add additional garbage collection events and their estimated completion times to the task scheduler as idle-time tasks, and the scheduler can select the events based on event size and scheduled idle periods. Garbage collection events can be grouped in a FIFO order.For example, multiple events may be required to mark objects in ascending order, and each event may be scheduled as a time-split period (e.g., 10ms, 20ms, 50ms, etc.). The garbage collection events may be scheduled to occur at future idle times in their scheduled order.

[0014] Fig. 1 illustrates an exemplary system 100 including exemplary components for scheduling software garbage collection during processor idle times, in accordance with one or more aspects of the subject technology. System 100 includes a processor 102 and memory 104. When an application process 106 begins, the executable corresponding to the process is mapped into a virtual address space in memory 104 allocated for the process 106. The virtual address space may also include an object heap 108. The object heap 108 may be provided with additional libraries that are mapped into the address space. The object heap 108 may be managed by the application or the runtime environment (including, for example, an operating system or a virtual machine) in which the application is running.This management may include garbage collection, which provides memory during the execution of process 106. Application process 106 may be a web application, an executing process derived from a scripting or compiled dynamic programming language within the web application, or another application capable of executing in a runtime environment.

[0015] System 100 further includes a task scheduler 110 that decides which task is executed on the main thread at any given time. Accordingly, task scheduler 110 enables the prioritization of latency-sensitive tasks (e.g., input events or creator updates). In one or more implementations, task scheduler 110 includes multiple software components, wherein one or more components are part of or embedded in a software garbage collection element adapted according to the subject technology. Additionally or alternatively, task scheduler 110 may include one or more components in communication with the software garbage collection element (e.g., via an API interface).In this way, one or more components of task scheduler 110 can inform task scheduling components within the garbage collection element about processor idle time. Accordingly, the components of task scheduler 110 can assign tasks to different task types (e.g., creator tasks, garbage collection tasks, etc.), allowing the components of the task scheduler (e.g., within the garbage collection element) to decide which type of task should be executed at a given time. Task scheduler 110 can categorize a task as an idle time task.

[0016] Task scheduler 110 maintains the list of pending idle-time tasks and schedules these tasks during idle periods of task execution. Task scheduler 110 may use notifications from drawing compositor 112 regarding frame start and commit events, as well as the status of other currently pending tasks (e.g., higher-priority tasks), to schedule idle events for times when they do not cause an increase in frame latency. Idle-time tasks, for example, may also be executed during extended periods when no frames are committed by drawing compositor 112. Task scheduler 110 may reorder tasks with respect to other tasks. Each task may be associated with a task deadline provided by task scheduler 110.If a task cannot be completed by the deadline, the task can be scheduled to run during the next idle period.

[0017] During an idle period, the scheduler may take the oldest task from the pending task queue and schedule its execution with a deadline equal to or earlier than the remaining idle period. If the task completes before that deadline, the scheduler may schedule idle task execution until the deadline in a FIFO ("first in, first out") order. An idle task may only be executed once, and upon execution, the task scheduler 110 may determine whether the task can perform useful work in the allowed time until the deadline. If no useful work can be performed, the task may not be executed but instead may be reassigned to the idle task queue. The majority of idle tasks can execute between frames.In this way, the period can be a period of duration x, for example less than or equal to 10ms, 25ms, 50ms, etc.

[0018] In some implementations, idle tasks assigned to a task scheduler 110 may be appended to an incoming idle task queue. At the beginning of a new idle period, the incoming tasks may be flushed into a pending idle task queue, where the task scheduler 110 may execute them in a first-in, first-out fashion. In this example, idle tasks may reassign themselves during their own execution, even if they were unable to perform any real work before the deadline. In one or more implementations, the task scheduler 110 may schedule higher priority tasks (e.g., creator or input tasks) during idle periods in preference to idle tasks.

[0019] The task scheduler 110 may use various signals to decide when idle periods should begin and end. For example, the task scheduler 110 may use input from a software drawing compositor 112 (e.g., a component of a software runtime environment or an application process responsible for drawing a user interface or a portion thereof) to ensure that tasks are scheduled for idle periods only between the time a frame is committed and the time the next frame is expected to begin. Accordingly, idle periods between frames are limited, and when the compositor is idle (because no frames are being drawn), no idle periods may occur. An example may include allocating a late task that triggers an idle period when no frames have been drawn for a certain period of time.

[0020] As this is Fig. 1, system 100 may further include a memory manager 114. Memory manager 114 manages memory space for the software runtime environment and is configured to monitor memory allocation and assign garbage collection events (as tasks) to task scheduler 110 based on a particular memory allocation. As described above, memory manager 114 may estimate how much memory space has been allocated and how much memory space may be allocated for future idle time determined by task scheduler 110.

[0021] For example, the memory manager 114 may request the task scheduler 110 to determine the next idle time(s) and, based on an allocation rate, determine how much memory will be allocated by the next idle time(s). The memory manager 114 may then estimate how long it may take to clean up the memory, for example, based on the estimated memory allocation and previous garbage collection events. For example, the memory manager 114 may estimate the duration of the garbage collection based on the application's average memory allocation rate, the average garbage collection time for new and / or old objects (e.g., per MB), and the average marking rate (e.g., per MB). Other example factors for estimating the duration of a garbage collection event may include a heap state (e.g.,percentage fragmented, consistent, corrupted), percentage of committed heap, free, reserved allocation load, and marking speed (e.g., based on historical speeds).

[0022] Memory manager 114 may trigger incremental garbage collection (e.g., configured linearly from 0ms to XXms), cleanups (e.g., approximately 5-10ms), and long full garbage collections (e.g., 30-XXXms). Memory manager 114 may deliver each garbage collection event to task scheduler 110, including an estimated time for task completion. In some implementations, memory manager 114 may divide larger events or tasks into smaller chunks if they continue beyond a predetermined length, or organize garbage collection events into tasks with a predetermined duration (e.g., 10ms or 50ms).

[0023] In one or more implementations, task scheduler 110 maintains a global list of pending tasks (including, but not limited to, garbage collection tasks) and prioritizes them. In one example, memory manager 114 may deliver a garbage collection event, or a portion of the event, to the main thread as an idle time task, including a priority for the task and the type of event (e.g., mark, complete, clean, compact), as well as an estimated time for the task to execute. In this way, memory manager 114 may deliver garbage collection tasks to task scheduler 110 and drawing compositor 112 and notify scheduler 110 of good opportunities to perform pending idle time tasks, and task scheduler 110 may then determine which task to perform and at what time.

[0024] Task manager 110 and memory manager 114 may be implemented outside of a runtime environment (e.g., a virtual machine) to manage task organization and priority, as well as garbage collection of objects created within the runtime environment (e.g., via one or more APIs). Additionally or alternatively, components of task manager 110 and memory manager 114 may be part of or embedded in the runtime environment. The runtime environment may be part of or embedded in a web browser application and / or be responsible for web applications (e.g., JavaScript, Java applets) and other dynamic programming languages ​​that run within the runtime environment. In one or more implementations, drawing compositor 112 may be a display-rendering component of the runtime environment responsible for redrawing frames in the display (e.g., a window) for an application process 106.

[0025] Fig. 2 depicts a diagram of an example schedule 200 of outstanding tasks, including idle time tasks, according to aspects of the subject technology. Task scheduler 110 receives notifications from drawing compositor 112 about frame start times 202 (e.g., based on a predetermined frame rate) and creates a schedule of tasks based on the frame start times 202. The illustrated example includes three frame start times 202 that define two consecutive task periods. Task scheduler 110 receives application tasks from application 106 and / or the runtime environment and organizes them to reduce or eliminate drawing latency based on frame rate. Thus, task scheduler 110 may maintain a command queue for the runtime environment for messages (e.g.,from the compositor 112) for frame start and determine idle time periods 204, 206 between consecutive start times 202.

[0026] As depicted, task scheduler 110 may first schedule essential tasks, such as input tasks 208 (e.g., defining a user-entered key or command) and compositor tasks 210 (e.g., drawing a frame) with time remaining until the next frame start, thereby defining an idle period 204, 206. In one or more implementations, idle periods 204, 206 may be determined, for example, from a frame end time (e.g., a frame commit) until the next frame start time 202. Idle periods 204, 206 may be used by task scheduler 110 to dispatch tasks in a task queue, including garbage collection tasks.

[0027] In some aspects, an idle task (e.g., a garbage collection task) may not be able to complete within an idle period. For example, task scheduler 110 may attempt to dispatch idle task 212, a 50 ms task, to idle period 204. However, task manager 110 has already scheduled one or more high-priority tasks 214 for idle period 204, leaving less than 50 ms for idle task 212 to complete. In this situation, idle task 212 immediately returns and is dispatched to a subsequent idle period that is sufficiently long to complete the redeployed task, for example, idle period 206 in Fig. 2.

[0028] In some implementations, task scheduler 110 may limit the execution of idle tasks to periods between frames, thus preventing tasks that cannot be completed by a current deadline from resubmitting themselves during the remaining time of the same idle period. This may prevent a task from resubmitting itself repeatedly during the remaining time of the idle period, thus unnecessarily consuming CPU power.

[0029] In one or more implementations, task scheduler 110 may determine, based on inputs from drawing compositor 112, longer idle periods in which no frames have been committed by drawing compositor 112. In this case, idle tasks may not be limited to a predetermined slice duration (e.g., 50ms idle task) during a single idle period 204, 206. Task scheduler 110 may be configured to schedule the entire idle period for completing any required background work; as long as the tasks scheduled therein provide back-scheduling control to the scheduler at the end of each predetermined slice duration (e.g., every 50ms) to prevent blocking of input events and, consequently, noticeable latency to the input events. During the long idle periods 204, 206 (e.g.,For tasks that are not idle (e.g., over a predetermined duration), tasks may be allowed to deliver themselves to the same idle period. As long as the remaining portion of the idle period is long enough to complete the idle task, the idle task should not be rejected; thus, the ability of the task to attempt to deliver itself repeatedly should be prevented.

[0030] Fig. Figure 3 depicts a flowchart of a first exemplary process 300 for scheduling software garbage collection during processor idle periods according to aspects of the subject technology. For explanation purposes, the exemplary process 300 is described herein with respect to the components of Fig. 1 and Fig. 2. Further, for explanatory purposes, the blocks of exemplary process 300 are described herein in a serial or linear order of occurrence. However, multiple blocks of exemplary process 300 may occur in parallel. Furthermore, the blocks of exemplary process 300 need not be executed in the order depicted, and / or one or more of the blocks of exemplary process 300 may not be performed.

[0031] In the illustrated exemplary flowchart 100, task scheduler 110 determines (e.g., idle period 204) a future idle period (e.g., idle period 204) during which processor 102 is idle during execution of one or more software applications 302. As described above, the idle period may be determined based on a playback start time of a first frame and a playback time of a second frame. Frame start times may be determined by drawing compositor 112. For example, drawing compositor 112 may schedule frames with task scheduler 110 according to a predetermined frame rate. For example, a 60 fps (frames per second) drawing compositor may schedule frame start times to begin every 16.6 ms.The particular future idle period may be a period between the first frame playback time and the second frame playback time that does not include any application tasks (e.g., input tasks, creator tasks) required by the application or the runtime environment.

[0032] In interactive applications (e.g., JavaScript applications that implement layout and rasterization), a calculated frame time greater than 16.6 ms can be considered an undesirably high latency. However, these same applications may also include garbage collection processes that, when executed, are no longer than the frame duration, thereby causing unwanted, user-noticeable pauses in frame drawing. For example, garbage collection may involve several different events, including cleaning, marking, and compacting the marked objects, which, when committed, require a significant amount of time to execute together. Disabling garbage collection may lead to out-of-memory errors, and programmatically invoking garbage collection may negatively impact the garbage collection heuristics.In many cases, applications should not interact with the garbage collection element. Accordingly, the subject technology automatically separates the various garbage collection events into smaller, more manageable chunks that are submitted to task scheduler 110 as idle tasks and can be performed while the system is in an idle state. Thus, the garbage collection remains hidden from the application, although it does reduce the possibility of frame stalls.

[0033] Accordingly, to partition the garbage collection events, system 100 first determines how much garbage collection is required. In this way, system 100 (e.g., memory manager 114) estimates an allocation of memory space for the one or more software applications (304) for the future idle periods. Memory manager 114 may estimate how long it may take to clean the memory space for each different type of available garbage collection event. For example, memory manager 114 may estimate the duration of garbage collection for new and / or old objects (e.g., per MB), mark the new and / or old objects (e.g., per MB), and perform compaction. Memory manager 114 may make estimates for each event based on various factors, including heap state (e.g.,Percent fragmented, consistent, corrupted), percentage of committed heap free, reserved, allocation speed, allocation load, and garbage collection marking speed (e.g., based on historical speeds).

[0034] For example, memory manager 114 may request task scheduler 110 to determine the next idle time(s) and, based on an allocation rate, determine how much memory will be allocated by the next idle time(s). For example, memory manager 114 may determine that x MB have been allocated and that a current allocation rate is y MB / ms. If the next idle time is in 3 ms, it is estimated that x + 3y MB will be allocated by the next idle time. Once the allocation has been determined, memory manager 114 may determine how much time each event type will consume.

[0035] Garbage collection events can be divided into predefined event tasks, where each event task is a section of the event that comprises a series of subtasks or commands. Each task is created to execute in a predefined amount of time. For example, if a garbage collection event, such as marking an old object, is estimated to take 400ms, the event can be divided into eight tasks of 50ms (or another predefined duration). System 100 can create tasks for an event based on a predefined amount of time. For example, each task can be 10ms, 25ms, 50ms, etc.

[0036] In some aspects, the estimated allocation of memory space may be based on an allocation of memory space over multiple future scheduled idle periods. For example, memory manager 114 may determine that a previously generated garbage collection task 212 has returned after being submitted to task scheduler 110 over an idle period 204. Memory manager 114 may then recalculate the memory allocation for a subsequent idle period 206. Additionally or alternatively, memory manager 114 may determine that a garbage collection event cannot be completed in a single idle period. Accordingly, memory manager 114 may determine an estimated number of idle periods to complete the event and determine the memory allocation for the number of idle periods.

[0037] With further reference to Fig. 3, system 100 (e.g., task scheduler 110) selects one of a plurality of garbage collection events based on the determined future idle periods and the estimated memory allocation (306). In one or more implementations, a garbage collection event is only selected if it is first determined that the estimated allocation of memory space meets a memory allocation threshold, for example, in the determined future idle period. The threshold may be based on a total allocation, an allocation rate, the allocation of new or old objects, etc. In one or more implementations, task scheduler 110 may analyze the types of garbage collection events in an event queue and schedule the events (or tasks for the events) to maximize the performance of the system. Task scheduler 110 (or, for example,A garbage collector (a garbage collector adapted with the components of task scheduler 110) may select an event to complete in a single idle period or over a minimum number of idle periods for the queued events (e.g., as a series of tasks). Task scheduler 110 may schedule tasks for an event that delivers the most space optimization (e.g., via space collection) in the shortest amount of time or the smallest number of task segments.

[0038] In one or more implementations, task scheduler 110 may select a garbage collection event based on one or more predefined rules. For example, a new generation garbage collection may be selected when the new generation is nearly full (e.g., more than 90 percent full). An ascending marking of objects (e.g., marking a number of objects into tasks of a predetermined time duration broken down into sections) may be initiated when an old generation of objects is nearly full (e.g., when objects created more than a predetermined time before a current time are more than 90 percent complete). Subsequent marking steps may be selected if the marking was started in a previous idle period.A full garbage collection may be initiated and scheduled when the task scheduler 110 determines that sufficient idle time is available for the garbage collection to complete without introducing latency.

[0039] In some aspects, if the selected garbage collection event is an object marking event, the event may be decomposed into a plurality of ascending object marking tasks, with a first of the ascending object marking tasks being scheduled to first execute during the future idle period described above. As described above, the plurality of ascending object marking tasks may be scheduled to occur between two different idle periods.

[0040] Accordingly, a time estimate for completing the plurality of pre-determined garbage collection events may be determined based on the estimated memory allocation and a garbage collection event selected based on a respective time estimate corresponding to the selected garbage collection event and a time duration of the future idle period.

[0041] With further reference to Fig. 3, system 100 (e.g., task scheduler 110) schedules the execution of the selected garbage collection event during the future idle period (308). Additionally or alternatively, a group of tasks may be scheduled during an idle period. For example, task scheduler 110 may determine that the future idle period corresponds to a pause in the replay of frames for the one or more software applications (e.g., a long idle period). Accordingly, task scheduler 110 may schedule the execution of the group of software garbage collection tasks for during the future idle period, wherein the group includes at least a portion of the selected software garbage collection event. In this example, a duration of the group is greater than a duration of a single respective frame (e.g., greater than 16.6 ms).

[0042] System 100 then performs the selected software garbage collection event during the future idle period (310). As described above, the event may be performed as a series of tasks (e.g., each with a predetermined time duration). In some cases, the event may be only one task or a few tasks that can be performed in the same idle period. However, the future idle period may be continuous or span multiple frames (e.g., between system tasks and the end of each frame).

[0043] Many of the exemplary processes 200, 300, and 400 described above, as well as associated features and applications, may be implemented as software processes specified as a set of instructions recorded on a computer-readable storage medium (also referred to as a computer-readable medium). When executed by one or more processing units (e.g., one or more processors, processor cores, or other processors), these instructions cause the processing unit(s) to perform the actions specified in the instructions. Examples of computer-readable media include, but are not limited to, CD-ROMs, flash drives, RAM chips, hard disks, EPROMs, etc. The computer-readable medium does not include carrier waves and electronic signals sent wirelessly or over wired connections.

[0044] The term "software" is intended to include, where appropriate, firmware residing in read-only memory or applications stored on the magnetic storage device that can be read into memory for processing by a processor. In some implementations, multiple software features of the subject disclosure may also be implemented as sub-components of a larger program while remaining distinctive software features of the subject disclosure. In some implementations, multiple software features may also be implemented as separate programs. Finally, any combination of separate programs that collectively implement a software feature described herein is within the scope of the subject disclosure.In some implementations, when the software programs are installed to operate one or more electronic systems, they define one or more specific machine implementations that execute and perform the operation of the software.

[0045] A computer program (which may also be called a program, software, software application, module, software module, script, or code) can be written in any programming language, including compiled or interpreted languages, declarative or procedural languages, and can be delivered in any form, such as a stand-alone program or as a module, component, subroutine, object, or other unit suitable for use in a computing environment. A computer program may, but need not, correspond to a file in a file system. A program may be stored in part of a file containing other programs or data (for example, one or more scripts stored in a markup language document), in a single file dedicated to the program, or in several coordinated files (for example, files storing one or more modules, subroutines, or pieces of code).A computer program may be deployed and executed on one computer or on multiple computers located at one or more locations and interconnected by a communications network.

[0046] Fig. 4 is a diagram illustrating an exemplary electronic system 400 for use in connection with scheduling software garbage collection during processor idle times, according to one or more aspects of the subject technology. The electronic system 400 may be a computing device for executing software associated with the operation of the computing device 100, or one or more portions or steps of process 300, or components and processes performed by the Fig. 1 to 3. In various implementations, electronic system 400 may be representative of system 100. Accordingly, electronic system 400 or system 100 may be a personal computer or a mobile device such as a tablet computer, a laptop, a smartphone, a PDA, or other touchscreen or television with one or more processors embedded or attached thereto, or any other type of computer-related electronic device with wireless connectivity.

[0047] The electronic system 400 may include various types of computer-readable media and interfaces for various other types of computer-readable media. In the illustrated example, the electronic system 400 includes a bus 408, processor unit(s) 412, system memory 404, read-only memory (ROM) 410, persistent storage 402, an input device interface 414, an output interface device 406, and one or more network interfaces 416. In some implementations, the electronic system 400 may include or be integrated with other computing devices or circuitry for operating the various components and processes described above.

[0048] Bus 408, in its entirety, represents all system, peripheral, and chipset buses that communicatively connect numerous internal devices of electronic system 400. For example, bus 408 provides the data transmission connection to processing unit(s) 412, ROM 410, system memory 404, and permanent storage device 402.

[0049] From these various memory units, the processing unit(s) 412 retrieve(s) instructions to execute and process the data to perform the processes of the subject technology. The processing unit(s) may be a single processor or a multi-core processor with various implementations.

[0050] Read-only memory (ROM) 410 stores static data and instructions required by the one or more processing units 412 and other modules of the electronic system. The permanent storage device 402 is also a readable and writable storage device. This device is a non-volatile memory unit that stores instructions and data even in a power-off state of the electronic system 400. Some implementations of the subject disclosure use a mass storage device (e.g., a magnetic or optical disk and its corresponding disk drive) as the permanent storage device 402.

[0051] Other implementations use a removable storage device (e.g., a floppy disk, a flash drive, and its corresponding disk drive) as the permanent storage element 402. Like the permanent storage device 402, system memory 404 is a read-and-write storage device. However, unlike storage device 402, system memory 404 is a volatile read-and-write memory, such as random access memory. System memory 404 stores some of the instructions and data required by the processor during its runtime. In some implementations, the processes of the subject disclosure are stored in system memory 404, the permanent storage device 402, and / or ROM 410. From these various storage devices, processing unit(s) 412 retrieve(s) instructions to execute and process the data to perform the processes of some implementations.

[0052] Bus 408 is also connected to input and output device interfaces 414 and 406. Input device interface 414 allows the user to transfer information and select commands to the electronic system. Input devices used with input device interfaces 414 include, for example, alphanumeric keyboards and pointing devices (also called "cursor control devices"). Output device interfaces 406, for example, enable the display of images generated by electronic system 400. Output devices used with output device interface 406 include, for example, printers and display devices such as cathode ray tubes (CRTs) or liquid crystal displays (LCDs). Some implementations include devices such as a touchscreen that function as input and output devices.

[0053] Finally, bus 408 connects, as shown in Fig.4, the electronic system 400 may also connect to a network (not shown) via network interfaces 416. Network interfaces 416 may include, for example, a wireless access point (e.g., Bluetooth or Wi-Fi) or radio circuitry for connecting to a wireless access point. Network interfaces 416 may also include hardware (e.g., Ethernet hardware) for connecting the computer to part of a network of computers, such as a local area network ("LAN"), a wide area network ("WAN"), a wireless LAN, or an intranet, or a network of networks, such as the Internet. Any or all components of the electronic system 400 may be used with the subject technology.

[0054] The functions described above may be implemented in computer software, firmware, or hardware. The methods may be implemented using one or more computer program products. Programmable processors and computers may be integrated with or located within mobile devices. The processes and logic operations may be performed by one or more programmable processors and one or more programmable logic circuitry. General-purpose and special-purpose computing devices and storage devices may be interconnected via data transmission networks.

[0055] Some implementations include electronic components such as microprocessors, storage devices, and memories that store computer program instructions on a machine-readable or computer-readable medium (alternatively referred to as computer-readable storage media, machine-readable media, or machine-readable storage media). Some examples of such computer-readable media include RAM, ROM, write-protected compact discs (CD-ROM), recordable compact discs (CD-R), rewritable compact discs (CD-RW), write-protected DVDs (e.g., DVD-ROM, dual-layer DVD-ROM), a variety of recordable or rewritable DVDs (e.g., DVD-RAM, DVD-RW, DVD+RW, etc.), flash memory (e.g., SD cards, mini SD cards, micro SD cards, etc.), magnetic and / or solid-state hard drives, write-protected and recordable Blu-Ray® Discs, Ultra Density Optical Discs, any other optical or magnetic media, and floppy disks.The computer-readable media may store a computer program executable by at least one processing unit and include sets of instructions for performing various operations. Examples of computer programs or computer code include machine code generated, for example, by a compiler, and files containing high-level language code executed by a computer, electronic component, or microprocessor using an interpreter.

[0056] Although the above discussion primarily refers to microprocessors or multi-core processors executing the software, some implementations are implemented by one or more integrated circuits, such as application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs). In some implementations, such integrated circuits execute instructions stored on the circuit itself.

[0057] As used in this specification and any claims of this application, the terms "computer," "server," "processor," and "memory" all refer to electronic or other technological devices. These terms exclude humans or groups of humans. For the purposes of the specification, the terms display or display mean displaying on an electronic device. As used in this specification and any claims of this application, the terms "computer-readable medium" and "computer-readable media" refer exclusively to tangible, physical objects that store data in a form readable by a computer. These terms exclude all wireless signals, signals downloaded over wired systems, and all other ephemeral signals.

[0058] To enable interactions with a user, the implementations of the subject matter described in this specification for displaying information on a computer may be implemented with a display device, such as a CRT (cathode ray tube) or LCD (liquid crystal display) monitor, and a keyboard and pointing device (such as a mouse or trackball) that the user can use to operate the computer. In addition, other devices may be used to enable interaction with a user; for example, the feedback to the user may be any type of sensory feedback, such as visual, auditory, or tactile feedback; and user input may be received in any form, including auditory, verbal, or tactile.Additionally, a computer can interact with a user by sending documents to and receiving documents from a device used by the user, for example, by sending web pages to a web browser on the user's client device in response to requests received from the web browser.

[0059] The embodiments of the subject matter described in this specification may be implemented in a data processing system that includes a backend component, such as a data server, or a middleware component, such as an application server, or a frontend component, such as a client computer with a graphical user interface, or any combination of one or more of said backend, middleware, or frontend components, or a web browser through which a user can interact with an implementation of the subject matter described in this specification. The components of the system may be interconnected by any form or medium of digital data communication, such as a communications network. Examples of communications networks include a local area network (“LAN”) and a wide area network (“WAN”), an internetwork (e.g.,the Internet) and peer-to-peer networks (e.g. ad hoc peer-to-peer networks).

[0060] The computer system may include clients and servers. A client and a server are generally located remotely from each other and typically interact over a communications network. The relationship between client and server arises due to computer programs running on the respective computers, which have a client-server relationship with each other. In some embodiments, a server transmits data (e.g., an HTML page) to a client device (e.g., for displaying data for and receiving user input from a user interacting with the client device). Data generated at the client device (e.g., a result of the user interaction) may be received from the user device at the server.

[0061] Those skilled in the art will appreciate that the various illustrative blocks, modules, elements, components, methods, and algorithms described herein may be implemented as electronic hardware, computer software, or combinations of both. To illustrate this interchangeability of hardware and software, various illustrative blocks, modules, elements, components, methods, and algorithms have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functions in various ways for each particular application. Various components and blocks may be implemented in various ways (e.g.,in a different order or divided in a different way), without in any case deviating from the scope of protection of the technology in question.

[0062] It is understood that the specific order or hierarchy of steps in the disclosed processes is illustrative of exemplary approaches. Based on design preferences, it is understood that the specific order or hierarchy of steps in the processes may be changed. Some of the steps may be performed concurrently. The appended claims to the methods present elements of the various steps in an exemplary order and are not to be construed as limiting the specific order or hierarchy presented.

[0063] The foregoing description is provided to enable a person of ordinary skill in the art to practice the various aspects described herein. The foregoing description provides various examples of the subject technology, and the subject technology is not limited to these examples. Various modifications to these aspects will be readily apparent to those of ordinary skill in the art, and the general principles defined herein may be applied to other aspects. Therefore, the claims are not to be construed as being limited to the aspects set forth herein, but are intended to be accorded the full scope of protection, which is further consistent with the language of the claims wherein a reference to an element in the singular is not intended to mean "one and only one" unless specifically so stated, but rather "one or more."Unless explicitly stated otherwise, the term "some" refers to one or more. Masculine pronouns (e.g., "sein") also include feminine and neuter genders (e.g., "ihr" and "sein"), and vice versa. Headings and subheadings, if any, are used for convenience only and do not limit the invention.

[0064] As used herein, the term website can encompass any feature of a website, including one or more web pages, one or more servers used to host or store web-related content, and the like. Accordingly, the term website can be used interchangeably with the terms web page and server. The verbs "configured to," "arranged to," and "programmed to" do not imply any particular tangible or intangible modification of an item, but rather are intended for their equivalent interchange in use. For example, a processor configured to monitor and control an operation or a component may also be programmed to monitor and control an operation or a component, or may also be arranged to monitor and control an operation or a component.Similarly, a processor configured to execute code may be designed as a processor programmed to execute code or arranged to execute code.

[0065] A phrase such as an "aspect" does not imply that the aspect is essential to the subject technology or that the aspect applies to all configurations of the subject technology. A disclosure relating to an aspect may apply to all, or to one or more, configurations. An aspect may provide one or more examples. A phrase such as an aspect may refer to one or more aspects, and vice versa. A phrase such as an "embodiment" does not imply that such an embodiment is essential to the subject technology or that such an embodiment applies to all configurations of the subject technology. A disclosure relating to an embodiment may apply to all embodiments or to one or more embodiments. An embodiment may provide one or more examples.A phrase such as an "embodiment" may refer to one or more embodiments, and vice versa. A phrase such as a "configuration" does not imply that such a configuration is essential to the subject technology, or that such configurations apply to all configurations of the subject technology. A disclosure referring to a configuration may apply to all, or to one or more, configurations. A configuration may provide one or more examples. A phrase such as a "configuration" may refer to one or more configurations, and vice versa.

[0066] As used herein, the word "example" means "serving as an example or illustration." Any aspect or design described herein as an "example" is not necessarily to be construed as preferable or advantageous over any other aspect or design.

[0067] All structural and functional equivalents of the elements of the various aspects described in the disclosure which are known or hereafter become known to persons of ordinary skill in the art are expressly incorporated herein by reference and are deemed to be covered by the claims. Further, no information disclosed herein is intended to be available to the public, regardless of whether such disclosure is expressly relied upon in the claims. No claimed element is to be construed in accordance with the provisions of 35 USC §112, Part 6, unless the element is expressly used using the phrase "means for" or, in the case of a claimed method, using the phrase "step for."Furthermore, to the extent that the terms "including," "having," or the like are used in the specification or claims, such terms are considered inclusive in a manner similar to the term "comprising," since "comprising" is construed when used as a transition word in a claim.

Claims

[1] Computer-implemented method comprising the following: determining (301) a future idle period (204, 206) in which one or more processors are in an idle state during execution of one or more software applications; estimating (302), for the future idle period (204, 206), a memory allocation for the one or more software applications, wherein the estimated memory allocation is based on a memory allocation over a plurality of future scheduled idle periods; selecting (304) a plurality of predetermined software garbage collection events based on the predetermined future idle period (204, 206) and the estimated memory allocation, wherein the plurality of predetermined software garbage collection events comprise object marking, completion, and memory cleaning, and wherein the selected software garbage collection event is an object marking event; fragmenting the object marking event into a multitude of ascending object marking tasks; and scheduling (306) the selected software garbage collection event to be performed during the future idle period, wherein a first of the ascending object marking tasks is scheduled for execution initially during the future idle period (204, 206); and performing (308) the first of the ascending object marking tasks during the future idle period (204, 206). [2] The computer-implemented method of claim 1, wherein selecting (304) comprises: Determining a time estimate for completing each of the plurality of predefined software garbage collection events based on the estimated memory allocation; and Selecting the selected software garbage collection event based on a respective time estimate corresponding to the selected software garbage collection event and a time duration of the future idle period (204, 206). [3] The computer-implemented method of claim 1, further comprising: Determining a first frame playback start time and a second frame playback time based on a frame rate and one or more software application tasks, wherein the future idle time period (204, 206) is between the first frame playback start time and the second frame playback start time. [4] The computer-implemented method of claim 1, wherein the selected software garbage collection event comprises a group of garbage collection tasks, the method further comprising: determine that the future idle period (204, 206) corresponds to a pause in the playback of frames for the one or more software applications; and schedule the group of software garbage collection tasks to be performed during the future idle period (204, 206), wherein a time duration of the group is greater than the time duration of a respective frame. [5] The computer-implemented method of claim 1, further comprising: determine that the estimated storage space allocation satisfies a threshold allocation of storage space in the future idle period (204, 206). [6] Computer-implemented method according to claim 5, wherein estimating (302) the memory allocation comprises determining a current memory allocation speed, and wherein determining that the estimated memory allocation satisfies a threshold memory allocation is based on the current memory allocation rate. [7] The computer-implemented method of claim 1, wherein the plurality of ascending object marking tasks are scheduled for division between two or more different idle times. [8] System which includes the following: one or more processors; and a memory (104) including instructions that, when executed by the one or more processors, cause the one or more processors to enable the following steps: Determining (301) a future idle period (204, 206) in which one or more processors are in an idle state during execution of one or more software applications; Estimating (302), for the future idle period (204, 206), a memory allocation for the one or more software applications, wherein the estimated memory allocation is based on a memory allocation over a plurality of future scheduled idle periods; Selecting (304) a plurality of predetermined software garbage collection events based on the predetermined future idle period (204, 206) and the estimated memory allocation, wherein the plurality of predetermined software garbage collection events comprise object marking, completion, and memory cleaning, and wherein the selected software garbage collection event is an object marking event; Fragmenting the object marking event into a plurality of ascending object marking tasks; and scheduling (306) the selected software garbage collection event to be performed during the future idle period, wherein a first of the ascending object marking tasks is scheduled for execution initially during the future idle period (204, 206); and Performing (308) the first of the ascending object marking tasks during the future idle period (204, 206). [9] The system of claim 8, wherein the instructions, when executed, further cause the one or more processors to perform the following steps: determining a time estimate for completing each of the plurality of pre-determined software garbage collection events based on the estimated memory allocation; and selecting the selected software garbage collection event based on a repeated time estimate corresponding to the selected software garbage collection event and a time duration of the future idle period (204, 206). [10] The system of claim 8, wherein the instructions, when executed, further cause the one or more processors to perform the following steps: Determining a first frame playback start time and a second frame playback time based on a frame rate and one or more software application tasks, wherein the future idle time period (204, 206) is between the first frame playback start time and the second frame playback start time. [11] The system of claim 8, wherein the selected garbage collection event comprises a group of garbage collection tasks, and wherein the instructions, when executed, further cause the one or more processors to enable the following steps: determine that the future idle period (204, 206) corresponds to a pause in the playback of frames for the one or more software applications; and schedule the group of software garbage collection tasks to be performed during the future idle period (204, 206), wherein a time duration of the group is greater than the time duration of a respective frame. [12] The system of claim 8, wherein the instructions, when executed, further cause the one or more processors to enable the following steps: determine that the estimated memory allocation satisfies a threshold allocation of memory space in the future idle period (204, 206), wherein estimating the allocation of memory space comprises determining a current rate of memory allocation, and wherein determining that the estimated memory allocation satisfies a threshold allocation of memory space in the future idle period (204, 206) is based on the current rate of memory allocation. [13] The system of claim 8, wherein the plurality of ascending object marking tasks are scheduled for division between two or more different idle times. [14] A non-transitory computer-readable storage medium comprising instructions which, when executed, enable the following steps: Determining (301) a future idle period (204, 206) in which one or more processors are in an idle state during execution of one or more software applications; Estimating (302), for the future idle period (204, 206), a memory allocation for the one or more software applications, wherein the estimated memory allocation is based on a memory allocation over a plurality of future scheduled idle periods; Selecting (304) a plurality of predetermined software garbage collection events based on the predetermined future idle period (204, 206) and the estimated memory allocation, wherein the plurality of predetermined software garbage collection events comprise object marking, completion, and memory cleaning, and wherein the selected software garbage collection event is an object marking event; fragmenting the object marking event into a plurality of ascending object marking tasks; and scheduling (306) the selected software garbage collection event to be performed during the future idle period, wherein a first of the ascending object marking tasks is scheduled for execution initially during the future idle period (204, 206); and Performing (308) the first of the ascending object marking tasks during the future idle period (204, 206).

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