Method for incorporating a semiconductor device into a housing using paste die attach material

Abstract

A method of assembling a semiconductor device into a package (300, 400), comprising: Providing a semiconductor die (302, 402) having a top side and a bottom side; Providing a lead frame (304, 408) disposed beneath the semiconductor die (302, 402); Disposing a tape layer (308, 406) between the semiconductor die (302, 402) and the lead frame (304, 408), the tape layer (308, 406) comprising a plurality of discontinuous tape strips (308, 406); Applying a non-conductive paste layer (306, 404) to a portion of the underside of the semiconductor die (302, 402), wherein the paste layer (306, 404) is applied so as to cover a portion of the tape layer (308, 406) without overflowing the tape layer (308, 406); Positioning the semiconductor die (302, 402) on the lead frame (304, 408) using the paste layer (306, 404); and Curing the paste layer (306, 404) to join the semiconductor die (302, 402) to the lead frame (304, 408).

Description

priority

[0001] This application is an international application of US application No. 14 / 970,872, filed on December 16, 2015, published as US 2017 / 0 047 272 A1, which claims priority to US provisional patent application No. 62 / 204,857, filed on August 13, 2015. State of the art

[0002] In the field of semiconductor packaging, die attach film (DAF) is sometimes used to adhere a finished semiconductor die to a substrate or leadframe. While DAFs are easy to use and apply, they can have certain disadvantages. For example, DAFs cannot withstand high wire bonding temperatures and are further prone to delamination abnormalities between the DAF and the leadframe interface layer, which can cause problems in the final product and / or additional production costs. Furthermore, DAFs themselves are expensive, and their use increases the cost of semiconductor production. Accordingly, improvements are needed that are not affected by the same production quality and anomaly or cost issues.

[0003] US 6,249,041 B1 describes an improved semiconductor device comprising a semiconductor chip with contact areas on the top or bottom surface. A first lead assembly, formed from a semi-rigid plate of conductive material, has a lead assembly contact attached to one of the contact areas of the semiconductor chip. The first lead assembly also has at least one lead connected to and extending from the lead assembly contact. A second lead assembly, also formed from a semi-rigid plate of conductive material, has a lead assembly contact attached to another of the contact areas of the semiconductor chip. The second lead assembly also has at least one lead connected to and extending from the lead assembly contact.An encapsulation material encloses the semiconductor chip, the lead assembly contact of the first lead assembly, and the lead assembly contact of the second lead assembly. Due to the direct connection of the lead assemblies to the chip, the semiconductor component exhibits low electrical and thermal resistance contributions from the package.

[0004] US 2012 / 0 153 447 A1 discloses methods for assembling microelectronic packages with lead frames and / or other suitable substrates. In one embodiment, a method for manufacturing a semiconductor assembly comprises forming a mount region and a non-mount region on a lead finger of a lead frame. The mount region is more wettable with the solder ball during reflow than the non-mount region. The method also comprises contacting a solder ball carried by a semiconductor chip with the mount region of the lead finger, reflowing the solder ball while the solder ball is in contact with the mount region of the lead finger, and controlled collapsing the solder ball to establish an electrical connection between the semiconductor chip and the lead finger of the lead frame. Summary

[0005] The present invention relates to a method for incorporating a semiconductor device into a package according to claim 1. Advantageous embodiments of the invention may comprise features of the dependent claims. BRIEF DESCRIPTION OF THE CHARACTERS

[0006] The accompanying figures are incorporated herein and form a part of the specification of the disclosure. Fig. 1 is an exemplary design of a semiconductor package according to various embodiments of the disclosure. Fig. 2 is an exemplary cross-sectional view of a semiconductor package according to various embodiments of the disclosure. Fig. 3 is an exemplary design of a semiconductor package according to various embodiments of the disclosure. Fig. 4 is an exemplary cross-sectional view of a semiconductor package according to various embodiments of the disclosure. Fig. 5 is an exemplary design of a semiconductor package according to various embodiments of the disclosure. Fig. 6 is a flowchart illustrating the method of producing a semiconductor package according to various embodiments of the disclosure. DETAILED DESCRIPTION

[0007] Systems, methods, and / or combinations and subcombinations thereof are provided herein for the production of semiconductor packages using adhesive paste to bond a semiconductor die to a lead frame.

[0008] Fig. 1 is a schematic diagram of a semiconductor package 100 according to various embodiments of the disclosure. The semiconductor package 100 includes a semiconductor die 102 affixed to the lead frame 104 with the die adhesive film (DAF) 106 and a frame tape 108. The lead frame 104 can be used to connect package leads 110 to the mating leads of the semiconductor die 102. According to various embodiments, the DAF 106 can be pre-applied, for example, during an upstream wafer-level lamination process. Fig. Figure 1 illustrates the DAF 106 as smaller than the die 102. This is intended to explain the figure. In practice, the DAF 106 may cover the entire die 102; the edges of the DAF 106 may be coextensive with the die 102. While Fig. 1 is illustrated with a total of 48 connection pins 110, it should be understood that this is for illustrative purposes only and that any number, pattern, or shape of connection pins may be used and still be within the scope and spirit of this disclosure.

[0009] The Fig. The DAF 106 shown in Figure 1 may include an adhesive layer disposed on the wafer bottom (i.e., backside) during a pre-lamination process. The pre-lamination process may, according to some embodiments, take place before a wafer dicing process. The DAF may include a resin adhesive disposed on a film, such as polyvinyl film, polyolefin film, or polyethylene terephthalate (PET) film. Fig. 1, the DAF is used to fix the die 102 to a pad of a lead frame 104. In this way, the DAF 106 can be used to form a chip-on-lead (COL) package 100.

[0010] Fig. 2 is a cross-sectional view of aspects of a semiconductor package 200. Fig. 2 may, for example, be a cross-sectional view of a semiconductor package 100 of Fig. 1 along the axis of one of the lengths of the band 108 according to various embodiments. As shown in Fig. 2, the semiconductor package 200 includes a die 202 and a lead frame 208. The die 202 may be a semiconductor die that includes a number of logic gates and / or analog semiconductor devices.

[0011] As in Fig. 2, the die 202 is fixed to the lead frame 208 with a DAF 204 fixed to the bottom of the die 202 and to a tape layer 206. According to various embodiments, the tape layer 206 may be similar to the frame tape layer 108 described above with reference to Fig. 1. The DAF 204 may include a resin adhesive disposed on a film such as polyvinyl film, polyolefin film, or polyethylene terephthalate (PET) film.

[0012] While effective in some aspects, the use of die bonding films, such as DAF 204, can be problematic during the process of assembling a semiconductor into a package. For example, in some manufacturing processes, it may be desirable to use a high-temperature wire bonding temperature. However, many DAFs have a maximum temperature that is lower than the required wire bonding temperature. In addition, DAFs can suffer delamination during the manufacturing process, even when high-temperature processes are used. Delamination occurs when outgassing occurs during the manufacturing process, causing separation between, for example, DAF 204 and tape 206. This is problematic for the integrity of the bonds between die 202 and lead frame 208. In addition, problems can arise during wafer dicing. During wafer dicing, both layers of the laminated die (e.g.,The 202), which is a brittle and hard material like silicon, and layers of the DAF, which is soft and elastic, are sawn through. This can result in DAF (e.g., DAF 204) flashes. DAF flashes are remnants or hairlines of DAF adhesive on the bottom and sides of sawn die edges. These adhesive DAF flashes result in various process and multiple quality issues and challenges. For example, the flashes can cause adjacent dies to "stick together," which can result in a neighboring die being picked up along with a target die during the production process. This problem can be particularly pronounced when processing very small dies (e.g., smaller than 2 mm) that have small (e.g., 60 µm and smaller) narrow saw paths between rows and columns of die in the sawn wafer.This problem can also result in die cracking, die breakage, or die splintering—especially with thin and large (e.g., larger than 8 mm) dies. All of these problems result in increased production costs. A better approach would be to replace the DAF 204 with a material that is not subject to the same drawbacks that DAF 204 materials suffer from.

[0013] Fig. 3 is a schematic illustration of a semiconductor package 300 according to various embodiments of the disclosure. The semiconductor package 300 includes a semiconductor die 302 fixed to the lead frame 304 with adhesive paste 306 and a frame tape 308. The lead frame 304 may include a suitable lead frame for the die 302 or a leadless package, such as a dual-flat no-lead (DFN) package or quad-flat no-lead (QFN) package, according to various embodiments.

[0014] In some embodiments, the amount of adhesive paste 306 used to bond die 302 to lead frame 308 is controlled to provide maximum coverage of frame lead 308 without overflowing the edges of frame lead 308. In other embodiments, the amount of adhesive paste 306 used is simply determined so that it does not overflow frame lead 308. Frame lead 308 may also be used to create a die attach paddle for mating die 302 to lead frame 304, in some embodiments.

[0015] While Fig. 3 illustrates a housing 300 with three lengths of frame band 308, this simply serves to illustrate that multiple lengths or shapes of frame band 308 may be used. According to other embodiments, more or fewer lengths or shapes of frame band 308 may be used. For example, in some embodiments, only a single length and shape of frame band 308 is employed. This is discussed below with reference to Fig. 5 discussed in more detail.

[0016] The lead frame 304 can be used to connect package leads 310 to the matching leads of the semiconductor die 302. While Fig. 3 is illustrated with a total of 48 connection pins 310, it should be understood that this is for illustrative purposes only and that any number, pattern, or shape of connection pins may be used and still be within the scope and spirit of this disclosure.

[0017] The Fig. 3 may include a suitable adhesive paste or liquid adhesive material. For example, according to some embodiments, the adhesive paste 306 includes a paste adhesive that is either electrically insulating or electrically or thermally conductive, depending on the specific application. For example, a fully polymer-based adhesive paste may be used if an electrically insulating adhesive 306 is desired. Likewise, a thermal or thermally conductive adhesive paste may be used if a thermally or electrically conductive adhesive paste 306 is desired. Fig. 3, the adhesive paste 306 is used to fix the die 302 to a pad of a lead frame 304. In this way, the adhesive paste can be used to form a chip-on-lead (COL) package 300.

[0018] Fig. 4 is a cross-sectional view of aspects of a semiconductor package 400. Fig. 4, for example, a semiconductor package 300 of Fig. 3 with the cross section along a length of the band 308. As in Fig. 4, the semiconductor package 400 includes a die 402 and a lead frame 408. The die 402 may be a semiconductor die containing a number of logic gates and / or analog semiconductor devices. The lead frame 408 may include a suitable semiconductor package substrate, such as a lead frame pad or the like.

[0019] As in Fig. 4, the die 402 is fixed to the lead frame 408 with an adhesive paste 404 that is fixed to one side of the die 402 and to a tape layer 406. According to various embodiments, the tape layer 406 may be similar to the frame tape layer 308 described above with reference to Fig. 3. The adhesive paste 404 may include a resin adhesive disposed on a film, such as polyvinyl film, polyolefin film, or polyethylene terephthalate (PET) film. An encapsulant or gasket 410 may be applied to seal the semiconductor package, which includes the die 402, the paste layer 404, the tape 406, and the lead frame 408.

[0020] While Fig. While Figure 3 illustrates a housing 300 with three lengths of frame band 308, this is simply to illustrate that multiple lengths of frame band 308 may be used. According to other embodiments, more or fewer lengths or shapes of frame band 308 may be used. Indeed, entirely different leadframe shapes and sizes may be used in connection with the disclosed subject matter. Fig. Figure 5 illustrates such an alternative.

[0021] Fig. 5 is a schematic illustration of a semiconductor package 500 according to various embodiments of the disclosure. The semiconductor package 500 includes a semiconductor die 502 secured to the lead frame 504 with adhesive paste 506 and a frame tape 508. In some embodiments, the amount of adhesive paste 506 used to bond the die 502 to the tape 508 is controlled to provide maximum coverage of the frame tape 508 without overflowing the edges of the frame tape 508. In other embodiments, the amount of adhesive paste 506 used is simply determined so as not to overflow the frame tape 508.

[0022] In contrast to Fig. 3 illustrates Fig. 5 a package 500 with only a single length of frame strip 508. The lead frame 504 can be used to connect package leads 510 to the matching leads of the semiconductor die 502. While Fig. 5 is illustrated with a total of 48 connection pins 510, it should be understood that this is for illustrative purposes only and that any number, pattern, or shape of connection pins may be used and still be within the scope and spirit of this disclosure.

[0023] The Fig. 5 may include a suitable adhesive paste material. For example, according to some embodiments, the adhesive paste 506 includes an adhesive paste that is either electrically insulating or electrically or thermally conductive, depending on the specific application. For example, a fully polymer-based adhesive paste may be used if an electrically insulating adhesive 506 is desired. Likewise, a thermal or thermally conductive adhesive paste may be used if a thermally or electrically conductive adhesive paste 506 is desired. Fig. 5, the adhesive paste 506 is used to fix the die 502 to a pad of a lead frame 504. In this way, the adhesive paste can be used to form a COL package 500.

[0024] Fig. 6 is a flowchart illustrating a method 600 for assembling a die (e.g., die 302) into a package according to various embodiments of the disclosure. To aid explanation, the method 600 is also described with reference to Fig. 3, however, it should be understood that the method 600 is not limited to the specific embodiment shown in Fig. 3. According to method 600, a die 302 is appropriately positioned to allow adhesive paste 306 to be applied thereto at step 602.

[0025] At step 604, the appropriate amount of adhesive paste 306 to be applied to the die 302 is determined. According to some embodiments, it may be desirable to vary the amount of adhesive paste 306 depending on various factors. For example, the type of adhesive paste 306 (e.g., polymer-based or silver-filled) may influence the amount and pattern (shape) of adhesive paste 306 to be applied to the die 302. Likewise, the specific geometry of a die 302 may also influence the required amount of adhesive paste 306. In some embodiments, the amount of adhesive paste 306 to be applied to the die 302 may be determined as an amount that will provide maximum coverage without overflow from, for example, the edges of the frame band 308.

[0026] At step 606, the determined amount of adhesive paste 306 is applied to the die 302. According to some embodiments, the adhesive paste 306 may be applied at multiple locations on the die 302. For example, the adhesive paste 306 may be applied at the points on the die 302 where the frame tape 308 is to be arranged. In such embodiments, the adhesive paste 306 may be applied such that it does not overflow the edges of the tape 308. It is also possible, in some embodiments, for the adhesive paste 306 to be applied only at a single location.

[0027] At step 608, the die 302 is fixed to the lead frame 304 using the adhesive paste 306. The die 302 can be fixed, for example, to the lead frame pad. In some embodiments, fixing the die 302 to the lead frame 304 can include disposing a frame band 308 between the adhesive paste 306 and the lead frame 304. At step 610, the adhesive paste 306 is cured (e.g., by applying a particular wavelength of light to the adhesive paste), in accordance with the particular type of adhesive paste employed. At step 612, the process of assembling the die 302 into a package can be performed according to suitable methods.

Claims

[1] A method of assembling a semiconductor device into a package (300, 400), comprising: Providing a semiconductor die (302, 402) having a top side and a bottom side; Providing a lead frame (304, 408) disposed beneath the semiconductor die (302, 402); Disposing a tape layer (308, 406) between the semiconductor die (302, 402) and the lead frame (304, 408), the tape layer (308, 406) comprising a plurality of discontinuous tape strips (308, 406); Applying a non-conductive paste layer (306, 404) to a portion of the underside of the semiconductor die (302, 402), wherein the paste layer (306, 404) is applied such that it covers a portion of the tape layer (308, 406) without overflowing the tape layer (308, 406); Positioning the semiconductor die (302, 402) on the lead frame (304, 408) using the paste layer (306, 404); and Curing the paste layer (306, 404) to join the semiconductor die (302, 402) to the lead frame (304, 408). [2] The method of claim 1, wherein applying the paste layer (306, 404) includes arranging the paste layer (306, 404) so that it is discontinuous and leaves portions of the semiconductor die (302, 402) uncovered by the paste layer (306, 404). [3] The method of claim 1, further comprising: Forming a die attach paddle using the tape layer (308, 406) between the semiconductor die (302, 402) and the lead frame (304, 408). [4] The method of claim 3, wherein the paste layer (306, 404) is disposed between the semiconductor die (302, 402) and the tape layer (308, 406). [5] The method of claim 4, wherein the paste layer (306, 404) is disposed only over a portion of the tape layer (308, 406). [6] The method of claim 1, further comprising: Arranging a pad between the semiconductor die (302, 402) and the lead frame (304, 408). [7] The method of claim 6, wherein at least a portion of the paste layer (306, 404) is disposed between the semiconductor die (302, 402) and the pad. [8] The method of claim 1, wherein the paste layer (306, 404) is configured to withstand a wire bonding temperature without delamination.

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