semiconductor device

Abstract

Semiconductor device comprising: a lower electrode (10); an upper electrode (40) arranged above the lower electrode (10); a semiconductor chip (12) arranged between the lower electrode (10) and the upper electrode (40); a pressure pad (34, 36) arranged between the lower electrode (10) and the upper electrode (40) so as to be superimposed on the semiconductor chip (12); and a spiral conductor (20) arranged between the lower electrode (10) and the upper electrode (40) so as to be superimposed on the semiconductor chip (12) and the pressure pad (34, 36), wherein the spiral conductor (20) has an upper spiral conductor (24) and a lower spiral conductor (22) which is in contact with a lower end of the upper spiral conductor (24) and is opposite to the upper spiral conductor (24), the lower spiral conductor (22) and the upper spiral conductor (24) having conical shapes in which a central part rises, the lower spiral conductor (22) being convex downwards and the upper spiral conductor (24) being convex upwards and by forming grooves (22a, 24a) in the upper spiral conductor (24) and the lower spiral conductor (22), a direction of a current flowing through the upper spiral conductor (24) coincides with a direction of a current flowing through the lower spiral conductor (22) in plan view, wherein a portion of the upper spiral conductor (24) having a largest width is brought into contact with a portion of the lower spiral conductor (22) having a largest width.

Description

Area

[0001] The present invention relates to a semiconductor device used, for example, for switching a large current or the like. background

[0002] PTL 1 discloses a power semiconductor module in press-pack form. PTL 1 discloses in Fig. 1 shows a pressure-packed power semiconductor module with a plurality of semiconductor devices inside. A semiconductor device includes a semiconductor chip. The semiconductor chip is, for example, an IGBT. Electrical connection in the semiconductor chip is achieved by pressure contact between the upper and lower surfaces of individual elements of the semiconductor device. To evenly apply pressure to the plurality of semiconductor chips, a spring structure and clearance in an electrical conduction path are necessary for each semiconductor chip.

[0003] A pressure pad provides this clearance and ensures the electrical connection. Sometimes, a plurality of pressure pads is provided to increase the current-carrying capacity for normal current. Sometimes, a spring is provided between the pressure pads, which acts as an inductor even if it is conductive, and which has a high impedance, especially for high-frequency waves. Therefore, no current flows through the spring.

[0004] US 2014 / 0 225 245 A1 discloses a power semiconductor module and a power semiconductor module assembly containing a plurality of power semiconductor modules. The power semiconductor module comprises an electrically conductive base plate, an electrically conductive cover plate arranged parallel to the base plate and spaced apart from the base plate, at least one power semiconductor device arranged on the base plate in a space formed between the base plate and the top plate, and at least one press pin arranged in the space formed between the base plate and the top plate to establish contact between the semiconductor device and the top plate.

[0005] JP 2010-251079 A discloses the provision of a switch provided with a fixed contact arranged on a fixed contactor and a movable contact arranged on a movable contactor opposite the fixed point, wherein each center portion of the fixed contact and the movable contact is formed thicker than other portions and contact each other to form a contact point. The fixed contact and the movable contact have groove portions. State of the artPatent literature

[0006] Patent literature 1: JP 2004 - 528 724 A SummaryTechnical problem

[0007] When a semiconductor chip is in a short-circuit state, currents flow in opposite directions through an upper electrode, which is an upper power terminal, and a lower electrode, which is a lower power terminal. An electromagnetic force due to these currents causes a repulsive force to occur between the upper and lower electrodes. As the repulsive force causes the distance between the upper and lower electrodes to increase, a component may detach between the upper and lower electrodes, disrupting the electrical path between them.

[0008] In particular, there is a risk of detachment on the surface of the semiconductor chip with a weak connection design.

[0009] Furthermore, it is considered that an arc is generated at the point of interruption of the electrical path, and the device is heated due to the arc, causing the atmosphere within it to expand or the solid within it to vaporize, causing the device to explode. Therefore, a module requires a robust explosion-proof structure, which has been a factor hindering its downsizing and low cost. Occasionally, a restriction of the operating current range and / or separate provision of short-circuit protection are also necessary.

[0010] The present invention is designed to solve the above-mentioned problems, and its object is to provide a semiconductor device capable of reducing a repulsive force exerted on an upper electrode and a lower electrode to prevent peeling of a component between the upper electrode and the lower electrode. Means to solve the problems

[0011] This problem is solved by the features of the independent claim. The subclaims contain advantageous developments of the invention.

[0012] Other features of the invention will become more fully apparent from the following description. Advantageous effects of the invention

[0013] According to the present invention, peeling of a component between the upper electrode and the lower electrode can be prevented because an attractive force generated in the spiral conductor reduces a repulsive force exerted on the lower electrode and the upper electrode. Short description of the drawings Fig. 1 is a cross-sectional view of a semiconductor device according to Embodiment 1. Fig. Figure 2 is a diagram illustrating the lower spiral conductor and the upper spiral conductor. Fig. 3 is a cross-sectional view of the spiral conductor. Fig. Figure 4 is a partial cross-sectional view of the lower spiral conductor and the upper spiral conductor. Fig. Figure 5 is a diagram schematically illustrating current flows in the spiral conductor. Fig. 6 is a diagram exemplifying an assembly of the semiconductor devices according to Embodiment 1. Fig. 7 is a cross-sectional view of a spiral conductor of a semiconductor device according to a comparative example. Fig. 8 is a diagram illustrating a lower spiral conductor and an upper spiral conductor of a semiconductor device according to Embodiment 2. Fig. 9 is a cross-sectional view of a semiconductor device according to Embodiment 3. Description of embodiments

[0014] Semiconductor devices according to embodiments of the present invention will be described with reference to the drawings. The same or corresponding components are given the same reference numerals, and their repeated descriptions are sometimes omitted. Embodiment 1

[0015] Fig. 1 is a cross-sectional view of a semiconductor device according to Embodiment 1. This semiconductor device 1 includes a lower electrode 10. A semiconductor chip 12 is provided on the lower electrode 10. The semiconductor chip 12 is, for example, an IGBT or a diode. A spiral conductor 20 is provided on the semiconductor chip 12. The spiral conductor 20 includes a lower spiral conductor 22 and an upper spiral conductor 24.

[0016] Metal plates 30 and 32 are provided so as to be superimposed on the spiral conductor 20. Pressure pads 34 and 36 are provided on the plate 32. The semiconductor device 1 includes the pressure pads 34 and 36, and thus they constitute a spring electrode of a pressure-packed power semiconductor device. A plate 38 is provided on the pressure pads 34 and 36, and an upper electrode 40 is provided on the plate 38.

[0017] The upper ends of the pressure pads 34 and 36 are fixed to the plate 38, and their lower ends are fixed to the plate 32. The pressure pads 34 and 36 expand and contract in the y-direction, that is, the direction perpendicular to the lower surface of the lower electrode 10 and the upper surface of the upper electrode 40. Therefore, the pressure pads 34 and 36 electrically connect the lower electrode 10 and the upper electrode 40 via the semiconductor chip 12 regardless of the distance between the lower electrode 10 and the upper electrode 40.

[0018] Springs 37 are provided between the pressure pads 34 and 36. The springs 37 exert a force that decreases the distance between the lower electrode 10 and the upper electrode 40 when the distance between the lower electrode 10 and the upper electrode 40 increases, and exert a force that increases the distance between the lower electrode 10 and the upper electrode 40 when the distance between the lower electrode 10 and the upper electrode 40 decreases.

[0019] The individual elements between the lower electrode 10 and the upper electrode 40 are preferably brought into pressure contact with one another. This ensures an electrical connection between the upper electrode 40 and the lower electrode 10 via the semiconductor chip 12, the pressure pads 34 and 36, and the like.

[0020] Fig. 2 is a diagram illustrating the lower spiral conductor 22 and the upper spiral conductor 24. The upper left view is a plan view of the lower spiral conductor 22, and the cross-sectional view taken along the dashed line in this view is the lower left view. The upper right view is a plan view of the upper spiral conductor 24, and the cross-sectional view taken along the dashed line in this view is the lower right view. The lower spiral conductor 22 and the upper spiral conductor 24 have the same shapes. Namely, by turning the lower spiral conductor 22 upside down, it has the same shape as that of the upper spiral conductor.

[0021] Arrows in Fig. 2 indicate current flows. In the lower spiral conductor 22, currents generally flow from the outside of the lower spiral conductor 22 to the inside. Furthermore, curved grooves 22a are formed in the lower spiral conductor 22. The plurality of grooves 22a are annular as a whole. These grooves 22a define the current flows. As a result, the currents in the lower spiral conductor 22 flow counterclockwise in plan view.

[0022] Meanwhile, in the upper spiral conductor 24, currents generally flow from the inside of the upper spiral conductor 24 to the outside. Furthermore, curved grooves 24a are formed in the upper spiral conductor 24. The plurality of grooves 24a are annular as a whole. These grooves 24a define the current flows. As a result, the currents in the upper spiral conductor 24 flow counterclockwise when viewed from above.

[0023] By forming the grooves 22a and 24a in the lower spiral conductor 22 and the upper spiral conductor 24, the direction of the currents flowing through the upper spiral conductor 24 coincides with the direction of the currents flowing through the lower spiral conductor 22 in plan view.

[0024] As can be seen from the two lower views in Fig. As can be seen in Figure 2, both the lower spiral conductor 22 and the upper spiral conductor 24 have conical shapes in which the central portion rises. The lower spiral conductor 22 is convex downward, and the upper spiral conductor 24 is convex upward. An opening 22b is provided at the center of the lower spiral conductor 22 to allow the lower spiral conductor 22 to easily contact the semiconductor chip 12. An opening 24b is provided at the center of the upper spiral conductor 24 to allow the upper spiral conductor 24 to easily contact the plate 30.

[0025] Fig. Figure 3 is a cross-sectional view of the spiral conductor 20. The upper spiral conductor 24 and the lower spiral conductor 22 are provided so as to face each other. The lower end of the upper spiral conductor 24 is in contact with the upper end of the lower spiral conductor 22, thus forming the spiral conductor 20. As shown in Fig. 3, a portion of the upper spiral conductor 24 having the largest width is in contact with a portion of the lower spiral conductor 22 having the largest width. Furthermore, in the cross-sectional view thereof, currents flow from a center 24A of the upper spiral conductor 24 to its outer side 24B, currents flow from an outer side 22B of the lower spiral conductor 22 to its center 22A, and currents flow to the semiconductor chip 12.

[0026] Fig. 4 is a partial cross-sectional view of the lower spiral conductor 22 and the upper spiral conductor 24. As mentioned above, since the direction of the currents flowing through the lower spiral conductor 22 coincides with the direction of the currents flowing through the upper spiral conductor 24, an attractive force occurs between the lower spiral conductor 22 and the upper spiral conductor 24. Fig. Figure 5 is a diagram schematically illustrating current flows in the lower spiral conductor 22 and the upper spiral conductor 24. Counterclockwise currents occurring in the lower spiral conductor 22 and the upper spiral conductor 24 create an attractive force between them.

[0027] Fig. 6 is a diagram exemplifying an assembly of the semiconductor devices 1 according to Embodiment 1. Three semiconductor devices 1 share one lower electrode 10. Six semiconductor devices 1 are provided on one base plate 39. Fig. 6 illustrates a stacking of two structures, each of which mounts six semiconductor devices 1 on the base plate 39. Thus, a pressure-packed power semiconductor module is configured with twelve semiconductor devices 1. A force is applied to this module from the top and bottom of the module, and the individual elements in the semiconductor devices are brought into pressure contact with each other, thereby establishing electrical connections in the semiconductor chips.

[0028] To uniformly apply pressure to the plurality of semiconductor chips 12, a spring structure and clearance in an electrical conduction path are necessary for each semiconductor device 1. The pressure pads 34 and 36 provide this clearance and ensure electrical connection. While in Embodiment 1, two pressure pads 34 and 36 are provided in one semiconductor device, three or more pressure pads may be provided for one semiconductor device to increase the current-carrying capacity for normal current. In particular, since the springs 37 between the pressure pads 34 and 36 function as inductors, even if they have conductivity, they have a high impedance, especially for high-frequency waves, and current does not flow through the springs 37.

[0029] Solid arrows in Fig. 1 now indicate directions of short-circuit currents. Short-circuit currents in the opposite directions flow through the upper electrode 40, which is an upper power terminal, and the lower electrode 10, which is a lower power terminal. These short-circuit currents cause a repulsive force to occur between the upper electrode 40 and the lower electrode 10. Dashed arrows indicate the repulsive force. Furthermore, in the semiconductor device 1 according to Embodiment 1 of the present invention, since the attractive force occurs between the lower spiral conductor 22 and the upper spiral conductor 24 as mentioned above, the attractive force cancels or reduces the repulsive force occurring between the upper electrode 40 and the lower electrode 10.

[0030] As above, by reducing the repulsive force exerted on the upper electrode 40 and the lower electrode 10, detachment of a component between the upper electrode 40 and the lower electrode 10 can be prevented. For example, the semiconductor chip 12 can be prevented from detaching from the lower electrode 10. Such detachment prevention does not cause thermal expansion of an atmosphere due to an arc, and therefore the semiconductor device and the module containing the same will not explode. Therefore, a conventionally provided explosion-proof measure can be eliminated, which can achieve downsizing and low cost of the module.

[0031] In the semiconductor device according to Embodiment 1 of the present invention, the semiconductor chip 12, the pressure pads 34 and 36 provided to overlap the semiconductor chip 12, and the spiral conductor 20 provided to overlap the semiconductor chip 12 and the pressure pads 34 and 36 are provided between the lower electrode 10 and the upper electrode 40, and an attractive force is generated in the spiral conductor 20. Various modifications of the semiconductor device 1 according to Embodiment 1 of the present invention may be made as long as they do not detract from its features.

[0032] For example, the stacking order of the semiconductor chip 12, the pressure pads 34 and 36, and the spiral conductor 20 can be changed. Therefore, the semiconductor chip 12 can be provided above the pressure pads 34 and 36. Furthermore, the number of pressure pads provided on a semiconductor device 1 is not particularly limited. A vertical chip in which a current flows between its front surface and back surface can be used as the semiconductor chip 12, and such a chip is not limited to an IGBT or a diode.

[0033] Although the semiconductor chip 12 may be made of silicon, it may be formed of a wide-bandgap semiconductor having a larger bandgap than silicon. Examples of the wide-bandgap semiconductor include silicon carbide, a gallium nitride-based material, and diamond. Using the wide-bandgap semiconductor increases the possible operating temperature of the device. Furthermore, silicon carbide allows a MOSFET, which is a monopolar device, to have a high withstand voltage, which can achieve high frequency and high efficiency.

[0034] These modifications can also be applied to semiconductor devices according to the following embodiments. In particular, since the semiconductor devices according to the following embodiments have a great similarity to those of Embodiment 1, their differences from those of Embodiment 1 will be primarily described. Comparison example

[0035] Fig. 7 is a cross-sectional view of a spiral conductor of a semiconductor device according to a comparative example. A portion of the upper spiral conductor 24 having the narrowest width is in contact with a portion of the lower spiral conductor 22 having the narrowest width. Specifically, the center of the lower spiral conductor 22 is in contact with the center of the upper spiral conductor 24. In this case, a current enters the outside of the plate 30, reaches the center of the upper spiral conductor 24, flows outward from the center of the lower spiral conductor 22, and enters the semiconductor chip 12.

[0036] In plan view, clockwise currents will flow in the upper spiral conductor 24 and the lower spiral conductor 22. In other words, since the direction of currents flowing through the upper spiral conductor 24 coincides with the direction of currents flowing through the lower spiral conductor 22 in plan view, an attractive force occurs between the upper spiral conductor 24 and the lower spiral conductor 22. Since this attractive force reduces the repulsive force exerted on the upper electrode 40 and the lower electrode 10, component detachment between the upper electrode 40 and the lower electrode 10 can be prevented. Embodiment 2

[0037] Fig. 8 is a diagram illustrating a lower spiral conductor 41 and an upper spiral conductor 42 of a semiconductor device according to Embodiment 2. The upper left view is a plan view of the lower spiral conductor 41, and the cross-sectional view taken along the dashed line in this view is the lower left view. The upper right view is a plan view of the upper spiral conductor 42, and the cross-sectional view taken along the dashed line in this view is the lower right view. The lower spiral conductor 41 and the upper spiral conductor 42 have the same shapes. Specifically, by turning the lower spiral conductor 41 upside down, it has the same shape as that of the upper spiral conductor 42.The upper end of the lower spiral conductor 41 is connected to the lower end of the upper spiral conductor 42, thus forming a spiral conductor.

[0038] Both grooves 41a of the lower spiral conductor 41 and grooves 42a of the upper spiral conductor 42 are formed linearly. In this case, by simply cutting grooves through a disk, followed by deforming the disk into a convex shape, each of the lower spiral conductor 41 and the upper spiral conductor 42 can be easily formed.

[0039] Through a current path defined by the grooves 41a, currents flow counterclockwise through the lower spiral conductor 41. Through a current path defined by the grooves 42a, currents flow counterclockwise through the upper spiral conductor 42. Therefore, an attractive force occurs between the upper spiral conductor 42 and the lower spiral conductor 41. Since this attractive force reduces the repulsive force exerted on the upper electrode 40 and the lower electrode 10, detachment of a component between the upper electrode 40 and the lower electrode 10 can be prevented. Embodiment 3

[0040] Fig. 9 is a cross-sectional view of a semiconductor device according to Embodiment 3. A spiral conductor 50 is provided between the semiconductor chip 12 and the lower electrode 10. The spiral conductor 50 includes a lower spiral conductor 52 provided on the lower electrode 10 and an upper spiral conductor 54 provided on the lower spiral conductor 52. The structure of the spiral conductor 50 is the same as the structure of the spiral conductor 20.

[0041] In the semiconductor device of Embodiment 3, a plurality of spiral conductors are provided so as to be superimposed between the lower electrode 10 and the upper electrode 40. The spiral conductor 20 and the spiral conductor 50 may be directly superimposed on each other or may be superimposed over the semiconductor chip 12 or a plate. Since providing the plurality of spiral conductors can generate attractive forces at a plurality of locations in the semiconductor device, the repulsive force exerted on the lower electrode 10 and the upper electrode 40 can be reduced.

[0042] While in Embodiment 3 of the present invention, the two spiral conductors 20 and 50 are provided, three or more spiral conductors may be provided in one semiconductor device. Types of the plurality of spiral conductors do not have to be combined into the same type. For example, the spiral conductor in Fig. 7 with the spiral conductor 20 in Fig. 1 can be superimposed.

[0043] In Embodiments 1 to 3 above, the directions of current flow are defined by forming grooves in the lower spiral conductor and the upper spiral conductor. The number and shape of the grooves are not particularly limited, as long as they guide currents clockwise or counterclockwise in plan view. In particular, the technical features described for the above individual embodiments can be appropriately combined. Description of the symbols

[0044] 10 lower electrode, 12 semiconductor chip, 20 spiral conductor, 22 lower spiral conductor, 24 upper spiral conductor, 34, 36 pressure pad, 40 upper electrode

Claims

[1] A semiconductor device comprising: a lower electrode (10); an upper electrode (40) arranged above the lower electrode (10); a semiconductor chip (12) arranged between the lower electrode (10) and the upper electrode (40); a pressure pad (34, 36) arranged between the lower electrode (10) and the upper electrode (40) so as to be superimposed on the semiconductor chip (12); and a spiral conductor (20) arranged between the lower electrode (10) and the upper electrode (40) so as to be superimposed on the semiconductor chip (12) and the pressure pad (34, 36), wherein the spiral conductor (20) has an upper spiral conductor (24) and a lower spiral conductor (22) which is in contact with a lower end of the upper spiral conductor (24) and is opposite to the upper spiral conductor (24), the lower spiral conductor (22) and the upper spiral conductor (24) having conical shapes in which a central part rises, the lower spiral conductor (22) being convex downwards and the upper spiral conductor (24) being convex upwards and by forming grooves (22a, 24a) in the upper spiral conductor (24) and the lower spiral conductor (22), a direction of a current flowing through the upper spiral conductor (24) coincides with a direction of a current flowing through the lower spiral conductor (22) in plan view, wherein a portion of the upper spiral conductor (24) having a largest width is brought into contact with a portion of the lower spiral conductor (22) having a largest width. [2] A semiconductor device according to claim 1, wherein the grooves (22a, 24a) are curved. [3] A semiconductor device according to claim 1, wherein the grooves (41a, 42a) are formed linearly. [4] A semiconductor device according to any one of claims 1 to 3, wherein a plurality of said spiral conductors (20, 50) are arranged to be superposed between said lower electrode (10) and said upper electrode (40). [5] A semiconductor device according to any one of claims 1 to 4, wherein the semiconductor chip (12) is formed of a wide band gap semiconductor. [6] The semiconductor device according to claim 5, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

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