METHOD FOR SEPARATING AN EPITATICALLY GROWN SEMICOND BODY AND SEMICOND CHIP

DE112019002341B4Inactive Publication Date: 2025-10-30AMS OSRAM INT GMBH
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
DE112019002341
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2018-05-09
Filing Date
2019-05-07
Publication Date
2025-10-30
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Method for cutting through an epitaxially grown semiconductor body (1), wherein a) a growth substrate (2) is provided; b) by etching at least one trench (20,21,22) with a main extension direction (X20,X21,X22) is introduced into the growth substrate (2) from a first main surface (2a) of the growth substrate (2); c) a semiconductor material is epitaxially deposited on the first main surface (2a) and in the trench (20,21,22), forming a semiconductor body (1) that at least partially fills the trench (20,21,22); d) the semiconductor body (1) and the growth substrate (2) are cut through the trench (20,21,22) along the main extension direction (X20,X21,X22), wherein the semiconductor body (1) has a recess (12) in the trench (20,21,22) after process step c), and - a separating element (321, 322) is arranged in the recess (12), wherein - the separating element (321, 322) is designed to exert a separating force on the semiconductor body (1) and / or the growth substrate (2) by means of thermal expansion.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] A method for cutting through an epitaxially grown semiconductor body and a semiconductor chip are described.

[0002] One of the problems to be solved in this case is, among other things, to specify a particularly efficient method for cutting through an epitaxially grown semiconductor body, in particular for singulating such a semiconductor body in semiconductor chips.

[0003] Another task to be solved is, among other things, to specify a semiconductor chip that is particularly reliable to operate.

[0004] These problems are solved in particular by a method according to claim 1 or by a semiconductor chip having the features of claim 16. Further developments of the method and the semiconductor chip are specified in the dependent claims.

[0005] Document US 2007 / 0 066 029 A1 describes a method for fabricating a semiconductor device. Document US 2008 / 0 194 080 A1 describes a method for cutting an optoelectronic semiconductor wafer. Document US 2013 / 0 285 216 A1 describes a low thermal stress semiconductor structure, and Document US 2003 / 0 134 446 A1 describes a method for fabricating a III nitride compound semiconductor and a III nitride compound semiconductor element.

[0006] In the process for cutting through an epitaxially grown semiconductor body, a growth substrate is provided in process step a) and at least one trench is introduced into the growth substrate by etching from a first principal surface of the growth substrate in process step b). The trench has a principal direction of extension.

[0007] The growth substrate provided in process step a) is designed for the epitaxial deposition of a semiconductor material onto its first main surface. For example, the growth substrate is a wafer. In particular, the growth substrate comprises or consists of sapphire or gallium nitride (GaN).

[0008] In process step b), a mask is applied to the first main surface of the growth substrate, which has a window through which the trench is etched. The geometry of the window, in conjunction with the etching process, determines the geometry of the trench.

[0009] In particular, the mask is designed with a photosensitive lacquer or as a hard mask. The hard mask can be made of materials such as silicon dioxide, silicon nitride, amorphous carbon, tantalum nitride, titanium nitride, titanium, titanium oxide, platinum, or palladium. The trench can be created using a plasma etching process or a wet chemical etching process.

[0010] In process step c), semiconductor material is epitaxially deposited on the first main surface and in the trench, forming a semiconductor body that shapes the trench and at least partially extends into it. In particular, the semiconductor body at least partially fills the trench.

[0011] The semiconductor body comprises, in particular, a stack of semiconductor layers, which, for example, has an n-type region, a p-type region, and an active region located between these two regions. The active region is configured to generate or detect electromagnetic radiation.

[0012] In process step d), the semiconductor body and the growth substrate are cut along the main direction of extension of the trench, in particular through the trench. Specifically, by means of a suitable arrangement of a plurality of trenches relative to one another, the semiconductor body and the growth substrate are separated into a plurality of semiconductor chips. In particular, the semiconductor body is cut substantially in its growth direction.

[0013] After being cut, each part of the semiconductor body has a portion of the n-type layer, a portion of the p-type layer, and a portion of the active region of the semiconductor layer stack.

[0014] In process step d), the semiconductor body is cut, for example, by breaking, with the groove defining a predetermined breaking point for the cutting. Preferably, only the groove defines a predetermined breaking point for the cutting. In particular, the semiconductor body is not scored in the area of ​​the groove beforehand, neither by a laser nor a blade nor a diamond nor any other tool.

[0015] In particular, the procedural steps a), b), c) and d) are carried out in the order mentioned.

[0016] One of the methods described here is based, among other things, on the fact that when a semiconductor body is conventionally cut to separate semiconductor chips, it is, for example, severed or scored using a laser. This process creates so-called slag, which adheres to the outer surfaces of the separated semiconductor chips. If the semiconductor body is made of gallium nitride, for example, the slag contains gallium or gallium oxide and is electrically conductive. The slag can cause short circuits on the semiconductor chip and thus impair its function.

[0017] In the process described here, the semiconductor body is cut along a predetermined breaking point, which is defined by etching and overgrowth. Advantageously, no slag is produced during singulation.

[0018] In one embodiment of the method, in process step b), a mask is placed on the first main surface of the growth substrate, and the shape of the trench along the first main surface is defined by means of the mask. The mask has a window through which the trench is etched.

[0019] The mask is a structured layer with a window in the area where a trench is etched. After the trench is etched, the mask can be completely removed.

[0020] In particular, the mask is made of a material that exhibits exceptionally high selectivity in plasma or wet chemical etching processes. For example, the mask is a hard mask made of amorphous carbon, tantalum nitride, titanium nitride, silicon oxide, or silicon nitride. Advantageously, such a mask is essentially not removed during the etching process, so the window in the mask does not enlarge. This allows for the production of a particularly deep trench with a very narrow width, i.e., a trench with a particularly high aspect ratio.

[0021] Alternatively, the mask is formed with a photosensitive resist in which at least one window is created by exposure and development. In process step b), for example, the resist mask is removed during the etching of the trench in such a way that the window is enlarged. The trench can have a V-shaped cross-section perpendicular to its main direction of extension. In this context, the term "V-shaped" also includes corresponding cross-sections that are not exactly V-shaped, but slightly rounded and thus merely V-shaped. Likewise, the trench can have a rectangular or trapezoidal cross-section perpendicular to its main direction of extension. In this context, the terms "rectangular" and "trapezoidal" also include corresponding cross-sections that are not exactly rectangular or trapezoidal, but have slightly rounded corners and are thus merely rectangular or trapezoidal, respectively.They are trapezoidal in shape. In principle, any cross-sectional shape of the trench is suitable.

[0022] According to one embodiment, after process step c), the semiconductor body has a depression on a front side facing away from the growth substrate, wherein the depression, viewed in the growth direction of the semiconductor body, overlaps with the trench and has a V-shaped cross-section perpendicular to the main extension direction of the trench. Regarding the "V-shape," what was said above about the trench applies analogously.

[0023] In particular, the depression has a similar depth to the corresponding trench. Specifically, the depth of the depression is less than the depth of the trench.

[0024] In one embodiment of the method, the depth of the depression is greater than the thickness of the semiconductor body and the depression extends into the trench.

[0025] In one embodiment of the method according to the invention, a recess is formed in the semiconductor body in process step c). Thus, after process step c), the semiconductor body has a recess. This recess is created because the growth process of the semiconductor body is conducted in such a way that, during the growth of the semiconductor body over the trench, the trench is not yet completely filled with semiconductor material.

[0026] For example, the geometry of the trench's cross-section can be used to determine whether or not a recess is formed during the semiconductor body's growth. For instance, a trench in which a recess is formed during semiconductor body growth has a cross-section with a greater depth than width. For example, the trench's cross-section has an aspect ratio of at least 1:1, preferably at least 10:1.

[0027] In one embodiment, the recess is bounded on all sides by the material of the semiconductor body. In other words, the recess is entirely contained within the material of the semiconductor body. The recess can be filled with a gas.

[0028] Advantageously, the mechanical stability of the semiconductor body, in particular of the composite of semiconductor body and growth substrate, is reduced along the recess, so that the recess defines a predetermined breaking point of the composite of semiconductor body and growth substrate.

[0029] In one embodiment, an absorber structure is arranged in the trench. In particular, the absorber structure is arranged in the recess of the semiconductor body. The absorber structure is formed with an absorber material, and the absorber material exhibits a higher absorption capacity for electromagnetic radiation in a predetermined electromagnetic wavelength range than the material of the semiconductor body and / or the growth substrate. For example, the absorber material completely fills the trench or the recess described above. In process step d), the absorber structure is heated by irradiation, and the bond between the semiconductor body and the growth substrate is severed along the absorber structure.

[0030] The absorber structure is illuminated with electromagnetic radiation in a wavelength range where the absorption coefficient of the absorber material is higher than that of the growth substrate and / or the semiconductor body. Due to the higher absorption of electromagnetic radiation in the absorber structure, it heats up more than the semiconductor body and the growth substrate. This causes the absorber structure to expand more than the growth substrate and the semiconductor body, resulting in mechanical stresses along the absorber structure in both the growth substrate and the semiconductor body. These mechanical stresses can eventually cause the semiconductor body to be severed along the absorber material.

[0031] Advantageously, the increased absorption capacity of the absorber material allows for selective heating of the absorber structure by means of electromagnetic radiation, thereby severing the semiconductor body by means of thermomechanical stresses along the absorber structure. In particular, the absorber material can be a dielectric or a metal. Examples of absorber materials include silicon nitride (SiN), titanium (Ti), titanium tungsten nitride (TiWN), gold (Au), titanium nitride (TiN), or benzocyclobutene (BCB).

[0032] According to at least one embodiment, in process step d) the absorber structure and areas of the semiconductor body and the growth substrate adjacent to the absorber structure are irradiated. For example, the composite of semiconductor body and growth substrate is irradiated over its entire surface by the front side of the semiconductor body facing away from the growth substrate and / or by the back side of the growth substrate facing away from the semiconductor body, without focusing the electromagnetic radiation specifically on the absorber structure. Alternatively, the front side of the semiconductor body or the back side of the growth substrate, including at least a portion of the absorber structure, can be locally irradiated using laser radiation.

[0033] For example, the absorber structure along the cross-sectional area of ​​the trench has a width of at most 15 µm, preferably at most 5 µm. In particular, the intensity of the electromagnetic radiation for heating the absorber structure in process step d) is selected such that the semiconductor body and / or the growth substrate are not melted.

[0034] For example, the material of the semiconductor body and / or the growth substrate is essentially transparent to the electromagnetic radiation used. The absorber structure precisely cuts through the semiconductor body along its length, even if areas outside the absorber structure are also irradiated. Thus, the separation zone of the semiconductor body and growth substrate is advantageously determined not by the beam geometry of the electromagnetic radiation, but by the geometry of the absorber structure.

[0035] According to one embodiment, the absorber structure projects beyond the semiconductor body in the growth direction. Advantageously, this simplifies the irradiation of the absorber structure.

[0036] According to at least one embodiment of the method, the absorber structure completely covers a floor area of ​​the trench. In particular, the absorber structure completely covers the floor area of ​​the trench before process step d).

[0037] In another embodiment, the absorber structure is completely covered with semiconductor material on a side facing away from the growth substrate. This allows a predetermined breaking point to be defined on a side of the semiconductor body facing the growth substrate.

[0038] According to another embodiment, a strain structure is arranged in the recess, wherein the strain structure is formed with a strain material, and the strain material has a larger coefficient of thermal expansion than the material of the semiconductor body and / or the growth substrate. According to this embodiment, in process step d), the temperature of the assembly comprising the semiconductor body, the growth substrate, and the strain structure is changed, and the assembly is cut along the strain structure. In particular, the entire assembly is heated such that the temperature of the growth substrate, the semiconductor body, and the strain structure rises substantially homogeneously. Thus, temperature gradients in the semiconductor body and / or growth substrate can be counteracted during cutting by means of the strain structure.Advantageously, the temperature change mainly causes mechanical stresses in areas adjacent to the strain structure, so that a targeted cutting of the semiconductor body along the strain structure takes place.

[0039] According to the invention, a separating element is arranged in the recess, which is configured to exert a separating force on the semiconductor body and / or the growth substrate by means of thermal expansion. In process step d), the semiconductor body and the growth substrate are separated by means of the separating force. In particular, in process step d), the separating element expands more than the material of the semiconductor body and / or the growth substrate surrounding the separating element due to a temperature change. The greater thermal expansion in process step d) can be achieved by selectively changing the temperature of the separating element.

[0040] Alternatively or additionally, the separating element can be formed with a material having a coefficient of thermal expansion that differs from that of the semiconductor body and / or the growth substrate surrounding the separating element. For example, the coefficient of thermal expansion of the separating element differs from the coefficient of thermal expansion of the semiconductor body and / or the growth substrate by at least a factor of 1.5, preferably by at least a factor of 2. In particular, the separating element is formed by the absorber structure and / or the expansion structure. The semiconductor chip, for example, has the material of the separating element on its side faces. According to one embodiment of the method, in process step b), a plurality of grooves are introduced into the growth substrate.The trenches run with their respective principal extension directions along grid lines of a virtual periodic grid lying on the first principal surface, along which the semiconductor body is separated into semiconductor chips in process step d). For example, several separate trenches are arranged along one grid line. The trenches are created simultaneously in process step b).

[0041] In the preceding embodiment, the plurality of trenches comprises, for example, first trenches and second trenches. The principal direction of extension of first trenches is transverse, in particular perpendicular, to the principal direction of extension of second trenches. First trenches and second trenches do not intersect each other. For example, first trenches run parallel to each other and second trenches run parallel to each other. For example, grid lines on which first trenches run are free of second trenches and / or grid lines on which second trenches run are free of first trenches.

[0042] Furthermore, a semiconductor chip is specified. In particular, the semiconductor chip is manufactured using a method described herein. This means that all features disclosed for the method are also disclosed for the semiconductor chip, and vice versa.

[0043] The semiconductor chip in question is, for example, an optoelectronic semiconductor chip, in particular a semiconductor laser diode. For instance, the semiconductor chip is based on the gallium nitride compound semiconductor material system.

[0044] The semiconductor chip comprises a top surface and several side surfaces. At least some of the side surfaces, in particular all side surfaces of the semiconductor chip, each have at least one chamfered section. The chamfered section borders the top surface of the semiconductor chip and is part of the front face of the semiconductor body produced by epitaxy. The surface of the chamfered section is therefore produced by epitaxy; that is, it is not produced by a material removal process on a previously epitaxially produced layer of material.

[0045] The beveled sections are therefore each part of a depression that was formed in the front face of the semiconductor body during epitaxy.

[0046] The remaining sections of the side surfaces are at least partially areas that resulted from cutting the composite of semiconductor body and growth substrate using one of the previously described methods. The semiconductor chip is advantageously free of melting slag, which would have been produced, for example, during singulation using laser radiation.

[0047] According to one embodiment, the side surfaces have a residual material from an absorber structure and / or an expansion structure. In particular, the side surfaces are at least partially formed with the material of the absorber structure or the expansion structure.

[0048] For example, the chamfered section has an angle of 60° and / or 120° relative to the growth direction of the semiconductor body. In particular, the side surface in the chamfered section is epitaxially formed, so that it is particularly smooth.

[0049] Further advantages and advantageous embodiments and developments of the method for cutting through an epitaxially grown semiconductor body and the semiconductor chip result from the following exemplary embodiments shown in connection with the figures.

[0050] They show: Fig. 1A, Fig. 1B and Fig. 1C, schematic representations of top views of the first main surface of a growth substrate used in a method for cutting a semiconductor body according to an embodiment; Fig. 2A, Fig. 2B, Fig. 2C, Fig. 3A, Fig. 3B, Fig. 3C, Fig. 3D, Fig. 4A, Fig. 4B, Fig. 5, Fig. 6 and Fig. 7. Schematic representations of sectional views of embodiments and comparative examples of a growth substrate and a semiconductor body at various stages of a process described herein; Fig. 8 a schematic representation of a side view of an example of a semiconductor chip; and Fig. Figure 9, a schematic representation of a side view of an embodiment of a semiconductor chip.

[0051] Identical, similar, or equivalent elements in the figures are each marked with the same reference symbols. The figures and the relative sizes of the elements depicted within them are not to be considered to scale. Rather, individual elements may be exaggerated for clarity and / or to improve representation.

[0052] The Fig. Figure 1A shows a schematic top view of a first principal surface 2a of a growth substrate 2, which was prepared in process step a) using one of the processes described above and provided in process step b) using one of the processes described above with a plurality of trenches 20 whose principal extension directions X21 are parallel to each other. The trenches 20 are produced by etching, in particular by plasma etching, using a mask (for example, as described above) and have a V-shaped or preferably a rectangular or trapezoidal cross-section perpendicular to the principal extension direction X21. They lie on parallel first grid lines 101 of a regularly orthogonal virtual grid located in the first principal surface 2a of the growth substrate 2 and do not intersect its second grid lines 102, which are perpendicular to the principal extension direction X21.The trenches 20 are thus arranged periodically at regular intervals along the first main area 2a.

[0053] In process step b), a mask 201 is placed on the first main surface 2a of the growth substrate 2. The mask 201 has a window 203 through which the trench is etched.

[0054] The growth substrate 2 of Fig. 1B differs from that of the Fig. 1A by forming first trenches 21 and second trenches 22 in it, for example by means of one of the etching processes mentioned above.

[0055] The main extension direction X21 of the first trenches 21 runs perpendicular to the main extension direction X22 of the second trenches 22. The second trenches 22 run along the second grid lines 102 of the regularly orthogonal virtual grid located in the first main surface 2a of the growing substrate 2. The first trenches 21 and the second trenches 22 do not intersect each other.

[0056] The spacing between parallel trenches 21, 22 is, for example, between 10 µm and 2000 µm, preferably between 100 µm and 200 µm. The width of the trenches 21, 22 perpendicular to their main direction of extension X21, X22 is between 1 µm and 50 µm, preferably between 1 µm and 20 µm.

[0057] The growth substrate 2 of Fig. 1C differs from that of the Fig. 1B by the fact that the first trenches 21 and the second trenches 22, when viewed from above on the growing substrate 2, do not have a rectangular contour, but each has a diamond-shaped contour or, in particular, a polygonal contour.

[0058] The Fig. Figure 2A shows a schematic sectional view of an embodiment of a growth substrate 2 in which a trench 20 is arranged. The trench is introduced into the growth substrate 2 from the first main surface 2a in process step b) by means of etching. In particular, the trench is produced using a hard mask, which was completely removed after etching.

[0059] In a process step c), as described in Fig. Figure 2B schematically illustrates how the semiconductor body 1 is epitaxially deposited on the first main surface 2a and in the area of ​​the trench 20, with the semiconductor body 1 filling the trench 20. In an alternative embodiment, the trench 20 is only partially filled by the semiconductor body 1. The inner surfaces of the trench 20 are completely covered with the material of the semiconductor body 1.

[0060] The semiconductor body 1 is in direct contact with the growth substrate 2 at the first main surface 2a and in the area of ​​the trench 20. The semiconductor body 1 has grown on the growth substrate 2 along the growth direction Z. On a front surface 10a of the semiconductor body 1 facing away from the growth substrate 2, it has a depression 11 which overlaps with the trench 20 along the growth direction Z. Perpendicular to the main extension direction X21, X22 of the trench 20, the depression 11 has a V-shaped cross-section. For example, the depression 11 defines a predetermined breaking point in the semiconductor body 1, along which the growth substrate 2 and the semiconductor body 1 are separated by breaking in a process step d).

[0061] The Fig. 2C shows a Fig. 2B Alternative embodiment of a composite consisting of growth substrate 2 and semiconductor body 1, in which, in addition to the recess 11, a recess 12 has been formed in the area of ​​the groove 20 in the semiconductor body 1. The recess 12 is bounded on all sides by the material of the semiconductor body 1. In particular, according to an alternative embodiment, the recess 12 can be partially bounded by the growth substrate 2. For example, the recess 12 is filled with gas. When the composite consisting of growth substrate 2 and semiconductor body 1 is cut in process step d), the semiconductor body is cut along the recess 12 and the recess 11.

[0062] The Fig. Figure 3A shows a schematic sectional view of another embodiment of a growth substrate 2 with a trench 20. The trench 20 has a trapezoidal cross-section perpendicular to its main direction of extension. The geometry of the trench 20 was defined, for example, by means of a lacquer mask, and the trench 20 was etched using an anisotropic etching process. The anisotropic etching process in combination with a lacquer mask results in a trapezoidal cross-sectional profile of the trench 20.

[0063] The Fig. Figure 3B shows a schematic sectional view after the corresponding process steps a), b), and c). In the area of ​​the trench 20 and on the first main surface 2a of the growth substrate 2, a semiconductor body 1 has grown in a growth direction Z. A depression 11 has formed in the area of ​​the trench 20 on the front face 10a of the semiconductor body 1. The depression 11 has a V-shaped cross-section. Advantageously, the semiconductor body 1 can be cut particularly easily along the depression 11.

[0064] The Fig. Figure 3C shows a further embodiment in which the front surface 10a of the semiconductor body 1 is planar. During the growth of the semiconductor body 1, a recess 12 was formed in it, which is surrounded on all sides by the material of the semiconductor body 1. The recess 12 is filled with gas. Advantageously, the recess 12 defines a predetermined breaking point of the semiconductor body 1, along which the semiconductor body 1 can be cut with particular ease. In addition, the semiconductor body 1 with a planar front surface 10a can be processed with particular ease.

[0065] The Fig. The 3D model shows a comparative form. The semiconductor body 1 is planar on the front face 10a, and the groove 20 is completely filled with the material of the semiconductor body 1. In particular, the semiconductor body 1 has no recess 12 in the area of ​​the groove 20.

[0066] The Fig. Figure 4A shows an embodiment of a growth substrate 2 with a rectangular trench 20. An absorber structure 321 is arranged in the trench 20. Alternatively, an expansion structure 322 can be arranged in the trench 20 instead of the absorber structure 321. Exemplary materials for the absorber structure and the expansion structure, as well as their functionalities, are given above.

[0067] In process step c), as described in Fig. Figure 4B illustrates the epitaxial deposition of the semiconductor body 1, with the trench 20 being filled with the material of the semiconductor body 1. In particular, the absorber structure 321 or the strain structure 322 is completely covered by the semiconductor body 1. Consequently, the semiconductor body 1 has a recess 12 in which the absorber structure 321 or the strain structure 322 is arranged. In particular, the recess 12 is completely filled with the absorber material of the absorber structure 321 or the strain material of the strain structure 322.

[0068] The exemplary embodiment of Fig. 5 differs from that of the Fig. 4B by the fact that the absorber structure 321 or the strain structure 322 projects beyond the front face 10a of the semiconductor body 1. In particular, the absorber structure 321 or the strain structure 322 has a width B. The width B is, for example, less than a width S of the trench 20. In particular, the width B of the absorber structure 321 or the strain structure 322 is between 1 µm and 5 µm.

[0069] The Fig. Figure 6 shows a schematic cross-sectional view of a semiconductor body 1, which is cut through in process step d) according to an embodiment of the method described herein. In this process step, the semiconductor body 1 and the growth substrate 2 are cut through along the trench 20. The absorber material of the absorber structure 321 has a higher absorption capacity for electromagnetic radiation L in a predetermined wavelength range than the material of the semiconductor body 1 and / or the growth substrate 2. In process step d), the absorber structure 321 is selectively heated by irradiation. The absorber structure 321 expands more than the surrounding material of the growth substrate 2 and / or the semiconductor body 1. This causes the absorber material to generate mechanical stresses in the semiconductor body 1 and in the growth substrate, which cut through the semiconductor body 1 along the absorber structure 321.

[0070] The Fig. Figure 7 shows a schematic cross-sectional view of a semiconductor body 1, which is cut along the trench 20 in process step d). In this embodiment, the recess 12 is completely filled with the expansion structure 322. In particular, the trench 20 has a bottom surface 20a, which is completely covered with the expansion material of the expansion structure 322. The expansion structure 322 has a higher coefficient of thermal expansion than the growth substrate 2 and the semiconductor body 1. In process step d), the temperature T of the assembly comprising the semiconductor body 1, the growth substrate 2, and the expansion structure 322 is increased. The expansion material of the expansion structure 322 expands more than the semiconductor body 1 and the growth substrate 2. This generates mechanical stresses in the assembly, which cut through the semiconductor body along the expansion structure 322.

[0071] The Fig. Figure 8 shows a schematic cross-sectional view of a semiconductor chip 10, which was separated using a conventional method in which the semiconductor body was at least partially cut by laser radiation. The semiconductor chip 10 comprises a top surface 10b and a side surface 10c adjacent to the top surface 10b. Slag 9 is formed on at least one of the side surfaces 10c. The slag 9 is formed, for example, with gallium and / or gallium oxide. In particular, the slag 9 can come into contact with electrically conductive structures during the assembly of the semiconductor chip and thus cause a short circuit of the semiconductor chip 10.

[0072] The Fig.Figure 9 shows a schematic cross-sectional view of a semiconductor chip 10 according to one embodiment. In particular, the semiconductor chip 10 is a laser diode. Specifically, the semiconductor chip is manufactured using the method described here for cutting a semiconductor body. The semiconductor chip 10 has a top surface 10b, which borders side surfaces 10c. Each side surface 10c has a chamfered section 100c, the chamfered section 100c being adjacent to the top surface 10b. The chamfered section 100c is produced by epitaxy, i.e., it is not produced by a material removal process on the previously epitaxically produced material layer. Depending on the configuration of the method according to one of the embodiments described above, the side surface 10c may contain traces of absorber material and / or strain material.The beveled section 100c has an angle W relative to the growth direction Z of the semiconductor body 1. The angle W is determined, for example, by the crystalline structure of the semiconductor body 1 and is, for example, 60° or 120°.

Claims

[1] Method for cutting through an epitaxially grown semiconductor body (1) wherein a) a growth substrate (2) is provided; b) by etching at least one trench (20,21,22) with a main extension direction (X20,X21,X22) is introduced into the growth substrate (2) from a first main surface (2a) of the growth substrate (2); c) a semiconductor material is epitaxially deposited on the first main surface (2a) and in the trench (20,21,22), forming a semiconductor body (1) that at least partially fills the trench (20,21,22); d) the semiconductor body (1) and the growth substrate (2) are cut through the trench (20,21,22) along the main extension direction (X20,X21,X22), wherein the semiconductor body (1) has a recess (12) in the trench (20,21,22) after process step c), and - a separating element (321, 322) is arranged in the recess (12), wherein - the separating element (321, 322) is designed to exert a separating force on the semiconductor body (1) and / or the growth substrate (2) by means of thermal expansion. [2] Method according to claim 1, wherein only the trench (20,21,22) defines a predetermined breaking point for cutting. [3] Method according to any one of the preceding claims, wherein - in process step b) a mask (201) is arranged on the first main surface (2a) of the growth substrate (2), and - the mask (201) has a window (203) through which the trench is etched. [4] Method according to any one of the preceding claims, wherein - the semiconductor body (1) has a depression (11) on a front side (10a) facing away from the growth substrate (2) after process step c), and - the depression (11) in the growth direction (Z) of the semiconductor body (1) overlaps with the trench (20, 21, 22) and has a v-shaped cross-section perpendicular to the main extension direction (X20, X21, X22) of the trench (20,21,22). [5] Method according to one of the preceding claims, wherein the recess (12) is bounded on all sides by the material of the semiconductor body (1). [6] Method according to any one of the preceding claims, wherein - an absorber structure (321) is arranged in the recess (12), - the absorber structure (321) is formed with an absorber material that has a higher absorption capacity for electromagnetic radiation in a specified wavelength range than the material of the semiconductor body (1) and / or the growth substrate (2), - in process step d) the absorber structure (321) is heated by means of irradiation. [7] Method according to claim 6, wherein the absorber structure (321) and areas of the semiconductor body (1) and the growth substrate (2) adjacent to the absorber structure (321) are irradiated. [8] Method according to one of claims 6 and 7, wherein the absorber structure (321) extends beyond the semiconductor body (1) in the growth direction of the semiconductor body (1). [9] Method according to any one of claims 6 to 8, wherein the absorber structure (321) completely covers a bottom surface (20a) of the trench (20, 21, 22). [10] Method according to any of the preceding claims, wherein - a strain relief structure (321) is arranged in the recess (12), wherein - the strain structure (321) is formed with a strain material, wherein the strain material has a larger coefficient of thermal expansion than the material of the semiconductor body (1) and / or the growth substrate (2), - in process step d) the temperature of the composite with the semiconductor body (1), the growth substrate (2) and the strain structure (322) is changed, and - the bond between the semiconductor body (1) and the growth substrate (2) is severed along the strain structure (322). [11] Method according to one of the preceding claims, wherein in method step b) a plurality of trenches (20,21,22) are introduced into the growing substrate (2) whose principal extension directions (X20,X21,X22) run along grid lines (101,102) of a virtual periodic grid which lies in the first principal surface (2a) of the growing substrate (2). [12] Method according to claim 11, wherein - the multitude of ditches includes first ditches (21) and second ditches (22), - the main extension direction (X21) of first trenches (21) runs perpendicular to the main extension direction (X22) of second trenches (22), and - first trenches (21) and second trenches (22) do not cross each other. [13] Method according to any one of the preceding claims, wherein - in process step d) the semiconductor body (1) and the growth substrate (2) are cut through by means of the separating force. [14] Method according to any of the preceding claims, wherein the recess is at least partially limited by the growth substrate. [15] Method according to any of the preceding claims, wherein the separating element comprises a solid or a liquid. [16] Semiconductor chip (10) with a top surface (10b) and several side surfaces (10c), wherein - the side surfaces (10c) each have a chamfered section (100c), wherein - the beveled section (100c) borders the top surface (10a), and - the surface of the beveled section (100c) is produced by means of epitaxy, and - in which the side surfaces (10c) have a separating element.

Citation Information

Patent Citations

  • Production method of III nitride compound semiconductor and III nitride compound semiconductor element

    US20030134446A1

  • Method for fabrication of semiconductor device

    US20070066029A1

  • Method and product for dicing an optoelectronic semiconductor wafer

    US20080194080A1

  • Semiconductor structure having low thermal stress

    US20130285216A1