EDGE-EMITTING SEMICONDUCTOR LASER DIODE AND METHOD FOR PRODUCING SUCH A DIODE

Abstract

Edge-emitting semiconductor laser diode (100) comprising: - a growth substrate (2), - on the growth substrate (2) a semiconductor layer sequence (1) comprising an active layer (13), an etch stop layer (7), a first waveguide layer (112) and a second waveguide layer (121), and - two opposing facets (4), wherein - the facets (4) limit the semiconductor layer sequence (1) in a lateral direction (L), - the semiconductor layer sequence (1) comprises two edge regions (R) bordering the facets (4) and a central region (Z) directly bordering both edge regions (R), - within the boundary regions (R) the volume fraction of the active layer (13) in the semiconductor layer sequence (1) is lower than in the central region (Z) - the active layer (13) is spaced away from a facet (4), and - the distance of the active layer (13) to the facet (4) varies along a direction parallel to this facet (4) and perpendicular to a growth direction of the semiconductor layer sequence (1), - the first waveguide layer (112) is arranged between the active layer (13) and the growth substrate (2), - the second waveguide layer (121) is arranged on a side of the active layer (13) facing away from the growth substrate (2), is directly adjacent to the active layer (13) and extends to the two facets (4), and - the etch stop layer (7) is arranged between the first waveguide layer (112) and the active layer (13).

Description

[0001] An edge-emitting semiconductor laser diode is described. Furthermore, a method for fabricating an edge-emitting semiconductor laser diode is described.

[0002] Edge-emitting semiconductor laser diodes and methods for manufacturing an edge-emitting semiconductor laser diode are known from documents US 4 546 480 A, US 5 976 904 A, DE 10 2013 211 851 A1, DE 10 2008 025 922 A1, US 2013 / 0 343 419 A1, JP H06 338 657 A, JP 2001 024 281 A, JP 2003 017 809 A and US 2001 / 0 010 701 A1.

[0003] One task to be solved is to specify an edge-emitting semiconductor laser diode characterized by a particularly low failure rate. Another task is to specify a method for manufacturing such an edge-emitting semiconductor laser diode.

[0004] These tasks are solved by an object having the features of independent claim 1 or by a method having the features of independent claim 11. Advantageous embodiments and further developments are the subject of the respective dependent claims.

[0005] The edge-emitting semiconductor laser diode comprises a growth substrate. For example, the growth substrate comprises a semiconductor material, such as Si, or a semiconductor compound material, such as GaAs or GaN. In particular, the growth substrate is doped, for example, n- or p-doped. Preferably, the growth substrate comprises or is formed from n-doped GaAs.

[0006] The edge-emitting semiconductor laser diode comprises a sequence of semiconductor layers on the growth substrate, with an active layer, a first waveguide layer and a second waveguide layer, wherein the first waveguide layer is arranged between the growth substrate and the active layer and the second waveguide layer is arranged on a side of the active layer facing away from the growth substrate, directly adjacent to the active layer and extending to the two facets.

[0007] The semiconductor layer sequence is based, for example, on a III-V compound semiconductor material. This semiconductor material could be, for example, a nitride compound semiconductor material, such as aluminum. n In 1-n-m Ga m N, or a phosphide compound semiconductor material, such as Al n In 1-n-m Ga m P, or an arsenide compound semiconductor material, such as Al n In 1-n-m Gam As or Al n In 1-n-m Ga m AsP, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1, and m + n ≤ 1. Alternatively, it can be an antimonide compound semiconductor material. The semiconductor layer sequence can contain dopants and additional components. For the sake of simplicity, however, only the essential components of the crystal lattice of the semiconductor layer sequence, i.e., Al, As, Ga, In, N, or P, are specified, even though these may be partially replaced and / or supplemented by small amounts of other substances. Preferably, the semiconductor layer sequence is based on AlGaAs.

[0008] The active layer serves to generate electromagnetic radiation. The active layer comprises, in particular, at least one quantum well structure in the form of a single quantum well (SQW) or a multi-quantum well (MQW). Additionally, the active layer comprises one, preferably several, secondary well structures. Preferably, the semiconductor layer sequence comprises one, in particular exactly one, contiguous active layer. For example, the active layer comprises In. In particular, the active layer comprises only In, while the remaining semiconductor layer sequence is free of In.

[0009] For example, during normal operation, the semiconductor laser diode generates electromagnetic radiation in the blue, green, or red spectral range, or in the UV range. Preferably, radiation in the IR range is generated.

[0010] For example, the semiconductor layer sequence comprises a p-type material and an n-type material, with the active layer located between the p-type and n-type materials. For example, the n-type material is located on the side of the active layer facing the growth substrate. Alternatively, the n-type material is located on the side of the active layer facing away from the growth substrate.

[0011] In particular, the p-type and n-type materials each comprise a cladding layer and a waveguide layer, with the waveguide layers bordering the active layer. Alternatively, the waveguide layers can be undoped.

[0012] The edge-emitting semiconductor laser diode comprises two opposing facets, which define the lateral boundary of the semiconductor layer sequence. Here and in the following, a "lateral direction" is understood to be a direction parallel to a principal plane of extension of the semiconductor layer sequence. For example, the facets extend transversely, preferably perpendicularly, to the principal plane of extension of the semiconductor layer sequence. In particular, the facets form side surfaces of the semiconductor layer sequence. A semiconductor laser diode is preferably produced by singulation from a wafer stack. The facets are then formed by the fracture edges resulting from the singulation process.

[0013] Preferably, the edge-emitting semiconductor laser diode emits a large proportion of its total emitted radiation via one or both facets. In particular, the semiconductor laser diode emits more than 50%, more than 70%, or more than 85% of its total emitted radiation via at least one facet in the form of laser radiation. Specifically, a portion of the light is reflected at the facets. Thus, a laser resonator is formed between the facets, while the semiconductor layer sequence constitutes the active laser medium of the semiconductor laser diode.

[0014] In this and the following, a semiconductor laser diode is understood to be a separately handleable and electrically contactable element. A semiconductor laser diode preferably comprises exactly one originally contiguous region of the semiconductor layer sequence grown in the wafer composite. The semiconductor layer sequence of the semiconductor laser diode is preferably contiguous. The lateral extent of the semiconductor laser diode, measured parallel to the main plane of extension of the semiconductor layer sequence, is, for example, at most 5% or at most 10% larger than the lateral extent of the semiconductor layer sequence.

[0015] The semiconductor layer sequence comprises two edge regions bordering the facets and a central region directly bordering both edge regions. In particular, the central region is thus located between the two edge regions. Preferably, an extension of the edge regions and the central region in directions parallel to the facets corresponds to an extension of the semiconductor layer sequence in the same direction. Specifically, virtual dividing lines, which separate the central region from the edge regions and thus mark the boundary of the regions, run perpendicular to the principal plane of extension of the semiconductor layer sequence or parallel to the facets. Measured in the direction perpendicular to the facets, the edge regions each have a width of, for example, at least 1 µm, at least 2 µm, at least 5 µm, at least 10 µm, at least 20 µm, or at least 50 µm. Alternatively or additionally, the width is at most 100 µm.

[0016] Within the edge regions, the volume fraction of the active layer in the semiconductor layer sequence is smaller than in the central region. For example, the volume fraction of the active layer within the edge regions is at most two-thirds, half, or one-third of that in the central region. For example, the active layer within the edge regions has a smaller mean or maximum thickness, measured as its extent perpendicular to the principal plane of the semiconductor layer sequence, than in the central region. For example, the maximum thickness in the edge regions is smaller than the mean thickness in the central region. Alternatively or additionally, the active layer in the edge regions has fewer quantum wells than in the central region.In the case that only the active layer contains In, for example, the indium content of the semiconductor layer sequence within the edge regions is lower, for example at most half as large as in the central region.

[0017] In at least one embodiment, the edge-emitting semiconductor laser diode comprises a growth substrate, a semiconductor layer sequence with an active layer on the growth substrate, and two opposing facets. The facets define the semiconductor layer sequence in a lateral direction. The semiconductor layer sequence comprises two edge regions adjacent to the facets and a central region directly adjacent to both edge regions. Within the edge regions, the volume fraction of the active layer in the semiconductor layer sequence is smaller than in the central region.

[0018] The following considerations underlie the design of the edge-emitting semiconductor laser diode described here. To achieve a low failure rate of the semiconductor laser diode, it is necessary to avoid stresses on the facets, such as thermal stresses and strains. Such stresses can arise due to high temperatures caused by high power densities and luminescent and non-luminescent recombination in the active layer near the facets. These high temperatures can also lead to thermally induced strains between the semiconductor layer sequence and adjacent materials, such as mirrors. Failure of the component in the mirror region is referred to as "catastrophic optical mirror damage" (COMD).

[0019] To reduce the stress on the facets, the excitation of the active layer in the facet region could be suppressed. For example, in so-called "impurity-induced intermixing," foreign atoms such as Zn or Si are introduced into the active layer in the facet region via diffusion. These foreign atoms reduce the conductivity and recombination rate in this region due to an increased band gap. Alternatively, so-called "impurity-free intermixing" can be used to achieve mixing of the active layer with the adjacent semiconductor material. This increases the band gap in the intermingled region, which in turn can reduce the recombination rate.

[0020] An alternative way to reduce the stress on the facets is to prevent current from reaching the active layer in the facet region. For example, an additional insulating layer is incorporated within the semiconductor layer sequence in the facet region. This reduces the power density in the facet region.

[0021] In another alternative, the semiconductor layer sequence in the facet region can be etched several micrometers deep. This removes the active layer. The etched areas can then be overgrown and filled, but without applying a new active layer. However, due to differing growth behavior at the etched edges, this leads to significant interface defects and thickness fluctuations in the etched areas. This can adversely affect both the propagation of the light generated in the active layer within the semiconductor laser diode and the stability of the semiconductor laser diode itself.

[0022] The edge-emitting semiconductor laser diode described here utilizes, among other things, the concept of reducing the volume fraction of the active layer within the semiconductor layer sequence in the facet region. Simultaneously, thickness fluctuations and interface defects are avoided. Advantageously, this leads to lower recombination and thus to lower power densities and consequently to a lower temperature of the semiconductor laser diode in the facet region. This reduces the failure rate of the semiconductor laser diode. Furthermore, the introduction of foreign atoms via diffusion is advantageously avoided. This requires high temperatures that can degrade the semiconductor material. A further advantage over devices with current confinement arises, as light absorption in the active layer in the facet region cannot be prevented in these devices.

[0023] According to at least one embodiment of the edge-emitting semiconductor laser diode, the mean thickness of the semiconductor layer sequence within the edge regions differs from the mean thickness in the central region by at most 50 nm or at most 20 nm. "Mean thickness" here refers to the average extent of the semiconductor layer sequence perpendicular to the principal plane of extension. Alternatively or additionally, the mean thickness of the semiconductor layer sequence within the edge regions differs by at most one-quarter, in particular one-eighth, of the wavelength of the light emitted by the semiconductor laser diode in the semiconductor layer sequence. The difference is thus, for example, at most λ / (4n), in particular at most λ / (8n), where λ is the wavelength of the light emitted by the semiconductor laser diode and n is the refractive index of the semiconductor layer sequence at wavelength λ.Advantageously, a semiconductor laser diode in which the average thickness of the semiconductor layer sequence exhibits such low variation has a particularly high stability.

[0024] According to at least one embodiment, the active layer tapers towards the facets. In particular, the active layer has a substantially constant thickness within the central region. Within the edge regions, the thickness of the active layer then decreases, for example, from the central region towards the facets. For example, the active layer tapers across the entire width of the edge region or within the edge region over a distance of at least 1 µm, at least 2 µm, at least 5 µm, at least 10 µm, at least 20 µm, or at least 50 µm. Alternatively or additionally, the active layer tapers over a distance of at most 100 µm. In particular, the active layer tapers continuously.For example, the thickness of the active layer at the ends facing the facets is at most 50%, 30%, or 10% of the mean thickness of the active layer within the central region. Specifically, the mean thickness of the active layer in the central region is between 20 nm and 50 nm inclusive.

[0025] The active layer is separated from one or both facets. For example, within a peripheral region, the active layer is completely removed. Alternatively, the thickness of the active layer decreases continuously from the central region towards the facets, with the active layer disappearing completely at a certain distance from the facets. For example, the distance of the active layer from a facet, measured in a direction perpendicular to that facet, is at least 1 µm, or at least 2 µm, or at least 5 µm, or at least 10 µm, or at least 20 µm, or at least 50 µm. Advantageously, by separating the active layer from the facet, the power density of the semiconductor laser diode at the facet can be kept particularly low, since electromagnetic radiation is neither emitted nor absorbed there.

[0026] The distance between the active layer and a facet varies along a direction parallel to that facet. For example, the distance varies by at least 30% or at least 50% around a mean distance to the facet. The distance varies, for instance, periodically along a direction parallel to the facet. Advantageously, varying the distance between the active layer and a facet allows for the control of a power density distribution within the edge region. This enables the targeted prevention or induction of interface effects during light propagation within the semiconductor laser diode. Preferably, the distance between the active layer and the other facet also varies, with the above principles then applying accordingly.

[0027] According to at least one embodiment, the distance between the active layer and a facet varies linearly. For example, the distance increases or decreases continuously along a direction of the facet. An interface extending transversely to the active layer between the edge region and the central region, or between the active layer and the semiconductor layer sequence, has an angle of at least 70°, 75°, 84°, or 88° with a longitudinal side of the semiconductor layer sequence. Alternatively or additionally, the angle is at most 89.9°. A longitudinal side of the semiconductor layer sequence connects the two opposing facets and extends transversely, and in particular perpendicularly, to the active layer. The longitudinal side is, for example, perpendicular to at least one of the facets. Alternatively or additionally, the angle is at most 89.9°.

[0028] Alternatively, the interface runs perpendicular to the long side. In this case, the facet, to which the distance of the active layer varies, forms an angle with the long side. The angle is, for example, at least 70°, 75°, 84°, or 88°. Alternatively or additionally, the angle is at most 89.9°. The angle is predetermined, for example, by the growth substrate, such as its crystal structure. The angle then forms particularly during singulation, especially by breaking.

[0029] Furthermore, the facet and the interface may be parallel or substantially parallel to each other. In this case, the facet may exhibit irregularities, causing the distance between the facet and the active layer to vary. For example, the facet may be roughened. Advantageously, additional layers, such as mirror layers or passivation layers, can be easily applied to uneven facets. Preferably, the irregularities act as nucleation sites for the overgrowth of further layers over the facet.

[0030] According to at least one embodiment, the edge-emitting semiconductor laser diode comprises two mirrors, the mirrors being arranged at the facets. Preferably, at least one mirror has a reflection coefficient for the radiation generated in the semiconductor layer sequence of at least 90%, at least 95%, or at least 99%. The mirrors are, for example, dielectric mirrors. Advantageously, the use of mirrors allows for the formation of a particularly efficient laser resonator.

[0031] According to at least one embodiment, the semiconductor laser diode comprises passivation layers arranged between the mirrors and the semiconductor layer sequence. In particular, the passivation layers are formed from a crystalline material. For example, the passivation layers comprise or are formed from a II-VI compound material, such as ZnSe. Preferably, the passivation layers are formed from a material having a larger band gap than the active layer. Advantageously, this further increases the distance between the optically active zone of the semiconductor laser diode and the mirrors, thereby increasing reliability.

[0032] For example, the passivation layers passivate and protect the facets of the semiconductor layer sequence. This means that potential reactions of the exposed facets with the environment of the semiconductor layer sequence or, for example, with mirrors, are prevented. Advantageously, this avoids undesirable interface effects at the facets.

[0033] According to at least one embodiment, the edge-emitting semiconductor laser diode comprises a metallic contact layer for electrically contacting the semiconductor layer sequence. The contact layer is arranged on a side of the semiconductor layer sequence facing away from the growth substrate. The contact layer is spaced apart from the two facets. Preferably, the distance between the contact layer and the facets is at least as large as the lateral distance between the active layer and the facets. In particular, the semiconductor layer sequence can be electrically contacted via the contact layer, and in intended operation, the semiconductor layer sequence is energized via the contact layer. Preferably, the first contact layer comprises a metal, such as gold, silver, aluminum, palladium, platinum, titanium, or nickel, or consists of one of these materials or a mixture of these materials.

[0034] For example, the distance between the contact layer and the facets is at least 5 µm, 10 µm, 20 µm, or 50 µm. Alternatively or additionally, the distance between the contact layer and the facets is at most 100 µm. For example, the distance between the contact layer and the facets is at least 1, 2, 5, or 10 times the thickness of the semiconductor layer sequence measured perpendicular to the lateral direction. The active layer is essentially only supplied with current in the region of the contact layer. Comparatively little current is applied in the region of the facets, which advantageously reduces the power density in these areas.

[0035] According to at least one embodiment, the semiconductor layer sequence comprises a sacrificial layer, the sacrificial layer being arranged on a side of the active layer facing away from the growth substrate. The sacrificial layer is present in the central region of the semiconductor layer sequence but not in the peripheral regions. For example, the sacrificial layer has an average thickness between 20 nm and 100 nm inclusive. The sacrificial layer is preferably formed from a material that exhibits a higher etch rate with respect to a given etchant than the rest of the semiconductor layer sequence. For example, the etch rate of the sacrificial layer is at least twice as high or 100 times higher than the etch rate of the rest of the semiconductor layer sequence. Preferably, the sacrificial layer is formed from the same compound semiconductor material as the rest of the semiconductor layer sequence but differs from it in its precise material composition.For example, the semiconductor layer sequence is essentially based on AlGaAs, with the sacrificial layer having a higher aluminum content than the rest of the semiconductor layer sequence. In this case, the aluminum content of the sacrificial layer can be, for example, between 50% and 90%. For instance, a semiconductor laser diode with a sacrificial layer exhibits a reduction in the thickness of the active layer at the edge region with a particularly low and / or predefinable gradient. Advantageously, this allows the refractive index of the semiconductor layer sequence to be selectively varied at the edge region towards the facets, which can improve light propagation within the semiconductor layer sequence.

[0036] The semiconductor layer sequence includes an etch stop layer. The etch stop layer is arranged between the first waveguide layer and the active layer. In particular, the etch stop layer is arranged between the growth substrate and the active layer. For example, the etch stop layer has a thickness, measured perpendicular to the principal plane of extension of the semiconductor layer sequence, of between 5 nm and 15 nm, preferably 10 nm.

[0037] The material system of the semiconductor layer sequence can comprise the components In, Ga, Al, P, and As. In particular, the etch stop layer differs from the rest of the semiconductor layer sequence in its material composition. For example, the etch stop layer differs in the concentration of at least one of these components by at least 10%, preferably by at least 30%, and more preferably by at least 50% compared to the rest of the semiconductor layer sequence. The etch stop layer comprises, for example, 10%, 30%, or 50% more phosphorus than the rest of the semiconductor layer sequence. In particular, the etch stop layer comprises phosphorus, while the rest of the semiconductor layer sequence is phosphorus-free. For example, the etch stop layer is formed with GaP or InGaAlP, and the rest of the semiconductor layer sequence with GaAs or AlGaAs.Preferably, the material composition of the semiconductor layer sequence changes abruptly in steps at interfaces between the etch stop layer and the rest of the semiconductor layer sequence.

[0038] Furthermore, a method for manufacturing an edge-emitting semiconductor laser diode is disclosed. The edge-emitting semiconductor laser diode described here can, in particular, be manufactured by such a method. That is to say, all features disclosed for the edge-emitting semiconductor laser diode are also disclosed for the method, and vice versa.

[0039] The process comprises a step A) in which a first section of a semiconductor layer sequence is grown on a growth substrate, wherein the first section includes an active layer. Specifically, the first section of the semiconductor layer sequence is epitaxially deposited, for example, by metal-organic vapor deposition (MOVPE), metal-organic chemical vapor deposition (MOCVD), or molecular beam epitaxy (MBE). The first section is grown, for example, with a thickness of at least 1000 nm measured perpendicular to the principal plane of extension of the semiconductor layer sequence, wherein the active layer has a thickness between 3 nm and 100 nm inclusive.

[0040] The process comprises, in process step B), the application of a mask layer to a surface of the first section of the semiconductor layer sequence facing away from the growth substrate. Specifically, the surface of the first section of the semiconductor layer sequence is a surface opposite the growth substrate. For example, the mask layer is a photoresist layer.

[0041] In step C), the mask layer is structured with trenches. This exposes the first section of the semiconductor layer sequence within the trenches. For example, the trenches completely penetrate the mask layer in a direction perpendicular to the principal extension plane of the active layer. Specifically, the mask layer is structured using a lithography process. The trenches have principal extension directions that are essentially parallel to each other. The extent of the trenches along their principal extension directions is, for example, identical to within 5% of the extent of the semiconductor layer sequence in that direction. Specifically, the trenches have a width of at least 20 µm and at most 100 µm. "Width" here refers to an extent parallel to the principal extension plane of the active layer and perpendicular to the principal extension direction of the trenches.

[0042] In process step D), an etching process is carried out, whereby an etchant is introduced into the grooves and the active layer is at least partially etched away in the groove area. Specifically, the etching in the groove area extends through the active layer. For example, the first section is etched using wet chemical etching. The etchant is then, for example, an acid such as H3PO4 or H2SO4, or a base such as NH3. Additionally, an oxidizing agent, for example H2O2, is added to the etchant. Alternatively, the first section is etched using dry chemical etching. Advantageously, the ratio of the etch rate of the active layer to the rest of the semiconductor layer sequence can be adjusted by appropriately selecting the etchant and / or its concentration.

[0043] In process step E), the mask layer is removed. Specifically, the entire surface of the first section of the semiconductor layer sequence, facing away from the growth substrate, is cleaned. This surface is then essentially free of material that is not part of the semiconductor layer sequence. Cleaning is carried out, for example, with water, acetone, or isopropanol. If an oxidizing agent such as H₂O₂ is used in process step D), the first section of the semiconductor layer sequence is heated, for example, in a growth reactor, thereby removing the oxide from the surface. In this case, providing an increased supply of arsenic can improve oxide removal. In the case of MOVPE growth, the surface to be cleaned can also be etched by providing CBr₄ to remove the oxide.

[0044] In process step F), a second section of the semiconductor layer sequence is grown over its entire area onto the side of the first section of the semiconductor layer sequence facing away from the growth substrate. This completes the semiconductor layer sequence. For example, the second section of the semiconductor layer sequence is grown using the same processes as the first section. In particular, the material of the second section is based on the same material as the first section.

[0045] In step G), the semiconductor layer sequence and the growth substrate are cut in the region of the active layer etched in step D), with the cut surfaces forming facets of the semiconductor laser diode. For example, a fracture edge is defined by a suitable method, at which the semiconductor layer sequence and the growth substrate are then fractured.

[0046] The advantage of the method described here is, among other things, that the growth process of the semiconductor layer sequence is interrupted after step A). ​​In the following step, only a portion of the first section of the semiconductor layer sequence is etched. The discrepancy in the thickness of the first section between the etched and unetched areas is kept to a minimum. This discrepancy can be compensated for by appropriately selecting the growth parameters during the growth of the second section of the semiconductor layer sequence in step F). For example, the ratio of the elements from the third and fifth main groups of the III-V compound semiconductor material supplied during growth is a suitable parameter. This is therefore a so-called two-step epitaxy process.This advantageously reduces thickness differences that negatively affect the wave propagation of electromagnetic radiation within the semiconductor layer sequence. At the same time, the active layer in the facet region can be at least partially removed.

[0047] According to at least one embodiment of the method, after step A), the active layer is spaced at most 100 nm, 75 nm, or 50 nm away from the cover surface. Preferably, the distance of the active layer to the cover surface is between 5 nm and 20 nm inclusive. For example, the cover surface is part of the active layer. Advantageously, only a shallow etching depth is then required in process step D) to remove the active layer. This allows for a particularly small difference in the thickness of the first section between etched and unetched areas. A small difference can advantageously be compensated for particularly well in process step F).

[0048] According to at least one embodiment of the method, a mirror is arranged on each facet in a further process step. In particular, the mirrors are arranged directly on the facets.

[0049] According to at least one embodiment of the method, a passivation layer is grown onto each of the facets in a further process step. For example, the passivation layer is grown epitaxially. In particular, after this process step, the semiconductor layer sequence is in direct contact with the passivation layer. The growth of the passivation layer is tilted, for example, at an angle between 85° and 95° inclusive, preferably 90°, relative to the growth of the first and second sections of the semiconductor layer sequence. The growth of the passivation layer can be carried out using the same epitaxial methods as the growth of the semiconductor layer sequence, preferably by means of MBE. A method that includes the growth of a passivation layer is a so-called three-stage epitaxial method.Advantageously, by growing a passivation layer on a facet, said facet can be particularly well protected against environmental influences, thereby reducing interface effects.

[0050] According to at least one embodiment of the method, in step D) etching edges are formed in the first section of the semiconductor layer sequence, wherein the etching edges form an angle of less than 90° with the principal extent plane of the active layer, for example, at most 45°, at most 30°, or at most 2°. In particular, the active layer borders the etching edges. For example, the first section is not only eroded in the area of ​​the trenches of the mask layer, but the etchant also spreads laterally, i.e., parallel to the principal extent plane of the active layer. In particular, the etching edge can be selectively influenced by choosing the type and composition of the etchant. Advantageously, the propagation of electromagnetic radiation within the semiconductor layer sequence can be selectively influenced by a suitable choice of the etching edge.

[0051] According to at least one embodiment of the method, the first section comprises a sacrificial layer on a side of the active layer facing away from the growth substrate. The sacrificial layer is formed with a material composition that exhibits a higher etch rate, particularly in the lateral direction, than that of the active layer for the etchant used in step D). For example, the sacrificial layer is grown during step A) with a thickness between 20 nm and 100 nm. For example, the etch rate of the sacrificial layer, particularly laterally, is at least 1.5 times, at least 2 times, or at least 100 times greater than the etch rate of the active layer. Due to the higher etch rate of the sacrificial layer, it is removed more quickly than the active layer in process step D). Thus, for example, a particularly shallow etch edge of, for example, at most 45°, at most 15°, or at most 2° can be achieved.Preferably, the etching edge can be defined particularly precisely by choosing a suitable etching agent in combination with a suitable sacrificial layer.

[0052] According to at least one embodiment of the method, in process step C) the mask layer is structured with trenches of varying widths along a respective principal direction of extension of the trenches. In this context, the width of the trench is its extent perpendicular to the principal direction of extension. For example, the width varies in a range between 20 µm and 100 µm inclusive. For example, the width varies periodically along the principal direction of extension, for instance by at least 30% or at least 50% around a mean width of the trench.

[0053] According to at least one embodiment of the method, the first section of the semiconductor layer sequence comprises an etch stop layer, wherein in step D) etching occurs up to, but not through, the etch stop layer. For example, the etch stop layer is formed from a material which, unlike the material of the rest of the semiconductor layer sequence, is not attacked by the etchant used in step D). Thus, the etch stop layer defines a boundary up to which the first section can be etched. For example, the active layer is based on GaAs and the etch stop layer on GaP. Advantageously, a particularly homogeneous removal of the active layer in step D) can be achieved by means of an etch stop layer.

[0054] According to at least one embodiment of the method, the process steps A) to G) are carried out in the specified order.

[0055] Further advantages and beneficial designs and developments of the edge-emitting semiconductor laser diode are shown in the following examples and embodiments, which are illustrated in conjunction with schematic drawings. Identical, similar, or functionally equivalent elements are designated with the same reference numerals in the figures. The figures and the relative sizes of the elements depicted are not to be considered to scale. Rather, individual elements may be exaggerated for clarity and / or to improve comprehensibility.

[0056] They show: Fig. 1 and Fig. 2 sectional views of various examples and embodiments of the edge-emitting semiconductor laser diode, Fig. 3 to 13 different positions in examples and embodiments of the method for manufacturing an edge-emitting semiconductor laser diode.

[0057] The Fig. Figure 1 shows a schematic sectional view of a first example of an edge-emitting semiconductor laser diode 100. The semiconductor laser diode 100 comprises a growth substrate 2 on which a semiconductor layer sequence 1 has grown. A metallic contact surface 3 is arranged on the side of the semiconductor layer sequence 1 opposite the growth substrate 2. In normal operation, the contact surface 3 serves for electrical contacting the semiconductor layer sequence 1 and for supplying it with current.

[0058] The semiconductor layer sequence 1 comprises a first cladding layer 111, a first waveguide layer 112, an active layer 13, a second waveguide layer 121, and a second cladding layer 122. The semiconductor layer sequence 1 is formed, for example, from a III-V compound semiconductor material, in particular from AlGaAs. The growth substrate 2 is formed, for example, from a semiconductor material such as GaAs. The growth substrate 2, as well as the first cladding layer 111, the first waveguide layer 112, the second waveguide layer 121, and the second cladding layer 122, can be doped. For example, the growth substrate is n-doped. Preferably, in this case, the first cladding layer and the first waveguide layer are also n-doped. Then, the second waveguide layer 121 and the second cladding layer 122 are p-doped. Alternatively, the doping can be reversed.

[0059] In this example, the active layer 13 comprises a quantum well 131 and two sub-wells 132. The sub-wells 132 are, for example, made of AlGaAs. The quantum well 131 specifically comprises InGaAs. In particular, the quantum well 131 is the only layer of the semiconductor layer sequence 1 that contains indium.

[0060] In a lateral direction L, which runs parallel to the principal plane of the semiconductor layer sequence 1, the semiconductor layer sequence 1 is bounded by two opposing facets 4. The facets 4 thus form side surfaces of the semiconductor layer sequence 1. The facets 4 extend, in particular, transversely, preferably perpendicularly, to the principal plane of the semiconductor layer sequence 1.

[0061] In the present example, mirrors 41 are attached to the facets. The mirrors 41 are, for example, dielectric mirrors. The area between the mirrors 41 is a laser resonator, with the semiconductor layer sequence 1 acting as the laser medium.

[0062] The one in Fig. The edge-emitting semiconductor laser diode 100 shown comprises two edge regions R and a central region Z, which is arranged between and borders the edge regions R. The edge regions R border the facets 4. Within the edge regions R, the volume fraction of the active layer 13 in the semiconductor layer sequence 1 is smaller than in the central region Z. In particular, the active layer 13 is recessed from and spaced away from the facets 4. Furthermore, the edge regions R and the central region Z have the same extent in all directions except the lateral direction L. Virtual dividing lines (indicated as dashed lines) between the edge regions R and the central region Z are perpendicular to the lateral direction L.In the present case, the smaller volume fraction results, among other things, from a smaller thickness of the active layer 13 within the boundary regions R, compared to the average thickness of the active layer 13 in the central region. Furthermore, the active layer 13 tapers within the boundary regions R towards the facets 4.

[0063] In the Fig. Figure 2 shows a section of a second example of an edge-emitting semiconductor laser diode 100. The section shows the edge-emitting semiconductor laser diode 100 in the region of a facet 4 and otherwise exhibits essentially the same features as the semiconductor laser diode 100 of the Fig. 1. In contrast to the example of the Fig. However, a passivation layer 42 is arranged between facet 4 and mirror 41. The passivation layer 42 is made of ZnSe, for example.

[0064] The Fig. Figure 3 shows a schematic sectional view of a first position in an example of the process described here. In process step A), a first section 11 of a semiconductor layer sequence 1 was grown on a growth substrate 2. The first section 11 comprises a first cladding layer 111, a first waveguide layer 112, and an active layer 13 with a quantum well structure 131 and secondary well structures 132. In this example, the side of the active layer 13 facing the growth substrate 2 forms a cover surface 11a. The growth substrate 2 is, for example, a wafer comprising a semiconductor material such as GaAs. The first section 11 of the semiconductor layer sequence 1 is based, in particular, on a semiconductor compound material such as AlGaAs. The growth substrate 2, the first cladding layer 111, and the first waveguide layer 112 are n-doped.

[0065] The Fig. Figure 4A shows a second position in the process. First, in process step B), a mask layer 5 was applied to a cover surface 11a of the first section 11 facing away from the growth substrate 2. Specifically, the mask layer 5 is a photoresist layer. Subsequently, in process step C), the mask layer 5 was structured. This structuring creates a groove 51 in the mask layer 5. The first section 11 is exposed in the area of ​​the groove 51.

[0066] Fig. Figure 4B shows a top view of the mask layer 5 of the product made of Fig. 4A. The trenches 51 each have a width perpendicular to their respective main direction of extension of, for example, between 5 µm and 100 µm inclusive.

[0067] The Fig. Figure 5A shows a third position in the process, again as a sectional view of the first section 11. In process step D), the first section 11 was etched. An etchant was applied to the top surface 11a of the first section 11 through trench 51. Subsequently, the first section 11 bis was etched through the active layer 13. The area where the active layer 13 was removed is wider than trench 51. Within the etched area, the active layer 13 has etch edges adjacent to it, which run transversely, at an angle of less than 90°, to the main extension plane of the active layer 13.

[0068] The Fig. 5B shows one of the Fig. 5A alternative position in the proceedings. Fig. 5B essentially shows all the features of the Fig. 5A, with the difference that the active layer 13 has a plurality of quantum well structures 131. The active layer 13 also includes a plurality of secondary well structures 132. The quantum well structures 131 and the secondary well structures 132 are arranged alternately.

[0069] The Fig. Figure 6 shows another position in the procedure according to a first example. In particular, the procedure was subsequently extended to the position of Fig. 5A continued. In step E), the mask layer 5 was removed from the cover surface 11a of the first section 11.

[0070] The Fig. Figure 7 shows a position in the process after the execution of process step F). In this process step, a second section 12 was grown over the entire area of ​​the side of the first section 11 of the semiconductor layer sequence 1 facing away from the growth substrate 2. This completed the semiconductor layer sequence 1. The second section 12 comprises a second waveguide layer 121 and a second cladding layer 122, with the second waveguide layer 121 being located between the active layer 13 and the second cladding layer 122. The second waveguide layer 121 is based, for example, on the same material as the first waveguide layer 112, but has a different doping composition. In this case, the second waveguide layer 121 is p-doped. The second cladding layer 122 and the first cladding layer 111 are related to each other in the same way.Furthermore, a metallic contact layer 3 was applied to the side of the second section 12 facing away from the growth substrate 2.

[0071] In the Fig. Figure 8A shows another position in the process. In process step G), the semiconductor layer sequence 1, the growth substrate 2, and the contact layer 3 are cut along a separation line T. The separation line T runs perpendicular to the main extension direction of the semiconductor layer sequence 1 in the area where the first section 11 was etched during process step D).

[0072] In the Fig. 8B is the product of Fig. Figure 8A shows the process step G). After the semiconductor layer sequence 1, the growth substrate 2, and the contact layer 3 have been cut, the resulting interface forms a facet 4 of a semiconductor laser diode 100. Thus, the Fig. 8B a section of a finished semiconductor laser diode 100.

[0073] In the Fig. 9 is the edge-emitting semiconductor laser diode 100 of the Fig. Figure 8 shows the process after a further, optional step. In this step, a passivation layer 42 was epitaxially grown on facet 4. For example, the passivation layer 42 comprises ZnSe.

[0074] In the Fig. Figure 10 shows a position in the procedure according to an exemplary embodiment. In the Fig. 10 are essentially the same features as in the Fig. Figure 5A is shown, with the difference that the first section 11 comprises an etch stop layer 7. The etch stop layer 7 is based, for example, on GaP or InGaP. In particular, the etch stop layer 7 cannot be substantially removed by the etchant used in process step D).

[0075] The Fig. Figure 11A shows a product after carrying out process step C) according to another example of the process. In contrast to the product of the Fig. In process step A), a sacrificial layer 6 was grown on the side of the active layer 13 facing away from the growth substrate 2. The sacrificial layer 6 has a thickness of, for example, between 20 nm and 100 nm. Preferably, the sacrificial layer is made of the same material as the first cladding layer 111 and the first waveguide layer 112, in this case AlGaAs. In particular, however, the sacrificial layer has a higher aluminum content than the remaining first section 11. Specifically, the sacrificial layer 6 has a higher etch rate than the active layer 13.

[0076] In the Fig. 11B is the product of Fig. Figure 11A shows the execution of process step D). In this step, an etchant is poured into the trench 51 of the mask layer 5. The etchant has already etched away part of the sacrificial layer 6, but has not yet penetrated to the active layer 13.

[0077] In the Fig. 11C is the product of Fig. 11B is shown after process step D) has been completed. In the image section shown, a large part of the sacrificial layer 6 has been removed. In comparison with the Fig. Figure 5A shows that the sacrificial layer results in a significantly flatter etch edge on the active layer. This is primarily a consequence of the lateral widening of the etching area as described in Fig. 11B is shown.

[0078] Fig. Figure 12A shows a product after carrying out process step D) according to another example of the process. Essentially, the Fig. 12A shows the same features as in the Fig. 5A with the difference that the etching edge has an angle α relative to the principal extension plane of the active layer 13, which is 90° within the limits of manufacturing accuracy. For example, a suitable etchant with a negligible lateral etch rate was selected in step D).

[0079] In the Fig. 12B is a product obtained after carrying out process step D) according to another example of the process. In contrast to the product of Fig. 11C has an etching edge at an angle α to the principal extension plane of the active layer 13 between 40° and 50° inclusive. For example, a different etchant was used for the product of Fig. 12B was chosen as the product of the Fig. 11C. Alternatively or additionally, the material composition of the sacrificial layer 6 was selected such that a predetermined ratio of the etch rates of the sacrificial layer 6 and the active layer 13 is achieved. By specifically selecting the ratio of the etch rates and / or the etchant, the angle α of the etch edge can be predetermined.

[0080] In the Fig. 12C shows a product after carrying out process step D) of the process. Essentially, the following are shown in the Fig. 12C showed the same features as in the Fig. 12B with the difference that the etching edge has an angle α that is shallower than the angle α of the Fig. 12B. The angle is, for example, between 15° and 30° inclusive. For example, a different etching agent was chosen in process step D) of the process. Alternatively, the material composition of the sacrificial layer 6 was adjusted.

[0081] In the Fig. Figure 13A shows a product after carrying out process step C) according to a further example of the process in a top view. A trench 51 of the mask layer 5 is visible after the mask layer 5 has been structured. The first section 11 was exposed in the area of ​​the trench 51. The trench has a main direction of extension, through which the dividing line T runs in a later process step. Furthermore, the trench has a width perpendicular to the main direction of extension. The width is shown in the Fig. 13A is constant along the main extension direction.

[0082] In the Fig. 13B is a product at the same stage of the process as in the Fig. 13A shown. Both products have essentially the same characteristics, with the difference that the width of the trench is 51 in the Fig. 13B varies along the main extension direction of trench 51. The width varies periodically, with variations in width of at least 30% of the mean width.

[0083] The product of Fig. 13C exhibits essentially the same characteristics as the product of Fig. 13B with the difference that the width of the trench varies 51 in a zigzag pattern. Reference symbol list 1 Semiconductor layer sequence 2. Growth substrate 3 Contact layer 4 facets 5 mask layers 6. Victimhood layer 7 Etch stop layer 11 first section 11a Cover area 12 second section 13 active layer 41 mirrors 42 Passivation layer 51 trench 100 edge-emitting semiconductor laser diodes 111 first mantle layer 112 first waveguide layer 121 second waveguide layer 122 second mantle layer 131 Quantum well structure 132 Sub-pot structure L lateral direction R edge area T dividing line Z Central Area α angle

Claims

[1] Edge-emitting semiconductor laser diode (100) comprising: - a growth substrate (2), - on the growth substrate (2) a semiconductor layer sequence (1) comprising an active layer (13), an etch stop layer (7), a first waveguide layer (112) and a second waveguide layer (121), and - two opposing facets (4), wherein - the facets (4) limit the semiconductor layer sequence (1) in a lateral direction (L), - the semiconductor layer sequence (1) comprises two edge regions (R) bordering the facets (4) and a central region (Z) directly bordering both edge regions (R), - within the boundary regions (R) the volume fraction of the active layer (13) in the semiconductor layer sequence (1) is lower than in the central region (Z) - the active layer (13) is spaced away from a facet (4), and - the distance of the active layer (13) to the facet (4) varies along a direction parallel to this facet (4) and perpendicular to a growth direction of the semiconductor layer sequence (1), - the first waveguide layer (112) is arranged between the active layer (13) and the growth substrate (2), - the second waveguide layer (121) is arranged on a side of the active layer (13) facing away from the growth substrate (2), is directly adjacent to the active layer (13) and extends to the two facets (4), and - the etch stop layer (7) is arranged between the first waveguide layer (112) and the active layer (13). [2] Edge-emitting semiconductor laser diode (100) according to claim 1, wherein the semiconductor layer sequence (1) within the edge regions (R) each has an average thickness which differs from the average thickness in the central region (Z) by at most 50 nm. [3] Edge-emitting semiconductor laser diode (100) according to claim 1 or 2, wherein the active layer (13) tapers in the direction towards the facets (4). [4] Edge-emitting semiconductor laser diode (100) according to any one of the preceding claims, wherein - the semiconductor laser diode (100) comprises two mirrors (41), and - the mirrors (41) are arranged on the facets (4). [5] Edge-emitting semiconductor laser diode (100) according to claim 4, wherein - the semiconductor laser diode (100) comprises passivation layers (42), and - the passivation layers (42) are arranged between the mirrors (41) and the semiconductor layer sequence (1). [6] Edge-emitting semiconductor laser diode (100) according to any one of the preceding claims, wherein - the semiconductor laser diode (100) comprises a metallic contact layer (3) for electrical contacting the semiconductor layer sequence (1), - the contact layer (3) is arranged on a side of the semiconductor layer sequence (1) facing away from the growth substrate (2), - the contact layer (3) is spaced apart from the two facets (4). [7] Semiconductor laser electrode (100) according to any one of the preceding claims, wherein - the semiconductor layer sequence (1) includes a sacrificial layer (6), - the sacrificial layer (6) is arranged on a side of the active layer (13) facing away from the growth substrate (2), - the sacrificial layer (6) is present in the central region (Z) of the semiconductor layer sequence (1) but not in the peripheral regions (R). [8] Edge-emitting semiconductor laser diode (100) according to one of the preceding claims, wherein - the semiconductor layer sequence (1) on an Al n In 1-n-m Ga m AsP material system based, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1 and m + n ≤ 1, - The material compositions of the etch stop layer (7) and the remaining semiconductor layer sequence (1) differ in the concentration of at least one of the components from In, Ga, Al, P, As by at least 10%. [9] Method for manufacturing an edge-emitting semiconductor laser diode (100) according to any one of the preceding claims, comprising the steps: A) Growing a first section (11) of a semiconductor layer sequence (1) on a growth substrate (2), wherein the first section (11) comprises an active layer (13); B) Applying a mask layer (5) to a cover surface (11a) of the first section (11) of the semiconductor layer sequence (1) facing away from the growth substrate (2); C) Structuring the mask layer (5) with trenches (51), wherein the first section (11) of the semiconductor layer sequence (1) is exposed within the trenches (51); D) Carrying out an etching process, wherein an etching agent is introduced into the trenches (51) and the active layer (13) is at least partially etched away in the area of ​​the trenches (51); E) Removal of the mask layer (5); F) Growing a second section (12) of the semiconductor layer sequence (1) over the entire area onto the side of the first section (11) of the semiconductor layer sequence (1) facing away from the growth substrate (2), thereby completing the semiconductor layer sequence (1); G) Cutting through the semiconductor layer sequence (1) and the growth substrate (2) in the area of ​​the active layer (13) etched away in step D), wherein the separation surfaces form facets of the semiconductor laser diode (100), wherein after step A) the cover surface (11a) is part of the active layer (13). [10] Method according to claim 9, wherein in a further method step a mirror (41) is arranged on each of the facets (4). [11] Method according to one of claims 9 or 10, wherein in a further method step a passivation layer (42) is grown onto each of the facets (4). [12] Method according to any one of claims 9 to 11, wherein in step D) etch edges are formed in the first section (11) of the semiconductor layer sequence (1), the etch edges enclosing an angle (α) of less than 90° with the principal extension plane of the active layer (13). [13] Method according to any one of claims 9 to 12, wherein the first section (11) comprises a sacrificial layer (6) on a side of the active layer (13) facing away from the growth substrate (2), wherein the sacrificial layer (6) is formed with a material composition which has a higher etch rate for the etchant used in step D) than that of the active layer (13). [14] Method according to any one of claims 9 to 13, wherein in process step C) the mask layer (5) is structured with trenches (51) of varying widths along a respective principal extension direction of the trenches (51). [15] Method according to any one of claims 9 to 14, wherein - the first section (11) of the semiconductor layer sequence (1) comprises an etch stop layer (7), wherein - in step D) etching up to the etch stop layer but not through the etch stop layer. [16] Method according to any one of claims 9 to 15, wherein the method steps A) to G) are carried out in the specified order.

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