Semiconductor device and semiconductor device manufacturing method

Abstract

The present disclosure relates to a semiconductor device comprising a first heat spreader on which a first semiconductor element is mounted, a first electrode plate connected to the first heat spreader at a curved portion having an inclination, a second heat spreader on which a second semiconductor element is mounted, and a second electrode plate provided with a height difference with respect to the second heat spreader, wherein the first electrode plate is arranged at a position higher than the first heat spreader, the second electrode plate is arranged at a position higher than the second heat spreader, the first and second electrode plates are arranged at the same height, the first and second heat spreaders are arranged at the same height,the second electrode plate is arranged over the first heat spreader and the first electrode plate is arranged over the second heat spreader, the first semiconductor element is bonded to the first heat spreader and the second electrode plate, and the second semiconductor element is bonded to the second heat spreader and the first electrode plate.,

Description

Technical field

[0001] The present disclosure relates to a semiconductor device, and more particularly to a semiconductor device having a direct line bonding structure in which a semiconductor element and an electrode are directly bonded. Background of the state of the art

[0002] In a power semiconductor device such as an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), and a high-voltage withstand diode, a semiconductor device module is used in which a direct line bonding (DLB) structure in which a semiconductor element and an electrode are directly bonded is sealed with an injection molding resin.

[0003] For example, Patent Document 1 discloses a DLB structure in which a semiconductor element is bonded to a die pad of a lead frame by a bonding member such as solder, and then an upper electrode of the semiconductor element and a DLB frame are bonded by the bonding member. Prior art documentPatent document

[0004] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-081947 SummaryProblem to be solved by the invention

[0005] In the prior art, it is necessary to prepare a lead frame and a DLB frame and perform bonding processes with a semiconductor element for them, respectively, which leads to a problem that the number of components and the number of manufacturing processes increase and manufacturing costs increase.

[0006] The present disclosure has been developed to solve the above problem, and an object of the present disclosure is to provide a semiconductor device for which the number of components and the number of manufacturing processes are reduced and the manufacturing cost is lowered. Means of solving the problem

[0007] A semiconductor device according to the present disclosure includes a first heat spreader on which a first semiconductor element is mounted, a first electrode plate connected to the first heat spreader at a curved portion having an inclination, a second heat spreader on which a second semiconductor element is mounted, and a second electrode plate provided to have a height difference with respect to the second heat spreader, wherein the first electrode plate is arranged at a position higher than the first heat spreader, the second electrode plate is arranged at a position higher than the second heat spreader, the first electrode plate and the second electrode plate are arranged at the same height, the first heat spreader and the second heat spreader are arranged at the same height, the second electrode plate is arranged above the first heat spreader,the first electrode plate is arranged over the second heat spreader, the first semiconductor element is bonded to the first heat spreader and the second electrode plate, and the second semiconductor element is bonded to the second heat spreader and the first electrode plate. Effects of the invention

[0008] According to the semiconductor device of the present disclosure, by preparing a frame in which the first heat spreader and the first electrode plate are provided so as to have a height difference and a frame in which the second heat spreader and the second heat spreader are provided so as to have a height difference, it is possible to obtain the semiconductor device in which the first semiconductor element is bonded to the first heat spreader and the second electrode plate, and the second semiconductor element is bonded to the second heat spreader and the first electrode plate. Therefore, it is not necessary to provide the heat spreader and the electrode plate separately, which reduces the number of components. Furthermore, the number of manufacturing processes can be reduced by bonding the first and second semiconductor elements in a state where the two frames are superimposed. Brief description of the drawings [ Fig. 1] is a plan view illustrating a configuration of a semiconductor device according to a first embodiment. [ Fig. 2] is a plan view illustrating a framework for manufacturing the semiconductor device of the first embodiment. [ Fig. 3] is a plan view illustrating a framework for manufacturing the semiconductor device of the first embodiment. [ Fig. 4] is a plan view illustrating a state in which two frames for manufacturing the semiconductor device of the first embodiment are combined. [ Fig. 5] is a cross-sectional view of a frame for manufacturing the semiconductor device of the first embodiment. [ Fig. 6] is a cross-sectional view of a frame for manufacturing the semiconductor device of the first embodiment. [ Fig. 7] is a plan view illustrating a state in the middle of superposing two frames for manufacturing the semiconductor device of the first embodiment. [ Fig. 8] is a plan view illustrating a state in which two frames for manufacturing the semiconductor device of a second embodiment are combined. [ Fig. 9] is a schematic cross-sectional view of the semiconductor device of the second embodiment. [ Fig. 10] is a plan view illustrating a state in the middle of superposing two frames for manufacturing a semiconductor device of a third embodiment. [ Fig. 11] is a plan view illustrating a state in which the two frames for manufacturing the semiconductor device of the third embodiment are combined. [ Fig. 12] is a plan view illustrating a framework for manufacturing a semiconductor device of a fourth embodiment. [ Fig. 13] is a plan view illustrating a framework for manufacturing the semiconductor device of the fourth embodiment. [ Fig. 14] is a plan view illustrating a state in which the two frames for manufacturing the semiconductor device of the fourth embodiment are combined. [ Fig. 15] is a cross-sectional view of a frame for manufacturing the semiconductor device of the fourth embodiment. [ Fig. 16] is a cross-sectional view of a frame for manufacturing the semiconductor device of the fourth embodiment. [ Fig. 17] is a cross-sectional view of a frame for manufacturing a semiconductor device of a fifth embodiment. [ Fig. 18] is a cross-sectional view of a frame for manufacturing the semiconductor device of the fifth embodiment. [ Fig. 19] is a flowchart for explaining a method of manufacturing a semiconductor device of a sixth embodiment. [ Fig. 20] is a plan view for explaining a manufacturing process of the semiconductor device. [ Fig. 21] is a plan view for explaining the manufacturing process of the semiconductor device. [ Fig. 22] is a plan view for explaining the manufacturing process of the semiconductor device. [ Fig. 23] is a plan view for explaining the manufacturing process of the semiconductor device. [ Fig. 24] is a plan view for explaining the manufacturing process of the semiconductor device. [ Fig. 25] is a plan view illustrating a state in the middle of superposing two frames for manufacturing a semiconductor device of a seventh embodiment. [ Fig. 26] is a plan view illustrating a state in which the two frames for manufacturing the semiconductor device of the seventh embodiment are combined. [ Fig. 27] is a plan view illustrating a state in the middle of superposing two frames in a method of manufacturing a semiconductor device of an eighth embodiment. [ Fig. 28] is a plan view illustrating a state in which the two frames are combined in the process of manufacturing the semiconductor device of the eighth embodiment. [ Fig. 29] is a plan view illustrating a state in the middle of superposing two frames in a method of manufacturing a semiconductor device of a ninth embodiment. [ Fig. 30] is a plan view illustrating a state in which the two frames are combined in the process of manufacturing the semiconductor device of the ninth embodiment. [ Fig. 31] is a cross-sectional view for explaining a method of manufacturing a semiconductor device of a tenth embodiment. [ Fig. 32] is a plan view for explaining the method of manufacturing the semiconductor device of the tenth embodiment. Description of the embodiments<Erste Ausführungsform>

[0009] Fig. 1 is a plan view illustrating a configuration of a single-phase inverter 100, which is a semiconductor device of a first embodiment according to the present disclosure. Although the Fig. Since the single-phase inverter 100 shown in FIG. 1 is sealed with a mold resin, a mold resin on an upper surface is omitted, and only a mold resin RG on a lower surface is shown for simplicity. Although only one power semiconductor element 1a (first semiconductor element) and one power semiconductor element 1b (second semiconductor element) are shown for simplicity, if they are IGBTs or MOSFETs connected in series, they can be considered a basic circuit of a single-phase inverter.

[0010] As in Fig. As shown in Figure 1, in the single-phase inverter 100, a heat spreader 4a2 (first heat spreader) on which the power semiconductor element 1a, such as an IGBT, a MOSFET, and a high-voltage withstand diode, is mounted, and an electrode plate 4a1 (first electrode plate) arranged in parallel in a plan view are connected so as to have the same electric potential. The heat spreader 4a2 and the electrode plate 4a1 are connected at a bent portion BP1. The bent portion BP1 has an inclination such that the height is high on the electrode plate 4a1 side and low on the heat spreader 4a2 side. Thus, there is a height difference between the heat spreader 4a2 and the electrode plate 4a1.

[0011] Further, the bent portion BP1 is provided along the entire long side of the heat spreader 4a2, and the electrode plate 4a1 and the heat spreader 4a2 are firmly connected to each other at the bent portion BP1, so that a shape of the electrode plate 4a1 can be stabilized.

[0012] In the power semiconductor element 1a, a first main electrode provided on a lower surface side is bonded to an upper surface of the heat spreader 4a2 with a brazing material (not shown) such as solder, and a second main electrode provided on a lower surface side is bonded to a lower surface of an electrode plate 4b1 (second electrode plate) arranged above the heat spreader 4a2 (second heat spreader) with a brazing material (not shown) such as solder.

[0013] Further, a heat spreader 4b2, on which the power semiconductor element 1b is mounted, is arranged below the electrode plate 4a1. In the power semiconductor element 1b, the first main electrode provided on the lower surface side is bonded to an upper surface of the heat spreader 4b2 with a brazing material (not shown) such as solder, and the second main electrode provided on the upper surface side is bonded to a lower surface of the electrode plate 4a1 with a brazing material (not shown) such as solder.

[0014] The heat spreader 4a2 and the heat spreader 4b2 are arranged in parallel in a plan view, and there is no height difference between the heat spreader 4a2 and the heat spreader 4b2. On the other hand, although the electrode plate 4b1 and the heat spreader 4b2 are arranged in parallel in a plan view, the electrode plate 4b1 is arranged at a higher position, and the heat spreader 4b2 is arranged at a lower position, so there is a height difference between the electrode plate 4b1 and the heat spreader 4b2.

[0015] The electrode plate 4b1 has a rectangular shape in a plan view, a main terminal plate T2 is bonded to one end portion, and one main terminal plate T2 protrudes outside the mold resin RG. Note that the one end portion to which the main terminal plate T2 is bonded is opposite to one end portion of the heat spreader 4a2 on which the power semiconductor element 1a is mounted. A bent portion BP2 is provided at one end portion of the electrode plate 4b1. The bent portion BP2 has an inclination such that the height is high on the electrode plate 4b1 side and low on the main terminal plate T2 side. As a result, there is a height difference between the electrode plate 4b1 and the heat spreader 4b2.

[0016] The heat spreader 4a2 has a rectangular shape in a plan view, the power semiconductor element 1a is mounted on an end portion and is connected to a relay terminal RT1 via a wire WR, and the relay terminal RT1 protrudes outside the mold resin RG.

[0017] The heat spreader 4b2 has a rectangular shape in a plan view. A main terminal plate T3 is bonded to one end portion, and the main terminal plate T3 protrudes outside the mold resin RG. The one end portion to which the main terminal plate T3 is bonded is located on the same side as the end portion on which the power semiconductor element 1b is mounted. The power semiconductor element 1b is connected to a relay terminal RT2 via a lead wire WR, and the relay terminal RT2 protrudes outside the mold resin RG.

[0018] The electrode plate 4a1 has a rectangular shape in a plan view, a main terminal plate T1 is bonded to one end portion, and the main terminal plate T1 protrudes outside the mold resin RG. The one end portion to which the main terminal plate T1 is bonded is opposite to the end portion of the heat spreader 4b2 on which the power semiconductor element 1b is mounted.

[0019] As described above, in the Fig. 1, a height difference is provided between the heat spreader 4a2 and the electrode plate 4a1, a height underlayer is provided between the electrode plate 4b1 and the heat spreader 4b2, the power semiconductor element 1a is arranged between the heat spreader 4a2 and the electrode plate 4b1, and the power semiconductor element 1b is arranged between the heat spreader 4b2 and the electrode plate 4a1, whereby the power semiconductor element 1a and the power semiconductor element 1b can be connected in series.

[0020] Next, a method of manufacturing a main part of the single-phase inverter 100 will be described with reference to Fig. 2 to 6. Fig. 2 and Fig. 3 are plan views each showing a frame 4b and a frame 4a for manufacturing the single-phase inverter 100, and Fig. 4 is a plan view illustrating a state in which the frame 4a (first frame) and the frame 4b (second frame) are combined.

[0021] As in Fig. 2, the frame 4b includes a frame body 4b0 defining the outline of the frame 4b, the electrode plate 4b1, and the heat spreader 4b2. The frame body 4b0 is a frame having a rectangular shape in a plan view and is provided such that the electrode plate 4b1 and the heat spreader 4b2 extend inward from one side of the frame body 4b0. The electrode plate 4b1 and the heat spreader 4b2 are arranged in parallel with a space therebetween in a plan view, but the bent portion BP2 is provided at one end portion of the electrode plate 4b1. The bent portion BP2 has an inclination such that the height is high on one end side and low on the frame body 4b0 side. As a result, there is a height difference between the electrode plate 4b1 and the heat spreader 4b2.

[0022] The power semiconductor element 1b and a power semiconductor element 11b are mounted on the heat spreader 4b2, and an end portion on a side on which the power semiconductor element 1b is mounted has a partially narrowed width and is integrated with the frame body 4b0.

[0023] As in Fig. As shown in Figure 3, the frame 4a includes a frame body 4a0 defining an outline of the frame 4a, the electrode plate 4a1, and the heat spreader 4a2. The frame body 4a0 is a frame having a rectangular shape in a plan view and is provided such that the electrode plate 4a1 extends inward from one side of the frame body 4a0. The electrode plate 4a1 is connected to the heat spreader 4a2, which is arranged in parallel at the bent portion BP1 in a plan view.

[0024] The curved portion BP1 has a slope, so the height is high on the electrode plate 4a1 side and low on the heat spreader 4a2 side. Thus, there is a height difference between the heat spreader 4a2 and the electrode plate 4a1. The power semiconductor element 1a and a power semiconductor element 11a are mounted on the heat spreader 4a2. Note that the frames 4a and 4b can be made of aluminum (Al) or copper (Cu).

[0025] As in Fig. 2 and Fig. 3, a side of the frame body 4b0 in which the electrode plate 4b1 and the heat spreader 4b2 of the frame 4b extend, and a side in which the electrode plate 4a1 of the frame 4a extends have a positional relationship of being opposed to each other, and when the frame 4b and the frame 4a are arranged so as to be superimposed, a configuration is obtained as shown in Fig. 4 shown.

[0026] Fig. 4 shows a configuration of an area sealed with the casting resin RG of the Fig. 1, in which the power semiconductor elements 1a and 11a are arranged between the heat spreader 4a2 and the electrode plate 4b1, and the power semiconductor elements 1b and 11b are arranged between the heat spreader 4b2 and the electrode plate 4a1.

[0027] Fig. 5 is a cross-sectional view in an arrow direction taken along a line AA in Fig. 4, and Fig. 6 is a cross-sectional view in an arrow direction taken along a line BB in Fig. 4.

[0028] As in Fig. 5, the power semiconductor elements 1a and 11a are bonded to the heat spreader 4a2 by a solder material 2a and are bonded to the upper electrode plate 4b1 by a solder material (first solder material).

[0029] In addition, as in Fig. As shown in Figure 6, the power semiconductor elements 1b and 11b are bonded to the heat spreader 4b2 by a solder material 2b and are bonded to the upper electrode plate 4a1 by a solder material 3b (second solder material). For example, a solder can be used as the solder materials 2a, 3a, 2b, and 3b.

[0030] As described above, the electrode plate 4a1 and the heat spreader 4a2 are provided in the frame 4a, the electrode plate 4b1 and the heat spreader 4b2 are provided in the frame 4b, and the frame 4a and the frame 4b are arranged to be superimposed, thereby eliminating the need to separately provide the heat spreader and the electrode plate, thus reducing the number of components. Furthermore, the solder materials 3a and 3b are bonded in a state where the frame 4a and the frame 4b are superimposed, and thus the number of manufacturing processes can be reduced.

[0031] Furthermore, the frame shape can be freely designed, increasing the degree of freedom for inductor design. It is also possible to further improve heat dissipation.

[0032] In addition, by configuring the outer shapes defined by the frame body 4a0 of the frame 4a and the frame body 4b0 of the frame 4b to have the same size, it is easy to align the frames at the time of superimposing the frame body 4a0 and the frame body 4b0, and alignment accuracy is also improved.

[0033] Here, for the types of the power semiconductor elements 1a and 11a, for example, it is assumed that the power semiconductor element 1a is an IGBT, the power semiconductor element 11a is a high-voltage withstand diode, and the power semiconductor element 11a is connected in antiparallel with the power semiconductor element 1a.

[0034] In addition, for the types of the power semiconductor elements 1b and 11b, it is assumed that, for example, the power semiconductor element 1b is an IGBT, the power semiconductor element 11b is a high-voltage withstand diode, and the power semiconductor element 11b is connected in antiparallel with the power semiconductor element 1b.

[0035] By connecting the power semiconductor element 1b and the power semiconductor element 1a in series, the power semiconductor elements 11b and 11a can form an inverter which functions as a freewheeling diode. <Zweite Ausführungsform>

[0036] Next, a second embodiment according to the present disclosure will be described with reference to Fig. 7 and Fig. 8 described. Fig. Fig. 7 is a plan view showing a state in the middle of superposing the frame 4b and the frame 4a, and Fig. 8 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined, and illustrates a main part of a single-phase inverter 200 of the second embodiment.

[0037] In Fig. 7, the frame 4b has the same shape as that of the Fig. 2. However, in the frame 4a, the bent portion BP1 bonding the electrode plate 4a1 and the heat spreader 4a2 is not provided along the entire one long side of the heat spreader 4a2, but is provided to connect a part of the one long side and a part of one long side of the electrode plate 4a1. Thus, it can be said that the bent portion BP1 is provided to form a slit between the electrode plate 4a1 and the heat spreader 4a2.

[0038] As in Fig. 8, as a result of a slit being formed between the electrode plate 4a1 and the heat spreader 4a2, a gap between the heat spreader 4b2 and the heat spreader 4a2 can be utilized.

[0039] Fig. 9 is a schematic cross-sectional view in a case where the single-phase inverter 200 obtained by combining the frame 4a and the frame 4b shown in Fig. 8, is sealed with a resin, and corresponds to a cross-sectional view in an arrow direction taken along a line CC in Fig. 8 is recorded.

[0040] In Fig. 8, while a cooling fin 6 is attached to the single-phase inverter 200 sealed with the mold resin RG, as a result of forming a slit between the electrode plate 4a1 and the heat spreader 4a2, a through hole TH penetrating the mold resin RG in a thickness direction can be provided between the electrode plate 4b1 and the electrode plate 4a1, and between the heat spreader 4a2 and the heat spreader 4b2. The single-phase inverter 200 can be attached to the cooling fin 6 by causing the screw 7 to penetrate through the through hole TH. As described above, in the single-phase inverter 200, a position through which the screw 7 penetrates can be ensured. <Dritte Ausführungsform>

[0041] Next, a third embodiment according to the present disclosure will be described with reference to Fig. 10 and Fig. 11 described. Fig. 10 is a plan view showing a state in the middle of superposing the frame 4b and the frame 4a, and Fig. 11 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined, and illustrates a main part of a single-phase inverter 300 of the second embodiment.

[0042] In Fig. 10, the frame 4b has the same shape as that of the Fig. 2, but in the frame 4a, the bent portion BP1 connecting the electrode plate 4a1 and the heat spreader 4a2 is not provided along the entire one long side of the heat spreader 4a2, but is provided to connect two separate portions of the one long side and two separate portions of the one long side of the electrode plate 4a1. Thus, it can be said that the bent portion BP1 is provided to form an opening portion between the electrode plate 4a1 and the heat spreader 4a2.

[0043] As in Fig. 11, the opening portion is formed between the electrode plate 4a1 and the heat spreader 4a2 so that a gap between the heat spreader 4b2 and the heat spreader 4a2 can be utilized.

[0044] As with reference to Fig. 9, in the second embodiment, the gap is used as a position through which a screw passes when the cooling fin is attached to the single-phase inverter 300. In addition, compared with a case where a slit is formed between the electrode plate 4a1 and the heat spreader 4a2, a connection between the electrode plate 4a1 and the heat spreader 4a2 becomes stronger, and a shape of the electrode plate 4a1 can be stabilized. <Vierte Ausführungsform>

[0045] Next, a fourth embodiment according to the present disclosure will be described with reference to Fig. 12 to 16 described. Fig. 12 and Fig. 13 are plan views each illustrating the frame 4b and the frame 4a for manufacturing a single-phase inverter 400 according to the fourth embodiment. Fig. 14 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined, and illustrates a main part of the single-phase inverter 400 according to the fourth embodiment. In Fig. 12 to 16 are the same components as those in Fig. 2 to 6 of the first embodiment are denoted by the same reference numerals, and redundant description is omitted.

[0046] As in Fig. 12, the frame 4b includes a frame body 4b0 defining an outline of the frame 4b, the electrode plate 4b1, the heat spreader 4b2, and relay terminals 4b3 (second relay terminals).

[0047] The frame body 4b0 is a frame having a rectangular shape in plan view, and is provided such that the electrode plate 4b1, the heat spreader 4b2, and the plurality of relay terminals 4b3 extend inward from one side of the frame body 4b0. At an end portion of the electrode plate 4b1, a terminal hole 4bh is provided at a position closer to the frame body 4b0 than the bent portion BP2. Furthermore, in the heat spreader 4b2, an end portion on a side where the power semiconductor element 1b is mounted has a partially narrowed width and is integrated with the frame body 4b0, and the terminal hole 4bh is provided at a position on the frame body 4b0 side. A portion where the terminal hole 4bh is provided functions as a main terminal of a so-called single-phase inverter 400, and the terminal hole 4bh functions as a mounting hole for connecting wiring to the outside.The plurality of relay terminals 4b3 extend in a plan view to the vicinity of the power semiconductor element 1b on the heat spreader 4b2.

[0048] As in Fig. 13, the frame 4a includes a frame body 4a0 defining an outline of the frame 4a, the electrode plate 4a1, the heat spreader 4a2, and a plurality of relay terminals 4a3 (first relay terminals).

[0049] The frame body 4a0 is a frame having a rectangular shape in plan view, and is provided such that the electrode plate 4a1 and the plurality of relay terminals 4a3 extend inward from one side of the frame body 4a0. A terminal hole 4ah is provided at an end portion of the electrode plate 4a1 at a position on the frame body 4a0 side. The portion where the terminal hole 4ah is provided functions as a main terminal of a so-called single-phase inverter 400, and the terminal hole 4ah functions as a mounting hole for connecting wiring to the outside. The plurality of relay terminals 4a3 extend to the vicinity of the power semiconductor element 1a on the heat spreader 4a2 in plan view. The plurality of relay terminals 4a3 function as terminals for wire connection to a control terminal on an upper surface of the power semiconductor element 1a.

[0050] As in Fig. 12 and Fig. 13, a side of the frame body 4b0 in which the electrode plate 4b1, the heat spreader 4b2, and the plurality of relay terminals 4b3 of the frame 4b extend, and a side in which the electrode plate 4a1 and the plurality of relay terminals 4a3 of the frame 4a extend have a positional relationship of being opposed to each other, and when the frame 4b and the frame 4a are arranged to be superimposed, a configuration is obtained as shown in Fig. 14 shown.

[0051] Fig. 14 shows a configuration of an area filled with the casting resin RG of the Fig. 1, in which the power semiconductor elements 1a and 11a are arranged between the heat spreader 4a2 and the electrode plate 4b1, and the power semiconductor elements 1b and 11b are arranged between the heat spreader 4b2 and the electrode plate 4a1.

[0052] Fig. 15 is a cross-sectional view in an arrow direction taken along a line AA in Fig. 14, and Fig. 16 is a cross-sectional view in an arrow direction taken along a line BB.

[0053] As in Fig. 15, the power semiconductor elements 1a and 11a are bonded to the heat spreader 4a2 by a solder 2a and are bonded to the upper electrode plate 4b1 by a solder 3a.

[0054] As in Fig. 16, the power semiconductor elements 1b and 11b are bonded to the heat spreader 4b2 by a solder 2b and are bonded to the upper electrode plate 4a1 by a solder 3b.

[0055] As described above, the frame 4a is provided with the plurality of relay terminals 4a3 and the portion functioning as the main terminal, and the frame 4b is provided with the plurality of relay terminals 4b3 and the portion functioning as the main terminal, so that the number of components required for assembling the single-phase inverter 400 can be reduced and productivity can be improved.

[0056] In addition, as in Fig. 12, the configuration in which the plurality of relay terminals 4b3 extend to the vicinity of the power semiconductor element 1b on the heat spreader 4b2 in a plan view is shown in the frame 4b. However, in this case, by using an IGBT or a MOSFET as the power semiconductor element 1b close to the plurality of relay terminals 4b3 and using the plurality of relay terminals 4b3 as terminals for wire bonding to a control terminal of the IGBT or the MOSFET, wire bonding is enabled and productivity can be improved. Note that the power semiconductor element 11b is a high-voltage withstand diode.

[0057] Similarly, as in Fig. 13, the frame 4a has a configuration in which the plurality of relay terminals 4a3 extend to the vicinity of the power semiconductor element 1a on the heat spreader 4a2 in a plan view. In this case, by using an IGBT or a MOSFET as the power semiconductor element 1a close to the plurality of relay terminals 4a3 and using the plurality of relay terminals 4a3 as terminals for wire bonding to a control terminal of the IGBT or the MOSFET, wire bonding is enabled and productivity can be improved. Note that the power semiconductor element 11b is a high-withstand voltage diode. <Fünfte Ausführungsform>

[0058] Next, a fifth embodiment according to the present disclosure will be described with reference to Fig. 17 and Fig. 18 described. Fig. 17 is a cross-sectional view illustrating a cross-sectional configuration of the heat spreader 4a2 constituting a single-phase inverter 500 of the fifth embodiment, and grooves GR (first grooves) for positioning the power semiconductor elements 1a and 11a are provided on a surface of the heat spreader 4a2 on which the semiconductor element is mounted.

[0059] The grooves GR are formed to have a depth and a size that prevent the power semiconductor elements 1a and 11a arranged on the solder material 2a from being displaced from positions on the solder material 2a. The grooves GR are provided in a direction orthogonal to an arrangement direction of the power semiconductor elements 1a and 11a and have a depth suitable for accommodating the solder material 2a and also accommodating a portion of the power semiconductor elements 1a and 11a.

[0060] By providing the grooves GR, positioning accuracy when the power semiconductor elements 1a and 11a are arranged on the solder material 2a is improved, and the power semiconductor elements 1a and 11a can be prevented from being displaced from positions on the solder material 2a.

[0061] It should be noted that although Fig. 17 illustrates an example in which the grooves GR are provided in the heat spreader 4a2, grooves GR (second grooves) may also be provided in the heat spreader 4b2 in order to improve positioning accuracy of the power semiconductor elements 1b and 11b and prevent displacement of the power semiconductor elements 1b and 11b.

[0062] Fig. 18 is a cross-sectional view illustrating a configuration in which projections PJ are provided instead of the grooves GR on the surface of the heat spreader 4a2 on which the semiconductor element is mounted. As shown in Fig. 18, the protrusions PJ are formed at a height that prevents the power semiconductor elements 1a and 11a arranged on the solder material 2a from being displaced from positions on the solder material 2a. The protrusions PJ are provided on an outer side in a plan view in each of the power semiconductor elements 1a and 11a and have a height that exceeds a thickness of the solder material 2a and reaches a part of the thickness of the power semiconductor elements 1a and 11a. It should be noted that in Fig. 18 the projections PJ are provided in front of and behind each of the power semiconductor elements 1a and 11a, but may also be provided to the left and right of each of the power semiconductor elements 1a and 11a, and may also be provided in front of and behind and left and right.

[0063] By providing the protrusions PJ, the positioning accuracy when the power semiconductor elements 1a and 11a are arranged on the solder material 2a is improved, and the power semiconductor elements 1a and 11a can be prevented from being displaced from positions on the solder material 2a.

[0064] It should be noted that although Fig. 18 illustrates an example in which the protrusions PJ are provided in the heat spreader 4a2, the protrusions PJ may also be provided in the heat spreader 4b2 to improve the positioning accuracy of the power semiconductor elements 1b and 11b and prevent displacement of the power semiconductor elements 1b and 11b. <Sechste Ausführungsform>

[0065] Next, as a sixth embodiment according to the present disclosure, a method of manufacturing the Fig. 1 illustrated single-phase inverter 100 with reference to Fig. 20 to 24, while the one in Fig. 19 is referred to.

[0066] In a Fig. In step S1 shown in Figure 19, a frame is formed. As shown in Fig. 20, this is a step of preparing the frames 4a and 4b, and the frames 4a and 4b are formed by punching and bending. Fig. Frames 4a and 4b shown in Figure 20 are states before the power semiconductor elements are respectively on the Fig. 3 shown frame 4a and the one in Fig. 2 shown frame 4b.

[0067] Next, in a step S2, the power semiconductor element is bonded to the heat spreader using a solder material. As shown in Fig. 21, this is a step of bonding the power semiconductor elements 1a and 11a to the heat spreader 4a2 of the frame 4a by means of the solder 2a (not shown) and bonding the power semiconductor elements 1b and 11b to the heat spreader 4b2 of the frame 4b by means of the solder 2b (not shown), and is a step of melting the solder. The frames 4a and 4b shown in FIG. 21 are the states of the Fig. 3 shown frame 4a and the one in Fig. 2. The solder material 3a is arranged on the power semiconductor elements 1a and 11a for the next step, and the solder material 3b is arranged on the power semiconductor elements 1b and 11b for the next step.

[0068] Next, in step S3, the two frames are superimposed, and the electrode plate is bonded to the power semiconductor element with the solder material. As shown in Fig. 22, this is a step of superposing the frame 4a and the frame 4b, bonding the solder material 3a (not shown) to the power semiconductor elements 1a and 11a of the frame 4a and the electrode plate 4b1 of the frame 4b, and bonding the solder material 3b (not shown) to the power semiconductor elements 1b and 11b of the frame 4b and the electrode plate 4a1 of the frame 4a, and is a step of melting the solder material. It should be noted that the state in which the frame 4a and the frame 4b shown in Fig. 22 are shown, to which in Fig. 4 corresponds to the state shown.

[0069] Next, in step S4, the main terminal plate and an external frame provided with the relay terminals are bonded. This is a step of bonding an external frame OF to the frames 4a and 4b in a state where the bonding between the power semiconductor element and the electrode plate is completed, as shown in Fig. 23 shown.

[0070] The external frame OF is bonded so as to be further superimposed on the superimposed frames 4a and 4b and comprises a frame body OF0 defining the outline of the external frame OF, main terminal plates T1, T2 and T3 and forwarding terminals RT1 and RT2.

[0071] The frame body OF0 is a frame having a rectangular shape in plan view and is provided such that the main terminal plate T1 and the relay terminal RT1 extend inward from one side of the frame body OF0. The main terminal plate T1 is provided at a position to be bonded to the end portion of the electrode plate 4a1, and the relay terminal RT1 is provided at a position opposite to the power semiconductor element 1a.

[0072] Further, the main terminal plates T2 and T3 and the relay terminal RT2 are provided so as to extend inward from a side of the frame body OF0 opposite to the one side on which the main terminal plate T1 and the relay terminal RT1 extend. The main electrode plate T2 is provided at a position to be bonded to the end portion of the electrode plate 4b1, the main terminal plate T3 is provided at a position to be bonded to the end portion of the heat spreader 4b2, and the relay terminal RT2 is provided at a position opposite to the power semiconductor element 1b.

[0073] Note that ultrasonic (US) bonding can be used for bonding the external frame OF and frames 4a and 4b. Furthermore, bonding using a solder material can also be used.

[0074] Next, in step S5, the forwarding terminal and the power semiconductor element are connected by wire bonding. As shown in Fig. 24, this is a step of connecting the relay terminal RT1 and the control terminal of the power semiconductor element 1a through the wiring WR, and connecting the relay terminal RT2 and the control terminal of the power semiconductor element 1b through the wiring WR.

[0075] Thereafter, unnecessary portions of the frame body OF0 and the frame bodies 4a0 and 4b0 are cut off, and a main part of the single-phase inverter 100 is sealed with the molding resin RG, so that the Fig. 1 shown single-phase inverter 100 is obtained. <Siebte Ausführungsform>

[0076] Next, a seventh embodiment according to the present disclosure will be described with reference to Fig. 25 and Fig. 26 described. Fig. 25 is a plan view illustrating a state in the middle of superposing the frame 4b and the frame 4a, and Fig. 26 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined, and illustrates a main part of a single-phase inverter 600 of the seventh embodiment.

[0077] In Fig. 25, the frame 4b has the same shape as that of the Fig. 2, but the frame 4a has a notch portion NP in which a part of the frame body 4a0 is cut out. The notch portion NP is provided at a position where an end portion of the electrode plate 4b1 of the frame 4b is connected to the frame body 4a0 in a case where the frame 4a and the frame 4b are combined. Thus, when the frame 4a and the frame 4b are superimposed and bonded, the frame body 4a0 and the end portion of the electrode plate 4b1 do not overlap with each other, which facilitates bonding. <Achte Ausführungsform>

[0078] Next, an eighth embodiment according to the present disclosure will be described with reference to Fig. 27 and Fig. 28 described. Fig. Fig. 27 is a plan view illustrating a state in the middle of superposing the frame 4b and the frame 4a, and Fig. 28 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined.

[0079] As in Fig. As shown in Figure 27, the frame body 4b0 of the frame 4b has projections CV on two sides in a left-right direction parallel to the arrangement of the electrode plate 4b1 and the heat spreader 4b2. The projections CV are provided at four corner portions of the frame body 4b0 and project toward the side on which the frame 4a is superimposed.

[0080] On the other hand, as in Fig. 27, the frame body 4a0 of the frame 4a has opening portions OP on two sides in the left-right direction parallel to the arrangement of the electrode plate 4a1 and the heat spreader 4a2. The opening portions OP are provided at four corner portions of the frame body 4a0, and as shown in Fig. As shown in Fig. 28, the opening portions OP are provided at positions where the projections CV are inserted into the opening portions OP when the frame 4a is superimposed on the frame 4b. Thus, positioning accuracy when the frame 4a and the frame 4b are superimposed is improved. <Neunte Ausführungsform>

[0081] Next, a ninth embodiment according to the present disclosure will be described with reference to Fig. 29 and Fig. 30 described. Fig. 29 is a plan view illustrating a state in the middle of superposing the frame 4b and the frame 4a, and Fig. 30 is a plan view illustrating a state in which the frame 4a and the frame 4b are combined.

[0082] As in Fig. As shown in Fig. 29, the frame body 4b0 of the frame 4b has a plurality of recesses DP2 (second recesses) on two sides in the left-right direction parallel to the arrangement of the electrode plate 4b1 and the heat spreader 4b2. The plurality of recesses DP2 are provided in a row along the extension direction of each side on two sides in the left-right direction.

[0083] Similarly, the frame body 4a0 of the frame 4a also has a plurality of recesses DP1 (first recesses) on two sides in the left-right direction parallel to the arrangement of the electrode plate 4a1 and the heat spreader 4a2. The plurality of recesses DP1 are provided in a row along the extension direction of each side on two sides in the left-right direction.

[0084] The plurality of recesses DP1 and DP2 of the frames 4a and 4b are provided so as to be recessed in the same direction at positions overlapping each other, as shown in Fig. 30 when the frame 4a is superimposed on the frame 4b. Thus, positioning accuracy when the frame 4a and the frame 4b are superimposed is improved. <Zehnte Ausführungsform>

[0085] Next, a tenth embodiment according to the present disclosure will be described with reference to Fig. 31 and Fig. 32 described. Fig. 31 is a cross-sectional view for explaining a state in which the frame 4a and the frame 4b are superposed and the electrode plate is bonded to the power semiconductor element by the solder material, and is a cross-sectional view related to Fig. 5 described in the first embodiment, and is a view for explaining the device in step S3 of the Fig. 19 in the sixth embodiment.

[0086] As in Fig. 31, a step of melting the solder material is performed in a state where the superimposed frames 4a and 4b are fixed by a fixing jig JG. The fixing jig JG includes a lower fixing jig JD disposed below the superimposed frames 4a and 4b, that is, on the heat spreader 4a2 side, and an upper fixing jig JU disposed above the superimposed frames 4a and 4b, that is, on the electrode plate 4b1 side.

[0087] As in Fig. 31, by interposing the superimposed frames 4a and 4b between the lower fixing jig JD and the upper fixing jig JU, the frames 4a and 4b are prevented from being displaced when the solder material is melted, and the positioning accuracy of the electrode plate is improved.

[0088] In Fig. 31 shows the configuration in which the entire superimposed frames 4a and 4b are encompassed by the fixing device JG, but the present disclosure is not limited thereto, and a configuration in which only a part of the frames is encompassed may be employed.

[0089] Fig. 32 is a plan view illustrating the fixing device JG including only a part of the frames. Fig.32 illustrates a configuration in which the left and right frame bodies of the superimposed frames 4a and 4b are sandwiched between the lower fixing jig JD and the upper fixing jig JU. The upper fixing jig JU is disposed only on the left and right frame bodies of the superimposed frames 4a and 4b. In a case where such a fixing jig JG is used, it is also possible to advance the process to the next wire bonding process while the superimposed frames 4a and 4b are sandwiched by the fixing jig JG.

[0090] Examples of a material of the fixing device JG include carbon, which can withstand a temperature at the time of melting the solder material and has little deformation. <Halbleitermaterial des Leistungshalbleiterelements>

[0091] The power semiconductor elements 1a, 1b, 11a, and 11b are not limited to silicon semiconductor elements using silicon (Si). Wide band gap semiconductor elements, such as silicon carbide semiconductor elements using silicon carbide (SiC) and gallium nitride semiconductor elements using gallium nitride (GaN), can be used. Compared with a silicon semiconductor element, a wide band gap semiconductor element can be downsized, has excellent withstand voltage, has a high allowable current density, and has high heat resistance. Thus, it can operate at high temperatures and is expected to have high efficiency. <modifikationen>

[0092] In the first to tenth embodiments described above, the configuration in which the present disclosure is applied to the single-phase inverter has been described, but the present disclosure is not limited thereto, and the present disclosure can also be applied to a three-phase inverter in which single-phase inverters corresponding to three phases are combined, and can also be applied to a converter for energy recovery.

[0093] It should be noted that in the present disclosure, within a scope of the disclosure, the embodiments may be freely combined or appropriately modified or omitted.

[0094] Although the present disclosure has been described in detail, the foregoing description is illustrative in all aspects, and the present disclosure is not limited thereto. It is understood that various non-illustrated modifications may be adopted without departing from the scope of the present disclosure. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 2018-081947

[0004] < / modifikationen>

Claims

[1] A semiconductor device comprising: a first heat spreader on which a first semiconductor element is mounted; a first electrode plate connected to the first heat spreader at a curved portion having an inclination; a second heat spreader on which a second semiconductor element is mounted; and a second electrode plate provided to have a height difference with respect to the second heat spreader, wherein the first electrode plate is arranged at a position higher than the first heat spreader, the second electrode plate is arranged at a position higher than the second heat spreader, the first electrode plate and the second electrode plate are arranged at the same height, the first heat distributor and the second heat distributor are arranged at the same height, the second electrode plate is arranged above the first heat spreader, the first electrode plate is arranged above the second heat spreader, the first semiconductor element is bonded to the first heat spreader and the second electrode plate, and the second semiconductor element is bonded to the second heat spreader and the first electrode plate. [2] The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate have a parallel positional relationship in a plan view, and the bent portion is provided along an entire side of the first heat spreader opposite to the first electrode plate. [3] The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate have a parallel positional relationship in a plan view, the bent portion is provided in a part of a side of the first heat spreader opposite to the first electrode plate, and a slit is formed between the first heat spreader and the first electrode plate. [4] The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate have a parallel positional relationship in a plan view, the bent portion is provided in a first portion and a second portion separated from each other on a side of the first heat spreader opposite to the first electrode plate, and an opening portion is formed between the first heat spreader and the first electrode plate. [5] A semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate have a parallel positional relationship in a plan view, the semiconductor device further comprises a plurality of first relay terminals provided parallel to the first heat spreader in a plan view, the first semiconductor element is arranged at a position closer to the plurality of first forwarding terminals on the first heat spreader, the second heat spreader and the second electrode plate have a parallel positional relationship in a plan view, the semiconductor device further comprises a plurality of second relay terminals provided parallel to the second heat spreader in a plan view, and the second semiconductor element is arranged at a position closer to the plurality of second relay terminals on the second heat spreader. [6] A semiconductor device according to claim 5, wherein the first semiconductor element and the second semiconductor element are IGBTs or MOSFETs. [7] A semiconductor device according to claim 1, wherein the first heat spreader has a first groove in a partial area on which the first semiconductor element is mounted, wherein in a plan view the first groove matches a size of the first semiconductor element, and the second heat spreader has a second groove in a partial area on which the second semiconductor element is mounted, wherein in a plan view the second groove matches a size of the second semiconductor element. [8] A semiconductor device according to claim 1, wherein the first heat spreader has a plurality of first projections provided in a plan view at positions outside the first semiconductor element in a portion on which the first semiconductor element is mounted, and the second heat spreader has a plurality of second projections provided in a plan view at positions outside the first semiconductor element in a portion on which the second semiconductor element is mounted. [9] A semiconductor device according to claim 1, wherein the first semiconductor element is a silicon carbide semiconductor element. [10] A method of manufacturing a semiconductor device using: a first heat spreader to which a first semiconductor element is bonded; a first frame having a first electrode plate connected to the first heat spreader at a curved portion having an inclination; and a second frame having a second heat spreader to which a second semiconductor element is bonded, and a second electrode plate provided to have a height difference with respect to the second heat spreader, wherein the first electrode plate is arranged at a position higher than the first heat spreader, the second electrode plate is arranged at a position higher than the second heat spreader, and the first electrode plate and the second electrode plate are arranged at the same height, the first heat distributor and the second heat distributor are arranged at the same height, the second electrode plate is arranged above the first heat spreader, the first electrode plate is arranged above the second heat spreader, the method comprising: a step (a) of superposing the first frame and the second frame such that the first semiconductor element is sandwiched between the first heat spreader and the second electrode plate, and the second semiconductor element is sandwiched between the second heat spreader and the first electrode plate; and a step (b) of melting a first solder material disposed between the first semiconductor element and the second electrode plate and a second solder material disposed between the second semiconductor element and the first electrode plate to bond the first semiconductor element to the second electrode plate and bond the second semiconductor element to the first electrode plate. [11] A method of manufacturing the semiconductor device according to claim 10, wherein the first frame has a notch portion at a portion which comes into contact with the second electrode plate in a case where the first frame and the second frame are superposed. [12] A method of manufacturing the semiconductor device according to claim 10, wherein the second frame has a plurality of projections, the first frame has a plurality of opening portions provided at positions corresponding to the plurality of projections of the second frame, and in step (a), the first frame and the second frame are superimposed such that the plurality of projections are introduced into the plurality of opening portions. [13] A method of manufacturing the semiconductor device according to claim 10, wherein the second frame has a plurality of second recesses, and the first frame has a plurality of first recesses provided at positions corresponding to the plurality of second recesses of the second frame, and in step (a), the first frame and the second frame are superimposed such that the plurality of first recesses and the plurality of second recesses overlap with each other. [14] A method of manufacturing the semiconductor device according to claim 10, wherein the step (b) comprises a step of pressing upper and lower portions of the superposed first and second frames using a fixing device. [15] A method of manufacturing the semiconductor device according to claim 10, wherein the first frame and the second frame are configured to have a same external size.

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