Fast LCR meter with leakage compensation

Abstract

An LCR meter with a fast compensation method, requiring only a single device for voltage compensation measurements. The LCR meter accelerates the compensation process, providing time separation when measuring a device under test (DUT) and other parasitic impedances, including leakage impedance. The leakage impedance and other parasitic impedances of a fixture and the LCR meter are measured and stored in memory during open-circuit / short-circuit calibration. The DUT is measured with previously known parasitic impedances during the measurement process. This allows for the calculation of compensation conditions with only a single voltage measurement.

Description

Technical field

[0001] The present invention relates to instruments for impedance measurement over a wide frequency range. State of the art

[0002] The most important parameters of an LCR meter are accuracy and measurement speed. Measurement frequency is crucial when the LCR meter is used as part of an impedance analyzer or in production. Impedance measurement is based on measuring voltage drops across a resistor with known impedance and a device under test (DUT) connected in series. The impedance of the DUT is calculated from the known current through it and the voltage drop across the DUT.

[0003] In this case, the main cause of an error is [ Fig.1] A leakage current through a leakage impedance between a mean point of the DUT and the area resistance to ground. The leakage current is the reason for the imbalance between the currents through the area resistance and the DUT.

[0004] Various methods are used to reduce leakage current.

[0005] One such method is the protection technique, which helps to reduce the voltage between the center point and the shield in a cable from the low-voltage (LP) terminal of the LCR meter to the DUT by applying a voltage to the shield via a voltage follower. This technique is used in the ESI Model 251 digital impedance meter, as described in "A History of Impedance Measurements by Henry P. Hall," p. 49.

[0006] Another method is an automatic equalization bridge using the transimpedance amplifier (TIA). This method is used in the digital impedance meter GR Type 1685-A, as described in "A History of Impedance Measurements by Henry P. Hall," p. 49.

[0007] Both methods have an immediate effect on equalization, but exhibit low gain at high frequencies and therefore low combined voltage rejection between the center point and the cable shield. They can also exhibit stability problems.

[0008] LCR meters with modem-type automatic balancing bridges exhibit good balancing accuracy at high frequencies, such as the Hewlett Packard 4271A LCR meter, as described in "A History of Impedance Measurements by Henry P. Hall," p. 49. However, they incorporate slow integrators that require several periods of the signal frequency for tuning, resulting in long measurement times at low and mid-frequencies. They are also expensive. A digital version of the modem-type automatic balancing bridge exists in US patent 7,616,008 B1 Rayman et al. (2009), but it suffers from the same flaw as the analog version: slow speed at low and mid-frequencies.

[0009] There are other digital methods, such as those described in US patent 10,013,015 B2 by Ida et al. (2018), CN110320410A by Fajie et al. (2019), and “A Novel Fast Balance Technique for the Digital AC Bridge” by Zhang et al. (1998). However, all of these require at least two voltage measurements and at least two periods of the signal frequency for balancing. Brief description of the invention

[0010] The present invention uses a fast compensation method with few components to achieve high accuracy and a high measurement rate.

[0011] First, there is the temporal separation between the measurement of a device under test (DUT) and other parameters necessary for quick calibration. These parameters include the leakage impedance of the fixture and the LCR meter, as well as the series impedance of the fixture and the voltage sources. These parameters are constant and can only be measured once during calibration and subsequently used for the DUT measurement period.

[0012] Secondly, it measures the impedance of a DUT without balancing conditions with moderate accuracy. In this case, a leakage current that causes a measurement error is compensated for by the calculated value of this current using an asymmetrical voltage and a previously measured value of the leakage impedance.

[0013] Third, the moderate accuracy of the DUT and the previously measured series impedances of the support and voltage sources allow the voltages of the voltage sources to be calculated and adjusted in a single step, without iterations, to obtain the balancing conditions that lie at the midpoint between the DUT and a near-zero resistance. These balancing conditions enable the measurement of the DUT's impedance with high accuracy. With modern high-speed processors, the measurement time does not increase. Technical problem

[0014] Some LCR meters use a modem-type calibration method to eliminate current through leakage impedance. LCR meters exhibit the best accuracy at high frequencies but are slow at low and mid-range frequencies. Solution to the problem

[0015] The present invention solves the problem of low speed with a rapid balancing method. This method requires only one voltage measurement for balancing, and its balancing speed is limited only by one full period of the signal frequency. For rapid balancing, this method uses preliminary measurements of leakage impedance and other impedances of a support, along with the LCR meter, to calculate and set the required voltages in a single step. Advantageous effect of the invention

[0016] The current invention features high measurement speed and low production costs. It exhibits no stability problems. The hardware architecture enables the extended frequency range through calibration of the voltage channels relative to each other. Brief description of the drawings Fig. 1 [ Fig. Figure 1 shows the main cause of inaccuracies in LCR measuring devices. Fig. 2 [ Fig. Figure 2 shows a method for measuring leakage impedance. Fig. 3 [ Fig. Figure 3] shows a simplified representation of the first embodiment of the present invention. Fig. 4 [ Fig. Figure 4] shows an example of the input multiplexer voltages of the LCR measuring device for one signal period. Fig. 5 [ Fig. Figure 5 shows the ADC1 input voltages for the first embodiment. Fig. 6 [ Fig.Figure 6] shows the ADC1 input voltages for the first embodiment with more details. Fig. 7 [ Fig. Figure 7] shows the gain and phase frequency responses of an anti-aliasing low-pass filter. Fig. 8 [ Fig. Figure 8] shows the gain and phase errors for input buffers based on operational amplifiers with a bandwidth of about 100 MHz and a frequency tolerance of ±20%. Fig. 9 [ Fig. Figure 9] shows a block diagram of the first embodiment of the present invention. Fig. 10 [ Fig. Figure 10 shows a block diagram of the second embodiment of the present invention. Fig. 11 [ Fig. Figure 11 shows a low-level processing block diagram for the first embodiment. Fig. 12 [ Fig.

[12] shows a flowchart of a low-level processing operation of the processor. List of reference symbols 1002 first voltage source (VoltSrc1). 1004 High current terminal (HC). 1006 High-voltage terminal (HP). 1008 Device under test (DUT). 1010 Low voltage terminal (LP). 1012 midpoint between the DUT and the area resistance. 1014 Leakage impedance (Zleak). 1016 Low-current terminal (LC). 1018 Range resistance, set of reference resistors (Zrange). 1020 Voltage at the second terminal of the range resistor (Vrr). 1022 second voltage source (VoltSrc2). 3002 Output impedance of the first voltage source (Zout1). 3004 Impedance of the series current limiting resistor (Zser_res). 3006 Output impedance of the first voltage source buffer (Zbuff1). 3008 Impedance of the cable wire between the high-current terminal and the device under test (Zwire1). 3010 Capacitance of the cable between the HP terminal and the DUT (Ccable1). 3012 Impedance of the cable wire between the LC terminal and the device under test (Zwire2). 3014 parasitic capacitance of the range resistance multiplexer (CMUX). 3016 Impedance of the range impedance multiplexer (Zmux). 3018 Output impedance of the second voltage source (Zout2). 3020 Output impedance of the second voltage source buffer (Zbuff2). 9004 Switch for calibrating the high-voltage buffer. 9006 Switch for calibrating the low-voltage buffer. 9008 Switch for calibrating the low-current buffer. 9010 Switch for calibrating the range resistance buffer. 9012 Switches for providing the calibration voltage for the input buffers. 9016 High-voltage input buffer. 9018 Low voltage input buffer. 9020 Low-current input buffer. 9022 Range resistance voltage input buffer. 9024 first voltage source output buffer. 9026 second voltage source output buffer. 9028 first low-pass filter (LPF1). 9030 Input multiplexer. 9032 Output multiplexer buffer. 9033 Multiplexer control interface. 9034 second low-pass filter (LPF2). 9036 first digital-to-analog converter (DAC) (DAC1). 9038 first analog-to-digital converter (ADC) (ADC1). 9040 second DAC (DAC2). 9042 digital signal to the first DAC. 9044 digital signal from the first ADC. 9046 digital signal to the second DAC. 9048 processor. 10002 second ADC (ADC2). 10004 third ADC (ADC3). 10006 fourth ADC (ADC4). 11002 first set of memory buffers. 11004 second set of memory buffers. 11006 Direct Fourier Transform Block (DFT). 11008 Cosine multiplier. 11010 Sine multiplier. 11012 Demultiplexers and accumulators. 11014 Direct Digital Software Synthesizer (DDS). 11016 Control and processing core. 12002 Flowchart for shared direct memory access (DMA). 12004 Direct Fourier transform processing for ADC data flowchart. 12006 Flowchart of DMA data preparation for DAC and reference buffer. Description of the embodiments

[0017] To increase the accuracy of the measurements, according to the state of the art, only the voltage drop across the leakage impedance is eliminated or reduced.

[0018] Furthermore, with the exception of methods for automatically adjusting protective and transimpedance, the state of the art requires at least two measurements to achieve an adjustment, since the measurement logic has at least two significant unknown parameters: the impedance of the device under test and the leakage impedance. However, according to mathematics, at least two equations require two unknowns, and therefore also two sets of measured voltages.

[0019] The leakage impedance and other parasitic parameters of the mounting bracket and LCR meter are constant and can only be measured once during calibration. This information can then be applied automatically to save measurement time. Furthermore, their influence on the impedance calculation of the device under test (DUT) can be compensated for if their values ​​are known.

[0020] The present invention utilizes the pre-measurement of leakage impedance and series impedances of mounts and voltage sources during calibration to increase accuracy and accelerate measurements. Knowledge of the parasitic impedances enables more accurate and faster measurements. The series impedances include leakage impedance, output impedances of voltage sources, and series impedances of cables. For this purpose, the measurements of the device under test and the measurement of the parasitic impedances are performed separately. The series impedances are measured during calibration for the mount being used and can be stored in the onboard memory. The LCR meter can automatically use the associated series impedances if it can detect the mount, or the user can manually select this data from previously stored values.Leakage impedance and series impedance calibration can be combined with standard open-circuit / short-circuit calibration.

[0021] Knowing the leakage impedance and series impedances reduces the measurement time of the device under test (DUT). First, a moderately accurate DUT value without compensation must be calculated and used for the fast compensation procedure. Second, the leakage impedance value is used to compensate for leakage current caused by an unbalanced residual voltage.

[0022] For moderate accuracy requirements at low and medium frequencies, the leakage impedance is relatively high; even a single-step adjustment takes some time, and the adjustment can even be missed. Only a moderately accurate measurement with leakage compensation can be performed. However, adjustment is necessary at high frequencies with a typical cable capacitance of about 100 pF / m and a range impedance multiplexer capacitance of up to several hundred picofarads.

[0023] Another cause of errors at high frequencies is the inequality of the gains and phase delays of the operational amplifiers used in the input buffers 9016, 9018, 9020 and 9022. Fig.Figure 8 shows the potential inequality of gain errors and phase delays for operational amplifiers with a gain of approximately 100 MHz and a tolerance of ±20%, used as input buffers. Even at a relatively low signal frequency of 1 MHz, the gain error between two channels can reach ±0.4%, and between the DUT and the range voltages, ±0.8%. This is unacceptable for precision LCR instruments.

[0024] Further details are explained in the descriptions of the embodiments. These embodiments are described for illustrative purposes only and do not limit the present invention. First embodiment

[0025] The first embodiment [ Fig.[9] includes a processor 9048, which provides digital signals 9042 and 9046 for the first 1002 and second 1022 voltage sources. These voltage sources include the digital-to-analog converters (DACs) 9036 and 9040, the low-pass filters 9028 and 9034, and the output buffers 9024 and 9026. The processor also receives the digital signal 9044 from an analog-to-digital converter (ADC) 9038 and controls an analog multiplexer 9030.

[0026] The output of the first voltage source 1002 is defined via its output impedance 3002 [ Fig. 3] connected to the HC terminal and the DUT 1008. The output impedance 3002 connects to the output impedance 3006 of the buffer 9024 [ Fig. 9], the series resistance 3004, the wire impedance 3008 and the capacitance of the cable 3010 between the HC terminal 1004 of the LCR measuring device and the DUT 1008.

[0027] One side of the DUT 1008, which is connected to the HC terminal 1004, is also connected to the HP terminal 1006. Another side of the DUT 1008 is connected to the LP terminal 1010 and the LC terminal 1016.

[0028] The output of the second voltage source 1022 is connected to the second terminal of the measuring resistor 1018 via its output impedance 3018. The first terminal of the range resistor is connected to the DUT 1008 via the LC terminal 1016 and the cable between the LC terminal and the DUT 1008. The output impedance 3018 of the second voltage source 1022 comprises [ Fig. 3] the output impedance 3020 of the buffer 9026, an impedance of the range resistance multiplexer 3016 and the capacitance of the multiplexer 3014.

[0029] The HP terminal 1006 is connected to the normally closed input of switch 9004, whose output is connected to input buffer 9016. The LP terminal 1010 is connected to the normally closed input of switch 9006, whose output is connected to input buffer 9018. The LC terminal 1016 is connected to the normally closed input of switch 9008, whose output is connected to input buffer 9020. The second terminal of the measuring resistor 1018, opposite the LC terminal, is connected to the normally closed input of switch 9010, whose output is connected to input buffer 9022. The outputs of input buffers 9016, 9018, 9020, and 9022 are connected to the inputs of multiplexer 9030, whose output is connected to ADC 9038 via buffer 9032. The normally open inputs of switches 9004, 9006, 9008, and 9010 are connected to the output of switch 9012.The normally closed input of switch 9012 is connected to earth, and the normally open input is connected to the output of the second voltage source 1022.

[0030] In the first embodiment, the protection can also serve to reduce the voltage between the center point and the cable shield. In this case, all equations are the same; the only difference is that the leakage impedance is higher. Functioning of the first embodiment

[0031] In the first embodiment, the measurement of leakage impedance, the measurement of series impedances and the equalization of input buffers are performed [ Fig. 9] performed during the idle / short circuit calibration. Leakage calibration and compensation

[0032] [ Fig. Figure 2 shows a method for measuring leakage impedance.

[0033] The procedure includes the following: Adjusting the open state of the holder by removing a DUT; Applying a predetermined voltage across a predetermined impedance of the area resistance; Measuring the voltage at the open bracket; Eliminating the influence of the open-circuit clamp by setting the same voltage at the HP terminal as at the LP terminal and adjusting it in a predetermined number of iterations to obtain the closest values ​​of these voltages in order to reduce the current through the open-circuit clamp; Measure the voltages across the leakage impedance and the area resistance; calculate the leakage impedance.

[0034] To set the required voltages at the HP terminal, a value for the input signal of the first voltage source is calculated using the procedure in equations 22 and 23.

[0035] [Math. 1] The leakage impedance: Zleak=Vlp*Zrange / (Vlc−Vrr)

[0036] All values ​​are complex.

[0037] During the measurement of the parameters of a DUT, the leakage impedance is used to calculate a leakage current and compensate for its influence by subtracting a current value from a current through the area resistance. Calibration of series impedances

[0038] [ Fig.Figure 3 shows a method for measuring the series impedances, which includes the output impedances of the first 3002 and second 3018 voltage sources and the impedance of the wire between the DUT and the LC terminal 3012. The impedance of the cable wire 3012 between the DUT and the LC terminal and the output impedances of the two voltage sources are necessary to establish a near-zero equalization voltage. Both open-circuit and short-circuited measurement logics are required for measuring and calculating the series impedances. During the calibration process, both sets of all measured voltages, open-circuit and short-circuited, are stored and used to calculate the series impedances.

[0039] [Math. 2] A change in current of the first voltage source: dI1=(Vlc_short−Vrr_short) / Zrange+Vlp_short / Zleak

[0040] [Math. 3] A change in current of the second voltage source: dI2=(Vlc_short−Vrr_short) / Zrange−Vrr_open / (Zleak+Zrange)

[0041] [Math. 4] The output impedance of the first voltage source: Zout1=(Vrr_open−Vrr_short) / dI1

[0042] [Math. 5] The output impedance of the second voltage source: Zout2=(Vrr_open−Vrr_short) / dI2

[0043] [Math. 6] The impedance of the wire between the DUT and the LC terminal: Zwire2=(Vlp_short−Vlc_short) / dl2

[0044] All values ​​are complex. Equalization procedure

[0045] The first embodiment [ Fig.9] can perform an equalization calibration to automatically eliminate gain and phase mismatches of the input buffers without user intervention. The structure of the first embodiment, with independently measured voltages at the input terminals and the range resistance relative to ground, enables equalization calibration by simultaneously supplying the same predefined voltage to all input buffers. Fig.Figure 9 shows the normally closed initial position of switches 9004, 9006, 9008, 9010, and 9012. For equalization, during calibration, these switches must be set to the opposite position so that the input buffers are connected to the common point with a common voltage for all channels. Then, a predetermined voltage from the second voltage source must be applied, the voltages at the input buffers or voltage channels measured, and correction coefficients calculated and stored. One of the input channels must be assigned as a reference, for example, the LP channel.

[0046] [Math. 7] A correction coefficient for the HP input buffer 9016: Chp=Vlp / Vhp

[0047] [Math. 8] A correction coefficient for the LP input buffer 9018: Clp=Vlp / Vlp

[0048] [Math. 9] A correction coefficient for the LC input buffer 9020: Clc=Vlp / Vlc

[0049] [Math. 10] A correction coefficient for the range resistance input buffer 9022: Crr=Vlp / Vrr

[0050] [Math. 11] During the measurement time, the corrected voltage will then be as follows: Vxx_corr=Vxx_raw*Cxx Low-level processing

[0051] The first embodiment uses a structure with an ADC and a four-channel multiplexer to switch the voltage channels more cost-effectively. Fig. 4] shows the input voltages, and [ Fig. Figure 5 shows the voltages at the ADC input. Since switching multiplexer channels generates commutation noise, the noisy part of the time intervals after switching must be excluded from the ADC signal processing. Fig. [6] shows noisy and correct time intervals.

[0052] According to the Nyquist theorem, the sampling frequency must be more than twice the signal bandwidth. Measuring the vector voltage by direct Fourier transform (DFT) requires at least one full period of the signal frequency. Therefore, the minimum time required to measure the vector voltage is limited by one period of the signal frequency and at least three ADC samples for each measured voltage. Consequently, all voltages must be measured simultaneously. Fig. 5], and at least three sample groups must be present. Equations 12...16 describe the condition for low and medium frequencies when a minimum measurement time is required.

[0053] [Math. 12] A trial period: Tsample=1 / Fsample

[0054] [Math. 13] One signal period: Tsignal=1 / Fsignal

[0055] [Math. 14] A buffer time interval: Tbuffer = Tsample * Buffer Size

[0056] [Math. 15] A group interval for samples: Tsamplegroup=Tbuffer*Nchannels

[0057] [Math. 16] A minimum measurement time: Tmeas_min=Tsignal=M*Tsamplegroup(M≥3)

[0058] BufferSize, Nchannels, and M are integer values. BufferSize is the size of the buffers for direct memory access (DMA), Nchannels is the number of voltage channels, and M is the number of sample groups.

[0059] [ Fig. Figure 11 shows the signal processing of the first embodiment in more detail. The control and processing core 9048 includes low-level processing of instantaneous digital values ​​of the input and output voltages and high-level processing of digital representations of these voltages to compute the results in the control and processing core 11016.

[0060] The low-level processing includes the digital direct synthesizer 11014, the first 11002 and second 11004 memory buffer sets for storing samples of the input and output voltages, the reference values, the multipliers for the DFT 11008 and 11010, the demultiplexer and the accumulators 11012 for separating the input voltage samples from different voltage channels and for accumulating in the DFT process, the interfaces for transferring the digital signals S1 and S2 to the DACs 9042, 9046 and the interface for transferring the digital signal from the ADC 9038 to the memories 11002 and 11004. To speed up processing, DMA is used to transfer data from memory to the DACs 9036 and 9040 and from the ADC 9038 to memory 11002 and 11004.

[0061] The flowcharts in [ Fig.Figure 12 illustrates the data processing sequence. First, the ADC data and the reference data already entered in the previous DMA cycle are processed. This data is used for the DFT. Second, the data for the next DMA cycle is prepared. This data is used for the DACs and the DFT. The reference data is populated with the DAC data to save time during DFT processing. The "SetVoltageChannel()" procedure switches the 9030 multiplexer to the next channel.

[0062] This processing is described for implementation in a processor, but can also be implemented in microcontrollers, DSPs, FPGAs, ASICs and other hardware. Fast-track settlement procedure

[0063] In the first embodiment, the fast adjustment method is used. If the leakage impedance is already known from a previous calibration, the adjustment conditions can be calculated after only one voltage measurement. However, the known leakage impedance has limited accuracy because slight changes in the cable geometry of the support are possible, which can alter the cable capacitance. Furthermore, the leakage impedance depends on the ambient temperature. Therefore, the initial calculation of the DUT impedance without adjustment will have limited accuracy. It is used to achieve adjustment and to calculate the DUT impedance after adjustment. Moreover, higher accuracy can be achieved by applying the leakage compensation method. Equations 17–34 show how the fast adjustment conditions can be calculated.

[0064] [Math. 17] Current through the area resistance: Irange=(Vlc−Vrr) / Zrange

[0065] [Math. 18] Current through the leakage impedance: Leak = −Vlp / Zleak

[0066] [Math. 19] Current through the DUT: Idut=Irange+Ileak

[0067] [Math. 20] The rough impedance of the DUT: Zdut=(Vhp−Vlp) / Idut

[0068] [Math. 21] Electrical kinetic energy (EMF) of the first voltage source: EMF1=Vhp+Idut*Zout1

[0069] [Math. 22] EMF of the second voltage source: EMF2=Vrr−Irange*Zout2

[0070] Equalization conditions for the first voltage source as an unset voltage and the second voltage source as a set voltage (LCR is in constant voltage mode): [Math. 23] Equilibrium condition: Vlp=0

[0071] [Math. 24] New current through the DUT: Idut_new=EMF1 / (Zdut+Zout1)

[0072] [Math. 25] New current through the area resistance: Irange_new=Idut_new

[0073] [Math. 26] New EMF of the second voltage source: EMF2new=Irange_new*(Zwire2+Zrange+Zout2)

[0074] [Math. 27] Correction coefficient for the EMF of the second voltage source: CorrCoeff=EMF2new / EMF2

[0075] [Math. 28] The new value of the digital signal for the second voltage source: S2new=CorrCoeff*S2

[0076] Equalization conditions for the second voltage source as an unset voltage and the first voltage source as a set voltage (LCR is in constant current mode): [Math. 29] Equilibrium condition: Vlp=0

[0077] [Math. 30] New current through the area resistance: Irange_new=−EMF2 / (Zwire2+Zrange+Zou2)

[0078] [Math. 31] New current through the DUT: Idut_new=Irange_new

[0079] [Math. 32] New EMF of the first voltage source: EMF1new=Idut_new*(Zdut+Zout1)

[0080] [Math. 33] Correction coefficient for the EMF of the first voltage source: CorrCoeff=EMF1new / EMF1

[0081] [Math. 34] The new value of the digital signal for the first voltage source: S1new=CorrCoeff*S1

[0082] All values ​​are complex.

[0083] Calculating the correction coefficient (CorrCoeff) as the ratio between new and old EMFs is the implicit replacement for explicitly calculating the frequency response of the low-pass filter (LPF). Fig.Figure 7 shows an example of the amplitude and phase frequency response of a high-order LPF for an LCR measuring device with a maximum signal frequency of 1 MHz and a sampling rate of 3 Msps. Calculating the CorrCoeff allows the need to eliminate the need for calibrating LPFs with very steep slopes at high frequencies.

[0084] After setting the balancing conditions, the control and processing unit must wait for the voltage to stabilize and then start the measurement under balanced conditions. After the precise measurement under the balanced voltage conditions, repeat the calculation of the DUT parameters using equations 17-20. Advantages of the first embodiment

[0085] At least half the time required for alignment compared to all other methods, excluding transimpedance amplifiers and protection. A single ADC ensures low production costs. Channel equalization allows the use of higher-frequency signals at a lower cost. Disadvantages of the first embodiment

[0086] Measuring three-terminal capacitors requires more than one adjustment cycle or special calibration, such as leakage calibration for each individual three-terminal capacitor. Fig. 2], since they have a certain input capacitance to earth that was not included in the stored leakage impedance. Second embodiment

[0087] The second embodiment [ Fig.

[10] In contrast to the first embodiment, the second embodiment includes four parallel channels for voltage measurement without multiplexing, with additional ADCs 10002, 10004 and 10006 and additional digital signals 10008, 10010 and 10012 to accelerate measurements at high frequencies. The second embodiment uses the fast compensation method of the first embodiment and functions similarly.

[0088] The advantage of the second embodiment is the ability to simplify low-level processing by eliminating direct memory access, increasing the signal-to-noise ratio, and accelerating measurements. Industrial applicability

[0089] The present invention can be used in any industry where impedance measurements are required. The present invention significantly reduces the cost of manufacturing impedance measuring instruments and increases the speed of measurements. List of reference texts

[0090] List of reference texts follows: Patent literature US Patents Patent number Art code Date of issue Patent holder 10,013,015 B2 2018-07-03 Ida et al. 9,910,074 B2 2018-03-06 Lindell et al. 7,616,008 B1 2009-11-10 Rayman et al. US patent documents added by examiner Robert P Olejnikov 20210333348 A1 2021-10 Fortney; Houston 20200135441 A1 2020-04 Jones; Anthony Michael 20140348502 A1 2014-11 Miura; Tomoko 8547135 B1 2013-10 Yarlagadda; Archana 6028309 A 2000-02 Parrish; William J. Foreign patent documents Foreign document. Country code Publication date Patent holder 110320410A CN 2019-10-11 Fajie et al. Non-patented literature Zhang et al. A Novel Fast Balance Technique for the Digital AC Bridge (April 1998) A History of Impedance Measurements by Henry P. Hall Keysight E4980A Precision LCR Meter Datasheet (2021) Keysight Impedance Measurement Handbook 6th Ed (2021) QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] US 7,616,008 B1 [0008, 0090] CN 110320410A [0009, 0090] US 10,013,015

[0090] US 9,910,074

[0090] US 20210333348

[0090] US 20200135441

[0090] US 20140348502

[0090] US 8547135

[0090] US 6028309

[0090] Cited non-patent literature

[0000] A History of Impedance Measurements by Henry P. Hall“ S.49 [0005, 0006, 0008] Zhang et al. A Novel Fast Balance Technique for the Digital AC Bridge (April 1998)

[0090] A History of Impedance Measurements von Henry P. Hall

[0090] Keysight E4980A Precision LCR Meter Datasheet (2021)

[0090] Keysight Impedance Measurement Handbook 6th Ed (2021)

[0090]

Claims

[1] Fast compensation method for impedance measurement with compensation of leakage impedance, comprising: Providing an LCR meter with: a high-current terminal (HC), a high-voltage terminal (HP), a low-voltage terminal (LP), a low-current terminal (LC), a bracket for connection to a device under test (DUT), a set of reference resistors having first and second terminals, the first terminal being connected to the LC terminal, a first voltage source comprising an output, wherein the output of the first voltage source is connected to the HC terminal, a second voltage source comprising an output, the output of the second voltage source being connected to the second terminal of the set of reference resistors, a processor comprising a memory, the processor being capable of Voltages at the HP terminal, the LP terminal, the LC terminal, the second terminal of the set of reference resistors and the output of the second to measure voltage source; Attach the bracket to the HC, HP, LP and LC terminals; Setting an impedance of the set of reference resistors to a first predetermined value; Setting the output of the first voltage source to a first predetermined voltage; Setting the output of the second voltage source to a second predetermined voltage; Taking a first measurement of a leakage impedance of the fixture and the LCR meter; Storing the first measurement in the processor memory; Setting the impedance of the set of reference resistors to a second predetermined value; Taking second measurements of the series impedances for the bracket, the first voltage source and the second voltage source; Storing the second measurements in the memory of the processor; Attaching a DUT to the bracket; Setting the impedance of the set of reference resistors to a third predetermined value; Setting the output of the first voltage source to a third predetermined voltage; Setting the output of the second voltage source to a fourth predetermined voltage; Taking third measurements of voltages at the HP terminal, the LP terminal, the LC terminal and the second terminal of the set of reference resistors; Calculate the impedance value of the DUT using the first measurement; Calculate specific voltages that, when applied to the outputs of the first and second voltage sources would result in a zero voltage at the LP terminal using the second measurements; Setting the outputs of the first and second voltage sources to the specific voltages; Measuring fourth measurements of voltages at the HP terminal, the LP terminal, the LC terminal and the second terminal of the set of reference resistors; and Calculate the impedance value of the DUT with the zero voltage at the LP terminal using the fourth measurements.

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