CNS PROTECTION WITH SMALL SLC CACHE USING ZONE GROUPS

Abstract

The present disclosure generally relates to achieving an acceptable uncorrectable bit error rate (UBER) using a dual approach to temporary data protection and a small SLC cache by adding temporary XOR protection to zone sets, rather than storing another copy of the zone within the drive. The parity data may be stored with the user data (e.g., as part of the zone set, effectively increasing the zone set size by 1) or in a separate location, e.g., in an SLC block or another separate MLC block.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Non-Provisional Application No. 18 / 354,446, entitled "CNS Protection With Small SLC Cache Using Zone Groups," filed July 18, 2023, in the U.S. Patent and Trademark Office, which claims priority to U.S. Provisional Application No. 63 / 478,280, filed January 3, 2023, and hereby incorporates the entire contents by reference for all purposes. BACKGROUND OF REVELATIONSField of Revelation

[0002] Embodiments of the present disclosure generally relate to writing in a Zone Namespace (ZNS) environment. Description of the state of the art

[0003] Zoned namespace (ZNS) architectures for a solid-state drive (SSD) require the host application(s) to always perform sequential writes and free data at the boundaries of the drive's block size, thus eliminating the need for garbage collection (GC) operations on the drive and overprovisioning to support GC. Thus, a ZNS provides better utilization of drive space and longer endurance.

[0004] ZNS zone groups combine multiple small zones that are jointly allocated and accessed jointly when writing and possibly reading data to or from the zone group. Zone groups are designed to accelerate performance by allowing the system to write to multiple level blocks and even multiple dies in parallel. When using zone groups, the host commits to perfect interweaving of writes from different zones within the same zone group.

[0005] In "small zone" ZNS SSDs, the zones can be as small as a single erase block of a storage device (e.g., NAND) on a single level. In a small zone ZNS SSD, there is no way to maintain permanent XOR parity protection across multiple levels / dies, as each zone spans a limited number of levels or even a single level, and the lifetime of different zones varies. Therefore, small zone ZNS SSDs typically do not have permanent XOR parity protection in the storage device to recover from defects or high BER values ​​that may occur after the zone is written. Given this expectation, the uncorrectable bit error rate (UBER) requirements are typically set to 1 uncorrectable error correcting code (UECC) in 10 14 sectors compared to 1 typical UECC in 10 17 lowered.

[0006] However, even with the reduced UBER requirements, without full zone protection (also known as block protection), incoming host write data is vulnerable to errors that can result in the required 1 UECC in 10 14 is not achieved. Therefore, in typical implementations, another copy of the zone data is stored on the drive (e.g., by writing zones to a single-level cell (SLC) or elsewhere), a multilevel cell (MLC), such as a triple-level cell (TLC) or quad-level cell (QLC), and no error is detected during the zone programming phase. This other copy can be written as a first stage, and then the data is copied to MLC, or the other copy may also be written in parallel with the data being written to MLC. This other copy can be used to recover the entire zone data in the event of an error.

[0007] There are several types of errors that can occur on an SSD. Some errors are limited to a small amount of the most recently written data, and some errors can result in the loss of large sections of the write-to erase block, possibly even the entire data. To meet 1e-14 UBER requirements, some systems must support data recovery of the entire zone (or a large section of the zone) during the MLC programming phase until the data is successfully written. Therefore, the "other copy" of the zone should be allocated for the entire zone programming phase.

[0008] A small-zone ZNS SSD may support many open small zones that can be written in parallel, for example, 16,000 open zones per 64 TB drive. In parallel, the size of a single erase block can be large, such as 200 MB. Therefore, storing another copy of all open zones on the SSD results in a significant portion of the drive's capacity being lost, thus significantly increasing SSD costs.

[0009] Therefore, there is a need in technology to achieve the required UBER with a different scheme. SUMMARY OF REVELATION

[0010] The present disclosure generally relates to achieving an acceptable uncorrectable bit error rate (UBER) using a dual approach to temporary data protection and a small SLC cache by adding temporary XOR protection to zone sets, rather than storing another copy of the zone within the drive. The parity data may be stored with the user data (e.g., as part of the zone set, effectively increasing the zone set size by 1) or in a separate location, e.g., in an SLC block or another separate MLC block.

[0011] In one embodiment, the "independent zones" protection scheme still uses the traditional method by storing another copy of the zone data for the zone programming phase. When the host opens a new zone, the host determines whether the zone should be assigned as part of a zone group or as an "independent zone." The controller should specify during initialization how many open zones are supported when opened as part of a "zone group" and how many open zones are supported when opened as "independent zones." The controller also specifies the size of a zone group. The number of "independent zones" is likely to be significantly smaller than the total number of open zones.For example, if the number of "independent zones" is 25% of all open zones and the zone group size is 16, the total storage space required to protect all zones will be < 30% compared to the storage space required if all zones were protected by maintaining an "extra copy" of the data. This allows for significant cost savings on the SSD drive.

[0012] In another embodiment, a data storage device comprises: a storage device; and a controller coupled to the storage device, the controller configured to: receive a write command for one or more zones in a zoned namespace (ZNS) environment of the storage device; determine whether the write command is to write data to an independent zone or to a zone of a zone set; generate parity data for user data corresponding to the write command if it is a zone of a zone set; and store the parity data.

[0013] In another embodiment, a data storage device with a small SLC cache and a dual approach to temporarily protecting data comprises: a storage device; and a controller coupled to the storage device, the controller configured to temporarily store the exclusive-OR (XOR) parity data of a plurality of open zone groups in memory and to store another temporary copy of the user data of independent zones without XOR parity in a small SLC cache or in MLC.

[0014] In another embodiment, a data storage device comprises: a memory device; and a controller coupled to the memory device, the controller configured to: open one of an independent zone and a zone within a zone group based on a command received from a host device; and write to one of the independent zone and the zone within the zone group.

[0015] In another embodiment, a data storage device comprises: means for storing data; and a controller coupled to the means for storing data, the controller configured to: allocate a first predetermined amount of the means for storing data for independent zones; and allocate a second predetermined amount of the means for storing data for groups of zones, wherein the second predetermined amount is greater than the first predetermined amount. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order that the above-mentioned features of the present disclosure may be understood in detail, a more particular description of the disclosure, briefly summarized above, follows with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments. Fig. 1 is a schematic block diagram illustrating a storage system in which a data storage device may function as a storage device for a host device, according to certain embodiments. Fig. 2 is a schematic illustration of writing to zones in a CNS environment according to one embodiment. Fig. 3 is a schematic illustration of writing to zones in a CNS environment according to another embodiment. Fig. 4 is a flowchart illustrating a method for writing to zones in a CNS environment according to one embodiment.

[0017] To facilitate understanding, identical reference numerals have been used, wherever possible, to designate identical elements present throughout the figures. It is understood that elements disclosed in one embodiment may be advantageously utilized in other embodiments without specific mention. DETAILED DESCRIPTION

[0018] Reference is made below to embodiments of the disclosure. However, it should be understood that the disclosure is not limited to the specific embodiments described. Rather, any combination of the following features and elements, whether or not related to different embodiments, is intended to implement and practice the disclosure. Furthermore, although embodiments of the disclosure may achieve advantages over other possible solutions and / or over the prior art, whether or not a particular advantage is achieved by a given embodiment does not constitute a limitation of the disclosure.Thus, the following aspects, features, embodiments, and advantages are merely illustrative and are not to be considered elements or limitations of the appended claims unless expressly recited in one or more claims. Likewise, a reference to "the disclosure" is not to be construed as a generalization of any subject matter disclosed herein and is not to be considered elements or limitations of the appended claims unless expressly recited in one or more claims.

[0019] The present disclosure generally relates to achieving an acceptable uncorrectable bit error rate (UBER) using a dual approach to temporary data protection and a small SLC cache by adding temporary XOR protection to zone sets, rather than storing another copy of the zone within the drive. The parity data may be stored with the user data (e.g., as part of the zone set, effectively increasing the zone set size by 1) or in a separate location, e.g., in an SLC block or another separate MLC block.

[0020] Fig. 1 is a schematic block diagram illustrating a storage system 100 including a data storage device 106 that may function as a storage device for a host device 104, according to certain embodiments. For example, the host device 104 may utilize a non-volatile memory (NVM) 110 included in the data storage device 106 to store and retrieve data. The host device 104 includes a host DRAM 138. In some examples, the storage system 100 may include a plurality of storage devices, such as the data storage device 106, that may function as a storage array. For example, the storage system 100 may include a plurality of data storage devices 106 configured as a redundant array of low-cost / independent disks (RAID) that collectively function as a mass storage device for the host device 104.

[0021] The host device 104 may store and / or retrieve data on one or more storage devices, such as the data storage device 106. As in Fig. 1, the host device 104 may communicate with the data storage device 106 via an interface 114. The host device 104 may include a wide variety of devices, including computer servers, network attached storage (NAS) units, desktop computers, notebook computers (i.e., laptops), tablet computers, set-top boxes, telephone handsets such as so-called "smartphones," so-called "smart pads," televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, or other devices capable of sending or receiving data to or from a data storage device.

[0022] The host DRAM 138 may optionally include a host memory buffer (HMB) 150. The HMB 150 is a portion of the host DRAM 138 dedicated to the data storage device 106 for exclusive use by a controller 108 of the data storage device 106. For example, the controller 108 may store mapping data, buffered instructions, logical-to-physical (L2P) tables, metadata, and the like in the HMB 150. In other words, the HMB 150 may be used by the controller 108 to store data that would normally be stored in volatile memory 112, a buffer 116, internal memory of the controller 108, such as static random access memory (SRAM), and the like. In examples where the data storage device 106 does not include DRAM (i.e., optional DRAM 118), the controller 108 may use the HMB 150 as the DRAM of the data storage device 106.

[0023] The data storage device 106 includes the controller 108, NVM 110, a power supply 111, a volatile memory 112, the interface 114, a write buffer 116, and an optional DRAM 118. In some examples, the data storage device 106 may include additional components, which are not shown for clarity. Fig. 1. For example, the data storage device 106 may include a printed circuit board (PCB) to which components of the data storage device 106 are mechanically attached and which includes electrically conductive traces that electrically interconnect components of the data storage device 106, or the like. In some examples, the physical dimensions and connection configurations of the data storage device 106 may conform to one or more standard form factors. Some examples of standard form factors include, but are not limited to, 3.5-inch data storage devices (e.g., an HDD or SSD), 2.5-inch data storage devices, 1.8-inch data storage devices, Peripheral Component Interconnect (PCI), PCI-Extended (PCI-X), PCI Express (PCIe) (e.g., PCIe x1, x4, x8, x16, PCIe Mini Card, MiniPCI, etc.).In some examples, the data storage device 106 may be directly coupled to a motherboard of the host device 104 (e.g., directly soldered or plugged into a connector).

[0024] The interface 114 may include a data bus for exchanging data with the host device 104 and / or a control bus for exchanging commands with the host device 104. The interface 114 may operate according to any suitable protocol. For example, the interface 114 may operate according to one or more of the following protocols: Advanced Technology Attachment (ATA) (e.g., Serial ATA (SATA) and Parallel ATA (PATA)), Fiber Channel Protocol (FCP), Small Computer System Interface (SCSI), Serially Attached SCSI (SAS), PCI and PCIe, Non-Volatile Memory Express (NVMe), OpenCAPI, GenZ, Cache Coherent Interface Accelerator (CCIX), Open Channel SSD (OCSSD), or the like. The interface 114 (e.g.,The interface 114 (the data bus, the control bus, or both) is electrically connected to the controller 108 and provides an electrical connection between the host device 104 and the controller 108 such that data can be exchanged between the host device 104 and the controller 108. In some examples, the electrical connection of the interface 114 may also enable the data storage device 106 to receive power from the host device 104. For example, as shown in FIG. Fig. 1, the power supply 111 may receive power from the host device 104 via interface 114.

[0025] The NVM 110 may include a plurality of storage devices or storage units. NVM 110 may be configured to store and / or retrieve data. For example, a storage unit of the NVM 110 may receive data and a message from controller 108 instructing the storage unit to store the data. Similarly, the storage unit may receive a message from controller 108 instructing the storage unit to retrieve data. In some examples, each of the storage units may be referred to as a die. In some examples, the NVM 110 may include a plurality of dies (i.e., a plurality of storage units). In some examples, each storage unit may be configured to store relatively large amounts of data (e.g., 128 MB, 256 MB, 512 MB, 1 GB, 2 GB, 4 GB, 8 GB, 16 GB, 32 GB, 64 GB, 128 GB, 256 GB, 512 GB, 1 TB, etc.).

[0026] In some examples, each memory unit may include any type of non-volatile memory device, such as flash memory devices, phase change memory (PCM) devices, resistive random access memory (ReRAM) devices, magnetoresistive random access memory (MRAM) devices, ferroelectric random access memory (F-RAM), holographic memory devices, and any other type of non-volatile memory device.

[0027] The NVM 110 may include a plurality of flash memory devices or memory units. NVM flash memory devices may include NAND- or NOR-based flash memory devices and may store data based on a charge contained in a floating gate of a transistor for each flash memory cell. In NVM flash memory devices, the flash memory device may be divided into a plurality of dies, where each die of the plurality of dies includes a plurality of physical or logical blocks, which may be further divided into a plurality of pages. Each block of the plurality of blocks within a particular memory device may include a plurality of NVM cells. Rows of NVM cells may be electrically connected using a wordline to define one of a plurality of pages.Respective cells in each of the plurality of pages may be electrically connected to respective bitlines. Furthermore, NVM flash memory devices may be 2D or 3D devices and may be of the single-level cell (SLC), multi-level cell (MLC), triple-level cell (TLC), or quad-level cell (QLC) type. Controller 108 may write and read data to and from NVM flash memory devices at the page level and erase data from NVM flash memory devices at the block level.

[0028] The power supply 111 may provide power to one or more components of the data storage device 106. When operating in default mode, the power supply 111 may provide power to one or more components using power provided by an external device, such as the host device 104. For example, the power supply 111 may provide power to the one or more components using power received from the host device 104 via interface 114. In some examples, the power supply 111 may include one or more power storage components configured to provide power to the one or more components when in shutdown mode, such as when power is no longer received from the external device.In this way, the power supply 111 may function as an integrated backup power source. Some examples of the one or more power storage components include, but are not limited to, capacitors, supercapacitors, batteries, and the like. In some examples, the amount of power that can be stored by the one or more power storage components may be a function of the cost and / or size (e.g., area / volume) of the one or more power storage components. In other words, as the amount of power stored by one or more power storage components increases, the cost and / or size of the one or more power storage components also increases.

[0029] The volatile memory 112 may be used by the controller 108 to store information. The volatile memory 112 may include one or more volatile storage devices. In some examples, the controller 108 may use the volatile memory 112 as a cache. For example, the controller 108 may store cached information in the volatile memory 112 until the cached information is written to the NVM 110. As shown in Fig. 1, the volatile memory 112 may consume power received from the power supply 111. Examples of volatile memory 112 include, but are not limited to, random access memory (RAM), dynamic random access memory (DRAM), static RAM (SRAM), and synchronous dynamic RAM (SDRAM (e.g., DDR1, DDR2, DDR3, DDR3L, LPDDR3, DDR4, LPDDR4, and the like)). Likewise, the optional DRAM 118 may be utilized to store mapping data, buffered instructions, logical-to-physical (L2P) tables, metadata, cached data, and the like in the optional DRAM 118. In some examples, the data storage device 106 does not include the optional DRAM 118, so the data storage device 106 does not include DRAM. In other examples, the data storage device 106 includes the optional DRAM 118.

[0030] The controller 108 may manage one or more operations of the data storage device 106. For example, the controller 108 may manage reading data from and / or writing data to the NVM 110. In some embodiments, when the data storage device 106 receives a write command from the host device 104, the controller 108 may initiate a data store command to store data in the NVM 110 and monitor the progress of the data store command. The controller 108 may determine at least one operational characteristic of the storage system 100 and store at least one operational characteristic in the NVM 110. In some embodiments, when the data storage device 106 receives a write command from the host device 104, the controller 108 temporarily stores the data associated with the write command in the internal memory or write buffer 116 before sending the data to the NVM 110.

[0031] The controller 108 may include an optional second volatile memory 120. The optional second volatile memory 120 may be similar to the volatile memory 112. For example, the optional second volatile memory 120 may be SRAM. The controller 108 may allocate a portion of the optional second volatile memory to the host device 104 as a controller memory buffer (CMB) 122. The CMB 122 may be directly accessed by the host device 104. For example, instead of maintaining one or more submission queues in the host device 104, the host device 104 may utilize the CMB 122 to store the one or more submission queues normally maintained in the host device 104.In other words, the host device 104 may generate instructions and store the generated instructions with or without the associated data in the CMB 122, with the controller 108 accessing the CMB 122 to retrieve the stored generated instructions and / or the associated data.

[0032] As explained herein, ZNS uses zones in the memory device to store data. Traditional zones are quite large and may be referred to as single zones or independent zones. There is an emerging trend in the industry toward smaller zones, where the small zones can be grouped together to achieve the size of a traditional or independent zone. Such small zones grouped together are referred to as a zone group. An example of a small zone of a zone group is one level in a memory device die, while an independent or single zone may include multiple dies. Therefore, a zone group may span multiple dies.

[0033] One way to address a lack of zone protection is to stage all incoming host write zone data in SLC. The data would then be copied to QLC after the entire zone has been written. This allows data to be recovered from SLC if a block error occurs while programming the data into QLC. The approach also applies to zone groups, where the individual small zones of the zone group are written to SLC and only copied to QLC after the entire zone group has been written to SLC. In both cases, the SLC can be deallocated and / or deleted once the data in QLC is present and valid.

[0034] Fig. 2 is a schematic illustration 200 of writing to zones in a CNS environment according to one embodiment. As in Fig. As shown in Figure 2, incoming zone data, whether small zones or a single zone, is multiplexed into the SLC cache. Once all data is in the SLC cache, the data is demultiplexed and written to QLC. Due to QLC's 4-level programming, demuxing occurs for 4 full zones at a time. The data in QLC can optionally be validated. Regardless, after all data is written to QLC or after validation, the SLC cache is no longer needed for the data, and garbage collection of the SLC cache may occur.

[0035] It is intended that the data can be written to SLC and then copied to QLC. Alternatively, it is also intended that the data can be written to SLC in parallel with being written to QLC. One of the copies of the data (usually the data written to SLC, but it could also be the data written to QLC) is a temporary copy that can be used to protect the data written at the other location. It is also intended that the data can be written not to SLC, but to other locations such as MLC or even QLC. In each of the scenarios, a record is temporary and is retained until the data is written to both locations and validated at the permanent location. Once the data at the permanent location is valid, the temporary data can be discarded.

[0036] To protect the data and possibly recover it after possible bit flips, parity data can be created for the incoming zone data, which is multiplexed in SLC. As in Fig. As shown in Figure 2, parity data can be included in a die such as Die 31. The temporary data copy in SLC can be written across multiple levels / dies and can also be protected by parity data. The parity data can be used in situations where data is first written to SLC and then errors occur; the errors can be corrected. More specifically, if errors occur, the data is recovered using the parity data. Once there are no more errors, the data can be copied to QLC. Should errors occur during copying to QLC, the copy stored in SLC can be used to recover the data. In one embodiment, the parity data is exclusive or (XOR) parity data. The parity data can be stored in SLC along with the incoming zone data, which is multiplexed.In one embodiment, the parity data may be stored in a location separate from the SLC. In the embodiment shown in . Fig. In the embodiment shown in Figure 2, it can be seen that the zone data is arranged on 31 dies, and a separate die is allocated to the parity data. In one embodiment, the parity data is not written to QLC. In another embodiment, the parity data is written to QLC.

[0037] For ZNSs with small zones, deploying all zone data in SLC can consume a significant amount of SLC memory. For example, with 256 open zones per 1 TB, the SLC cache size must be determined based on the number of active zones for the drive plus some additional SLC capacity (OP). The reason for sizing and OP is that some SLC garbage collection (GC) is likely to occur. Even if each zone is a single NAND QLC erase block, the number of blocks in the SLC cache for 32 TB and 64 TB ZNS drives means the SLC cache size becomes enormous.

[0038] One way to reduce the huge SLC cache is to use Zone Write Groups (ZWGs) to assist data storage devices and host devices in data recovery. The ZNS would include host zones and parity zones. The data storage device controller receives an indication of corrupted data associated with the ZNS, requests one or more buffers stored in the ZWG, and performs data recovery using the one or more buffers. This scenario involves releasing the ZWGs' data and parity blocks only after all participating zones have been released by the host. More specifically, the use of parity blocks is only temporary for the time the data is being programmed; later, the parity blocks are released and the data is no longer protected.This scenario can be a significant disadvantage because while the host can release the zones independently, it cannot use the reclaimed space until the last zone is released.

[0039] One suggestion for reducing the SLC cache size is to keep only the last few WLs programmed for each zone in the SLC. This should allow for recovering from errors limited to the last few WLs, but does not allow for recovery from block-level errors. In many NAND generations, block-level errors alone can have an UBER of 1e. -12 reach what is too high and not the 1e -14-requirements. Due to the high UBER, additional SLC caching of the entire zone is not necessary, as even with block-level SLC caching, failures would still be a problem. Caching only the last few word lines, including the last word line, saves a significant amount of SLC cache, allowing the SLC cache size to be reduced.

[0040] As explained here, data can be protected using a dual approach. The first part of the dual approach involves using temporary parity for data written as zone groups, eliminating and / or reducing the SLC cache size. As mentioned above, zone groups are multiple zones that are written to concurrently to achieve a specific minimum write performance, such as 100 MB / s. Zone groups can be used in a system that allows direct writing to the QLC block (such as the MLC / FN programming scheme) or in a system that requires data to be provisioned by SLC (such as in an FG / FN programming scheme). However, the first part of the approach allows block-level errors to be recovered even if only a limited portion of the zone remains in the SLC area, as required for FG / FN provisioning.

[0041] The second part of the dual approach is to provide all zone data for independent zones through the SLC cache. An independent zone could be written if there is no minimum performance requirement (for example, writing a single NAND erase block would only provide 6 to 7 MB / s) and the application does not want to write the amount of data from a zone group at once. It is assumed that the number of independent open zones required is significantly less than the total number of open zones, and therefore the SLC cache size decreases proportionally to the number.

[0042] Maintaining parity (e.g., XOR parity) within a parity stripe (i.e., jumbo block) until all data has been invalidated and deallocated doesn't work well with zone sets, because zones (i.e., each level block) can be deallocated independently at different times, which would result in garbage collection (GC). GC opposes CNS, whose goal is to eliminate GC.

[0043] Therefore, the SSD creates a temporary parity stripe for host data written as a zone group. For example, if there is a zone group with 15 zones (achieving a write performance of approximately 100 MB / s), the SSD would write 1 additional erase block as parity. In other words, there would be a flat stripe of 15+1. The parity block would then be released immediately after an entire zone group has been fully written. Optionally, data validation, such as an Enhanced Post Write Read (EPWR) check, can be performed. In the event of a program error during zone group filling, the parity block would be used to recover the lost data, even if an entire erase block had failed, providing the necessary UBER protection (i.e., equivalent to a large SLC cache data path).

[0044] Fig. 3 is a schematic illustration 300 of writing to zones in a CNS environment according to another embodiment. In Fig. 3, zone group data is written directly to QLC blocks and not cached in the SLC cache. However, individual zones are provisioned through the SLC cache, as in the embodiment of Fig. 2. For the individual zones, similar to Fig. 2, it is intended that the data is first written to SLC as a temporary copy and then copied to QLC as a permanent copy. Alternatively, it is also intended that the data is written to SLC in parallel with being written to QLC. One of the copies of the data (usually the data written to SLC, but it can also be the data written to QLC) is the temporary copy, which can be used to protect the permanent data written at the other location. It is also intended that the temporary data is not written to SLC, but to a different location, such as MLC or even QLC. In each of the scenarios, a record is temporary and is retained until the data is written to both locations and validated at the permanent location. Once the data at the permanent location is valid, the temporary data can be discarded.

[0045] To protect the data and potentially recover it after possible bit flips, parity data can be created for the incoming zone data, which is multiplexed into SLC. The temporary data copy in SLC can be written across multiple planes / dies and can also be protected by parity data. The parity data can be used in situations where data is first written to SLC and then errors occur; the errors can be corrected. More specifically, if errors occur, the data is recovered using the parity data. Once there are no more errors, the data can be copied to QLC. Should errors occur during the copy to QLC, the copy stored in SLC can be used to recover the data. In one embodiment, the parity data is exclusive-OR (XOR) parity data.

[0046] There are 16 small zones for the zone group, which are shown as an example with 15 of the small zones as user data and 1 small zone as parity data. Please note that 16 small zones is merely an example. The number of small zones is not limited to 16. The zone group and parity data are written to QLC simultaneously in 4-level programming. For each zone, the data is provided by the SLC cache by multiplexing the data into the SLC cache and a parity location (die 31 in this example). The zones are then demultiplexed and written to QLC in 4-level programming. Please note that in the example of Fig. 3 The parity data from the individual zones is not copied to QLC. The parity data can remain in the SLC or even be stored in a separate location from the SLC and QLC. The zone group can be thought of as similar to a jumbo block with blocks written in parallel, but the blocks are independent. Parity can be created for such a jumbo block.

[0047] The overhead for storing temporary parity for the open zone sets is minimal. For example, a 64 TB ZNS drive would have approximately 16,000 open zones, and with 15 zone sets, this would be approximately 1,000 open zone sets. Therefore, the parity overhead for a 64 TB drive with 1 million blocks would be approximately 1,000 blocks, which is only 0.1% of the overhead capacity.

[0048] While Fig. 3 shows zone groups written directly to QLC, with the parity data managed in QLC in a level block within the zone group. This arrangement is not the only option. The parity data does not need to be managed in QLC, but can be stored in SLC. Furthermore, the parity data for the zone group does not need to be part of the zone group.

[0049] Note that the data storage device can support both zone groups and individual zones. The data storage device controller can inform the host device of a threshold for the space allocated to zone groups and individual zones. When the threshold is reached (e.g., the zone group threshold is reached), the host device must switch to the other (e.g., individual zones) for writing.

[0050] Fig. 4 is a flowchart 400 illustrating a method for writing to zones in a CNS environment, according to one embodiment. The method begins with receiving a host command to write to a CNS environment at 402. The controller of the data storage device then determines whether the write is to a group of zones or to an individual zone at 404. If the write is to an individual zone, a determination is made as to whether the individual zone threshold has been reached at 405. If the threshold has been reached, the controller refuses to create individual zones at 402 and informs the host device. If the threshold has not been met, the data is written to the SLC cache at 406. Parity data is also created and may be stored in the SLC cache or elsewhere. A determination is then made as to whether all data has been written to the SLC cache at 408.If more data needs to be written, the process returns to 406. When all data has been written, the data is written to QLC at 412. Note that data can be written to SLC and QLC either in parallel or serially. When data is written serially, the data is first written to SLC, as shown in . Fig.4, and parity data is created to protect the data written to SLC. Once the data is valid, it is copied from SLC to QLC. The SLC data might then be discarded because SLC data is only temporary in an in-serial write. If data is written to SLC and QLC in parallel, the parity data might not be included in the SLC data. The point is that in the single-zone scenario, there are two records: a temporary record and a permanent record. The temporary record is the SLC data, and the permanent data is the QLC data. A determination is made as to whether there are errors at 414. If there are no errors, the SLC cache can be freed at 418. If there are errors, the data can be rebuilt from SLC at 416 and then checked again at 414 to confirm that there are no errors.

[0051] When writing to a zone group, it is determined at 420 whether the zone group threshold has been reached. If the threshold has been reached, the controller refuses to create a zone group and informs the host device at 422. If the threshold has not been met, the zone group is created with multiple small zones at 424. The first set of small zones is written directly to QLC at 426, followed by writing a second set of small zones to SLC at 428. The second set of small zones is then written to QLC at 430, and the process continues at 412. The first set of small zones includes user data. The second set of small zones may include some user data, as well as parity data and / or the last word lines of the user data.If the last word lines of user data are stored in SLC, the very last word line of user data is stored in SLC to facilitate data recovery.

[0052] By leveraging parity data for a zone group, the desired UBER is achieved while allowing at least some of the data to be recovered. Furthermore, the SLC cache size decreases when a large portion of the user data is written directly to MLC while only a small portion of the user data, specifically at least the last word line of the user data, is written to SLC. The embodiments discussed herein will significantly reduce the SLC cache size (and lower costs / margin) by significantly reducing the total number of open zones requiring SLC staging (assuming the majority of host writes use zone groups).

[0053] In one embodiment, a data storage device comprises: a storage device; and a controller coupled to the storage device, the controller configured to: receive a write command for one or more zones in a zoned namespace (ZNS) environment of the storage device; determine whether the write command is to write data to an independent zone or to a small zone of a zone group; generate parity data for user data corresponding to the write command; and store the parity data. The controller is configured to determine that the write command is to write data to the zone group. The controller is configured to determine whether a zone group threshold has been reached. The controller is configured to write a first portion of the user data directly to multilevel cell (MLC) memory.The controller is configured to write a second portion of the user data to the single-level cell (SLC) memory. The controller is further configured to at least partially recover data to achieve an uncorrectable bit error rate (UBER) that is below a predetermined threshold. The controller is configured to store the parity data in a single-level cell (SLC) memory or a quad-level cell (QLC) memory. The controller is configured to store the parity data at a location separate from the one or more zones. The controller is configured to determine that the write command is to write data to the independent zone. The controller is configured to store all data in a single-level cell (SLC) memory and to copy the data from the SLC memory to the multi-level cell (MLC) memory after all data has been written to the SLC memory.The controller is configured to provide a zone group threshold to a host device. The parity data is exclusive-or (XOR) parity data.

[0054] In another embodiment, a data storage device comprises: a storage device; and a controller coupled to the storage device, the controller configured to: receive a write command to write user data to a plurality of small zones in a zone group of a Zoned Namespace (ZNS) environment; write a first portion of the user data to at least a first small zone of the plurality of small zones, wherein the first portion is written to Multilevel Cell (MLC) memory of the storage device; and write a second portion of the user data to at least a second small zone of the plurality of small zones, wherein the second portion is written to Single Level Cell (SLC) memory of the storage device, wherein the second portion is smaller than the entire user data. The first portion is not written to SLC memory.The second part is copied to MLC memory. The second section is erased from SLC memory after being copied to MLC memory. The second part contains parity data.

[0055] In another embodiment, a data storage device comprises: storage means; and a controller coupled to the storage means, the controller configured to: receive a write command to write user data to a plurality of small zones in a zone group of a zoned namespace (ZNS) environment of the storage means; allocate a plurality of small zones for the user data; allocate an additional storage location for parity data; write the user data to the plurality of small zones, wherein at least a first small zone of the plurality of small zones is arranged in a single-level cell (SLC) of the storage means, and at least a second small zone of the plurality of small zones is arranged in a multi-level cell (MLC) of the storage means; and write the parity data to the additional zone. The additional zone is stored at a location separate from the SLC and MLC.The controller is further configured to demultiplex the user data in the first small zone and write the user data from the first small zone to the MLC.

[0056] In another embodiment, a data storage device with a small SLC cache and a dual approach to temporarily protecting data comprises: a storage device; and a controller coupled to the storage device, the controller configured to temporarily store the exclusive-OR (XOR) parity data of a plurality of open zone groups in memory and to store another temporary copy of the user data of independent zones without XOR parity in a small SLC cache or in MLC. The controller is configured to evacuate the independent zone data from the SLC cache memory to the multilevel cell (MLC) memory. The controller is further configured to close zone groups when write commands to the zone groups are completed and to release XOR parities of the zone groups.The controller is further configured to at least partially recover data to achieve an uncorrectable bit error rate (UBER) below a predetermined threshold using the XOR parity of the zone groups while the zone groups are open. The controller is further configured to write the zone group data directly to the multilevel cell (MLC) memory. In the case of QLC programming using a two-stage fine programming scheme, the controller is further configured to temporarily provide some rolling WLs of data in the SLC cache or the volatile memory for the fine programming phase. The controller is configured to store the XOR parity data at a location separate from the plurality of zone groups or within an additional block as part of the zone group.The maximum number of open zone groups and independent zones that can be managed simultaneously by the controller is predetermined.

[0057] In another embodiment, a data storage device comprises: a memory device; and a controller coupled to the memory device, the controller configured to: open either an independent zone or a zone within a zone group based on a command received from a host device; and write to either the independent zone or the zone within the zone group. The controller is configured to allow a first predetermined number of independent zones and a second predetermined number of zone groups. The first predetermined number is less than the second predetermined number. The controller is configured to inform the host device of the size of zone groups. The controller is configured to inform the host device of the number of open zones supported for zone groups.The controller is configured to inform the host device of the number of open zones supported for independent zones. The controller is configured to store exclusive-OR (XOR) parity data of zone groups in the storage device. The controller is configured to store independent zone user data without exclusive-OR (XOR) parity in a single-level cell (SLC) cache. The controller is configured to write to a multilevel cell (MLC) of the storage device.

[0058] In another embodiment, a data storage device comprises: means for storing data; and a controller coupled to the means for storing data, the controller configured to: allocate a first predetermined amount of the means for storing data for independent zones; and allocate a second predetermined amount of the means for storing data for groups of zones, wherein the second predetermined amount is greater than the first predetermined amount. The controller is further configured to at least partially recover data to achieve an uncorrectable bit error rate (UBER) that is below a predetermined threshold. The controller is configured to store parity data at a location separate from the user data.

[0059] While the foregoing refers to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the following claims. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] US 18 / 354,446

[0001] US 63 / 478,280

[0001] Cited non-patent literature

[0000] CNS Protection With Small SLC Cache Using Zone Groups, filed July 18, 2023

[0001]

Claims

[1] Data storage device with a small SLC cache and a dual approach to protecting temporary data, comprising: a storage device; and a controller coupled to the storage device, the controller configured to: temporarily storing exclusive-OR (XOR) parity data of a plurality of open zone groups in memory; and Storing another temporary copy of user data of independent zones without XOR parity in a small SLC cache or in MLC. [2] The data storage device of claim 1, wherein the controller is configured to evacuate independent zone data from the small SLC cache to the multilevel cell (MLC) memory. [3] The data storage device of claim 2, wherein the controller is further configured to close zone groups when write commands to the zone groups are completed and to release the XOR parities of the zone groups. [4] The data storage device of claim 3, wherein the controller is further configured to at least partially recover data to achieve an uncorrectable bit error rate (UBER) below a predetermined threshold using XOR parity of the zone groups while the zone groups are open. [5] The data storage device of claim 3, wherein the controller is further configured to write zone group data directly to the multilevel cell (MLC) memory. [6] The data storage device of claim 5, wherein in the case of QLC programming using a two-stage fine programming scheme, the controller is further configured to temporarily provide some rolling WLs of data in the SLC cache or the volatile memory for the fine programming phase. [7] The data storage device of claim 3, wherein the controller is configured to store XOR parity data at a location separate from the plurality of open zone groups or within an additional block as part of the zone group. [8] The data storage device according to claim 3, wherein a maximum number of open zone groups and independent zones managed simultaneously by the controller is predetermined. [9] Data storage device comprising: a storage device; and a controller coupled to the storage device, the controller configured to: Opening either an independent zone or a zone within a zone group based on a command received from a host device; and Write to either the independent zone or the zone within the zone group. [10] The data storage device of claim 9, wherein the controller is configured to allow a first predetermined number of independent zones and a second predetermined number of zone groups. [11] The data storage device according to claim 10, wherein the first predetermined number is smaller than the second predetermined number. [12] The data storage device of claim 9, wherein the controller is configured to inform the host device of a size for zone groups. [13] The data storage device of claim 12, wherein the controller is configured to inform the host device of a number of open zones supported for zone groups. [14] The data storage device of claim 13, wherein the controller is configured to inform the host device that a number of open zones for independent zones are supported. [15] The data storage device of claim 9, wherein the controller is configured to store exclusive-OR (XOR) parity data of zone groups in the storage device. [16] The data storage device of claim 9, wherein the controller is configured to store independent zone user data without exclusive-OR (XOR) parity in a single-level cell (SLC) cache. [17] The data storage device of claim 9, wherein the controller is configured to write to a multilevel cell (MLC) of the storage device. [18] Data storage device comprising: means for storing data; and a controller coupled to the means for storing data, where the controller is configured to: Allocating a first predetermined amount of means for storing data for independent zones; and Allocating a second predetermined amount of means for storing data for zone groups, the second predetermined amount being greater than the first predetermined amount. [19] The data storage device of claim 18, wherein the controller is further configured to at least partially recover data to achieve an uncorrectable bit error rate (UBER) that is below a predetermined threshold. [20] The data storage device of claim 18, wherein the controller is configured to store parity data at a location separate from the user data.

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