SEMICONDUCTOR DEVICE

Abstract

A semiconductor device is provided with an upper branch circuit and a lower branch circuit, and with a positive electrode terminal, a negative electrode terminal, and an output terminal, which has an insulating plate; a first wiring pattern arranged on the insulating plate;and a second wiring pattern arranged on the insulating plate and spaced apart from the first wiring pattern, wherein the upper branch circuit comprises a circuit in which the positive electrode terminal, a first diode section arranged on the first wiring pattern, a first transistor section connected in series with the first diode section and arranged on the first wiring pattern, and the output terminal are connected and arranged in this order, and the lower branch circuit comprises a second transistor section arranged on the second wiring pattern and a second diode section arranged on the second wiring pattern.

Description

BACKGROUND 1. TECHNICAL AREA

[0001] The present invention relates to a semiconductor device. 2. STATE OF THE ART

[0002] Patent document 1 describes a “power semiconductor switching module which can be adapted to different power conversion devices, such as a current-fed inverter and a matrix converter, by means of a single circuit configuration to improve versatility and cost-effectiveness”. State-of-the-art documents, patent documents Patent document 1: Japanese publication no. 2006-187143 Patent document 2: Japanese publication no. 2005-269735 Patent document 3: Japanese publication no. 2003-164140 Patent document 4: Japanese publication no. H7-25552 Patent document 5: Japanese publication no. 2008-186920 Patent document 6: Japanese publication no. 2014-155287 GENERAL DISCLOSURE Tasks to be solved

[0003] In a case where an output AC voltage with a desired period and amplitude is generated using a voltage-fed inverter, it is fundamentally impossible for the inverter to output a voltage amplitude exceeding the input supply voltage. As a result, depending on the amplitude of the output AC voltage to be generated, a voltage transformation circuit with a combination of an amplifier circuit and a voltage-fed inverter is required, leading to increased system costs and a larger fixture footprint.

[0004] On the other hand, in a case where an output AC voltage with a desired period and amplitude is generated using a current-driven inverter, it is possible to perform an amplification process using the current-driven inverter. Therefore, it is possible to assemble a simple voltage transformation circuit that minimizes system costs and device footprint. However, there is a problem: the significant costs associated with developing a semiconductor device used for a voltage transformation circuit are considerable.Furthermore, in a case where a voltage transformation circuit is assembled with a developed semiconductor device integrated therein, the use of a semiconductor device is required that differs in appearance, terminal position, terminal type, or the like from a semiconductor device used for a voltage-fed inverter, leading to a problem of increased development and manufacturing costs for the voltage transformation circuit. Solution to the tasks

[0005] In a first aspect of the present invention, a semiconductor device is provided comprising an upper branch circuit and a lower branch circuit, and comprising a positive electrode terminal, a negative electrode terminal, and an output terminal, which has an insulating plate; a first wiring pattern arranged on the insulating plate;and a second wiring pattern arranged on the insulating plate and spaced apart from the first wiring pattern, wherein the upper branch circuit comprises a circuit in which the positive electrode terminal, a first diode section arranged on the first wiring pattern, a first transistor section connected in series with the first diode section and arranged on the first wiring pattern, and the output terminal are connected and arranged in this order, and the lower branch circuit comprises a second transistor section arranged on the second wiring pattern and a second diode section arranged on the second wiring pattern.

[0006] In the semiconductor device described above, the lower branch circuit can include a circuit in which the output terminal, the second diode section, the second transistor section, and the negative electrode terminal are connected and arranged in that order.

[0007] In each of the semiconductor devices described above, the first transistor section can be arranged such that a collector electrode contacts the first wiring pattern, and the first diode section can be arranged such that a cathode electrode contacts the first wiring pattern.

[0008] In each of the semiconductor devices described above, the second transistor section can be arranged such that a collector electrode contacts the second wiring pattern. The second diode section can be arranged such that a cathode electrode contacts the second wiring pattern.

[0009] In each of the semiconductor devices described above, an emitter electrode of the first transistor section can be connected to the output terminal via a wire element.

[0010] In each of the semiconductor devices described above, an anode electrode of the first diode section can be connected to the positive electrode terminal via a wire element.

[0011] In each of the semiconductor devices described above, an anode electrode of the second diode section can be connected to the output terminal via a wire element.

[0012] In each of the semiconductor devices described above, an emitter electrode of the second transistor section can be connected to the negative electrode terminal via a wire element.

[0013] In each of the semiconductor devices described above, the output terminal can be arranged on a positive side in a predetermined first direction with respect to the positive electrode terminal and the negative electrode terminal.

[0014] In each of the semiconductor devices described above, the first wiring pattern and the second wiring pattern can be arranged in a predetermined second direction that differs from the first direction. The first wiring pattern can be arranged on a positive side in the second direction with respect to the second wiring pattern. The positive electrode terminal can be arranged on a positive side in the second direction with respect to the negative electrode terminal.

[0015] In each of the semiconductor devices described above, the output terminal can be located on a positive side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0016] In each of the semiconductor devices described above, the negative electrode terminal can be arranged on a negative side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0017] In each of the semiconductor devices described above, the positive electrode terminal can be located on a negative side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0018] In a second aspect of the present invention, a semiconductor device is provided comprising a transistor section; a diode section connected in series with the transistor section; and an external test terminal connected between the transistor section and the diode section.

[0019] In a third aspect of the present invention, a semiconductor device is provided comprising an upper branch circuit and a lower branch circuit, the latter having an insulating plate; a positive electrode terminal and a negative electrode terminal arranged in a first region on the insulating plate; and an output terminal arranged in a second region, which differs from the first region on the insulating plate, wherein the upper branch circuit has a first diode section arranged in a third region between the first region and the second region on the insulating plate, and a first transistor section connected in series with the first diode section in the third region, and the lower branch circuit has a second diode section arranged in the third region, and a second transistor section connected in series with the second diode section in the third region.

[0020] In the semiconductor device described above, the first region can be arranged adjacent to a first end face of the insulating plate, and the second region can be arranged adjacent to a second end face of the insulating plate, which is opposite the first end face.

[0021] In each of the semiconductor devices described above, the positive electrode terminal, the first transistor section, the first diode section, and the output terminal can be electrically connected in that order. The output terminal, the second transistor section, the second diode section, and the negative electrode terminal can also be electrically connected in that order.

[0022] In each of the semiconductor devices described above, the second region can be arranged on a positive side in a predetermined first direction with respect to the first region. The first transistor and first diode regions, and the second transistor and second diode regions, can be arranged in a predetermined second direction that differs from the first direction. The first transistor and first diode regions can also be arranged on a negative side in the second direction with respect to the second transistor and second diode regions.

[0023] In each of the semiconductor devices described above, the positive electrode terminal can be arranged on a negative side in the second direction with respect to the negative electrode terminal.

[0024] In each of the semiconductor devices described above, the first transistor section can be arranged on a negative side in the first direction with respect to the first diode section.

[0025] In each of the semiconductor devices described above, the second transistor section can be arranged on a positive side in the first direction with respect to the second diode section.

[0026] In each of the semiconductor devices described above, the first transistor section can be arranged on a positive side in the first direction with respect to the first diode section.

[0027] In each of the semiconductor devices described above, the second transistor section can be arranged on a negative side in the first direction with respect to the second diode section.

[0028] In each of the semiconductor devices described above, the positive electrode terminal, the first diode section, the first transistor section, and the output terminal can be electrically connected in that order. The output terminal, the second diode section, the second transistor section, and the negative electrode terminal can also be electrically connected in that order.

[0029] In each of the semiconductor devices described above, the second region can be arranged on a positive side in a predetermined first direction with respect to the first region. The first transistor region and the first diode region, and the second transistor region and the second diode region, can be arranged in a predetermined second direction that differs from the first direction. The first transistor region and the first diode region can be arranged on a positive side in the second direction with respect to the second transistor region and the second diode region.

[0030] In each of the semiconductor devices described above, the positive electrode terminal can be arranged on a positive side in the second direction with respect to the negative electrode terminal.

[0031] In each of the semiconductor devices described above, the first transistor section can be arranged on a positive side in the first direction with respect to the first diode section.

[0032] In each of the semiconductor devices described above, the second transistor section can be arranged on a negative side in the first direction with respect to the second diode section.

[0033] It should be noted that the summary section does not necessarily describe all necessary features of the embodiments of the present invention. The present invention may also be a subcombination of the features described above. Effects of the invention

[0034] The design according to the aspects of the present invention is such that a semiconductor device suitable for use in a current-fed inverter can be obtained with lower development and manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 shows an example of a perspective view of a semiconductor device 100. Fig. Figure 2A shows an example of a top view of the semiconductor device 100. Fig. Figure 2B shows an example of an insulating plate 20 of the semiconductor device 100. Fig. Figure 3 shows an example of a three-phase power converter circuit design. Fig. Figure 4A shows an example of a three-phase power converter circuit design according to a comparative example. Fig. Figure 4B shows an example of a top view of a semiconductor device 500 according to the comparison example. Fig. Figure 5A shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 5B shows a circuit arrangement of the modified semiconductor device 100. Fig. Figure 5C shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 5D shows a circuit arrangement of the modified semiconductor device 100. Fig. Figure 6A shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 6B shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 7 shows a perspective view of a modification of the semiconductor device 100. Fig. Figure 8A shows a top view of a modification of the semiconductor device 100. Fig. Figure 8B shows a circuit arrangement of the modified semiconductor device 100. Fig. Figure 9 shows a top view of a semiconductor device 500 according to a comparative example. Fig. Figure 10A shows a top view of a modification of the semiconductor device 100. Fig. Figure 10B shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 11 shows a modification of the design of the three-phase power converter circuit. Fig. Figure 12 shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 13A shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 13B shows a circuit arrangement of the modified semiconductor device 100. Fig. Figure 13C shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 13D shows a circuit arrangement of the modified semiconductor device 100. Fig. Figure 14A shows an insulating plate 20 of a modification of the semiconductor device 100. Fig. Figure 14B shows an insulating plate 20 of a modification of the semiconductor device 100. DESCRIPTION OF EXAMPLE FORMS OF EXECUTION

[0035] The present invention is described below by means of exemplary embodiments, but these exemplary embodiments do not limit the invention according to the claims. Furthermore, not all combinations of features described in the exemplary embodiments are essential for the solvent of the invention.

[0036] In this description, one side oriented in a direction parallel to a depth direction of a semiconductor substrate contained in a semiconductor chip is referred to as the "top" side, and another side is referred to as the "bottom" side. One of two principal faces of a substrate, layer, or other element is referred to as the top face, and the other face is referred to as the bottom face. "Top," "bottom," "front," and "back" directions are not limited to a direction of gravity or a direction of attachment to a substrate or the like when a semiconductor device is implemented.

[0037] In this description, technical objects can be described using orthogonal coordinate axes of an X-axis, a Y-axis, and a Z-axis. In this description, a plane parallel to a top surface of the semiconductor chip is referred to as the XY plane, and the depth direction of the semiconductor substrate contained within the semiconductor chip is referred to as the Z-axis.

[0038] In the present description, a case where a term such as "equal" or "same" is mentioned may include a case where a defect is present due to a variation in manufacturing or the like. The defect is, for example, within 10%.

[0039] Fig. Figure 1 shows an example of a perspective view of a semiconductor device 100. The semiconductor device 100 comprises a housing section 110, a base section 120, and a plurality of terminals. The semiconductor device 100 can function as part of a power conversion device, such as an inverter or a converter. The semiconductor device 100 can accommodate a semiconductor chip and the like internally.

[0040] The housing section 110 accommodates the semiconductor chip and the like contained in the semiconductor device 100. The housing section 110 is formed from resin with insulating properties. The housing section 110 is arranged on the base section 120. The housing section 110 may be provided with a recess 112 to ensure the insulating properties.

[0041] The base section 120 is attached to the housing section 110 by a screw, adhesive, or the like. The housing section 110 may be provided with a hole for attaching the base section 120. The base section 120 may be set to ground potential. The base section 120 has a principal surface in an XY plane.

[0042] A terminal arrangement surface 114 is a surface on which the plurality of terminals are arranged on an upper surface of the housing section 110. A gate terminal 50, an emitter terminal 60, an auxiliary collector terminal 66, and a temperature measuring terminal 80 can be arranged on the terminal arrangement surface 114. The terminal arrangement surface 114 has a projection 116 in a Z-axis direction.

[0043] The projection 116 is located near the center of the terminal assembly surface 114. The projection 116 extends in a longitudinal direction (an X-axis direction in this example) of the terminal assembly surface 114. An external output terminal 70, an external positive electrode terminal 72, and an external negative electrode terminal 74 are arranged on the projection 116. The external output terminal 70, the external positive electrode terminal 72, and the external negative electrode terminal 74 can form a current path for a large current flowing through a power device such as an IGBT.In a top view, the area of ​​each of the external output terminal 70, the external positive electrode terminal 72 and the external negative electrode terminal 74 arranged on the projection 116 may be larger than the area of ​​each of the gate terminal 50, the emitter terminal 60, the auxiliary collector terminal 66 and the temperature sensing terminal 80 arranged on the terminal assembly surface 114.

[0044] The external output terminal 70 is an AC output terminal. The external positive electrode terminal 72 is a positive side terminal of a DC power source. The external negative electrode terminal 74 is a negative side terminal of the DC power source. Each terminal can be electrically connected to a corresponding terminal of the semiconductor chip or the like contained in the semiconductor device 100.

[0045] Gate terminal 50 provides a gate voltage for a transistor section described below. Emitter terminal 60 outputs an emitter voltage of the transistor section. Auxiliary collector terminal 66 outputs a collector voltage of the transistor section. Temperature sensing terminal 80 is a terminal for a thermistor connected to the thermistor embedded in the housing section 110, which detects a temperature within the housing section 110.

[0046] Fig. Figure 2A shows an example of a top view of the semiconductor device 100. This figure shows an example arrangement of a circuit that is arranged on the base section 120 in the housing section 110. The semiconductor device 100 comprises one or more insulating plates 20 on the base section 120.

[0047] The semiconductor device 100 of the present example comprises six insulating plates 20 on the base section 120. In the present example, the six insulating plates 20 are arranged side by side in the X-axis direction on the base section 120. A plurality of semiconductor chips and a plurality of wiring patterns can be arranged on the insulating plate 20. In the present example, the plurality of insulating plates 20 are arranged on the base section 120; however, a single insulating plate 20 can also be arranged on the base section 120.

[0048] The insulating plate 20 is connected to the base section 120. The insulating plate 20 can have conductive patterns on both surfaces of a ceramic substrate (for example, aluminum oxide) with favorable thermal conductivity. For example, the insulating plate 20 is a direct copper bonding substrate (DCB substrate), in which a copper circuit version is directly bonded to a ceramic substrate. Each of the insulating plates 20 is connected in parallel.

[0049] A gate connection section 52, an emitter connection section 62, an auxiliary collector connection section 68, and a temperature sensing connection section 82 can be arranged on the base section 120. Each connection section can be a circuit pattern arranged on the base section 120. Each connection section is connected to each terminal arranged in the housing section 110. The gate connection section 52 is connected to the gate terminal 50. The gate connection section 52 can have an upper-arm gate connection section 52-1 and a lower-arm gate connection section 52-2. The emitter connection section 62 is connected to the emitter terminal 60. The emitter connection section 62 can have an upper-arm emitter connection section 62-1 and a lower-arm emitter connection section 62-2. The auxiliary collector connection section 68 is connected to the auxiliary collector terminal 66.The temperature measurement connection section 82 is connected to the temperature measurement terminal 80.

[0050] The temperature measuring connection section 82 can be connected to a temperature measuring section 84. The temperature measuring section 84 is, for example, a thermistor.

[0051] Each of the insulating plates 20 of the semiconductor device 100 of the present example comprises an output terminal 22, a positive electrode terminal 24, and a negative electrode terminal 26. Each terminal is electrically connected to each external terminal via a conductor frame 30. The conductor frame 30 has a leg section 32 and a flat plate section 34.

[0052] The output terminal 22 can be connected to the flat plate section 34 via the leg section 32. The flat plate section 34, to which the output terminal 22 is connected, can be connected to the external output terminal 70 at an upper section in the housing section 110.

[0053] The positive electrode terminal 24 can be connected to the flat plate section 34 via the leg section 32. The flat plate section 34, to which the positive electrode terminal 24 is connected, can be connected to the external positive electrode terminal 72 at an upper section in the housing section 110.

[0054] The negative electrode terminal 26 can be connected to the flat plate section 34 via the leg section 32. The flat plate section 34, to which the negative electrode terminal 26 is connected, can be connected to the external negative electrode terminal 74 at an upper section in the housing section 110.

[0055] The flat plate section 34, to which the positive electrode terminal 24 is connected, and the flat plate section 34, to which the negative electrode terminal 26 is connected, can form a parallel flat plate structure. This makes it possible to obtain favorable inductance characteristics of the semiconductor device 100.

[0056] Fig. Figure 2B shows an example of the insulating plate 20 of the semiconductor device 100. The semiconductor device 100 comprises a first wiring pattern 40 and a second wiring pattern 41. Each of the insulating plates 20 of the semiconductor device 100 of this example is used for a current-fed inverter circuit with an upper branch circuit 10 and a lower branch circuit 12. The semiconductor device 100 of this example can form a 2-in-1 circuit of one phase of a three-phase inverter circuit. It should be noted that the semiconductor device 100 can also form a 1-in-1 circuit or a 6-in-1 circuit.

[0057] The first wiring pattern 40 is arranged on the insulating plate 20. The first wiring pattern 40 can be formed from a conductive material comprising metal or the like. The first wiring pattern 40 can be produced by directly bonding a copper plate, an aluminum plate, or a plate obtained by cladding these materials or by bonding such a plate via a brazing layer, to the insulating plate 20 made of aluminum oxide ceramic, silicon nitride ceramic, aluminum nitride ceramic, or the like. The material of the first wiring pattern 40 can be an alloy comprising copper and / or aluminum. For example, the material of the first wiring pattern 40 is copper.

[0058] The second wiring pattern 41 is arranged on the insulating plate 20 and spaced apart from the first wiring pattern 40. The second wiring pattern 41 can be formed from a conductive material comprising metal or the like. The second wiring pattern 41 can be produced by directly bonding a copper plate, an aluminum plate, or a plate obtained by cladding these materials or by bonding such a plate via a brazing layer, to the insulating plate 20 made of aluminum oxide ceramic, silicon nitride ceramic, aluminum nitride ceramic, or the like. The material of the second wiring pattern 41 can be an alloy comprising copper and / or aluminum. For example, the material of the second wiring pattern 41 is copper.

[0059] The upper branch circuit 10 comprises a circuit in which the positive electrode terminal 24, a first diode section 46, a first transistor section 42, and the output terminal 22 are connected and arranged in that order. It should be noted that the sequence of circuit connections contained in the upper branch circuit 10 is not limited to this.

[0060] The first diode section 46 is arranged on the first wiring pattern 40. The first diode section 46 can be arranged such that a cathode electrode contacts the first wiring pattern 40. An anode electrode of the first diode section 46 can be connected to the positive electrode terminal 24 via a wire element 38.

[0061] The first transistor section 42 is connected in series with the first diode section 46 and arranged on the first wiring pattern 40. The first transistor section 42 can be arranged such that a collector electrode contacts the first wiring pattern 40. Since the collector electrode of the first transistor section 42 and the cathode electrode of the first diode section 46 are connected via the first wiring pattern 40, the first transistor section 42 and the first diode section 46 are connected in series. An emitter electrode of the first transistor section 42 can be connected to the output terminal 22 via a wire element 38. The emitter electrode of the first transistor section 42 can be connected to the upper-arm emitter connection section 62-1 via a wire element 38 or the like.A gate electrode of the first transistor section 42 can be connected to the upper arm-side gate connection section 52-1 via a wire element 38 or the like.

[0062] The lower branch circuit 12 includes a second transistor section 44 and a second diode section 48. The lower branch circuit can be configured in such a way that the output terminal 22, the second diode section 48, the second transistor section 44, and the negative electrode terminal 26 are connected and arranged in this order. It should be noted that the circuit connection sequence contained in the lower branch circuit 12 is not limited to this.

[0063] The second diode section 48 is arranged on the second wiring pattern 41. The second diode section 48 can be arranged such that a cathode electrode contacts the second wiring pattern 41. An anode electrode of the second diode section 48 can be connected to the output terminal 22 via a wire element 38.

[0064] The second transistor section 44 is connected in series with the second diode section 48 and arranged on the second wiring pattern 41. The second transistor section 44 can be arranged such that a collector electrode contacts the second wiring pattern 41. The collector electrode of the second transistor section 44 and the cathode electrode of the second diode section 48 are connected via the second wiring pattern 41, so that the second transistor section 44 and the second diode section 48 are connected in series. An emitter electrode of the second transistor section 44 can be connected to the negative electrode terminal 26 via a wire element 38. The emitter electrode of the second transistor section 44 can be connected to the forearm-side emitter connection section 62-2 via a wire element 38 or the like.A gate electrode of the second transistor section 44 can be connected to the forearm-side gate connection section 52-2 via a wire element 38 or the like.

[0065] The output terminal 22 can be arranged on a positive side in a predetermined first direction with respect to the positive electrode terminal 24 and the negative electrode terminal 26. In this example, the output terminal 22 is arranged on a positive side in the Y-axis direction with respect to the positive electrode terminal 24 and the negative electrode terminal 26. That is, the predetermined first direction in this example is the Y-axis direction. The output terminal 22 can be arranged on the positive side in the first direction with respect to the first wiring pattern 40 and the second wiring pattern 41. In this example, the output terminal 22 is arranged on the positive side in the Y-axis direction with respect to the first wiring pattern 40 and the second wiring pattern 41.

[0066] The positive electrode terminal 24 can be arranged on a negative side in the first direction with respect to the first wiring pattern 40 and the second wiring pattern 41. The positive electrode terminal 24 of the present example is arranged on a negative side in the Y-axis direction with respect to the first wiring pattern 40 and the second wiring pattern 41.

[0067] The negative electrode terminal 26 can be arranged on the negative side in the first direction with respect to the first wiring pattern 40 and the second wiring pattern 41. The negative electrode terminal 26 of the present example is arranged on the negative side in the Y-axis direction with respect to the first wiring pattern 40 and the second wiring pattern 41.

[0068] The first wiring pattern 40 and the second wiring pattern 41 can be arranged in a predefined second direction that differs from the first direction. In the present example, the first wiring pattern 40 and the second wiring pattern 41 are arranged in the X-axis direction, which differs from the Y-axis direction, which is the first direction. That is, the predefined second direction of the present example is the X-axis direction.

[0069] The first wiring pattern 40 can be arranged on a positive side in the second direction with respect to the second wiring pattern 41. The first wiring pattern 40 of the present example is arranged on a positive side in the X-axis direction with respect to the second wiring pattern 41.

[0070] The positive electrode terminal 24 can be arranged on the positive side in the second direction with respect to the negative electrode terminal 26. In the present example, the positive electrode terminal 24 is arranged on the positive side in the X-axis direction with respect to the negative electrode terminal 26.

[0071] The order of the first wiring pattern 40 and the second wiring pattern 41 in the second direction and the order of the positive electrode terminal 24 and the negative electrode terminal 26 in the second direction can be the same. The upper branch circuit 10 of the present example comprises the first transistor section 42 and the first diode section 46, which are arranged on the first wiring pattern 40, and the positive electrode terminal 24. The lower branch circuit 12 of the present example comprises the second transistor section 44 and the second diode section 48, which are arranged on the second wiring pattern 41, and the negative electrode terminal 26.Accordingly, the upper branch circuit 10 and the lower branch circuit 12 are arranged in the second direction, so that the sequence of the first wiring pattern 40 and the second wiring pattern 41 in the second direction and the sequence of the positive electrode terminal 24 and the negative electrode terminal 26 in the second direction can coincide. The upper branch circuit 10 of the present example is arranged on the positive side in the X-axis direction, which is the second direction with respect to the lower branch circuit 12.

[0072] The positive electrode terminal 24 and the negative electrode terminal 26 are arranged in a first region 210 on the insulating plate 20. The first region 210 can be arranged adjacent to a first end face 201 of the insulating plate 20.

[0073] The output terminal 22 is located in a second area 220, which differs from the first area 210 on the insulating plate 20. The second area 220 can be located adjacent to a second end face 202 of the insulating plate 20, which is opposite the first end face 201.

[0074] The first diode section 46 can be arranged in a third region 230 between the first region 210 and the second region 220 on the insulating plate 20. The first transistor section 42 can be connected in series with the first diode section 46 in the third region 230. The second diode section 48 can be arranged in the third region 230. The second transistor section 44 can be connected in series with the second diode section 48 in the third region 230.

[0075] The second region 220 can be arranged on the positive side in the specified first direction with respect to the first region 210. That is, the output terminal 22 can be arranged on the positive side in the specified first direction with respect to the positive electrode terminal 24 and the negative electrode terminal 26. The second region 220 of the present example is arranged on the positive side in the Y-axis direction with respect to the first region 210. That is, the output terminal 22 of the present example is arranged on the positive side in the Y-axis direction with respect to the positive electrode terminal 24 and the negative electrode terminal 26.

[0076] The first transistor section 42 and the first diode section 46, and the second transistor section 44 and the second diode section 48, can be arranged in the specified second direction, which differs from the first direction. The first transistor section 42 and the first diode section 46, and the second transistor section 44 and the second diode section 48 of the present example are arranged in the X-axis direction, which differs from the Y-axis direction, which is the first direction. The first transistor section 42 and the first diode section 46 can be arranged on the positive side in the second direction with respect to the second transistor section 44 and the second diode section 48. The first transistor section 42 and the first diode section 46 of the present example are arranged on the positive side in the X-axis direction with respect to the second transistor section 44 and the second diode section 48.

[0077] The first transistor section 42 can be arranged on the positive side in the first direction relative to the first diode section 46. The first transistor section 42 in the present example is arranged on the positive side in the Y-axis direction relative to the first diode section 46. The second transistor section 44 can be arranged on the negative side in the first direction relative to the second diode section 48. The second transistor section 44 in the present example is arranged on the negative side in the Y-axis direction relative to the second diode section 48. It should be noted that the arrangement of the first transistor section 42 and the first diode section 46 in the upper branch circuit 10 and the arrangement of the second transistor section 44 and the second diode section 48 in the lower branch circuit 12 are not limited to these.

[0078] Fig. Figure 3 shows an example of an embodiment of the three-phase power converter circuit. The semiconductor device 100 of the present example has the upper branch circuit 10 and the lower branch circuit 12 and forms the 2-in-1 circuit of one phase of the three-phase power converter circuit. In addition to three semiconductor devices 100, an inductor L can be arranged on a high-voltage power line to form the current-fed inverter circuit.

[0079] The semiconductor device 100 can convert direct current energy from an energy source 14 into three-phase alternating current energy and supply such energy to an external load 16. The energy source 14 can be energy obtained through solar power generation, for example. Since the semiconductor device 100 of this example forms the 2-in-1 circuit of one phase of the three-phase converter circuit, three semiconductor devices 100 are arranged to form the three-phase converter circuit. Furthermore, the three-phase converter circuit of this example can convert a low DC voltage into a high AC voltage. Because the three-phase converter circuit of this example is a current-fed inverter circuit, a constant current can be supplied to the load regardless of the external load 16.

[0080] For example, if the power source 14 is a current source of a given amperage (for example, 100 A), an alternating current with a peak of 100 A flows through the external load 16. Assuming that the external load 16 has a given impedance (for example, a resistance of 10 Ω), the voltage generated by the external load 16 is 100 A × 10 Ω = 1000 V. Since a DC inductor (L × di / dt) is applied as the inductance L, and the DC voltage of the power source 14 is applied to the external load 16, the voltage generated by the external load 16 is higher than the DC voltage of the power source 14. Therefore, it is possible to apply a voltage equal to or greater than the DC voltage of the power source 14 to the external load 16. Fig. to spend 3.

[0081] In the upper branch circuit 10 of the present example, the first diode section 46 and the first transistor section 42 are connected in this order between the positive electrode terminal 24 and the output terminal 22, but the order of the first diode section 46 and the first transistor section 42 can be reversed. That is, the first transistor section 42 can be connected on the side of the positive electrode terminal 24, and the first diode section 46 can be connected on the side of the output terminal 22.

[0082] In the lower branch circuit 12 of the present example, the second diode section 48 and the second transistor section 44 are connected in this order between the output terminal 22 and the negative electrode terminal 26, but the order of the second diode section 48 and the second transistor section 44 can be reversed. That is, the second transistor section 44 can be connected on the output terminal 22 side, and the second diode section 48 can be connected on the negative electrode terminal 26 side.

[0083] Fig. Figure 4A shows an example of a three-phase power converter circuit according to a comparative example. A semiconductor device 500 according to the comparative example is a voltage-fed inverter circuit. Since, in the comparative example, an amplitude greater than the amplitude of a potential difference of an input DC voltage, which is a supply voltage of a power source 14, cannot be obtained solely with the voltage-fed inverter circuit, a boost converter 600 is provided. The boost converter 600 can include an inductor L, a diode D, and a switch SW. The boost converter 600 amplifies the input DC voltage by controlling the ON / OFF state of the switch SW, so that the amplitude greater than the amplitude of the potential difference of the input DC voltage can be obtained.Since the voltage-fed inverter circuit does not have a voltage amplification function, a boost converter is required in a stage before a voltage-fed inverter in a case where an AC voltage higher than the input DC voltage is to be output.

[0084] Since the semiconductor device 100, as described in the example, is part of the components of the current-fed inverter circuit, the three-phase inverter circuit can be manufactured without the separate boost converter 600, compared to the case of using the semiconductor device 500, as described in the comparison example, which includes the voltage-fed inverter circuit. This allows for cost reduction and space savings across the entire boost system. Furthermore, the three-phase inverter circuit can be manufactured without using a special element such as a reverse-blocking IGBT (RB-IGBT).

[0085] Fig. Figure 4B shows an example of a top view of the semiconductor device 500 according to the comparison example. In the semiconductor device 500 according to the comparison example, a positive electrode terminal 24 is arranged on a negative side in the X-axis direction, which is a second direction with respect to a negative electrode terminal 26. That is, an upper branch circuit 10 is arranged on the negative side in the X-axis direction with respect to a lower branch circuit 12, and a first wiring pattern 40 is arranged on the negative side in the X-axis direction with respect to a second wiring pattern 41. Furthermore, an upper-arm gate connection section 52-1 and an upper-arm emitter connection section 62-1 are arranged on a negative side in the Y-axis direction, and a lower-arm gate connection section 52-2 and a lower-arm emitter connection section 62-2 are arranged on a positive side in the Y-axis direction.On the other hand, the position of a flat plate section 34 of a conductor frame 30 is similar to that of the semiconductor device 100 according to the example by changing the wiring of a leg section 32 of the conductor frame 30. Furthermore, the positions of an output terminal 22 and the conductor frame 30 to which the output terminal 22 is connected are similar to those of the semiconductor device 100 according to the example. Accordingly, the positions of an external output terminal 70, an external positive electrode terminal 72, and an external negative electrode terminal 74, which are arranged on a projection 116 of a housing section 110, are also similar.

[0086] The parallel flat plate structure formed by the flat plate section 34, to which the positive electrode terminal 24 is connected, and the flat plate section 34, to which the negative electrode terminal 26 is connected, in the semiconductor device 100 according to the example comprising the current-fed inverter circuit, is similar to a parallel flat plate structure formed by the flat plate section 34, to which the positive electrode terminal 24 is connected, and the flat plate section 34, to which the negative electrode terminal 26 is connected, in the semiconductor device 500 according to the comparative example, which comprises the voltage-fed inverter circuit. This makes it possible to manufacture the semiconductor device 100 according to the example without degrading its inductance characteristics compared to those of the semiconductor device 500 according to the comparative example.Since the position of each terminal arranged in the housing section 110 is not changed, the semiconductor device 100 according to the example can also be used without changing the wiring and the like in the implementation which includes the power source 14 and the external load 16, in the case in which the three-phase power converter circuit is produced.

[0087] As described above, the semiconductor device 100, as shown in the example comprising the current-fed inverter circuit, can be replaced by the semiconductor device 500, as shown in the comparison example comprising the voltage-fed inverter circuit, without any degradation of the inductance characteristics and without any changes to the wiring or similar implementation. This allows for improved compatibility between the semiconductor devices. Since the separate boost converter 600 is not required, cost reduction and space savings can also be achieved across the entire boost system.

[0088] Fig. Figure 5A shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is constructed such that the first diode section 46, contained in the upper branch circuit 10, and the second transistor section 44, contained in the lower branch circuit 12, are removed from the semiconductor device 500 according to the comparison example. It should be noted that the first diode section 46, contained in the upper branch circuit 10, cannot be removed but is arranged as a freewheeling diode for the first transistor section 42. In the case where the first diode section 46 is arranged as a freewheeling diode for the first transistor section 42, an interruption of the first transistor section 42 can be prevented.

[0089] The semiconductor device 100 comprises a test terminal 28 connected between the first transistor section 42 and the second diode section 48. The output terminal 22 in the semiconductor device 500 according to the comparison example is the test terminal 28 in the present example. Furthermore, the positive electrode terminal 24 according to the comparison example is terminal 25 of the positive electrode side in the present example, and the negative electrode terminal 26 according to the comparison example is terminal 27 of the negative electrode side in the present example.In the semiconductor device 100 of the present example, since the second transistor section 44, which is contained in the underarm circuit 12, is removed from the semiconductor device 500 according to the comparison example and the output terminal 22 of the comparison example is the test terminal 28, the underarm-side gate connection section 52-2 and the underarm-side emitter connection section 62-2, and the gate terminal 50 and the emitter terminal 60 connected thereto cannot be used.

[0090] Since the output terminal 22 of the comparison example is the test terminal 28, the semiconductor device 100 of the present example can be manufactured without changing the appearance of any of its housings from those of the semiconductor device 500 according to the comparison example. This makes it possible to improve the compatibility between the semiconductor devices.

[0091] The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 in Fig. 3. In a case where the semiconductor device 100 connects the upper branch circuit 10 in Fig. 3 forms, terminal 25 of the positive electrode side of the present example corresponds to terminal 24 of the positive electrode side according to the example in Fig. 2B, and terminal 27 of the negative electrode side of the present example corresponds to output terminal 22 according to the example in Fig. 2B. In a case where the semiconductor device 100 connects the lower branch circuit 12 in Fig. 3 forms, terminal 25 of the positive electrode side of the present example corresponds to the output terminal 22 according to the example in Fig. 2B, and the terminal 27 of the negative electrode side of the present example corresponds to the negative electrode terminal 26 according to the example in Fig. 2B. In the case where the semiconductor device 100 forms either the upper branch circuit 10 or the lower branch circuit 12, the terminal 25 of the positive electrode side can be arranged on the positive electrode side with respect to the terminal 27 of the negative electrode side.

[0092] Fig. Figure 5B shows a circuit arrangement of the modified semiconductor device 100. The semiconductor device 100 of the present example comprises the first transistor section 42, the second diode section 48, which is connected in series with the first transistor section 42, and the test terminal 28, which is connected between the first transistor section 42 and the second diode section 48. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 in Fig. 3. The semiconductor device 100 of the present example includes the test clamp 28, so that a characteristic test can be carried out on each element even after the semiconductor device 100 has been manufactured.

[0093] Fig. Figure 5C shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is constructed such that the first transistor section 42, contained in the upper branch circuit 10, and the second diode section 48, contained in the lower branch circuit 12, are removed from the semiconductor device 500 according to the comparative example. It should be noted that the second diode section 48, contained in the lower branch circuit 12, cannot be removed but is arranged as a freewheeling diode for the second transistor section 44. In the case where the second diode section 48 is arranged as a freewheeling diode for the second transistor section 44, an interruption of the second transistor section 44 can be prevented. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12.

[0094] The semiconductor device 100 comprises a test terminal 28 connected between the second transistor section 44 and the first diode section 46. The output terminal 22 in the semiconductor device 500 according to the comparison example is the test terminal 28 in the present example. Furthermore, the positive electrode terminal 24 according to the comparison example is terminal 25 of the positive electrode side in the present example, and the negative electrode terminal 26 according to the comparison example is terminal 27 of the negative electrode side in the present example.In the semiconductor device 100 of the present example, since the first transistor section 42, which is contained in the upper branch circuit 10, is removed from the semiconductor device 500 according to the comparison example and the output terminal 22 of the comparison example is the test terminal 28, the upper arm-side gate connection section 52-1 and the upper arm-side emitter connection section 62-1, and the gate terminal 50 and the emitter terminal 60 connected thereto cannot be used.

[0095] Since the role of each terminal is changed, the semiconductor device 100 of the present example can be manufactured without changing the appearance of the housing from that of the semiconductor device 500 according to the comparison example. This makes it possible to improve the compatibility between the semiconductor devices.

[0096] Fig. Figure 5D shows a circuit arrangement of a modified semiconductor device 100. The upper branch circuit 10 or the lower branch circuit 12, as semiconductor device 100 of the present example, comprises the second transistor section 44, the first diode section 46 connected in series with the second transistor section 44, and the test terminal 28 connected between the second transistor section 44 and the first diode section 46. The semiconductor device 100 of the present example includes the test terminal 28 so that a characteristic test can be performed on each element even after the semiconductor device 100 has been manufactured.

[0097] Fig. Figure 6A shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the second transistor section 44 and the second diode section 48, which are contained in the lower branch circuit 12, are separated from the semiconductor device 100 according to the example of Fig. 2B are removed and form the upper branch circuit 10 or the lower branch circuit 12. In the semiconductor device 100 of the present example, since the second transistor section 44, which is contained in the lower branch circuit 12, is removed from the semiconductor device 100 according to the example of Fig. With 2B removed, the underarm-side gate connection section 52-2 and the underarm-side emitter connection section 62-2, and the gate terminal 50 and the associated emitter terminal 60 are not used. In this example as well, the semiconductor device 100 can be manufactured without changing the appearance of the package, and the compatibility between the semiconductor devices can be improved.

[0098] Fig. Figure 6B shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the first transistor section 42 and the first diode section 46, which are contained in the upper branch circuit 10, are separated from the semiconductor device 100 according to the example of Fig. 2B are removed and form the upper branch circuit 10 or the lower branch circuit 12. In the semiconductor device 100 of the present example, since the first transistor section 42, which is contained in the upper branch circuit 10, is removed from the semiconductor device 100 according to the example of Fig. With 2B removed, the upper arm-side gate connection section 52-1 and the upper arm-side emitter connection section 62-1, and the gate terminal 50 and the associated emitter terminal 60 are not used. In this example as well, the semiconductor device 100 can be manufactured without changing the appearance of the package, and the compatibility between the semiconductor devices can be improved.

[0099] Fig. Figure 7 shows a perspective view of a modification of the semiconductor device 100. The semiconductor device 100 of the present example differs from that of the example of Fig. 1 in the appearance of the housing. The semiconductor device 100 of the present example comprises the external positive electrode terminal 72, the external negative electrode terminal 74, and an external test terminal 76. The external test terminal 76 is a DC terminal for performing the characteristic test on each element.

[0100] Fig. Figure 8A shows a top view of a modification of the semiconductor device 100. The semiconductor device 100 of this example comprises a positive electrode terminal 25, a negative electrode terminal 27, and a test terminal 28. The positive electrode terminal 25 is electrically connected to the external positive electrode terminal 72. The negative electrode terminal 27 is electrically connected to the external negative electrode terminal 74. The test terminal 28 is electrically connected to an external test terminal 76. The semiconductor device 100 may include the first transistor section 42, the first diode section 46, and the second diode section 48. In a case where the first diode section 46 is arranged as a freewheeling diode for the first transistor section 42, an open circuit of the first transistor section 42 can be prevented. It should be noted that the first diode section 46 may not be included.The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12.

[0101] The first diode section 46 is arranged on the first wiring pattern 40. The first diode section 46 can be arranged such that a cathode electrode contacts the first wiring pattern 40. The anode electrode of the first diode section 46 can be connected to the test terminal 28 via a wire element 38.

[0102] The first transistor section 42 is connected in parallel with the first diode section 46 and arranged on the first wiring pattern 40. The first transistor section 42 can be arranged such that a collector electrode contacts the first wiring pattern 40. The emitter electrode of the first transistor section 42 can be connected to the anode electrode of the first diode section 46 via a wire element 38. The collector electrode of the first transistor section 42 and the cathode electrode of the first diode section 46 are connected via the first wiring pattern 40, and the emitter electrode of the first transistor section 42 and the anode electrode of the first diode section 46 are connected via the wire element 38 such that the first transistor section 42 and the first diode section 46 are connected in parallel.

[0103] The second diode section 48 is arranged on the second wiring pattern 41. The second diode section 48 can be arranged such that a cathode electrode contacts the second wiring pattern 41. The anode electrode of the second diode section 48 can be connected to the test terminal 28 via a wire element 38.

[0104] In the semiconductor device 100 of the present example, only the second diode section 48 is arranged on the negative side in the Y-axis direction, and the second transistor section 44 is not arranged. Accordingly, the upper-arm gate connection section 52-1 and the upper-arm emitter connection section 62-1 are used, but the lower-arm gate connection section 52-2 and the lower-arm emitter connection section 62-2 cannot be used. It should be noted that the lower-arm emitter connection section 62-2 can be connected to the anode electrode of the second diode section 48 and used as an auxiliary terminal.

[0105] Fig. Figure 8B shows a circuit arrangement of the modified semiconductor device 100. The upper branch circuit 10 or the lower branch circuit 12 of the present example comprises the first transistor section 42, the first diode section 46 connected in parallel with the first transistor section 42, the second diode section 48 connected in series with the first transistor section 42, and a test terminal 28 connected between the first transistor section 42 and the second diode section 48. In a case where the first diode section 46 is arranged as a freewheeling diode for the first transistor section 42, an open circuit of the first transistor section 42 can be prevented. It should be noted that the first diode section 46 can be omitted.The semiconductor device 100 of the present example includes the test clamp 28, so that a characteristic test can be carried out on each element even after the semiconductor device 100 has been manufactured.

[0106] Fig. Figure 9 shows a top view of a semiconductor device 500 according to a comparative example. The semiconductor device 500 according to the comparative example comprises an output terminal 22, a positive electrode terminal 24, and a negative electrode terminal 26. The semiconductor device 500 may include a second transistor section 44, which is arranged on a second wiring pattern 41 and connected in parallel with a second diode section 48. The semiconductor device 500 according to the comparative example forms an upper branch circuit and a lower branch circuit of a voltage-fed inverter circuit. A circuit arrangement similar to that of the semiconductor device 500 of Fig. It should be 4A.

[0107] The semiconductor device 100 according to the example of Fig. 8A is manufactured such that the second transistor section 44, which is contained in the lower branch circuit 12, is separated from the semiconductor device 500 according to the comparative example of Fig. 9 is removed. It should be noted that the first diode section 46, which is contained in the upper branch circuit 10, can be removed. Alternatively, the semiconductor device 100 can be removed according to the example of Fig. 8A shall be manufactured such that the first transistor section 42, which is contained in the upper branch circuit 10, and / or the second diode section 48, which is contained in the lower branch circuit 12, is separated from the semiconductor device 500 according to the comparative example of Fig. 9 are removed. The output terminal 22 in the comparison example of Fig. 9 is the test terminal 28 in the present example of Fig. 8A. Furthermore, the positive electrode terminal 24 is according to the comparative example of Fig. 9 the terminal 25 of the positive electrode side in the example of Fig. 8A, and the negative electrode terminal 26 according to the comparative example of Fig. 9 is terminal 27 of the negative electrode side in the example of Fig. 8A.

[0108] Since the role of each terminal is changed, the semiconductor device 100 can be configured according to the example of Fig. 8A can be manufactured without the appearance of the housing being different from that of the semiconductor device 500 according to the comparative example of Fig. 9 to change. This makes it possible to improve the compatibility between the semiconductor devices.

[0109] Fig. Figure 10A shows a top view of a modification of the semiconductor device 100. The semiconductor device 100 of the present example differs from that of the example of Fig. 2A in the design of the insulating plate 20, the design of the conductor frame 30, and the arrangement of the gate connection section 52 and the emitter connection section 62. In the present example, the differences to the example of Fig. 2A is described in particular, and other arrangements may be the same as those in the example of Fig. 2A. It should be noted that details of the difference in the design of the insulating plate 20 are described below.

[0110] The positive electrode terminal 24 of the present example is arranged on the negative side in the X-axis direction with respect to the negative electrode terminal 26. That is, as described below, the upper branch circuit 10 is arranged on the negative side in the X-axis direction with respect to the lower branch circuit 12. Accordingly, the arrangements of the upper-arm gate connection section 52-1 and the upper-arm emitter connection section 62-1, and of the lower-arm gate connection section 52-2 and the lower-arm emitter connection section 62-2, are the reverse of those of the example of Fig. 2A. On the other hand, the position of the flat plate section 34 of the conductor frame 30 is similar to that of the example of Fig. 2A, by changing the wiring of leg section 32 of the conductor frame 30. Accordingly, the positions of an external output terminal 70, an external positive electrode terminal 72, and an external negative electrode terminal 74, which are arranged on a projection 116 of a housing section 110, are also similar.

[0111] Furthermore, in the present example, the arrangements of the upper-arm-side gate connection section 52-1 and the upper-arm-side emitter connection section 62-1, and of the lower-arm-side gate connection section 52-2 and the lower-arm-side emitter connection section 62-2 are similar to those of the comparative example of Fig. 4B. That is, the configurations of the leg section 32 and the flat plate section 34 of the conductor frame 30 are similar to those of the semiconductor device 500 according to the comparative example, and the positions of the gate terminal 50, the emitter terminal 60, the external output terminal 70, the external positive electrode terminal 72 and the external negative electrode terminal 74, which are arranged in the housing section 110, are also similar to those of the semiconductor device 500 according to the comparative example.

[0112] Fig. Figure 10B shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example differs from that of the example of Fig. 2B in the order of the upper branch circuit 10 and the lower branch circuit 12 in the X-axis direction. In the present example, the differences to the example of Fig. 2B is described in particular, and other arrangements may be the same as those in the example of Fig. It should be 2B.

[0113] The upper branch circuit 10 includes the first transistor section 42 and the first diode section 46. The positive electrode terminal 24, the first transistor section 42, the first diode section 46, and the output terminal 22 can be electrically connected in this order. It should be noted that the order of the circuit connections is not limited to this.

[0114] The collector electrode of the first transistor section 42 can be electrically connected to the positive electrode terminal 24 via the first wiring pattern 40.

[0115] The cathode electrode of the first diode section 46 can be electrically connected to the output terminal 22 via the second wiring pattern 41. Since the emitter electrode of the first transistor section 42 and the anode electrode of the first diode section 46 are electrically connected via the wire element 38, the first transistor section 42 and the first diode section 46 are connected in series. The emitter electrode of the first transistor section 42 can be electrically connected to the upper-arm emitter connection section 62-1 via the wire element 38 or the like. The gate electrode of the first transistor section 42 can be electrically connected to the upper-arm gate connection section 52-1 via the wire element 38 or the like.

[0116] The lower branch circuit 12 has a second transistor section 44 and a second diode section 48. The output terminal 22, the second transistor section 44, the second diode section 48, and the negative electrode terminal 26 can be electrically connected in this order. It should be noted that the order of the circuit connection is not limited to this.

[0117] The collector electrode of the second transistor section 44 can be electrically connected to the output terminal 22 via the second wiring pattern 41. The cathode electrode of the second diode section 48 can be electrically connected to the negative electrode terminal 26 via a third wiring pattern 43. Since the emitter electrode of the second transistor section 44 and the anode electrode of the second diode section 48 are electrically connected via the wire element 38, the second transistor section 44 and the second diode section 48 are connected in series. The emitter electrode of the second transistor section 44 can be electrically connected to the lower-side emitter connection section 62-2 via the wire element 38 or the like. The gate electrode of the second transistor section 44 can be electrically connected to the lower-side gate connection section 52-2 via the wire element 38 or the like.

[0118] The first transistor section 42 and the first diode section 46, and the second transistor section 44 and the second diode section 48, can be arranged in the specified second direction, which differs from the first direction. The first transistor section 42 and the first diode section 46, and the second transistor section 44 and the second diode section 48 of the present example are arranged in the X-axis direction, which differs from the Y-axis direction, which is the first direction. The first transistor section 42 and the first diode section 46 can be arranged on the negative side in the second direction with respect to the second transistor section 44 and the second diode section 48. The first transistor section 42 and the first diode section 46 of the present example are arranged on the negative side in the X-axis direction with respect to the second transistor section 44 and the second diode section 48.

[0119] The positive electrode terminal 24 can be arranged on the negative side in the second direction relative to the negative electrode terminal 26. In the present example, the positive electrode terminal 24 is arranged on the negative side in the X-axis direction relative to the negative electrode terminal 26.

[0120] The order of the first transistor section 42 and the first diode section 46, and of the second transistor section 44 and the second diode section 48 in the second direction, and the order of the positive electrode terminal 24 and the negative electrode terminal 26 in the second direction can be the same. The upper branch circuit 10 of the present example has the first transistor section 42 and the first diode section 46. The lower branch circuit 12 of the present example has the second transistor section 44 and the second diode section 48. Accordingly, the order of the upper branch circuit 10 and the lower branch circuit 12 in the second direction, and the order of the positive electrode terminal 24 and the negative electrode terminal 26 in the second direction, can be the same.The upper branch circuit 10 of the present example is arranged on the negative side in the X-axis direction, which is the second direction with respect to the lower branch circuit 12.

[0121] The first transistor section 42 can be arranged on the negative side in the first direction relative to the first diode section 46. In this example, the first transistor section 42 is arranged on the negative side in the Y-axis direction relative to the first diode section 46. The second transistor section 44 can be arranged on the positive side in the first direction relative to the second diode section 48. In this example, the second transistor section 44 is arranged on the positive side in the Y-axis direction relative to the second diode section 48. It should be noted that the arrangement of the first transistor section 42 and the first diode section 46 in the upper branch circuit 10 and the arrangement of the second transistor section 44 and the second diode section 48 in the lower branch circuit 12 are not limited to these.

[0122] Fig. Figure 11 shows a modification of the three-phase converter circuit design. The three-phase converter circuit of the present example differs from that of the example of Fig. 3 in the order of connecting the transistor section and the diode section. Other configurations can be the same as those in the example of Fig. 3.

[0123] The semiconductor devices 100 according to the examples shown using the Fig. 10A to Fig. 11 can also be described by the semiconductor device 500 according to the comparative example, which uses the Fig. 4A and Fig. As described in section 4B, the components can be replaced without degrading the inductance characteristics or changing the wiring or similar aspects of the implementation. This allows for improved compatibility between semiconductor devices. Since the separate boost converter 600 is not required, cost reductions and space savings can also be achieved across the entire boost system.

[0124] Fig. Figure 12 shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example differs from that of the example of Fig. 10B in the arrangement of the transistor section and the diode section in the upper branch circuit 10 and the lower branch circuit 12. In the present example, the differences to the example of Fig. 10B is described in particular, and other arrangements may be the same as those in the example of Fig. It will be 10B.

[0125] The first transistor section 42 can be arranged on the positive side in the first direction with respect to the first diode section 46. The first transistor section 42 of the present example is arranged on the positive side in the Y-axis direction with respect to the first diode section 46. That is, the order of the first transistor section 42 and the first diode section 46 in the Y-axis direction is the opposite of that of the example of Fig. 10B. The second transistor section 44 can be arranged on the negative side in the first direction with respect to the second diode section 48. The second transistor section 44 of the present example is arranged on the negative side in the Y-axis direction with respect to the second diode section 48. That is, the order of the second transistor section 44 and the second diode section 48 in the Y-axis direction is opposite to that of the example of Fig. 10B. In this way, the arrangement of the first transistor section 42 and the first diode section 46 in the upper branch circuit 10 and the arrangement of the second transistor section 44 and the second diode section 48 in the lower branch circuit 12 can be any arrangement.

[0126] The emitter electrode of the first transistor section 42 can be electrically connected to the output terminal 22 via the wire element 38. The anode electrode of the first diode section 46 can be electrically connected to the positive electrode terminal 24 via the wire element 38. Since the collector electrode of the first transistor section 42 and the cathode electrode of the first diode section 46 are electrically connected via the first wiring pattern 40, the first transistor section 42 and the first diode section 46 are connected in series.

[0127] The emitter electrode of the second transistor section 44 can be electrically connected to the negative electrode terminal 26 via the wire element 38. The anode electrode of the second diode section 48 can be electrically connected to the output terminal 22 via the wire element 38. Since the collector electrode of the second transistor section 44 and the cathode electrode of the second diode section 48 are electrically connected via the second wiring pattern 41, the second transistor section 44 and the second diode section 48 are connected in series.

[0128] Fig. Figure 13A shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the first diode section 46, which is contained in the upper branch circuit 10, and the second transistor section 44, which is contained in the lower branch circuit 12, are separated from the semiconductor device 100 according to the example of Fig. 10B are removed. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 of Fig. 11.

[0129] The semiconductor device 100 comprises a test terminal 28 connected between the first transistor section 42 and the second diode section 48. The output terminal 22 in the semiconductor device 100 according to the example of Fig. 10B is the test terminal 28 in the present example. Furthermore, the positive electrode terminal 24 is shown in the example of Fig. 10B a terminal 25 of the positive electrode side in the present example, and the negative electrode terminal 26 according to the example of Fig. 10B is a terminal 27 of the negative electrode side in the present example. In the semiconductor device 100 of the present example, since the second transistor section 44, which is contained in the lower branch circuit 12, can be separated from the semiconductor device 100 according to the example of Fig. 10B is away and the output terminal 22 of the example from Fig. 10B the test terminal 28 is, the underarm-side gate connection section 52-2 and the underarm-side emitter connection section 62-2, and the gate terminal 50 and the emitter terminal 60 connected to it are not used.

[0130] Since the role of each terminal is changed, the semiconductor device 100 of the present example can be manufactured without changing the appearance of the housing from that of the semiconductor device 100 according to the example of Fig. 10B to change. This makes it possible to improve the compatibility between semiconductor devices.

[0131] Fig. Figure 13B shows a circuit arrangement of the modified semiconductor device 100. The semiconductor device 100 of the present example comprises the first transistor section 42, the second diode section 48, which is connected in series with the first transistor section 42, and the test terminal 28, which is connected between the first transistor section 42 and the second diode section 48. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 in Fig. 11. The semiconductor device 100 of the present example includes the test clamp 28, so that a characteristic test can be carried out on each element even after the semiconductor device 100 has been manufactured.

[0132] Fig. Figure 13C shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the first transistor section 42, which is contained in the upper branch circuit 10, and the second diode section 48, which is contained in the lower branch circuit 12, are separated from the semiconductor device 100 according to the example of Fig. 10B are removed. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 of Fig. 3.

[0133] The semiconductor device 100 comprises a test terminal 28 connected between the second transistor section 44 and the first diode section 46. The output terminal 22 in the semiconductor device 100 according to the example of Fig. 10B is the test terminal 28 in the present example. Furthermore, the positive electrode terminal 24 is shown in the example of Fig. 10B a terminal 25 of the positive electrode side in the present example, and the negative electrode terminal 26 according to the example of Fig. 10B is a terminal 27 of the negative electrode side in the present example. In the semiconductor device 100 of the present example, since the first transistor section 42, which is contained in the upper branch circuit 10, can be separated from the semiconductor device 100 according to the example of Fig. 10B is away and the output terminal 22 of the example from Fig. 10B the test terminal 28 is, the upper arm side gate connection section 52-1 and the upper arm side emitter connection section 62-1, and the gate terminal 50 and the emitter terminal 60 connected to it are not used.

[0134] Since the role of each terminal is changed, the semiconductor device 100 of the present example can be manufactured without changing the appearance of the housing from that of the semiconductor device 500 according to the example of Fig. 10B to change. This makes it possible to improve the compatibility between semiconductor devices.

[0135] Fig. Figure 13D shows a circuit arrangement of the modified semiconductor device 100. The semiconductor device 100 of the present example comprises the second transistor section 44, the first diode section 46, which is connected in series with the second transistor section 44, and the test terminal 28, which is connected between the second transistor section 44 and the first diode section 46. The semiconductor device 100 of the present example forms the upper branch circuit 10 or the lower branch circuit 12 in Fig. 3. The semiconductor device 100 of the present example includes the test clamp 28, so that a characteristic test can be carried out on each element even after the semiconductor device 100 has been manufactured.

[0136] Fig. Figure 14A shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the second transistor section 44 and the second diode section 48, which are contained in the lower branch circuit 12, are separated from the semiconductor device 100 according to the example of Fig. 10B are removed and the upper branch circuit 10 or the lower branch circuit 12 of Fig. 11 form. In the semiconductor device 100 of the present example, since the second transistor section 44, which is contained in the lower branch circuit 12, can be formed by the semiconductor device 100 according to the example of Fig. With 10B removed, the underarm-side gate connection section 52-2 and the underarm-side emitter connection section 62-2, and the gate terminal 50 and the associated emitter terminal 60 are not used. In this example as well, the semiconductor device 100 can be manufactured without changing the appearance of the package, and the compatibility between the semiconductor devices can be improved.

[0137] Fig. Figure 14B shows an insulating plate 20 of a modification of the semiconductor device 100. The semiconductor device 100 of the present example is manufactured such that the first transistor section 42 and the first diode section 46, which are contained in the upper branch circuit 10, are separated from the semiconductor device 100 according to the example of Fig. 10B are removed and the upper branch circuit 10 or the lower branch circuit 12 of Fig. 3 form. In the semiconductor device 100 of the present example, since the first transistor section 42, which is contained in the upper branch circuit 10, can be formed by the semiconductor device 100 according to the example of Fig. With 14B removed, the upper arm-side gate connection section 52-1 and the upper arm-side emitter connection section 62-1, and the gate terminal 50 and the associated emitter terminal 60 are not used. In this example as well, the semiconductor device 100 can be manufactured without changing the appearance of the package, and the compatibility between the semiconductor devices can be improved.

[0138] Although the present invention has been described above with reference to the exemplary embodiments, the technical scope of the present invention is not limited to that described in the exemplary embodiments above. It is obvious to those skilled in the art that various modifications or improvements can be made to the exemplary embodiments described above. It is also evident from the description of the claims that the exemplary embodiments to which such modifications or improvements are made may be included within the technical scope of the present invention.

[0139] It should be noted that any process of operations, procedures, steps, stages, and the like performed by the device, system, program, and method shown in the claims, description, or drawings may be carried out in any order, as long as the order is not specified by "before," "before," or the like, and as long as the output of a previous process is not used in a subsequent process. Even if, for the sake of simplicity, the sequence of operations is described in the claims, description, or drawings using expressions such as "first" or "next," this does not necessarily mean that the process must be carried out in that order. REFERENCE MARK LIST 10 upper branch circuit 12 lower branch circuit 14 Energy source 16 external load 20 insulating panels 22 Output terminal 24 positive electrode clamps 25. Terminal of the positive electrode side 26 negative electrode clamp 27. Terminal of the negative electrode side 28 Test clamp 30 ladder frames 32 Thigh section 34 flat plate section 38 wire element 40 first wiring pattern 41 second wiring pattern 42 first transistor section 43 third wiring pattern 44 second transistor section 46 first diode section 48 second diode section 50 gate terminal 52 Gate connection section 60 Emitter terminal 62 Emitter connection section 66 Auxiliary collector terminal 68 Auxiliary collector connection section 70 external output terminal 72 external positive electrode clamp 74 external negative electrode clamp 76 external test clamp 80 Temperature measuring clamp 82 Temperature measuring connection section 84 Temperature measuring section 100 semiconductor devices 110 Housing section 112 recess 114 terminal arrangement area 116 lead 120 Basic section 201 first end page 202 second end page 210 first area 220 second area 230 third area. original claims

[0140] 1. Semiconductor device comprising an upper branch circuit and a lower branch circuit, and comprising a positive electrode terminal, a negative electrode terminal and an output terminal, comprising: an insulating panel; a first wiring pattern arranged on the insulating board; and a second wiring pattern, arranged on the insulating board and spaced apart from the first wiring pattern, where the upper branch circuit has a circuit in which the positive electrode clamp a first diode section arranged on the first wiring pattern, a first transistor section connected in series with the first diode section and arranged on the first wiring pattern, and the output terminal are connected and arranged in this order, and the lower branch circuit a second transistor section, which is arranged on the second wiring pattern, and a second diode section that is arranged on the second wiring pattern.

[0141] 2. Semiconductor device according to claim 1, wherein The lower branch circuit has a circuit in which the output terminal, the second diode section, the second transistor section and the negative electrode terminal are connected and arranged in that order.

[0142] 3. Semiconductor device according to claim 1, wherein the first transistor section is arranged such that a collector electrode contacts the first wiring pattern, and the first diode section is arranged such that a cathode electrode contacts the first wiring pattern.

[0143] 4. Semiconductor device according to claim 1, wherein the second transistor section is arranged such that a collector electrode contacts the second wiring pattern, and the second diode section is arranged such that a cathode electrode contacts the second wiring pattern.

[0144] 5. Semiconductor device according to claim 1, wherein An emitter electrode of the first transistor section is connected to the output terminal via a wire element.

[0145] 6. Semiconductor device according to claim 1, wherein an anode electrode of the first diode section is connected to the positive electrode terminal via a wire element.

[0146] 7. Semiconductor device according to claim 1, wherein an anode electrode of the second diode section is connected to the output terminal via a wire element.

[0147] 8. Semiconductor device according to claim 1, wherein An emitter electrode of the second transistor section is connected to the negative electrode terminal via a wire element.

[0148] 9. Semiconductor device according to claim 1, wherein the output terminal is arranged on a positive side in a predetermined first direction with respect to the positive electrode terminal and the negative electrode terminal.

[0149] 10. Semiconductor device according to claim 9, wherein the first wiring pattern and the second wiring pattern are arranged in a predetermined second direction that differs from the first direction, the first wiring pattern is arranged on a positive side in the second direction with respect to the second wiring pattern, and The positive electrode clamp is arranged on a positive side in the second direction with respect to the negative electrode clamp.

[0150] 11. Semiconductor device according to claim 10, wherein The output terminal is located on a positive side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0151] 12. Semiconductor device according to claim 10, wherein The negative electrode terminal is located on a negative side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0152] 13. Semiconductor device according to claim 10, wherein the positive electrode terminal is located on a negative side in the first direction with respect to the first wiring pattern and the second wiring pattern.

[0153] 14. Semiconductor device, comprising: a transistor section; a diode section connected in series with the transistor section; and an external test terminal that is connected between the transistor section and the diode section.

[0154] 15. Semiconductor device with an upper branch circuit and a lower branch circuit, comprising: an insulating panel; a positive electrode clamp and a negative electrode clamp, which are arranged in a first area on the insulating plate; and an output terminal located in a second area that differs from the first area on the insulating plate, where the upper branch circuit has a first diode section, which is arranged in a third area between the first area and the second area on the insulating plate, and a first transistor section, which is connected in series with the first diode section in the third area, and the lower branch circuit a second diode section, which is located in the third area, and a second transistor section, which is connected in series with the second diode section in the third area.

[0155] 16. Semiconductor device according to claim 15, wherein the first area is arranged adjacent to a first end face of the insulating panel, and the second area is arranged adjacent to a second end face of the insulating panel, which is opposite the first end face.

[0156] 17. Semiconductor device according to claim 15 or 16, wherein the positive electrode terminal, the first transistor section, the first diode section and the output terminal are electrically connected in that order, and The output terminal, the second transistor section, the second diode section and the negative electrode terminal are electrically connected in that order.

[0157] 18. Semiconductor device according to claim 15 or 16, wherein the second area is arranged on a positive side in a predetermined first direction with respect to the first area, the first transistor section and the first diode section and the second transistor section and the second diode section are arranged in a predetermined second direction that differs from the first direction, and the first transistor section and the first diode section are arranged on a negative side in the second direction with respect to the second transistor section and the second diode section.

[0158] 19. Semiconductor device according to claim 18, wherein The positive electrode clamp is located on a negative side in the second direction with respect to the negative electrode clamp.

[0159] 20. Semiconductor device according to claim 18, wherein the first transistor section is arranged on a negative side in the first direction with respect to the first diode section.

[0160] 21. Semiconductor device according to claim 18, wherein The second transistor section is arranged on a positive side in the first direction with respect to the second diode section.

[0161] 22. Semiconductor device according to claim 18, wherein the first transistor section is arranged on a positive side in the first direction with respect to the first diode section.

[0162] 23. Semiconductor device according to claim 18, wherein The second transistor section is arranged on a negative side in the first direction with respect to the second diode section.

[0163] 24. Semiconductor device according to claim 15 or 16, wherein the positive electrode terminal, the first diode section, the first transistor section and the output terminal are electrically connected in that order, and The output terminal, the second diode section, the second transistor section and the negative electrode terminal are electrically connected in that order.

[0164] 25. Semiconductor device according to claim 15 or 16, wherein the second area is arranged on a positive side in a predetermined first direction with respect to the first area, the first transistor section and the first diode section and the second transistor section and the second diode section are arranged in a predetermined second direction that differs from the first direction, and the first transistor section and the first diode section are arranged on a positive side in the second direction with respect to the second transistor section and the second diode section.

[0165] 26. Semiconductor device according to claim 25, wherein The positive electrode clamp is arranged on a positive side in the second direction with respect to the negative electrode clamp.

[0166] 27. Semiconductor device according to claim 25, wherein the first transistor section is arranged on a positive side in the first direction with respect to the first diode section.

[0167] 28. Semiconductor device according to claim 25, wherein The second transistor section is arranged on a negative side in the first direction with respect to the second diode section. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2006-187143

[0002] JP 2005-269735

[0002] JP 2003-164140

[0002] JP 7-25552

[0002] JP 2008-186920

[0002] JP 2014-155287

[0002]

Claims

1. A semiconductor device having an upper arm circuit and a lower arm circuit, and equipped with a positive terminal, a negative terminal, and an output terminal, comprising: an insulating plate; a first wiring pattern provided on the insulating plate; and a second wiring pattern provided on the insulating plate and spaced apart from the first wiring pattern, wherein the upper arm circuit has a circuit in which the positive terminal, a first diode portion provided on the first wiring pattern, a first transistor portion connected in series with the first diode portion and provided on the first wiring pattern, and the output terminal are connected and arranged in this order, and the lower arm circuit has: a second transistor portion provided on the second wiring pattern, and a second diode portion provided on the second wiring pattern.

2. The semiconductor device according to claim 1, wherein the lower arm circuit has a circuit in which the output terminal, the second diode section, the second transistor section, and the negative terminal are connected and arranged in this order.

3. The semiconductor device according to claim 1, wherein the first transistor section is provided with a collector electrode in contact with the first wiring pattern, and the first diode section is provided with a cathode electrode in contact with the first wiring pattern.

4. The semiconductor device according to claim 1, wherein the second transistor section is provided with a collector electrode in contact with the second wiring pattern, and the second diode section is provided with a cathode electrode in contact with the second wiring pattern.

5. The semiconductor device according to claim 1, wherein the emitter electrode of the first transistor portion is connected to the output terminal via a wire member.

6. The semiconductor device according to claim 1, wherein the anode electrode of the first diode portion is connected to the positive terminal via a wire member.

7. The semiconductor device according to claim 1, wherein the anode electrode of the second diode portion is connected to the output terminal via a wire member.

8. The semiconductor device according to claim 1, wherein the emitter electrode of the second transistor portion is connected to the negative terminal via a wire member.

9. The semiconductor device according to claim 1, wherein the output terminal is provided on the positive side of the positive terminal and the negative terminal in a predetermined first direction.

10. The semiconductor device described in claim 9, wherein the first wiring pattern and the second wiring pattern are arranged in a predetermined second direction different from the first direction, the first wiring pattern is provided on the positive side of the second direction relative to the second wiring pattern, and the positive terminal is provided on the positive side of the second direction relative to the negative terminal.

11. The semiconductor device according to claim 10, wherein the output terminal is provided on the positive side in the first direction relative to the first wiring pattern and the second wiring pattern.

12. The semiconductor device according to claim 10, wherein the negative electrode terminal is provided on the negative side in the first direction relative to the first wiring pattern and the second wiring pattern.

13. The semiconductor device according to claim 10, wherein the positive electrode terminal is provided on the negative side of the first wiring pattern and the second wiring pattern in the first direction.

14. A semiconductor device comprising: a transistor section; a diode section connected in series with the transistor section; and an external test terminal connected between the transistor section and the diode section.

15. A semiconductor device having an upper arm circuit and a lower arm circuit, comprising: an insulating plate; a positive terminal and a negative terminal provided in a first region on the insulating plate; and an output terminal provided in a second region on the insulating plate different from the first region, wherein the upper arm circuit has: a first diode section provided in a third region between the first region and the second region on the insulating plate; and a first transistor section connected in series with the first diode section in the third region; and the lower arm circuit has: a second diode section provided in the third region; and a second transistor section connected in series with the second diode section in the third region.

16. The semiconductor device according to claim 15, wherein the first region is provided adjacent to a first edge of the insulating plate, and the second region is provided adjacent to a second edge of the insulating plate opposite the first edge.

17. The semiconductor device according to claim 15 or 16, wherein the positive terminal, the first transistor section, the first diode section, and the output terminal are electrically connected in this order, and the output terminal, the second transistor section, the second diode section, and the negative terminal are electrically connected in this order.

18. The semiconductor device according to claim 15 or 16, wherein the second region is provided on the positive side of a predetermined first direction relative to the first region, the first transistor portion and the first diode portion, and the second transistor portion and the second diode portion are arranged in a predetermined second direction different from the first direction, and the first transistor portion and the first diode portion are provided on the negative side of the second direction relative to the second transistor portion and the second diode portion.

19. The semiconductor device according to claim 18, wherein the positive electrode terminal is provided on the negative side in the second direction relative to the negative electrode terminal.

20. The semiconductor device according to claim 18, wherein the first transistor portion is provided on the negative side in the first direction relative to the first diode portion.

21. The semiconductor device according to claim 18, wherein the second transistor section is provided on the positive side in the first direction relative to the second diode section.

22. The semiconductor device according to claim 18, wherein the first transistor portion is provided on the positive side in the first direction relative to the first diode portion.

23. The semiconductor device according to claim 18, wherein the second transistor portion is provided on the negative side in the first direction relative to the second diode portion.

24. The semiconductor device according to claim 15 or 16, wherein the positive terminal, the first diode section, the first transistor section, and the output terminal are electrically connected in this order, and the output terminal, the second diode section, the second transistor section, and the negative terminal are electrically connected in this order.

25. The semiconductor device according to claim 15 or 16, wherein the second region is provided on the positive side of a predetermined first direction relative to the first region, the first transistor portion and the first diode portion, and the second transistor portion and the second diode portion are arranged in a predetermined second direction different from the first direction, and the first transistor portion and the first diode portion are provided on the positive side of the second direction relative to the second transistor portion and the second diode portion.

26. The semiconductor device according to claim 25, wherein the positive electrode terminal is provided on the positive side in the second direction relative to the negative electrode terminal.

27. The semiconductor device according to claim 25, wherein the first transistor portion is provided on the positive side in the first direction relative to the first diode portion.

28. The semiconductor device according to claim 25, wherein the second transistor section is provided on the negative side in the first direction relative to the second diode section.

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