SEMICONDUCTOR DEVICE
Patent Information
- Application Number
- DE112024002083
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-10
- Filing Date
- 2024-07-25
- Publication Date
- 2026-03-05
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Abstract
Description
Semiconductor Devices
[0001] The present invention relates to a semiconductor device.
[0002] The Restriction of Hazardous Substances (RoHS) Directive and the End-of-Life Vehicles (ELV) Directive restrict the amount of lead used in electronic control devices installed in automobiles. For this reason, lead-free solder, primarily consisting of Sn-3Ag-0.5Cu (mass%), has been used to date. Meanwhile, the trend for power modules used in inverters is toward higher output density for smaller and lighter designs. This has led to demands for solder-bonding the top and bottom surfaces of power semiconductors to enable heat dissipation from both the top and bottom of the power module, and for increasing the guaranteed temperature of the power semiconductor joints to allow for larger current flow.
[0003] In recent years, power semiconductor elements have been made of SiC, GaN, and the like, which can operate at higher temperatures than Si, and therefore solder joints of semiconductor elements are increasingly used in even higher temperature conditions, and solder joints are required to have higher reliability at high temperatures than ever before. Regarding joint reliability at high temperatures, for example, Patent Document 1 listed below discloses a technology for improving thermal fatigue resistance by adding Bi and In to solder joints.
[0004] Japanese Patent Application Laid-Open No. 2017-213596
[0005] While Patent Document 1 can improve thermal fatigue resistance, it does not take into consideration suppressing reactions between components at high temperatures, and therefore has the problem of not being able to ensure joint reliability at high temperatures in the solder joints of semiconductor elements. In view of this, the present invention aims to provide a semiconductor device that can ensure high joint reliability even at high temperatures by suppressing the reaction between Sn contained in the solder joints and the Ni-based electrodes of the semiconductor elements in a semiconductor device at high temperatures.
[0006] A semiconductor device has a semiconductor element and a conductor plate, and is formed with a solder joint that joins the semiconductor element and the conductor plate together with solder, wherein the solder in the solder joint is a lead-free solder whose main component is Sn, the Cu content is 4% by weight or more and 6% by weight or less, the total content of Bi and Sb is 3% by weight or more, and the Bi content is less than 3% by weight, and a Cu-Sn compound layer that does not contain In is formed at the joint interface between a Ni-based electrode formed on the semiconductor element and the solder joint, or at the joint interface between a Ni plating layer formed on the conductor plate and the solder joint, and the Cu-Sn compound accounts for 4% by weight or more of the total amount of the solder joint.
[0007] According to the present invention, it is possible to provide a semiconductor device that can ensure high bonding reliability even at high temperatures.
[0008] Figure explaining fatigue fracture cracks in a solder joint. Figure explaining a solder joint according to one embodiment of the present invention. Figure explaining the relationship between the proportion of Cu-Sn compounds at the joint interface and the thickness of the Ni-based electrode of the semiconductor element that disappears. Figure explaining the joint interface after holding at 175°C for 1000 hours when Cu-Sn compounds are formed at the joint interface and when Cu-(S,In) compounds are formed. Figure explaining the relationship between the total Bi and Sb content in the solder joint and the joint ratio after a temperature cycle test. Figure explaining the relationship between the Bi content of the solder joint and the grain boundary fracture rate. Figure explaining the relationship between the Ag content of the solder joint and the 0.2% proof stress. Figure explaining the relationship between the Ag content of the solder joint and the tensile strength. Figure explaining peeling that occurs between a hard resin and a conductor plate in a semiconductor device. Examples and experimental examples according to one embodiment of the present invention. Comparative examples and experimental examples.
[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.
[0010] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.
[0011] (One embodiment and overall configuration) (FIG. 1) In a semiconductor device in which a solder joint 3 is formed, which joins a semiconductor element 1 and a conductor plate 2 to each other with solder, a predetermined maximum temperature is set for maintaining the solder joint 3. If this maximum temperature becomes even higher, the difference between the temperature of the solder joint 3 during heating and the temperature of the solder joint 3 during cooling becomes larger, which increases the stress and strain generated in the solder joint 3 and causes cracks 101 to form at the ends of the solder joint 3. Furthermore, if the semiconductor element 1 is made of SiC or GaN instead of Si, which has higher rigidity and is less likely to deform than Si, the stress and strain generated in the solder joint 3 will become even greater, which poses a problem of making it more susceptible to fatigue failure.
[0012] (FIG. 2) FIG. 2(a) is an overall cross-sectional view of a semiconductor device of the present invention, and FIG. 2(b) is an enlarged view of A in FIG. 2(a).
[0013] In the semiconductor device, Sn-based lead-free solder is applied to a conductor plate 2 having a layer of Ni plating 7, and a semiconductor element 1 having Ni-based electrodes 6 on both sides is bonded to the applied solder. Wire bonding (not shown) is performed on the gate electrode of the semiconductor element 1, and the conductor plate 2 having Ni plating 7 is layered on top of the Sn-based lead-free solder applied to the top surface of the semiconductor element 1 and bonded to each other. The semiconductor element 1, conductor plate 2, and solder joints 3 are sealed with hard resin 9 by transfer molding. The surfaces of the conductor plate 2 are exposed from the top and bottom surfaces of the hard resin 9, and these exposed surfaces are adhered to cooling fins (not shown) via insulating resin.
[0014] 2(b), a solder joint 3 joining a semiconductor element 1 and a conductor plate 2 will be described. The solder joint 3 uses lead-free solder whose main component is Sn. The solder joint 3 has a Cu content of 4% by weight or more and 6% by weight or less, a total Bi and Sb content of 3% by weight or more, and a Bi content of less than 3% by weight. Furthermore, a layer of Cu—Sn-based compounds 5 that does not contain In is formed at the joint interface between the Ni-based electrodes 6 formed on the semiconductor element 1 and the solder joint 3, or at the joint interface between the Ni plating 7 formed on the conductor plate 2 and the solder joint 3. The layer of Cu—Sn-based compounds 5 accounts for 4% by weight or more of the total weight of the solder joint 3.
[0015] In this way, the Cu-Sn compound layer 5 is formed adjacent to the Ni-based electrode 6 of the semiconductor element 1 and the Ni plating 7 of the conductor plate 2, and the Cu-Sn compound layer 5 is formed to account for 4 wt % or more of the total amount of the entire solder joint 3, thereby making it possible to suppress the reaction between the Sn contained in the solder joint 3 and the Ni-based electrode 6 of the semiconductor element at high temperatures.
[0016] Furthermore, in the semiconductor device of the present invention, both sides of the semiconductor element 1 are bonded to the conductor plate 2. When the conductor plate 2 is bonded to both sides of the semiconductor element 1, an even greater load is applied to the solder joint 3, but the configuration of the solder joint 3 of the present invention makes it easy to ensure joint reliability.
[0017] The solder joints 3 are sealed with hard resin 9. By doing so, higher joint reliability can be achieved by sealing with a high-quality resin such as an epoxy resin, compared to soft resins such as gel or silicone resins.
[0018] (Figs. 3 and 4) The relationship between the proportion of Cu-Sn compounds 5 at the interface of the solder joint 3 and the thickness of the Ni-based electrode 6 that disappears when held at 175°C for 1000 hours will be explained. The solder joint 3 is formed from the solder mother phase 4 and the joint interface, and as shown in Fig. 3, when the proportion of Cu-Sn compounds exceeds about 4 wt%, the disappearance of the thickness of the Ni-based electrode 6 of the semiconductor element 1 is suppressed, and when the proportion of Cu-Sn compounds 5 exceeds 7 wt%, the effect of suppressing the disappearance becomes even greater.
[0019] In soldering, Cu-Sn compounds dissolved in molten solder form on the underside of the joint and crystallize and precipitate at the joint interface during cooling, making it necessary to control the joining temperature and joining time. As shown in Figure 4(b), when Cu-Sn compounds 5 are formed on the Ni-based electrode 6 at the joint interface, even a small amount of In is substituted to form a Cu-(Sn,In) compound 10, which can cause a problem of not being able to suppress the reaction between the components when held at high temperatures. Figure 4(b) also shows the Ni plating 102 that has disappeared due to the formation of the Cu-(Sn,In) compound 10.
[0020] On the other hand, as shown in FIG. 4( a), when the solder joint 3 is mounted on a printed circuit board, for example, at a temperature of 260° C. or less, even if a solder of the same composition that does not contain In is used, it is not possible to form a Cu—Sn-based compound of more than 4 wt % at the joint interface.
[0021] Furthermore, when the Cu content in the solder joint 3 is below 4 wt %, it is not possible to obtain the desired joint structure even if the joining process is devised. Furthermore, when the Cu content in the solder exceeds 6 wt %, the amount of Cu-Sn compounds formed outside the joint interface increases, which may actually impair thermal fatigue resistance.
[0022] Based on the above, by setting the Cu content of the solder joint 3 to 4% by weight or more and 6% by weight or less, it becomes easy to form Cu-Sn compounds with a content of more than 4% by weight in the Ni-based electrode 6 of the semiconductor element 1 and the Ni plating 7 of the conductor plate 2.
[0023] (Fig. 5) The relationship between the total Bi and Sb content of the solder joint 3 and the bonding ratio after a temperature cycle test (-40°C to 150°C, 1000 cycles) is explained. As shown in Fig. 5, the bonding ratio increases when the total Bi and Sb content in the solder is set to 3 wt% or more. This makes it easier to suppress the growth of cracks 101 in the solder joint 3, and improves thermal fatigue resistance.
[0024] (Figure 6) As shown in Figure 6, in the relationship between the Bi content in the solder joint and the rate of intergranular fracture, when the Bi content exceeds 3 wt%, the rate of intergranular fracture rises sharply, making it easier for intergranular fracture to occur suddenly. Therefore, the Bi content in the solder needs to be less than 3 wt%.
[0025] (FIGS. 7 and 8) Fig. 7 shows the relationship between the Ag percentage in the solder joint 3 and the 0.2% yield strength, and Fig. 8 shows the relationship between the Ag content in the solder joint 3 and the tensile strength. As shown in Figs. 7 and 8, when the Ag content in the solder joint is 2% by weight or more and 4% by weight or less, the 0.2% yield strength and tensile strength are large, and as a result, the semiconductor device has high mechanical strength and is less likely to break even if a large stress is applied to the solder joint 3.
[0026] (FIG. 9) FIG. 9(a) is an overall cross-sectional view of a semiconductor device in which a flat Ni plating 8 is used, and FIG. 9(b) is an enlarged view of FIG. 9(a).
[0027] When a conductor plate 2 having a flat Ni plating 8 is used, a peel 103 forms between the hard resin 9 and the Ni plating 7, which places large stresses and strains on the solder joints 3 and accelerates the breakdown of the solder joints 3. Therefore, the Ni plating 7 formed on the conductor plate 2 must have a surface roughness of 1.15 μm or more to prevent the hard resin 9 from peeling off. This prevents the solder joints 3 from being broken down. Furthermore, by sealing the solder joints 3 with the hard resin 9, the stress and strain occurring in the solder joints 3 can be kept small.
[0028] Furthermore, in the semiconductor device of the present invention, the Ni-based electrode 6 formed on the semiconductor element 1 is a Ni, Ni-P, or Ni-V electrode. When the Ni-based electrode 6 of the semiconductor element 1 is Ni, it is easy to obtain the desired junction structure of the present invention. Furthermore, even when the Ni-based electrode 6 of the semiconductor element 1 is a Ni-P or Ni-V electrode, sufficient high-temperature reliability can be obtained.
[0029] In the semiconductor device of the present invention, the semiconductor element 1 is made of SiC or GaN. When the semiconductor element 1 is made of SiC or GaN, it is expected that the temperature of the solder joint 3 will be higher than 150°C. However, if the temperature is 200°C or lower, the reliability of the solder joint 3 can be ensured.
[0030] (Figure 10) Tests were conducted using three methods to evaluate the joint reliability at high temperatures for 12 examples that had different combinations of composition conditions for the solder joint 3 that conformed to the present invention and the ratio of the compound at the joint interface to the solder joint.
[0031] In the first test, a temperature cycle test was conducted at -40°C to 175°C for 1,000 cycles to verify thermal fatigue failure. In this case, if the bonding ratio after the test was 80% or more, it was evaluated as ◯, and if it was less than 80%, it was evaluated as ×.
[0032] As the second test, to verify grain boundary fracture, a power cycle test was conducted for 30,000 cycles with a junction temperature Tjmax of 175°C and a temperature difference ΔTj of 100°C. After the test, a drop in heat dissipation performance of less than 20% compared to the initial value was evaluated as ◯, and a drop of 20% or more was evaluated as x.
[0033] As a third test, a test was performed in which the solder joint 3 was held at 175° C. for 1000 hours to verify the stability of the joint interface. The case in which no peeling occurred in the solder joint 3 was evaluated as ◯, and the case in which peeling occurred was evaluated as ×.
[0034] As a result of carrying out the above three tests for Examples 1 to 12, all three tests were evaluated as ◯ for each Example, confirming that the bonding reliability of the present invention at high temperatures was obtained.
[0035] (Fig. 11) As comparative examples to the examples of the present invention, 12 patterns of combinations of different composition conditions of the solder joint 3 and different ratios of the compound at the joint interface to the solder joint, which are not in accordance with the present invention, were similarly evaluated for joint reliability at high temperatures using three test methods. The method of manufacturing the semiconductor device was the same as in Fig. 10.
[0036] Comparative Example 1-5 is an example in which Sb is not contained in the solder joint. In the third test, in which the solder joint was held at 175°C for 1000 hours, no peeling occurred at the solder joint. However, in the first test, the temperature cycle test, cracks progressed, reducing the joint area to less than 80%, so the comparative example was rated as x. In the second test, the power cycle test, the heat dissipation performance decreased by 20% or more due to grain boundary fracture near the center of the joint of the semiconductor element, so the comparative example was rated as x.
[0037] Comparative Examples 7 and 8 are examples in which the proportion of Cu-Sn compounds formed in the solder joints is less than 4 wt %. These Comparative Examples 7 and 8 were evaluated as ◯ in the first temperature cycle test and the second power cycle test, but were evaluated as × in the third test because peeling occurred at the location where the Ni-based electrodes of the semiconductor element reacted with the solder and disappeared when held at 175°C for 1000 hours.
[0038] Comparative Examples 9 and 10 are examples in which the Bi content in the solder joint is 3 wt % or more. These Comparative Examples 9 and 10 were evaluated as ◯ in the first temperature cycle test and the third test in which they were held at 175°C for 1000 hours, but in the second power cycle test, grain boundary fracture occurred in the solder joint near the center of the joint of the semiconductor element, and heat dissipation performance decreased by 20% or more, so they were evaluated as ×.
[0039] Comparative Examples 11 and 12 are examples in which the solder joint (Cu—Sn-based compound) contains In. These Comparative Examples 11 and 12 were evaluated as ◯ in both the first temperature cycle test and the second power cycle test, but in the third test, where the test was held at 175° C. for 1000 hours, peeling occurred at the location where the Ni-based electrode of the semiconductor element had disappeared, so they were evaluated as ×.
[0040] As described above, the present invention improves the thermal fatigue resistance of the solder joints 3 not only by using specific solder composition conditions to enable them to withstand high temperatures, but also by improving the thermal fatigue resistance through the structure of the semiconductor device, thereby suppressing reactions between the semiconductor element 1 and the solder at high temperatures. Furthermore, when a semiconductor element capable of high-temperature operation, such as SiC, is used in the semiconductor device, a semiconductor device with high joint reliability can be realized even when used at temperatures exceeding 150°C, at which the solder joints 3 are prone to breakage.
[0041] According to the embodiment of the present invention described above, the following advantageous effects are achieved.
[0042] (1) A semiconductor device having a semiconductor element 1 and a conductor plate 2, and having a solder joint 3 that joins the semiconductor element 1 and the conductor plate 2 together with solder, wherein the solder in the solder joint 3 is a lead-free solder whose main component is Sn, the solder joint 3 has a Cu content of 4% by weight or more and 6% by weight or less, a total content of Bi and Sb of 3% by weight or more, and a Bi content of less than 3% by weight, and a Cu—Sn-based compound 5 that does not contain In is formed at the joint interface between a Ni-based electrode 6 formed on the semiconductor element 1 and the solder joint 3, or at the joint interface between a Ni plating layer 7 formed on the conductor plate 2 and the solder joint 3, and the Cu—Sn-based compound 5 accounts for 4% by weight or more of the total amount of the solder joint 3. By doing so, a semiconductor device that can ensure high joint reliability even at high temperatures can be provided.
[0043] (2) The content of Ag in the solder joint 3 is 2% by weight or more and 4% by weight or less. This makes it possible to suppress grain boundary fracture.
[0044] (3) The surface roughness of the Ni plating layer 7 is 1.15 μm or more. This prevents the hard resin 9 from peeling off, and prevents the solder joints 3 from being damaged.
[0045] (4) The Ni-based electrode 6 is a Ni electrode, Ni-P electrode, or Ni-V electrode. This ensures reliability at high temperatures.
[0046] (5) The semiconductor element 1 is made of SiC or GaN. This ensures reliability even when the temperature of the solder joint 3 is 150° C. to 200° C. or lower.
[0047] (6) Both sides of the semiconductor element 1 are bonded to the conductive plate 2. By doing so, even if a large load is applied to the solder joint 3, the composition conditions of the present invention ensure the joint reliability.
[0048] (7) The solder joints 3 are sealed with hard resin 9. This provides higher joint reliability.
[0049] The present invention is not limited to the above-described embodiments, and various modifications and combinations of other configurations are possible without departing from the spirit of the present invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiments, and includes those in which some of the configurations are omitted.
[0050] REFERENCE SIGNS LIST 1 semiconductor element 2 conductive plate 3 solder joint 4 solder parent phase 5 Cu-Sn compound 6 Ni electrode 7 Ni plating 8 flat Ni plating 9 hard resin 10 Cu-(Sn, In) compound 101 crack 102 Ni plating lost due to reaction 103 peeling
Claims
1. A semiconductor device having a semiconductor element and a conductor plate, the semiconductor element and the conductor plate being joined together by soldering at a solder joint, the solder in the solder joint being a lead-free solder whose main component is Sn, the solder joint having a Cu content of 4% to 6% by weight, a total content of Bi and Sb of 3% by weight or more, and a Bi content of less than 3% by weight, a layer of a Cu-Sn compound not containing In being formed at a joint interface between a Ni-based electrode formed on the semiconductor element and the solder joint, or at a joint interface between a Ni plating layer formed on the conductor plate and the solder joint, the Cu-Sn compound accounting for 4% by weight or more of the total weight of the solder joint.
2. The semiconductor device according to claim 1, wherein the Ag content in the solder joint is 2% by weight or more and 4% by weight or less.
3. The semiconductor device according to claim 1, wherein the Ni plating layer has a surface roughness of 1.15 μm or more.
4. The semiconductor device according to claim 3, wherein the Ni-based electrode is a Ni electrode, a Ni-P electrode, or a Ni-V electrode.
5. The semiconductor device according to claim 4, wherein the semiconductor element is made of SiC or GaN.
6. The semiconductor device according to claim 5, wherein both sides of the semiconductor element are bonded to the conductive plate.
7. The semiconductor device according to claim 6, wherein the solder joints are sealed with a hard resin.