WAFER, METHOD FOR PREDICTING THE NANOTOPOGRAPHY OF A WAFER SURFACE, DEVICE, DEVICE AND MEDIUM

The prediction method for nanotopography on wafers addresses pre-CMP defects by using a staged filter and prediction function, ensuring process stability and reducing waste by detecting issues early.

DE112024002185T5Pending Publication Date: 2026-04-30XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
Filing Date
2024-12-16
Publication Date
2026-04-30

AI Technical Summary

Technical Problem

Conventional methods for detecting nanotopography of wafers after chemical-mechanical polishing (CMP) fail to address issues in preceding manufacturing processes, leading to wasted resources due to undetected defects, as nanotopography is influenced by these earlier stages.

Method used

A prediction method using a staged filter to analyze surface topography data, followed by a prediction function to forecast nanotopography after subsequent processes, enabling early detection and prevention of defects.

Benefits of technology

Ensures stable and uniform manufacturing processes, reduces waste by preventing defective products, and optimizes equipment performance through real-time monitoring and adjustment.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a wafer, a prediction method for the nanotopography of the wafer surface, a device, an apparatus, and a medium, and relates to the field of semiconductor manufacturing. The method comprises: performing filtering and data processing on obtained surface topography measurement data of a wafer in a wafer manufacturing process using a staged filter to obtain a measured nanotopography value nt of the wafer; and predicting a predicted nanotopography value NT of the wafer after a subsequent manufacturing process based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer.
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Description

CROSS-REFERENCE TO RELATED REGISTRATION

[0001] This application claims priority over Chinese patent application No. 202410895811.6, which was filed on July 5, 2024 and is incorporated herein in full by reference. STATE OF THE ART

[0002] The present disclosure relates to the field of semiconductor manufacturing, in particular a wafer, a prediction method for the nanotopography of the wafer surface, a device, an apparatus and a medium. BACKGROUND

[0003] During wafer fabrication, after a single-crystal silicon block has been produced using the Czochralski method, the silicon block undergoes successive manufacturing processes such as wire sawing, lapping, etching, grinding, and chemical-mechanical polishing (CMP) to ultimately obtain a single-crystal silicon wafer. For single-crystal silicon wafers, surface topography is a crucial parameter that determines their quality. And the nanotopography (NT) of the surface is an important quality parameter for the wafer's surface topography.

[0004] In a conventional scheme, NT detection is typically performed on the wafer after a final surface preparation process, i.e., CMP. However, as a quality parameter related to shortwave characteristics, NT is significantly influenced by the manufacturing process prior to CMP. Therefore, with the conventional scheme, problems that arise in the manufacturing process before CMP may only be detected after CMP. Consequently, the wafer with pre-CMP issues is subjected to the entire manufacturing process, resulting in a waste of production resources. SUMMARY OF THE INVENTION

[0005] Based on the foregoing, the present disclosure aims to provide a wafer, a prediction method for the nanotopography of the wafer surface, a device, an apparatus and a medium for predicting a predicted nanotopography value of the wafer after a subsequent manufacturing process based on a measured nanotopography value of the wafer obtained after a current manufacturing process, and for monitoring the product performance in a front-end manufacturing process based on the nanotopography data obtained by the prediction, in order to prevent defective wafers obtained by the front-end manufacturing process from entering the subsequent manufacturing process and to prevent a waste of production resources.

[0006] The technical solution of the present disclosure is explained as follows.

[0007] In a first aspect, the present disclosure provides, in some embodiments, a prediction method for the nanotopography value of the wafer surface, comprising: performing filtering and data processing on obtained surface topography measurement data of the wafer using a staged filter in a wafer manufacturing process to obtain a measured nanotopography value nt of the wafer; and predicting a measured nanotopography value NT of the wafer after a subsequent process, based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer.

[0008] In a second aspect, the present disclosure, in some embodiments, provides a predictive device for the nanotopography of the wafer surface, comprising a filter element and a predictive element. The filter element is configured to perform filtering and data processing on obtained surface topography measurement data of the wafer using a staged filter in a wafer manufacturing process to obtain a measured nanotopography value nt of the wafer; and the predictive element is configured to predict a subsequent nanotopography value NT of the wafer after a subsequent manufacturing process based on a predictive function f(nt) = NT and the measured nanotopography value nt of the wafer.

[0009] In a third aspect, the present disclosure, in some embodiments, provides a computing device comprising a processor and a memory. The processor is configured to execute an instruction stored in the memory in order to implement the prediction method of the first aspect.

[0010] In a fourth aspect, the present disclosure, in some embodiments, provides a computer-readable storage medium in which at least one instruction is stored. This at least one instruction is executed by a processor to implement the prediction method of the first aspect.

[0011] In a fifth aspect, the present disclosure provides a wafer in some embodiments. If a predicted nanotopography value NT of the wafer is less than 5 nm at a size of 2 mm*2 mm and / or less than 10 nm at a size of 10 mm*10 mm, then the nanotopography value of the wafer ultimately obtained is less than 5 nm at a size of 2 mm*2 mm and less than 10 nm at a size of 10 mm*10 mm.

[0012] According to the wafer, the prediction method for the nanotopography of the wafer surface, the device, the apparatus and the medium in the embodiments of the present disclosure, the predicted nanotopography value of the wafer after the subsequent manufacturing process is predicted based on the prediction function and the measured nanotopography value of the wafer obtained after a current manufacturing process.Based on the predicted nanotopography value, it is not only capable of monitoring each manufacturing process to ensure the stability and uniformity of the manufacturing equipment used, but also of monitoring the product of each manufacturing process to ensure that a qualified product enters the next manufacturing process, improving the microscopic topography quality of the wafer surface and preventing the production of unqualified products in subsequent manufacturing processes, thereby reducing manufacturing costs. Furthermore, it can determine if there is a problem in a completed process, allowing the process to be adjusted accordingly. BRIEF DESCRIPTION OF THE FIGURES Fig. 1 is a flowchart of a prediction method for the nanotopography of the wafer surface according to an embodiment of the present disclosure; Fig. Figure 2 is a schematic representation illustrating a linear correlation between predicted NT values ​​and actual NT values ​​obtained based on sample data from 100 wafers according to an embodiment of the present disclosure; Fig. Figure 3 is a schematic representation illustrating a prediction device for the nanotopography of the wafer surface according to an embodiment of the present disclosure; Fig. 4 is a further schematic representation illustrating a prediction device for the nanotopography of the wafer surface according to an embodiment of the present disclosure; and Fig. Figure 5 is a schematic representation illustrating a computing device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0013] The technical solution in the embodiments of the present disclosure is described below in a clear and complete manner in conjunction with the drawings.

[0014] In a conventional scheme, the surface of a wafer obtained after a CMP process is divided into analysis areas based on a predetermined dimension, then PV values ​​in filtered measurement data at each sampling point in each analysis area are arranged in ascending order, and then the PV value at a corresponding position is selected as the nanotopography (NT) value of the wafer based on a predetermined percentage (e.g. 99.5%).

[0015] On the surface of the wafer, the filtered measurement data fluctuate at the sampling points in each region, and this fluctuation is caused by the superposition of wave signals with different wavelengths from the wave's perspective. Different wavelengths correspond to different sizes of the regions in which the fluctuation occurs; that is, the shorter the wavelength of the wave signal, the smaller the region represented by the wave signal in which the fluctuation occurs in the measurement data; and the longer the wavelength of the wave signal, the larger the region represented by the wave signal in which the fluctuation occurs in the measurement data. For long-wavelength signal data, fluctuations in the measurement data include parameters such as curvature and warping, which are approximately constant after wire sawing and less affected by subsequent manufacturing processes. Short-wavelength signal data, for example,The nanotopography value is influenced by all front-end processing stages prior to the CMP process. The wafer NT value obtained using the conventional scheme is a post-CMP value and only indicates the performance of the overall wafer manufacturing process; it cannot be used to evaluate the performance of each individual manufacturing step. As the requirements for the microscopic surface topography of the wafer increase in advanced manufacturing processes, each manufacturing step must be monitored to ensure the stability and consistency of the manufacturing equipment used in the processing stages, to monitor a product in each manufacturing step, and to ensure that a qualified product advances to the next manufacturing step, thereby improving the microscopic quality of the wafer's surface topography.

[0016] Based on the foregoing, the present disclosure provides, in some embodiments, a prediction method for the nanotopography of the wafer surface, comprising steps S101 and S102.

[0017] Step S101: Performing filtering and data processing of the obtained surface topography measurement data of the wafer using a staged filter in a wafer manufacturing process to obtain a measured nanotopography value nt of the wafer.

[0018] In the embodiments of the present disclosure, the measured nanotopography value of the wafer is obtained after an arbitrary process in a wafer manufacturing process. In some exemplary embodiments of the present disclosure, after an arbitrary manufacturing process (e.g., wire sawing), the surface height of a sampling point on the surface of the wafer, obtained after wire sawing, is measured using a single-point measurement scheme to obtain the surface topography measurement data of the wafer.

[0019] In the above sense, a single-point measurement method is a method in which the measurement data of only one sampling point are measured in a single measurement operation. For example, a contact measurement method is used in which a probe is in contact with the surface of the wafer and moves horizontally along its surface. During this horizontal movement, a longitudinal displacement of the probe occurs due to a height difference on the surface of the wafer being measured. This longitudinal displacement is detected by a displacement sensor and converted into height data about the surface of the wafer being measured—that is, into historical measurement data about the height of the surface of a historical wafer. A non-contact measurement method, such as capacitive measurement or laser focus measurement, can also be used.

[0020] Of course, in some exemplary embodiments of the present disclosure, the surface topography measurement data of the wafer are obtained after the current manufacturing process by only a single measurement method, e.g. by an optical measurement method (e.g. Fizeau interference or differential interference), which is not defined in more detail here.

[0021] More precisely, the sampling distance during measurement is determined based on the accuracy of the measuring device and a specific formula. For example, the sampling distance for an optical measuring device is only 0.2 mm, while for some low-precision capacitive measuring devices, the sampling distance is 4 mm.

[0022] In the present disclosure, the surface topography measurement data at all sampling points are considered a three-dimensional fluctuation of the entire wafer surface. This fluctuation is obtained by superimposing wave signals of different wavelengths. The corresponding wavelength range for the NT value is between 22 µm and 20 mm. In some exemplary embodiments of the present disclosure, the surface topography measurement data are filtered to obtain filter values ​​within the range of 22 µm to 20 mm.

[0023] In some exemplary embodiments of the present disclosure, the surface topography measurement data at all sampling points on the surface of the wafer are not filtered by means of a filter of constant size. The size of the filter changes along with the positions of the sampling points. For example, the filter is a step-wise filter whose size is designed based on a target wavelength range, the sampling distance, and a sampling point position for the surface topography measurement data of the wafer.

[0024] In the embodiments of the present disclosure, starting from the target wavelength range of 22 µm to 20 mm as an example, after the filter values ​​within the range of 22 µm to 20 mm have been obtained, the surface of the wafer is divided into a plurality of areas to be analyzed, and a PV value is obtained via the filter value in each area to be analyzed, the PV values ​​for all areas to be analyzed are ranked in ascending order, and then some PV values ​​are selected based on a predetermined percentage as the measured nanotopography value of the wafer after wire sawing.

[0025] Step S102: Prediction of a predicted nanotopography value NT of the wafer after a subsequent manufacturing process based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer.

[0026] In the embodiments of the present disclosure, the subsequent manufacturing process relates to a manufacturing process in the wafer manufacturing process after the process for obtaining the surface topography measurement data of the wafer in step S101. For example, if the surface topography measurement data of the wafer are obtained after the wire sawing process in step S101, the subsequent manufacturing process in step S102 is a process in the wafer manufacturing process after the wire sawing process, e.g., a grinding process, an etching process, a milling process, or a CMP process.

[0027] Starting, for example, from the wire sawing process, if a manufacturing process after the wire sawing process results in a normal distribution of the wafer's NT values, it can be assumed that there is a constant functional relationship between the wafer's nanotopography value after the wire sawing process and the wafer's nanotopography value after the subsequent manufacturing process, i.e., NT = f(nt), where NT represents the predicted nanotopography value of the wafer after the subsequent manufacturing process, nt represents the measured nanotopography value of the wafer obtained in step S101, and f() represents the prediction function.

[0028] In the embodiments of the present disclosure, after obtaining the predicted nanotopography value of the wafer, the currently completed manufacturing process can be evaluated.

[0029] In some exemplary embodiments of the present disclosure, an operating stage of an apparatus for the current manufacturing process is determined based on statistics of the predicted nanotopography values ​​of the wafer in order to ensure the stability and uniformity of the apparatus and to prevent the occurrence of a mechanical failure. For example, the predicted NT values ​​of all products manufactured by each device are monitored daily, and if the predicted NT values ​​are discrete, there are too many discrete values, and an average value is too large, this means that the apparatus is unstable and must be stopped for maintenance.

[0030] In some exemplary embodiments of the present disclosure, a comparison between the predicted nanotopography value of the wafer and a predetermined evaluation index is used to determine whether the subsequent manufacturing process should be carried out in order to select the qualified products and to prevent the occurrence of unqualified products obtained through the subsequent manufacturing process, thereby reducing manufacturing costs.

[0031] In some exemplary embodiments of the present disclosure, a process parameter of the currently completed manufacturing process is adjusted based on the predicted nanotopography value of the wafer. For example, the predicted nanotopography value of a product obtained through the respective manufacturing process is used to determine whether a completed process has a problem, in order to enable targeted process adjustment. Furthermore, during process adjustment, a process parameter of the manufacturing process can also be returned and adjusted based on the predicted nanotopography value.

[0032] Through the technical solution in Fig.1. The predicted nanotopography value of the wafer after the subsequent process is generated based on the predictive function and the measured nanotopography value of the wafer obtained after the current manufacturing process. Based on the predicted nanotopography value, it is not only able to monitor each manufacturing process to ensure the stability and uniformity of the manufacturing equipment used, but also to monitor the product of each manufacturing process to ensure that a qualified product enters the next manufacturing process, improve the microscopic topography quality of the wafer surface, and prevent the production of unqualified products in the subsequent manufacturing process, thereby reducing manufacturing costs.Furthermore, it can determine if there is a problem with a process that has already been completed, allowing the process to be adjusted.

[0033] For the technical solution in Fig.1 In some possible embodiments of the present disclosure, a size of the stepwise designed filter in step S101 is designed based on the target wavelength range, the sampling distance and the sampling point position for the surface topography measurement data of the wafer.A specific design procedure includes: determining a filter using bivariate Gaussian low-pass filter functions based on the target wavelength range; determining a critical filter dimension based on an upper wavelength limit of the target wavelength range; performing edge contraction based on the sampling point position; and, in a case where the distance between the sampling point position and a center point of the wafer surface is less than or equal to the critical filter dimension, determining a radius of the stepwise designed filter as a first radius; or, in a case where the distance between the sampling point position and the center point of the wafer surface is greater than the critical filter dimension, determining the radius of the stepwise designed filter as a second radius. The first radius is larger than the second radius.

[0034] In the foregoing, the target wavelength range is 22 µm to 20 mm, which corresponds to the NT value. In the embodiments of the present disclosure, the filter is a circular filter consisting of bivariate Gaussian low-pass filter functions. Specifically, determining the filter using the bivariate Gaussian low-pass filter functions based on the target wavelength range comprises: determining a first Gaussian low-pass filter function, wherein one low-pass filter region covers the upper limit of the target wavelength range; determining a second Gaussian low-pass filter function, wherein one low-pass filter region covers a lower limit of the target wavelength range; and obtaining a function G DHP to describe the filter based on the first Gaussian low-pass filter function G LP1 and the second Gaussian low-pass filter function G LP2 by a formula G DHP = G LP1 (1- G LP2 ).

[0035] For example, a relationship between a cutoff wavelength and a standard deviation is defined as λc=6σ, and the Gaussian low-pass filter functions are both exp(−(λ2σ)2), where λ represents the wavelength. It is important to understand that the standard deviations σ for the first Gaussian low-pass filter function and the second Gaussian low-pass filter function are different in order to reserve signals in different wavelength ranges.

[0036] After the circular filter has been obtained using the specific scheme mentioned above, an operating range of the filter must be defined based on the sampling point position for the filtering calculation. More precisely, the topography changes more dramatically at a position closer to an edge of the wafer surface. To accurately capture this dramatic change in topography and effectively preserve surface topography features at different scales, the operating range of the circular filter should be smaller when the sampling point is near the edge of the wafer surface than when the sampling point is near the center of the wafer surface. In other words, as the sampling point gradually moves away from the center of the wafer surface, the operating range of the corresponding filter should decrease, a phenomenon also known as edge contraction.In the embodiments of the present disclosure, the edge contraction is performed stepwise; that is, a critical filter dimension is established to determine whether the sampling point is near the center of the wafer surface or near the edge of the wafer surface. Compared to a situation where the sampling point is near the center of the wafer surface, the operating area of ​​the filter should be reduced in a case where the sampling point is near the edge of the wafer surface (an edge processing coefficient is k during contraction), and in a case where the distance between the sampling point and the center of the wafer surface is greater than the critical filter dimension, the second radius has a constant value that is smaller than the first radius. For example, for a 12-inch wafer, the radius R is 150 mm.During the measurement, an exclusion edge (EE) is typically 3 mm and an upper wavelength limit w of the target wavelength range is 20 mm, so the critical filter dimension a is calculated by a=R-EE-0.5*w.

[0037] In the embodiments of the present disclosure, Table 1 illustrates the stepwise radii of the filter, which were determined based on the critical filter dimension. Table 1 Position of the scanning point Stepwise radii 0 0.5*w ... 0.5*w a 0.5*w a+m k*w(k=0.2) a+2m k*w(k=0.2) ... k*w(k=0.2) R k*w(k=0.2)

[0038] In some exemplary embodiments of the present disclosure, in a case where the distance between the scanning point and the center of the wafer surface, the second radius, apart from being smaller than the first radius, can also decrease, for example, linearly, together with an increase in the distance between the scanning point and the center of the wafer surface, i.e., it cannot be a constant value.

[0039] Based on the above, after obtaining the circular filter and the radius of the operating area, the surface topography measurement data of the wafer are filtered using the filter to obtain the measured nanotopography value of the wafer.More precisely, obtaining the measured nanotopography value of the wafer after filtering the surface topography measurement data of the wafer using the stepwise designed filter involves obtaining a filter value at each sampling point position; dividing all sampling points into at least one area to be analyzed based on a predetermined dimension; obtaining a PV value for each area to be analyzed based on a maximum filter value and a minimum filter value within the area to be analyzed; and ranking the PV values ​​of all areas to be analyzed in ascending order and selecting the PV value based on a predetermined percentage as the measured nanotopography value of the wafer.

[0040] In the above scenario, where the sampling point is near the edge of the wafer surface and the filter's operating range extends beyond the wafer's surface, the data may be filled by interpolation during filtering, or it may remain unfilled with respect to the portion of the filter's operating range that extends beyond the wafer's surface. Interpolation includes linear extrapolation, symmetric interpolation, or cubic spline interpolation, which are not further defined here.

[0041] In the foregoing, the subdivision of the area to be analyzed can be determined based on the specific requirements for surface topography measurement and analysis. In the embodiments of the present disclosure, the areas to be analyzed are obtained by uniformly subdividing the surface of the wafer into several small grids, each grid serving as an area to be analyzed and each grid being a square with a size of 10 µm*10 µm or a size of 20 µm*20 µm.

[0042] In the above, after the PV values ​​in each area to be analyzed have been ranked in ascending order, an Nth PV value from the bottom is selected based on the predetermined percentage, e.g., 99% or 99.5%, as the measured nanotopography value of the wafer.

[0043] For the technical solution in Fig.1 In one possible embodiment of the present disclosure, the method further comprises a step for obtaining the prediction function. More precisely, this step comprises: performing mathematical modeling and fitting based on a measured nanotopography value of a historical wafer after a current manufacturing process and a measured nanotopography value of the historical wafer after the subsequent manufacturing process, and obtaining the prediction function by linear or polynomial fitting.

[0044] More precisely, regardless of whether the nanotopography value is measured after the current manufacturing process or after a subsequent manufacturing process, filtering and data processing of the surface topography measurement data from the historical wafer are performed using the stepwise filter to obtain the historical wafer's measured nanotopography value. During implementation, the specific procedure for obtaining the historical wafer's measured nanotopography value is the same as the aforementioned procedure for obtaining the wafer's measured nanotopography value and is therefore not specifically defined here.

[0045] In some exemplary embodiments of the present disclosure, obtaining the prediction function by linear or polynomial fitting particularly includes the following steps.

[0046] First, a dataset is obtained based on the measured nanotopography value of the historical wafer after the current manufacturing process and the nanotopography value of the historical wafer after the subsequent manufacturing process. The dataset is stored, for example, in the form of a matrix, where each row in the matrix corresponds to a sample.

[0047] Next, a suitable prediction function f(nt) = NT is selected, e.g., a linear function, a polynomial function, an exponential function, or a logarithmic function, depending on practical needs. For example, in polynomial fitting, the method of least squares is usually applied; that is, the parameters of the prediction function f(nt) are determined by minimizing the remainder sum of squares between a currently observed NT value and a fitted value (a value of f(nt)), so that one finally obtains the prediction function or the current output.

[0048] Based on the above, a specific embodiment is described below for illustration. In this embodiment, 100 raw wafers, each with a radius of 150 mm, obtained by wire sawing, are used as an example. A portion of the edge of each raw wafer is removed at an EE of 4 mm, and then height data is sampled across a surface of the wafer by capacitive measurement to obtain the surface topography measurement data of the raw wafer. For example, the height data is sampled uniformly using a polar coordinate system with the center of the wafer surface as the pole; that is, the sampling points along a diameter direction are measured every 45°, and the sampling distance in the diameter direction is 4 mm. In the polar coordinate system, the surface topography measurement data is obtained via 8*37 sampling points.From the perspective of the entire surface of the wafer, each sampling point can be considered a pixel point.

[0049] The surface topography measurement data for each sample point are then filtered using the aforementioned filter, and the filter values ​​of all sample points are subdivided into 10 mm x 10 mm areas to be analyzed. For each area, a PV value is determined based on the filter value of each pixel (sample point). The PV values ​​for all areas to be analyzed are ranked in ascending order, and an Nth PV value from the bottom is selected, based on a predetermined percentage, e.g., 99% or 99.5%, as the measured nanotopography value of the raw wafer after wire sawing.

[0050] Subsequently, the predicted nanotopography values ​​of the 100 raw wafers are calculated using a fitting function based on the measured nanotopography values ​​of the 100 raw wafers obtained after wire sawing. In the embodiments of the present disclosure, the fitting function is obtained by linearly fitting data over the historical wafers, as represented by a dotted line in Fig. 2 shown. In the embodiments of the present disclosure, the prediction function is NT=1.9785*nt+5.9023, where nt represents the measured nanotopography value after wire sawing and NT represents the predicted nanotopography value.

[0051] Subsequently, if the downstream manufacturing process is a CMP process, an analysis is conducted to determine whether there is a correlation between the actual nanotopography value of each of the 100 raw wafers after the CMP process and the predicted nanotopography value. Referring to Fig.2. The predicted nanotopography value after wire sawing and the actual nanotopography value after the CMP process are taken as coordinates, and the predicted nanotopography values ​​and the actual nanotopography values ​​of the 100 raw wafers are represented by points in Fig. 2. To check whether there is a correlation between the predicted nanotopography value (predicted NT value) and the actual nanotopography value (actual NT value), a residual between a fitted curve and the actual data or a value of R is calculated. 2 The fitted curve was calculated based on the predicted NT value and the actual NT value. Table 2 illustrates the correlation between the predicted NT value and the actual NT value for the 100 wafers. Table 2 Data volume ~100 pieces predicted NT-actual NT)R 2 0,485

[0052] As illustrated in Table 2, there is a correlation between the predicted NT value and the actual NT value.

[0053] Based on the above-mentioned prediction method for the nanotopography of the wafer surface, the predicted nanotopography value of the wafer is less than 5 nm at a size of 2 mm*2 mm and / or less than 10 nm at a size of 10 mm*10 mm.

[0054] It is important to note that the manufacturing process that yields the predicted nanotopography value precedes the manufacturing process that yields the wafer's nanotopography value. For example, the predicted nanotopography value is obtained after wire sawing, and the wafer's nanotopography value is obtained after the CMP process. Alternatively, the predicted nanotopography value is obtained after the CMP process, and the wafer's nanotopography value is obtained in a case where the wafer enters a back-end semiconductor manufacturing process, which is not further defined here.

[0055] Based on the same inventive concept as the aforementioned technical solution, as described in Fig.As illustrated in Figure 3, the present disclosure provides, in some embodiments, a prediction device for the nanotopography of the wafer surface 300, comprising a filter element 301 and a prediction element 302. The filter element 301 is configured to perform filtering and data processing on obtained surface topography measurement data of the wafer using a staged filter in a wafer manufacturing process to obtain a measured nanotopography value nt of the wafer; and the prediction element 302 is configured to predict a predicted nanotopography value NT of the wafer after a subsequent manufacturing process based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer.

[0056] In some exemplary embodiments of the present disclosure, a size of the stepwise designed filter is designed based on a target wavelength range, a sampling distance and a sampling point position for the surface topography measurement data of the wafer.Accordingly, the filter element 301 is configured to: determine a filter using bivariate Gaussian low-pass filter functions based on the target wavelength range; determine a critical filter dimension based on an upper wavelength limit of the target wavelength range; perform edge contraction based on the sampling point position; and, in a case where a distance between the sampling point position and a center point of the wafer surface is less than or equal to the critical filter dimension, determine a radius of the stepwise designed filter as a first radius; or, in a case where the distance between the sampling point position and the center point of the wafer surface is greater than the critical filter dimension, determine the radius of the stepwise designed filter as a second radius, the first radius being greater than the second radius.

[0057] In some exemplary embodiments of the present disclosure, the filter element 301 is configured to: determine a first Gaussian low-pass filter function, wherein a low-pass filter region covers the upper limit of the target wavelength range; determine a second Gaussian low-pass filter function, wherein a low-pass filter region covers a lower limit of the target wavelength range; and obtain a function G DHP to describe the filter based on the first Gaussian low-pass filter function G LP1 and the second Gaussian low-pass filter function G LP2 by a formula G DHP = G LP1 (1- G LP2 ).

[0058] In some exemplary embodiments of the present disclosure, the filter element 301 is configured to: obtain a filter value at each sampling point position after filtering the surface topography measurement data of the wafer using the stepwise designed filter; divide all sampling points into at least one area to be analyzed based on a predetermined dimension; obtain a PV value of each area to be analyzed based on a maximum filter value and a minimum filter value in the area to be analyzed; and rank the PV values ​​of all areas to be analyzed in ascending order and select the PV value based on a predetermined percentage as the measured nanotopography value of the wafer.

[0059] Referring to Fig.4 The prediction device 30 further comprises an adaptation element 303. The adaptation element 303 is configured to perform mathematical modeling and adaptation based on a measured nanotopography value of a historical wafer after a current manufacturing process and a measured nanotopography value of the historical wafer after the subsequent manufacturing process, and to obtain the prediction function by linear adaptation or polynomial adaptation.

[0060] In some exemplary embodiments of the present disclosure, the filter element 301 is further configured to perform filtering and data processing of the surface topography measurement data of the historical wafer using the stepwise designed filter in order to obtain the measured nanotopography value of the historical wafer.

[0061] In some exemplary embodiments of the present disclosure, the predictive device 30 further comprises a feedback element 304. The feedback element 303 is configured to: determine an operating stage of a device for a front-end manufacturing process that has currently been completed based on statistics of the predicted nanotopography value of the wafer; or determine whether a subsequent manufacturing process is to be carried out based on a comparison result between the predicted nanotopography value of the wafer and a predetermined evaluation index; or adjust a process parameter of a manufacturing process that has currently been completed based on the predicted nanotopography value of the wafer.

[0062] It should be noted that the implementation of the function of each element in the prediction device may refer to that of the corresponding step in the prediction procedure and its examples, and is therefore not specifically defined here.

[0063] Fig.Figure 5 is a block diagram of a computing device according to an exemplary embodiment of the present disclosure. In some exemplary embodiments of the present disclosure, the computing device 50 comprises at least one of the following devices: a smartphone, a smartwatch, a desktop computer, a notebook, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a laptop computer. The computing device 50 has a communication function and can access a wired or wireless network. The computing device 50 generally refers to one of a plurality of terminal devices, with more or fewer terminal devices being provided. In some exemplary embodiments of the present disclosure, the computing device 50 receives data based on the wired or wireless network.It should be noted that the computing device 50 is used to perform calculations and processing in the technical solution of the present disclosure, which are not defined in more detail here.

[0064] As in Fig. As illustrated in Figure 5, the computing device comprises one or more processors 510 and a memory 520.

[0065] Optionally, the Processor 510 is coupled to each component of the entire computing device via various interfaces and lines. It performs various functions of the computing device and processes data by executing instructions, programs, code sets, or instruction sets stored in Memory 520 and retrieving data stored in Memory 520. Optionally, the Processor 510 can be implemented in at least one hardware form, such as a digital signal processor (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The Processor 510 can be integrated with one or more central processing units (CPUs), a graphics processing unit (GPU), a neural network processing unit (NPU), and a baseband chip. The CPU is primarily used for processing an operating system, a user interface, and an application.The GPU is responsible for rendering and drawing content to be displayed on a touchscreen. The NPU is used for artificial intelligence (AI) functionality. The baseband chip is used for processing wireless communication. It's worth noting that the baseband chip may not be integrated into the 510 processor and may instead be implemented on a separate chip.

[0066] The Memory 520 comprises Random Access Memory (RAM) or Read-Only Memory (ROM). Optionally, the Memory 520 includes a non-volatile, computer-readable storage medium. The Memory 520 is configured to store an instruction, a program, a code, a code set, or an instruction set. The Memory 520 comprises a program memory area and a data memory area. The program memory area is configured to store an instruction for implementing the operating system, an instruction for at least one function (e.g., a touch function, an audio playback function, or an image playback function), and an instruction for implementing the procedure mentioned above. The data memory area is configured to store data generated according to the operation of the computing device.

[0067] It should be noted that the structure of the computing device shown in the drawings is not intended to be a limitation of the computing device. The computing device may contain more or fewer elements, some elements may be combined, or the elements may be arranged in different modes. For example, the computing device may include a screen, a camera, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor (e.g., an accelerometer, an angular velocity sensor, or a light sensor), an audio circuit, a wireless fidelity (WiFi) module, a power source, and a Bluetooth module, which are not further defined here.

[0068] The present disclosure further provides, in some embodiments, a computer-readable storage medium in which at least one instruction is stored. This at least one instruction is executed by a processor to implement the aforementioned prediction method.

[0069] The present disclosure further provides, in some embodiments, a computer program product containing a computer instruction. The computer instruction is stored in a computer-readable storage medium. A processor of a computing device reads the computer instruction from the computer-readable storage medium and executes the computer instruction to implement the aforementioned prediction method.

[0070] The present disclosure further provides a wafer in some embodiments. In the event that a predicted nanotopography value NT of the wafer, obtained by the aforementioned prediction method, is less than 5 nm at a size of 2 mm*2 mm and / or less than 10 nm at a size of 10 mm*10 mm, a final nanotopography value of the wafer obtained is less than 5 nm at a size of 2 mm*2 mm and less than 10 nm at a size of 10 mm*10 mm.

[0071] It should be noted that the functions described in the above embodiment(s) can be achieved by hardware, software, firmware, or a combination thereof. If the functions are achieved by software, these functions are stored on a computer-readable storage medium or transferred as one or more instructions or codes on the computer-readable storage medium. The computer-readable storage medium can comprise a computer-readable storage medium and a communication medium. The communication medium can comprise any medium capable of transferring a computer program from one location to another. The storage medium can be any available medium accessible to a general-purpose or specialized computer.

[0072] It should be noted that the technical solutions described here can be combined in any way, provided they do not conflict with each other.

[0073] The foregoing descriptions are merely preferred embodiments of the present disclosure, which, however, must not be interpreted as limiting the scope of the present disclosure. Any person skilled in the art may make modifications and substitutions without departing from the spirit of the present disclosure, and these modifications and substitutions also fall within the scope of the present disclosure. Therefore, the scope of the present disclosure is subject to the scope defined by the appended claims. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] CH 202410895811.6

[0001]

Claims

[1] Predictive methods for the nanotopography of the wafer surface, comprising: in a wafer manufacturing process, performing filtering and data processing on obtained surface topography measurement data of the wafer using a staged filter to obtain a measured nanotopography value nt of the wafer; and Prediction of a predicted nanotopography value NT of the wafer after a subsequent manufacturing process, based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer. [2] Method according to claim 1, wherein a size of the stepwise designed filter is designed based on a target wavelength range, a sampling distance and a sampling point position for the surface topography measurement data of the wafer, wherein the method comprises: Determining a filter using bivariate Gaussian low-pass filter functions based on the target wavelength range; Determining a critical filter dimension based on an upper wavelength limit of the target wavelength range; Performing edge contraction based on the sampling point position; and in a case where a distance between the sampling point position and a center point of a surface of the wafer is less than or equal to the critical filter dimension, determining a radius of the stepwise designed filter as a first radius; or, in a case where the distance between the sampling point position and the center point of the wafer surface is greater than the critical filter dimension, determining the radius of the stepwise designed filter as a second radius, the first radius being greater than the second radius. [3] Method according to claim 2, wherein determining a filter using bivariate Gaussian low-pass filter functions based on the target wavelength range comprises: Determining a first Gaussian low-pass filter function, where a low-pass filter range covers the upper limit of the target wavelength range; Determining a second Gaussian low-pass filter function, where one low-pass filter region covers a lower limit of the target wavelength range; and Obtaining a function G DHP to describe the filter based on the first Gaussian low-pass filter function G LP1 and the second Gaussian low-pass filter function G LP2 by a formula G DHP =G LPl (1-GL P2 ). [4] The method of claim 2, wherein performing filtering and data processing on the obtained surface topography measurement data of the wafer using a stepwise designed filter to obtain a measured nanotopography value nt of the wafer comprises: after filtering the surface topography measurement data of the wafer using the stepwise designed filter, obtaining a filter value at each sampling point position; Dividing all sample points into at least one area to be analyzed based on a predetermined dimension; Obtaining a peak-to-trough value (PV) for each area to be analyzed, based on a maximum filter value and a minimum filter value in each area to be analyzed; and Ranking the PV values ​​of all areas to be analyzed in ascending order and selecting the PV value based on a predetermined percentage as the measured nanotopography value of the wafer. [5] The method of claim 1, further comprising: Performing mathematical modeling and fitting based on a measured nanotopography value of a historical wafer after a current manufacturing process and a measured nanotopography value of the historical wafer after the subsequent manufacturing process, and obtaining the prediction function by linear fitting or polynomial fitting. [6] The method of claim 5, further comprising: Performing filtering and data processing of the surface topography measurement data of the historical wafer using the stepwise designed filter to obtain the measured nanotopography value of the historical wafer. [7] Device for predicting the nanotopography of a wafer surface, comprising: a filter element and a prediction element, wherein the filter element is designed to perform filtering and data processing of surface topography measurement data obtained from the wafer during a wafer manufacturing process, using a staged filter design, in order to obtain a measured nanotopography value nt of the wafer; and The prediction element is set up to predict a predicted nanotopography value NT of the wafer after a subsequent manufacturing process based on a prediction function f(nt) = NT and the measured nanotopography value nt of the wafer. [8] Computing device comprising: a processor and a memory, wherein the processor is configured to execute an instruction stored in the memory to carry out the method according to any one of claims 1 to 6. [9] Computer-readable storage medium in which at least one instruction is stored, wherein the at least one instruction is executed by a processor to implement the method according to any one of claims 1 to 6. [10] Wafer, wherein in a case where a predicted nanotopography value NT of the wafer is less than 5 nm at a size of 2 mm*2 mm and / or less than 10 nm at a size of 10 mm*10 mm, a nanotopography value of the wafer is less than 5 nm at a size of 2 mm*2 mm and less than 10 nm at a size of 10 mm*10 mm.

Citation Information

Patent Citations

  • CHINESISCHENPATENTANMELDUNGNR.202410895811.6