SEMICONDUCTOR COMPONENT

Abstract

Provision of a semiconductor device (RC-IGBT) comprising an IGBT area and a diode area that prevents the element from being destroyed due to current concentration at the time of an avalanche breakdown under high voltage application.In a part of a region of a p-type (second conductivity type) anode layer (117) in a diode region (103) that is in contact with an n-type (first conductivity type) drift layer (101), a p-type high concentration region (129) (high concentration region of the second conductivity type) is formed with a higher concentration than the p-type (second conductivity type) anode layer (117), and in a section of the n-type (first conductivity type) drift layer (101) that is in contact with the p-type high concentration region (129) (high concentration region of the second conductivity type), an n-type high concentration region (130) (high concentration region of the first conductivity type) is formed with a higher concentration than the n-type (first conductivity type) drift layer (101).

Description

Technical field

[0001] The present invention relates to a semiconductor device. State of the art

[0002] To achieve a low-carbon society early on, the electrification of various systems is being promoted. A prime example is the electric vehicle, and by replacing a conventional, internal combustion engine-driven propulsion system with an electric motor and an inverter, environmental impact can be reduced. An IGBT module is generally used in an inverter to drive a motor, and improving its performance and reducing its cost are crucial.

[0003] An insulated-gate bipolar transistor (IGBT) module is generally configured as an electrical circuit containing a variety of semiconductor switching elements, and conventionally, a circuit unit consists of a pair of an IGBT and an antiparallel-connected diode. Since the structures of the IGBT and the diode are different, they are designed as separate semiconductor substrates, that is, as separate semiconductor devices (semiconductor chips), and are electrically connected and combined within the IGBT module.

[0004] In recent years, however, attention has focused on the reverse conducting insulated gate bipolar transistor (RC-IGBT), in which an IGBT and a diode are integrated on the same semiconductor substrate, i.e., within the same semiconductor device (semiconductor chip). Because the RC-IGBT performs the functions of both the IGBT, which is a switching element, and the diode, which is a freewheeling element, within a single semiconductor device (semiconductor chip), it offers high area utilization efficiency and is an advantageous technology for reducing the cost of IGBT modules. Citation list for patent literature Patent Literature 1: JP 2022-079 281 A Patent Literature 2: JP 2021-073 714 A Summary of the invention: Technical problem

[0005] Patent literature 1 and patent literature 2 disclose RC-IGBTs in which an IGBT region and a diode region are formed within the same semiconductor device (semiconductor chip). According to studies by the present inventors, a problem with the conventional RC-IGBTs disclosed in these patent literature is that the avalanche capability of the element is low and the element is destroyed when a high voltage is applied. An object of the present invention is to prevent the destruction of the element caused by current concentration at the time of an avalanche breakdown under high voltage in an RC-IGBT. Solution to the problem

[0006] In a semiconductor device comprising an IGBT region and a diode region, the semiconductor device of the present invention comprises a drift layer of a first conductivity type provided in a semiconductor substrate, a source layer of the first conductivity type provided on a surface side of the semiconductor substrate in the IGBT region, a channel layer of a second conductivity type provided between the source layer and the drift layer of the semiconductor substrate in the IGBT region, an emitter electrode in contact with the source layer and the channel layer, a gate electrode provided such that it faces the channel layer with an interposed first gate oxide film, a collector layer of the second conductivity type provided on a bottom side of the semiconductor substrate in the IGBT region, and a collector electrode in contact with the collector layer.an anode layer of the second conductivity type provided on a surface side of the semiconductor substrate in the diode region, an anode electrode in contact with the anode layer, a cathode layer of the first conductivity type provided on a bottom surface side of the semiconductor substrate in the diode region, and a cathode electrode in contact with the cathode layer, wherein a high-concentration region of the second conductivity type, having a higher concentration than the anode layer, is formed in a part of a region of the anode layer that is in contact with the drift layer, and a high-concentration region of the first conductivity type, having a higher concentration than the drift layer, is formed in a section of the drift layer.which is in contact with the high-concentration region of the second conductivity type. Alternatively, the semiconductor device of the present invention comprises, in the semiconductor device having an IGBT region in which a plurality of IGBTs are formed and a diode region in which a plurality of diodes are formed, a drift layer of a first conductivity type provided in a semiconductor substrate, a first field plate electrode which is provided such that it faces the drift layer between the plurality of IGBTs in the IGBT region with a first gate oxide film arranged between them, and a second field plate electrode which is provided such that it faces the drift layer between the plurality of diodes in the diode region with a second gate oxide film arranged between them, wherein the thickness of the second gate oxide film is greater than the thickness of the first gate oxide film. Advantageous effects of the invention

[0007] According to the present invention, it is possible in an RC-IGBT to prevent destruction of the element caused by current concentration at the time of an avalanche breakdown under high voltage application. Brief description of the drawings Fig. Figure 1 shows a cross-sectional view of a semiconductor device according to Example 1 of the present invention. Fig. Figure 2 shows a cross-sectional view of a semiconductor device, which serves as a comparative example to illustrate the effects of the present invention. Fig. Figure 3 shows a cross-sectional view of a semiconductor device according to Example 2 of the present invention. Fig. Figure 4 shows a cross-sectional view of a semiconductor device according to Example 4 of the present invention. Description of embodiments

[0008] Embodiments of the present invention are described below with reference to the drawings. In the drawings, the same components are identified by the same reference numerals, and detailed descriptions of redundant parts are omitted. Example 1

[0009] Fig. Figure 1 shows a cross-sectional view of a semiconductor device of Example 1 of the present invention.

[0010] The in Fig. The semiconductor device shown is an RC-IGBT in which an IGBT region (102) and a diode region (103) are formed on a single semiconductor chip in which an n-type drift layer (101) is continuously formed in a semiconductor substrate. Although in Fig. While only one of each of the above-mentioned areas is shown in Figure 1, a multitude of these areas are formed in an actual semiconductor device (RC-IGBT). A multitude of IGBTs are formed in the IGBT area (102), and a multitude of diodes are formed in the diode area (103).

[0011] On the surface side of a semiconductor substrate consisting of the n-type drift layer (101) with an impurity concentration of 1.5×10 14 cm 3 A surface between the multitude of IGBTs in the IGBT area (102) is removed by etching to form a first trench (106), and a surface between the multitude of diodes in the diode area (103) is removed by etching to form a second trench (118).

[0012] Each surface (bottom and side surfaces) of the first trench (106) and the second trench (118) is covered with a first gate oxide film (107) and a second gate oxide film (119), respectively, which are formed by performing a thermal oxidation treatment on the surface side of the semiconductor substrate.

[0013] Following thermal oxidation treatment on the surface side of the semiconductor substrate, a conductive film such as polysilicon is deposited over the entire top surface of the semiconductor substrate. By anisotropic etching of this conductive film using a mask covering the field plate formation areas, a gate electrode (108) and a first field plate electrode (109), facing the semiconductor substrate with the first gate oxide film (107) placed between them, are formed in the IGBT region (102), and an embedded anode electrode (120) and a second field plate electrode (121), facing the semiconductor substrate with the second gate oxide film (119) placed between them, are formed in the diode region (103).

[0014] Furthermore, by performing an ion implantation of a p-type defect into the surface side of the semiconductor substrate using a mask covering the first and second trench depressions (106, 118), a p-type channel layer (104) and a p-type anode layer (117) are formed, each having a defect concentration of 2.1×10 17 cm -3 exhibiting, on the surface sides of the semiconductor substrates in the IGBT region (102) and the diode region (103), respectively. Additionally, by performing ion implantation of an n-type defect into the surface side of the semiconductor substrate using a mask that covers the first trench (106) and the diode region (103), the surface side of the p-type channel layer (104) is counter-doped, thereby forming an n-type source layer (105) with a defect concentration of 6.3 × 10 19 cm -3in the IGBT region (102). In the present example, the impurity concentrations of the p-type channel layer (104) and the p-type anode layer (117) are set to the same; however, the ion implantation of the p-type impurity can be carried out separately for the IGBT region (102) and the diode region (103), so that the impurity concentrations of the respective layers are different.

[0015] After forming the channel layer (104), the source layer (105) and the anode layer (117), an insulating film is deposited over the entire surface of the semiconductor substrate, forming a first insulating film (110) in the IGBT region (102) and a second insulating film (122) in the diode region (103).

[0016] Furthermore, by performing an etching process using a mask with openings above the channel layer (104) and the first field plate electrode (109) in the IGBT region (102) and above the anode layer (117) and the second field plate electrode (121) in the diode region (103), a first emitter contact (111) penetrating the first insulating film (110) and the source layer (105) to reach the channel layer (104) and a second emitter contact (112) penetrating the first insulating film (110) to reach the first field plate electrode (109) are formed in the IGBT region (102). In addition, a first anode contact (123) that penetrates the second insulating film (122) to reach the anode layer (117) and a second anode contact (124) that penetrates the second insulating film (122) to reach the second field plate electrode (121) are formed in the diode area (103).

[0017] After the formation of the respective contacts (111, 112, 123, 124), a conductive film such as aluminum is deposited over the entire surface of the semiconductor substrate. An emitter electrode (113), connected to the channel layer (104), the source layer (105), and the first field plate electrode (109), is formed in the IGBT region (102), and an anode electrode (125), connected to the anode layer (117) and the second field plate electrode (121), is formed in the diode region (103). The emitter electrode (113) and the anode electrode (125) are formed integrally from the same conductive film and are electrically connected to each other, and together with a plurality of embedded anode electrodes (120), they are connected to an emitter terminal (E). Additionally, the multitude of gate electrodes (108) is connected to the gate terminal (G).

[0018] On the other hand, on the underside of the semiconductor substrate, which consists of an n-type drift layer (101) with an impurity concentration of 1.5×10 14 cm -3 An ion implantation of an n-type defect is performed from the underside across the entire surface of the semiconductor substrate. As a result, a first buffer layer (114) and a second buffer layer (126), both of n-type and with a defect concentration of 1.9 × 10⁻⁶, are formed. 13 cm -3 exhibit, on the undersides of the semiconductor substrates in the IGBT area (102) or in the diode area (103).

[0019] Furthermore, by performing an ion implantation of a p-type defect on the underside of the semiconductor substrate using a mask covering the diode region (103), the underside of the n-type first buffer layer (114) in the IGBT region (102) is counter-doped to form a p-type collector layer (115) with a defect concentration of 1.4×10 17 cm -3 to form.

[0020] Additionally, by performing an ion implantation of an n-type defect on the underside of the semiconductor substrate using a mask covering the IGBT region (102), an n-type cathode layer (127) with a defect concentration of 3.0×10 19 cm -3 formed on the underside of the n-type second buffer layer (126) in the diode area (103).

[0021] After the respective layers are formed on the underside of the semiconductor substrate, a conductive film such as aluminum is deposited over the entire underside of the semiconductor substrate to form a collector electrode (116) connected to the collector layer (115) in the IGBT region (102) and a cathode electrode (128) connected to the cathode layer (127) in the diode region (103). The collector electrode (116) and the cathode electrode (128) are formed in one piece from the same conductive film, are electrically connected to each other, and are connected to a collector terminal (C).

[0022] A feature of the present invention is that in the anode layer (117) of the diode region (103) a p-type high concentration region (129) with a higher concentration than the anode layer (117) is formed in a part of the region that is in contact with the drift layer (101), and an n-type high concentration region (130) with a higher concentration than the drift layer (101) is formed in a section of the drift layer (101) of the diode region (103) that is in contact with the p-type high concentration region (129).

[0023] The p-type high concentration region (129) and the n-type high concentration region (130), which are characteristic structural features of the present invention, can be formed by performing an ion implantation through the first anode contact (123), which penetrates the second insulating film (122) in the diode region (103) and reaches the anode layer (117).

[0024] In the present example, after forming the respective contacts (111, 112, 123, 124), an ion implantation of the p-type defect site is first carried out using a mask with an opening above the first anode contact (123), thereby creating the p-type high concentration area (129) with a defect concentration of 7.4×10 18 cm -3 , which is higher than that of the anode layer (117) with a defect concentration of 2.1×10 17 cm -3 , is formed in a part of the region where the anode layer (117) and the drift layer (101) below the first anode contact (123) are in contact. Subsequently, by performing the ion implantation of an n-type defect, the n-type high-concentration region (130) with a defect concentration of 1.6 × 10 17 cm -3 , which is higher than that of the n-type drift layer (101) with a defect concentration of 1.5×10 14 cm -3, formed in a section of the drift layer (101) below the first anode contact (123) which is in contact with the p-type high concentration area (129).

[0025] In the present example, since the p-type high concentration region (129) and the n-type high concentration region (130) are formed by ion implantation through the first anode contact (123), each of these high concentration regions (129, 130) is formed only in a part below the first anode contact (123), and the areas surrounding the p-type high concentration region (129) and the n-type high concentration region (130) remain as the anode layer (117) and the drift layer (101), which are not highly doped.

[0026] Fig. Figure 2 shows a cross-sectional view of a semiconductor device, which serves as a comparative example to illustrate the effects of the present invention.

[0027] To explain the effects of the semiconductor device (RC-IGBT) according to Example 1 of the present invention, the problems in conventional technology are described using the Fig. The RC-IGBT shown in section 2 is described as a comparative example.

[0028] The configuration of the semiconductor device (RC-IGBT) of the in Fig. The comparative example shown in Figure 2 is generally the same as that of the semiconductor device (RC-IGBT) according to Example 1; however, it differs in that it includes the p-type high-concentration region (129) and the n-type high-concentration region (130) in the diode region (103), which exhibit the characteristic structural features of the Fig. The present invention, as illustrated in point 1, does not contain any of the above.

[0029] In the Fig. In the comparative example shown in Figure 2, a case is considered in which a positive voltage is applied to the collector terminal (C) with respect to the emitter terminal (E), while a voltage smaller than the threshold voltage is applied to the gate terminal (G) with respect to the emitter terminal (E).

[0030] In the IGBT region (102), the IGBT is in an OFF state (voltage-blocking state) because the gate terminal voltage (G) is lower than the threshold voltage. When a voltage is applied to the collector terminal (C), the pn junction formed between the p-type channel layer (104) and the n-type drift layer (101) is reverse-biased, and therefore an electric field is applied to this pn junction. Since the n-type drift layer (101) has a lower impurity concentration than the p-type channel layer (104), the depletion layer extends mainly from the pn junction into the n-type drift layer (101).

[0031] When the voltage applied to the collector terminal (C) increases and the electric field strength across the pn junction reaches a critical value, the device undergoes an avalanche breakdown. In the Fig. However, in the comparative example shown in 2, the pn junction in the IGBT region (102) breaks down before the pn junction in the diode region (103) breaks down.

[0032] This is because the IGBT in the IGBT area (102) has a pnp transistor structure consisting of the p-type channel layer (104), the n-type drift layer (101) and buffer layer (114), and the p-type collector layer (115), and the avalanche voltage decreases due to the amplification effect of the leakage current. That is, a small collector leakage current acts as a base current, which in turn causes positive feedback, leading to a further increase in the collector leakage current, thus lowering the avalanche voltage.

[0033] On the other hand, since the cathode layer (127) on the back of the diode in the diode region (103) is of the n conductivity type, the diode does not have a pnp structure and therefore exhibits a high avalanche voltage.

[0034] In the Fig. In the comparative example shown, if an avalanche breakdown occurs in the IGBT of IGBT area (102) as described above, a problem arises in that the device is often destroyed. This is because the leakage current-withdrawal voltage characteristic of the pnp transistor structure has a negative resistance region. In this negative resistance region, the withstand voltage decreases as the leakage current increases. Accordingly, if an avalanche breakdown occurs in one of the IGBTs in IGBT area (102) and leakage current begins to flow, positive feedback occurs in which the holding voltage decreases along the current path, causing even more leakage current to flow. As a result, the leakage current concentrates locally in IGBT area (102), leading to the destruction of the device.

[0035] As described above, the in Fig. In the comparative example shown in Figure 2, a problem arises in that at the time of the avalanche breakdown of the device, current is concentrated in a part of the IGBT area (102), causing destruction.

[0036] Returning to the semiconductor device (RC-IGBT) according to Example 1 of the present invention, which is in Fig. Figure 1 illustrates the functionality and effects of the invention. In contrast to the invention described in Figure 1, the following applies: Fig. The comparative example shown in point 2 contains the one in Fig. Example 1 shows the p-type high concentration region (129), which is selectively formed below the anode layer (117) in the diode region (103), and the n-type high concentration region (130), which is selectively formed in the drift layer (101) to be oriented towards the p-type high concentration region (129).

[0037] In example 1, which is in Fig. Figure 1 shows a state in which a voltage less than the threshold voltage is applied to the gate terminal (G) with respect to the emitter terminal (E), and a positive voltage is applied to the collector terminal (C) with respect to the emitter terminal (E).

[0038] In the IGBT region (102), the IGBT is in an off state (voltage-blocking state) because the gate terminal voltage (G) is lower than the threshold voltage. When a voltage is applied to the collector terminal (C), the pn junction formed between the p-type channel layer (104) and the n-type drift layer (101) is reverse-biased, and an electric field is applied to this pn junction. Since the n-type drift layer (101) has a lower impurity concentration than the p-type channel layer (104), the depletion layer extends mainly from the pn junction into the n-type drift layer (101).

[0039] At this point, because a positive voltage is applied to the cathode electrode (128) with respect to the anode electrode (125), the pn junction formed between the p-type high-concentration region (129) and the n-type high-concentration region (130) in the diode region (103) is also reverse-biased, resulting in a reverse voltage state in which an electric field is applied. The depletion layer extends from the pn junction into the n-type drift layer; however, since the impurity concentrations of the p-type high-concentration region (129) and the n-type high-concentration region (130) are high near the pn junction, the gradient of the electric field becomes steep. Accordingly, the pn junction in the diode region (103) is in a state of higher electric field compared to the pn junction in the IGBT region (102). As a result, in example 1, which is in Fig. As shown in Figure 1, the diode region (103) experiences an avalanche breakdown before the IGBT region (102) experiences an avalanche breakdown.

[0040] In this way, if the diode region (103) experiences an avalanche breakdown, device destruction is less likely. This is because the diode region (103) does not have a pnp structure, as the cathode layer (127) on the back side is of the n conductivity type, and therefore the leakage current-withstand voltage characteristic has no negative resistance region. Since there is no negative resistance region, the leakage current flows uniformly and is distributed over the entire diode region (103) without concentrating locally, thus making device destruction less likely.

[0041] Additionally, the semiconductor device (RC-IGBT) according to Example 1 of the present invention, which is in Fig. As shown in Figure 1, the p-type high-concentration region (129) is formed only in a portion of the anode layer (117) that contacts the drift layer (101), and the n-type high-concentration region (130) is formed only in a portion of the drift layer (101) that contacts the p-type high-concentration region (129) in the diode region (103). Non-high-concentration sections of the anode layer (117) and the drift layer (101) surround the p-type high-concentration region (129) and the n-type high-concentration region (130), respectively. Therefore, the avalanche breakdown voltage of the diode in the diode region (103) can be adjusted without affecting the static operation of the diode in the diode region (103). Example 2

[0042] Fig. Figure 3 shows a cross-sectional view of a semiconductor device according to Example 2 of the present invention.

[0043] The difference to the semiconductor device (RC-IGBT) according to Example 1 of the present invention, which is in Fig. The difference shown in Figure 1 is that the opening width (W2) of the first anode contact (123), which penetrates the second insulating film (122) of the diode area (103) and reaches the anode layer (117), is made larger than the opening width (W1) of the first emitter contact (111), which penetrates the first insulating film (110) and the source layer (105) of the IGBT area (102) and reaches the channel layer (104).

[0044] As described above, the p-type high-concentration region (129) and the n-type high-concentration region (130), which are the characteristic structural features of the present invention, can be formed by performing ion implantation through the first anode contact (123), which penetrates the second insulating film (122) of the diode region (103) and reaches the anode layer (117). In this case, if the opening width (W2) of the first anode contact (123) is increased, the number of defects implanted to form the p-type high-concentration region (129) and the n-type high-concentration region (130) in the anode layer (117) and the drift layer (101) of the diode region (103) increases. As a result, the avalanche breakdown voltage of the diode region (103) decreases, thereby further enhancing the effects of the present invention. Example 3

[0045] In the semiconductor device (RC-IGBT) according to Example 3 of the present invention, the depth of the first anode contact (123), which penetrates the second insulating film (122) of the diode region (103) and reaches the anode layer (117), is made deeper than the depth of the first emitter contact (111), which penetrates the first insulating film (110) and the source layer (105) of the IGBT region (102) and reaches the channel layer (104).

[0046] This also makes it possible, as in the case of Example 2 of the present invention, to increase the amount of impurities forming the p-type high concentration region (129) and the n-type high concentration region (130), thereby further enhancing the effects of the present invention. Example 4

[0047] Fig. Figure 4 shows a cross-sectional view of a semiconductor device according to Example 4 of the present invention.

[0048] What is important for the functioning and effect of the present invention is to lower the avalanche breakdown voltage of the diode region, where an avalanche breakdown is less likely to occur, rather than that of the IGBT region (102), where an avalanche breakdown is more likely to occur. Accordingly, means can also be used that are not based on the introduction of the p-type high-concentration region (129) and the n-type high-concentration region (130).

[0049] In Fig. 4 is the thickness of the second gate oxide film (119) arranged between the second field plate electrode (121) of the diode region (103) and the drift layer (101) such that it is greater than the thickness of the first gate oxide film (107) arranged between the first field plate electrode (109) of the IGBT region (102) and the drift layer (101).

[0050] The in Fig. 4 The second gate oxide film (119) shown, which is thicker than the first gate oxide film (107), can be formed, for example, by forming the first trench (106) and the second trench (118) in the semiconductor substrate, performing thermal oxidation on the surface side of the semiconductor substrate to form an oxide film on the substrate surface, removing the oxide film except for the one on the bottom surface of the second trench (118) by etching using a mask covering the bottom surface of the second trench (118), and then performing thermal oxidation again on the surface side of the semiconductor substrate so that the oxide film at the bottom of the second trench (118) becomes thicker than the oxide film at the bottom of the first trench (106).

[0051] The first field plate electrode (109) and the second field plate electrode (121) serve to attenuate the electric field in the regions of the drift layer (101) facing them through the first gate oxide film (107) and the second gate oxide film (119), respectively, thereby increasing the avalanche breakdown voltage. Since the effect of reducing the electric field is greater when the gate oxide film is thinner, it is possible to reduce the effect of the second field plate electrode (121) in the diode region (103) by configuring the device as in Example 4 of the present invention, thereby lowering the avalanche breakdown voltage of the diode region (103).

[0052] It should be noted that in Fig. 4. The functionality and effect of the present invention can also be achieved without forming the p-type high concentration region (129) and the n-type high concentration region (130); as described in Fig.As shown in Figure 4, the functionality and effect of the present invention can be further enhanced by combining both areas. Reference symbol list 101 Drift layer 102 IGBT range 103 Diode area 104 Channel layer 105 Source layer 106 First trench deepening 107 First Gate Oxide Film 108 Gate electrode 109 First field plate electrode 110 First insulating film 111 First emitter contact 112 Second emitter contact 113 Emitter electrode 114 First buffer layer 115 Collector layer 116 Collector electrode 117 Anode layer 118 Second trench deepening 119 Second Gate Oxide Film 120 Embedded anode electrode 121 Second field plate electrode 122 Second insulating film 123 First anode contact 124 Second anode contact 125 Anode electrode 126 Second buffer layer 127 Cathode layer 128 Cathode electrode 129 p-type high concentration range 130 n-type high concentration range QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2022-079 281 A

[0004] JP 2021-073 714 A

[0004]

Claims

[1] Semiconductor device comprising an IGBT region and a diode region, comprising: a drift layer of a first conductivity type provided in a semiconductor substrate; a source layer of the first conductivity type, which is provided on a surface side of the semiconductor substrate in the IGBT area; a channel layer of a second conductivity type, which is provided between the source layer and the drift layer of the semiconductor substrate in the IGBT area; an emitter electrode that is in contact with the source layer and the channel layer; a gate electrode which is designed to face the channel layer with a first gate oxide film arranged between it and the channel layer; a collector layer of the second conductivity type, which is provided on a bottom surface side of the semiconductor substrate in the IGBT area; a collector electrode that is in contact with the collector layer; an anode layer of the second conductivity type, which is provided on one surface side of the semiconductor substrate in the diode region; an anode electrode that is in contact with the anode layer; a cathode layer of the first conductivity type, which is provided on a bottom surface side of the semiconductor substrate in the diode region; and a cathode electrode that is in contact with the cathode layer, wherein a high-concentration area of ​​the second conductivity type, which has a higher concentration than the anode layer, is formed in a part of an area of ​​the anode layer that is in contact with the drift layer, and A high concentration area of ​​the first conductivity type, which has a higher concentration than the drift layer, is formed in a section of the drift layer that is in contact with the high concentration area of ​​the second conductivity type. [2] Semiconductor device according to claim 1, wherein the emitter electrode and the anode electrode are formed from the same first conductive film, and the source layer, the channel layer, and the anode layer are electrically connected, and the collector electrode and the cathode electrode are formed from the same second conductive film and the collector layer and the cathode layer are electrically connected. [3] Semiconductor device according to claim 1, further comprising: a buffer layer of the first conductivity type between the collector layer and the drift layer and between the drift layer and the drift layer. [4] Semiconductor device according to any one of claims 1 to 3, further comprising: an insulating film that covers one surface side of the semiconductor substrate; an emitter contact provided in the insulating film of the IGBT area; and an anode contact provided in the insulating film of the diode area, wherein The width of an opening in the anode contact is greater than the width of an opening in the emitter contact. [5] Semiconductor device according to claim 4, wherein the high concentration area of ​​the second conductivity type and the high concentration area of ​​the first conductivity type are formed below the anode contact. [6] Semiconductor device according to any one of claims 1 to 3, comprising: an insulating film that covers one surface side of the semiconductor substrate; an emitter contact provided in the insulating film of the IGBT area; and an anode contact provided in the insulating film of the diode area, wherein The depth of the anode contact is greater than the depth of the emitter contact. [7] Semiconductor device according to claim 6, wherein the high concentration area of ​​the second conductivity type and the high concentration area of ​​the first conductivity type are formed below the anode contact. [8] Semiconductor device according to any one of claims 1 to 3, wherein a large number of IGBTs are trained in the IGBT field, and a large number of diodes are formed in the diode area, the component comprising: a first field plate electrode, which is designed to face the drift layer between the plurality of IGBTs in the IGBT area with an intermediate first gate oxide film; and a second field plate electrode, which is provided such that it faces the drift layer between the plurality of diodes in the diode region with a second gate oxide film arranged in between, and wherein The thickness of the second gate oxide film is greater than the thickness of the first gate oxide film. [9] Semiconductor device comprising an IGBT region in which a plurality of IGBTs are formed and a diode region in which a plurality of diodes are formed, wherein the device comprises: a drift layer of a first conductivity type provided in a semiconductor substrate; a first field plate electrode, which is designed to face the drift layer between the plurality of IGBTs in the IGBT area with an intermediate first gate oxide film; and a second field plate electrode, which is provided such that it faces the drift layer between the plurality of diodes in the diode region with a second gate oxide film arranged in between, wherein The thickness of the second gate oxide film is greater than the thickness of the first gate oxide film.

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