INTERFACE CONTROL OF A FED DEVICE
The interface control mechanism in PoE systems manages current transitions using a switch and control circuitry to address voltage discrepancies, ensuring seamless power transitions and preventing converter shutdown, thus stabilizing the system.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- MICROCHIP TECHNOLOGY INC
- Filing Date
- 2024-07-02
- Publication Date
- 2026-05-07
AI Technical Summary
In Power-over-Ethernet (PoE) systems, seamless transitions between auxiliary power sources and the primary power supply unit (PSE) are challenging, particularly when the auxiliary power source voltage is lower than the PSE voltage, leading to potential buffer capacitor discharge and power converter shutdown due to excessive inrush currents.
Implementing an interface control mechanism with a switch and control circuitry to manage current flow, limiting the current to a short-circuit current level for a duration less than a specified time limit during transitions, ensuring the buffer capacitor is charged without exceeding safe current limits, thereby preventing converter shutdown.
Ensures stable power transitions by effectively charging the buffer capacitor, maintaining system integrity, and preventing damage to the PoE system components during voltage changes.
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Abstract
Description
REFERENCE TO RELATED REGISTRATION(S)
[0001] The present application claims priority over U.S. preliminary patent application No. 63 / 525,815 entitled: Change-Over from Auxiliary Power in a Power over Ethernet System, filed on July 10, 2023, and U.S. non-preliminary patent application No. 18 / 404,554, filed on January 4, 2024, entitled: Powered Device Interface Controller, the contents of which are hereby incorporated in their entirety by reference. TECHNOLOGICAL AREA
[0002] The present disclosure relates generally to Power-over-Ethernet (PoE) and in particular to the implementation of auxiliary power in a PoE system. BACKGROUND
[0003] Power over Ethernet (PoE) is a technology that allows electrical power and data to be transmitted over a standard Ethernet network cable. It eliminates the need for separate power cables, enabling devices to receive both power and network connectivity over a single Ethernet cable. There are several versions of PoE. IEEE 802.3af is the original PoE standard. IEEE 802.3at is a newer standard that provides higher power output than IEEE 802.3af. IEEE 802.3bt is the latest standard and can deliver even higher power levels.
[0004] Power over Ethernet (PoE) allows devices such as Internet Protocol cameras (IP cameras), wireless access points, Voice over IP phones (VoIP phones), and other networked devices to be powered directly via the Ethernet infrastructure. This simplifies the installation and deployment of these devices, especially in situations where power outlets may not be readily available.
[0005] PoE works by using wires in the Ethernet cable to transmit electrical power along with data signals. This is achieved by injecting power into the cable at a power supply unit (PSE), which may be located at a PoE-enabled switch or a PoE midspan injector. The power is then drawn from a powered device interface (PD interface) located at the power- and data-receiving PD. The PD may include a power converter, typically a DC-DC converter, to convert the received power from the PD interface into a suitable voltage level for the PD; and the PD may include a buffer capacitor to smooth out voltage ripples or fluctuations caused by variations at the power converter's input.
[0006] Many PoE applications also use auxiliary power sources, such as an AC-powered wall adapter (WA) connected to the PD. In these applications, the auxiliary power can supplement or replace the power supplied over Ethernet. PoE can then provide redundancy and backup power for the PD. SUMMARY
[0007] In many PoE systems, the PD draws no significant current from the PSE when an auxiliary power supply is connected to the PD. Conversely, the PD draws current from the PSE when the auxiliary power supply is disconnected. These operations can be managed with a switch at the PD, such as a transistor in series with the current path from the PSE to the PD. When the auxiliary power supply is connected, the switch might not be able to disconnect the PD immediately before it draws significant current from the PSE, thus enabling a seamless transition from the PSE to the auxiliary power supply as the PD's power source. A seamless transition from the auxiliary power supply to the PSE is also advantageous, and in this case, the switch might need to turn on more quickly to prevent the voltage at the PD from dropping below an undervoltage lockout (UVLO) level.
[0008] A seamless transition to the PSE from the auxiliary power source can be achieved by continuously operating the PD's power converter. In cases where the auxiliary power source voltage is higher than the PSE voltage, the PD's buffer capacitor can simply discharge until it reaches the PSE voltage. However, in other cases, the auxiliary power source voltage is lower than the PSE voltage. In these other cases, the buffer capacitor may need to be charged to the PSE voltage. In many PoE systems, the PD charges the buffer capacitor during an inrush current stage by controlling a switch on the PD interface to limit the current from the PSE to the PD to a startup inrush current limit (e.g., up to 400 mA). However, if the auxiliary power source voltage is lower than the PSE voltage, the PD can enter inrush current mode, i.e.,Switch to the inrush current stage to charge the buffer capacitor when the auxiliary power source is disconnected. In the inrush current stage, the PD can use the starting inrush current limit, but if the power converter current exceeds the starting inrush current limit, the buffer capacitor can discharge and cause the power converter to shut down. This can occur with PoE Type 3 and Type 4, which allow power outputs of up to 60 watts and 90 watts, respectively, with a power converter current of up to 1.93 A. The PD interface switch and control circuitry can be collectively referred to as the PD interface control.
[0009] Exemplary implementations of the present disclosure are aimed at implementing auxiliary power in a PoE system. According to exemplary implementations, when switching from an auxiliary power source to the PSE as the power source, e.g., when the auxiliary power source ceases to supply power to the PD, the PD interface can limit the current to the PD from the PSE to a short-circuit current limit (e.g., 2.3–2.5 A) for a duration that is less than a short-circuit time limit. The present disclosure includes, but is not limited to, the following exemplary implementations.
[0010] Some exemplary implementations provide an interface control of a powered device, comprising: a switch for controlling power to a powered device from a power supply unit that provides power to the powered device via a network cable, wherein the powered device is also to accept power from an auxiliary power source; and control circuitry designed at least to: detect a switch from the auxiliary power source to the power supply unit as the power source for the powered device;at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the switch to control the current to the powered device from the power supply unit to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge a buffer capacitor of the powered device, this short-circuit current limit being greater than a starting inrush current limit of the powered device; and subsequently controlling the switch to control the current to the powered device from the power supply unit to the short-circuit current limit level for a duration less than a short-circuit time limit, fully opening the switch to allow current to flow from the power supply unit to the powered device.
[0011] Some exemplary implementations provide a powered device comprising: a power converter for providing a regulated voltage to a load from a power source, wherein the powered device is configured to receive power from a power supply unit that provides power to the powered device via a network cable, wherein the powered device is further configured to receive power from an auxiliary power source; a buffer capacitor coupled to an input of the power converter; and an interface controller of a powered device for controlling the current to the powered device from the power supply unit, wherein the interface controller of the powered device includes at least the following: detecting a switch from the auxiliary power source to the power supply unit as the power source for the powered device;at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to a short-circuit current limit for a duration less than a short-circuit time limit in order to charge the buffer capacitor, the short-circuit current limit being greater than a starting current limit of the powered device; and subsequently controlling the current to the short-circuit current limit for a duration less than the short-circuit time limit, allowing the current to flow freely from the power supply unit to the powered device.
[0012] Some exemplary implementations provide a procedure that includes: detecting a switch from an auxiliary power source to a power supply unit as the power source for a powered device in a Power-over-Ethernet system; at least in response to the detection of the switch from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to the powered device from the power supply unit to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge a buffer capacitor of the powered device, the short-circuit current limit being greater than a starting inrush current limit of the powered device;and subsequently to control the current to the supplied device from the power supply unit to the short-circuit current limit level for a period of time less than a short-circuit time limit, allowing the current to flow freely from the power supply unit to the supplied device.
[0013] These and other features, aspects, and benefits of the present revelation will become clear upon reading the following detailed description, along with the accompanying figures, which are briefly described below. The present revelation includes any combination of two, three, four, or more features or elements set forth herein, regardless of whether these features or elements are expressly combined or otherwise indicated in a specific exemplary implementation described herein. This revelation is to be understood as a whole, such that all separable features or elements of the revelation, in all its aspects and exemplary implementations, should be considered combinable unless the context of the revelation clearly prescribes otherwise.
[0014] It is understood, therefore, that this summary serves only to outline some exemplary implementations in order to provide a basic understanding of some aspects of revelation. Accordingly, it is understood that the exemplary implementations described above are merely examples and should not be interpreted as limiting the scope of protection or the spirit of revelation in any way. Further exemplary implementations, aspects, and benefits will become clear from the following detailed description in conjunction with the accompanying figures, which exemplify the principles of some of the described exemplary implementations. BRIEF DESCRIPTION OF THE FIGURE(S)
[0015] Having thus described exemplary implementations of the revelation in general, we now refer to the attached figures, which are not necessarily to scale and in which: Fig. Figure 1 illustrates an interface control of a powered device (PD), according to some exemplary implementations of the present disclosure; Fig. Figure 2 illustrates a PD section, including the interface control of a powered device PD from Fig. 1, according to some exemplary implementations; Fig. Figure 3 illustrates a Power-over-Ethernet (PoE) system that powers the PD section of Fig. 2 includes, according to some exemplary implementations of the present disclosure; Fig. Figure 4 is a diagram of the current flow to the PD from a power supply unit (PSE) over a period of time, including a first switchover from the PSE to an auxiliary power source as the power source for the PD and a second switchover from the auxiliary power source to the PSE as the power source, according to some exemplary implementations; Fig. Figure 5 illustrates the PD section of Fig. 2, including in particular the PD interface control of Fig. 1, and furthermore including a pair of rectifiers, according to some exemplary implementations; and Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D and Fig. 6E are flowcharts that illustrate different processes in a procedure according to some exemplary implementations. DETAILED DESCRIPTION
[0016] Some implementations of the present revelation are now described in more detail below with reference to the accompanying figures, which show some, but not all, implementations of the revelation. Indeed, various implementations of the revelation can be embodied in many different forms and should not be interpreted as limited to those shown herein; rather, these exemplary implementations are provided so that this revelation may be thorough and complete and fully convey to those skilled in the art the scope of the revelation. The same reference signs refer throughout to the same elements.
[0017] Unless otherwise stated or clearly evident from the context, references to first, second, or the like should not be interpreted as implying a particular order. A feature described as being above another feature (unless otherwise stated or clearly evident from the context) may instead be below it, and vice versa; and similarly, features described as being to the left of another feature may instead be to its right, and vice versa. Likewise, where reference is made herein to quantitative measures, values, geometric relationships, or the like, unless otherwise stated, one or more, if not all, of these references may be approximate to account for possible acceptable variations, for example, those that may occur due to engineering tolerances or the like.
[0018] Unless otherwise stated or clearly evident from the context, the "or" used herein to refer to a series of operands is the "inclusive or" and is therefore true if and only if one or more of the operands are true, as opposed to the "exclusive or," which is false if all operands are true. Thus, for example, "[A] or [B]" is true if [A] is true, or if [B] is true, or if both [A] and [B] are true. Furthermore, the articles "a" and "an" mean "one or more" unless otherwise stated or unless it is clear from the context that they refer to a singular form. It is also understood that, unless otherwise stated, the terms "data," "content," "digital content," "information," and similar terms may sometimes be used synonymously.
[0019] The present disclosure relates generally to Power-over-Ethernet (PoE) and, in particular, to the implementation of auxiliary power in a PoE system, which includes a power supply unit (PSE), a powered device (PD), and an Ethernet cable over which data is transmitted. The PoE system may also include a PD interface controller to manage the power supply to the PD.
[0020] Fig. Figure 1 illustrates an interface controller of a powered device (PD) 100 according to some exemplary implementations of the present disclosure. The PD interface controller is an electronic device, such as an integrated circuit (IC), with one or more electronic circuits, including transistors and other electronic components. As shown, the PD interface controller includes a switch Q1 and a control circuit 102. In some examples, the switch is a transistor, such as a field-effect transistor (FET), which may be arranged in series with the current path from the power supply unit (PSE) to the PD. The switch Q1 can be controlled by the control circuit 102 to control the current to the PD from the PSE; and in some examples where the switch is a transistor, the control circuit 102 may include a gate control circuit.The PD interface controller 100 is shown with switch Q1 as part of an integrated circuit that includes a control circuit 102; however, this is not intended to be restrictive in any way. In other examples, switch Q1 is provided externally by the integrated circuit including the control circuit 102.
[0021] Fig. Figure 2 illustrates a PD section 200, which controls the PD interface 100 of Fig. 1 includes, and Fig. Figure 3 illustrates a Power-over-Ethernet (PoE) system 300, which includes the PD section 200 of Fig. 2 includes, according to some exemplary implementations, where the Fig. 2 and Fig. 3. As shown, the PD section 200 in the PoE system is connected to a PSE 202 via a network cable 302, such as an Ethernet cable, which transmits both data and power. The PSE 202 supplies power to the network cable 302, for example, to a first power interface (PI) 304A of the network cable, such as an Ethernet connector (e.g., RJ-45). The PD section 200 receives power from the network cable 302, for example, from a second PI 304B of the network cable.
[0022] The PD section 200 can also receive power from an auxiliary power source 204, such as an AC-powered wall adapter (WA). The auxiliary power source can supplement or replace the power supplied by the PSE 202 via the network cable 302. Likewise, the power supplied by the PSE 202 via the network cable 302 can provide redundancy and backup power to the PD if power from the auxiliary power source 204 is unavailable. The auxiliary power source 204 can be connected to the PD in a number of different configurations. As shown in Fig. As shown in Figure 2, for example, the auxiliary power supply is connected to the PD section 200 in a configuration sometimes referred to as the "Rear Aux" or "RAUX" configuration, in which the auxiliary power supply 204 is connected between the PD interface controller 100 and the power converter 206. In other examples, the auxiliary power supply may be connected to the PD in a "Front Aux" or "FAUX" configuration, in which the auxiliary power supply 204 is connected before the PD interface controller 100. The description contained herein is primarily detailed with respect to the RAUX configuration, but it is equally applicable to the FAUX configuration, with modifications that will be readily understood by those skilled in the art.
[0023] In various examples, the PSE 202 may be located on a PoE-enabled switch or a PoE midspan injector. Likewise, the PD section 200 may be located on a data terminal equipment (DTE) 306, such as an IP camera, a wireless access point, a VoIP telephone, or another networked device. In this respect, the current drawn by the PD (from the network cable 302 or the auxiliary power source 204) may be consumed by a load 308 to perform one or more intended functions of the DTE. Examples of suitable intended functions include monitoring, data communication, wireless networking, or telephony. The combination of the second PI 304B, PD section 200, and load 308 may be considered a powered device (PD) 310.
[0024] In Fig. 2. The PD section 200 includes the PD interface controller 100, a power converter 206, and a buffer capacitor Cd. As stated above, the PD interface controller 100 can perform one or more functions to manage the power supply from the auxiliary power source 204 and the PSE 202 to the PD. The PD section 200 and the PSE 202 can perform a handshake procedure when the PD section 200 is connected to the PSE via the network cable 302. The PSE 202 can perform a detection operation to determine whether the PD section 200 is PoE-compatible and a classification operation to determine the power requirements of the PD section 306 (as shown in Fig. 3). In particular, for example, the PD interface controller 100 can communicate with the PSE 202 to negotiate and determine a current quantity that can be supplied by the PSE 202 to the DTE 306 and, in particular, to the load 308, taking into account the current requirements of the DTE 306 and the capabilities of the PSE 202. In operation, the PD interface controller 100 can then control the switch Q1 to control the current to the PD section 200 and thereby control the current to the DTE 306 from the PSE 202, with this current to the DTE 306 from the PSE 202 being referred to as I PD can be described. The term "current control," as used herein, shall be understood to mean that an isolation switch is held in the fully closed position when the current is noticeably below a predetermined current limit (I). LIM ) lies, and generally limits the current so that I LIMis not exceeded, for example in the case of an overload or a short circuit, without restriction.
[0025] The power converter 206, typically a DC-DC converter, can convert received current from a power source, such as the PSE 202 or the auxiliary power source 204, into a suitable voltage level for the DTE 306 (load 308). The power converter 206 can therefore provide a regulated voltage to the load 308 from the power source, such as the PSE 202 or the auxiliary power source 204. The buffer capacitor Cd can be coupled to an input of the power converter 206. A buffer capacitor, also known as a filter capacitor or smoothing capacitor, is an electronic component used in power supply circuits to smooth the input voltage of the power converters. A buffer capacitor stores electrical energy for release during the decay of the waveform and moderates the voltage level by reducing peaks.In this respect, the buffer capacitor Cd can stabilize the input voltage by smoothing out voltage ripples or fluctuations caused by short-term variations in the input voltage of the power converter 206. The buffer capacitor Cd can also stabilize the input voltage of the power converter 206 during switching of the power source, such as from the PSE 202 to the auxiliary power source 204 or from the auxiliary power source 204 to the PSE 202.
[0026] In some examples, during an inrush current stage, when the PSE 202 is the power source for the PD section 200, the PD interface control 100 I PD (Control current to PD section 200 from PSE 202) to charge the buffer capacitor Cd. In this respect, the PD interface control 100 I can PD to control the inrush current limit of the PD section 200. The inrush current limit of the PD can sometimes be expressed as IINRUSH be designated.
[0027] Following on the control of I PD from PSE 202 to I INRUSH To charge the buffer capacitor Cd, the PD interface controller 100 can switch on the power converter 206 when the buffer capacitor Cd is charged to a predetermined undervoltage lockout limit (UVLO limit) and I PD to allow free flow from PSE 202 to PD, in other words, to fully switch on switch Q1 as long as I PD noticeably below I LIM remains. This can be an operating current level for the DTE 306 to enable the load 308 to perform its one or more intended functions. The operating current level can sometimes be referred to as I DTE be designated.
[0028] In some examples, the power source for PD section 200 can switch from PSE 202 to auxiliary power source 204, for example, when auxiliary power source 204 is connected to PD section 200. The PD interface controller 100 can then detect an (initial) switch from PSE 202 to auxiliary power source 204 as the power source for PD section 200. At least partially in response to detecting the switch from PSE 202 to auxiliary power source 204, the PD interface controller 100 can PD interrupting the power supply can effectively disconnect the PD from the PSE 202. However, in some examples, a small current (e.g., 10-16 mA) can be drawn from the PSE 202 to ensure that the PSE 202 does not disconnect the PD. This current can be called the Maintain Power Signature (MPS) current, and it can be either a DC current or a pulsed current.
[0029] In some examples where the power source for PD section 200 is the auxiliary power source 204, the PD interface controller 100 can detect a (second) switchover from the auxiliary power source 204 to the PSE 202. In particular, the PD interface controller 100 can detect, for example, a disconnection of the auxiliary power source 204 from the PD section 200. At least partially in response to the detection of the switchover from the auxiliary power source 204 to the PSE 202, the PD interface controller 100 can PD control to charge the buffer capacitor Cd. Instead of I PD on I INRUSH (Start-up inrush current limit of the PD section 200) to control, as during the inrush current stage, the PD interface control 100 I PD to a short-circuit current limit level I LIM to control for a duration less than a short-circuit time limit in order to charge the buffer capacitor Cd. Following the control of I PD on ILIM For the duration that is less than the short-circuit time limit, the PD interface controller 100 can allow the current to flow freely from the PSE 202 to the PD section 200 and from the PD section 200 to the load 308 of the DTE 306 (as in Fig. 3 shown) at operating level I DTE can flow, i.e., the PD interface control 100 can fully turn on switch Q1 while monitoring the current flow.
[0030] In some examples, the short-circuit current limit is a short-circuit current limit value of PSE 202, which may be a minimum short-circuit current limit value if the PSE specifies both a minimum and a maximum short-circuit current limit value. The short-circuit current limit value, which is designated as I LIMThis can be described as a maximum current that the PSE can safely supply under a short-circuit condition. In some cases, where the PD section 200 continuously supplies a current of at least I LIM If the PSE 202 is pulled, it can trigger a shutdown of the port to which the PD section 200 is connected, in order to protect the PSE 202 and the PoE system 300 from damage. In this respect, the PSE 202 can also set a short-circuit time limit T. LIM specify and trigger a shutdown of the terminal to which the PD section 200 is connected if the PD section 200 draws a current of at least I LIM for a period of T LIM In some examples, the PD interface control can then be 100 I PD to I LIM for a period of time less than T LIM control to avoid shutting down the port to which PD section 200 is connected via PSE 202.
[0031] Fig. 4 is a diagram 400 of I PD (Power to the PD section 200 from the PSE 202) over a period of time, including a first switchover from the PSE 202 to the auxiliary power source 204 as the power source for the PD section 200 and a second switchover from the auxiliary power source 204 to the PSE 202 as the power source for the PD section 200, according to some exemplary implementations. As shown, the PD interface controller 100 can allow I PD from the PSE 202 at the operating level (i.e. I DTE ) flows freely, i.e., the PD interface controller 100 can fully turn on switch Q1 until the PD interface controller 100 detects the first switching. The PD interface controller 100 can, at least partially in response to the detection of the first switching, I PDinterrupt to effectively disconnect the PD section 200 from the PSE 202, since the auxiliary power source 204 supplies power to the PD section 200.
[0032] The PD interface control 100 can still I PD interrupt while the auxiliary power source 204 supplies power to the PD section 200. Then, at a later time, the PD interface controller 100 can detect the second switchover from the auxiliary power source 204 to the PSE 202. At least partially in response to the detection of the second switchover, the PD interface controller 100 can PD on I LIM (short-circuit current limit of PSE 202) control for a duration less than T LIM (Short-circuit time limit of the periodic table). As shown, this time duration can be expressed as T LIM - ε can be represented, where ε represents a fixed time interval by which the duration is less than T. LIM If T LIMIf = 6 ms and ε = 0.1 ms, then for example the duration during which the I PD on I LIM The time is regulated to be 5.9 ms. Following this, regarding the control of I PD on I LIM for a period of less than T LIM Can the PD interface control then I PD on I DTE control, similar to before the first switchover.
[0033] Returning to the Fig. 1 and Fig. 2 can be used in some examples before the PD interface control 100 I PD to the operating level (e.g. I DTEDuring the switchover to the PSE 202, the PD interface controller 100 determines whether the buffer capacitor Cd is sufficiently charged if it is not fully charged. In some examples, the PD interface controller 100 can then recognize that a charge level of the buffer capacitor corresponds to at least a threshold charge level, which can be determined as explained in more detail below.
[0034] In other examples, the PD interface controller 100 can detect that the charge level of the buffer capacitor Cd is below the threshold charge level. In these other examples, the PD interface controller 100 can switch off the power converter 206, at least partially in response to the detection that the charge level of the buffer capacitor Cd is below the threshold charge level. After switching off the power converter 206, the PD interface controller 100 can PD on I INRUSH(The inrush current limit of the PD 200) is controlled to charge the buffer capacitor to at least the threshold charge level. The PD interface controller 100 can monitor the charge level, detect that the buffer capacitor's charge level is at least equal to the threshold charge level, and, at least in part as a response to this detection, switch on the power converter.
[0035] As in Fig. As shown in Figure 1, for example, the control circuit 102 of the PD interface controller 100 can control the switch Q1 to I PDto control in various ways. In some examples where the switch is a transistor, the control circuit can derive a control signal that determines a state of the transistor. In one state of the control signal, the switch Q1 cannot conduct (OFF state), thus creating a high resistance on the current path from PSE 202 to PD section 200. The control signal can provide a second state where the switch Q1 can be partially conducting (partially ON state), and the control signal can provide a third state where the switch Q1 is fully conducting (ON state). In the ON state, the switch Q1 creates a low resistance on the current path from the PSE to the PD. In the partially ON state, the control signal can be used to control I PD partially switch on switch Q1, thereby varying the effective resistance of the transistor and thus I PD is varied.
[0036] In some examples, the PSE 202 can be the power source for the PD section 200 during the inrush current stage. In some of these examples, the control circuit 102 can turn on the switch Q1 to supply I PD on I INRUSH to control the charging of the buffer capacitor Cd. After switching on switch Q1, the control circuit 102 can operate the switch to allow I PD free from PSE 202 at I DTE current flows, i.e., the control circuit 102 can fully switch on switch Q1 while monitoring the current flow. The control circuit 102 can later detect a (first) switchover from PSE 202 to the auxiliary power source 204 as the power source for the PD section 200 and, at least partially in response to detecting the switchover from PSE 202 to the auxiliary power source 204, switch off switch Q1 to allow I PD to interrupt.
[0037] In some examples where the auxiliary power source 204 is the power source for the PD section 200, the control circuit 102 can detect a (second) switchover from the auxiliary power source 204 to the PSE 202 as the power source for the PD section 200. At least partially in response to the detection of the switchover from the auxiliary power source 204 to the PSE 202, the control circuit 102 can turn on the switch Q1 to PD to control to a short-circuit current limit level greater than I INRUSH is to charge the buffer capacitor Cd. As described above, this short-circuit current limit level I can LIM (short-circuit current limit of the PSE), and the control circuit 102 can I PD for a period of time less than T LIM (Short-circuit time limit of the PSE) to this level. Following this, the control of I PD on I INRUSH Can the control circuit 102 operate the switch Q1 to allow I PDfrom the PSE 202 flows freely at the operating level (e.g. I DTE ), i.e., the control circuit 102 can fully turn on the switch Q1 while monitoring the current flow.
[0038] Before switch Q1 is activated to I PD to I DTE To control the buffer capacitor, in some examples the control circuit 102 can determine whether the buffer capacitor Cd is sufficiently charged. If it is not fully charged, this can occur when the charge level of the buffer capacitor Cd is at least equal to the threshold charge. The charge level of the buffer capacitor can be detected, and the threshold charge level can be determined in various ways. In some examples, the charge level of the buffer capacitor can be detected by detecting a voltage across switch Q1. If switch Q1 is a transistor, this voltage can be the drain-source voltage, denoted as VDS(on). DSis referred to as. In some of these examples, the threshold voltage can be based on a transistor's on-resistance, such as a specific transistor on-resistance, R. DS(on) , and current to the power converter, I DC-DC , can be determined. In a more specific example, the threshold voltage can be expressed as the product of R DS(on) and I DC-DC (i.e. R DS(on) × I DC-DC ) can be expressed, and the charge level of the buffer capacitor can be at least the threshold voltage if V DS ≤ (R DS(on) × I DC-DC ).
[0039] When the control circuit 102 detects that the charge level of the buffer capacitor Cd is below the threshold charge level, after the time period in which the control circuit 102 has switched on the switch Q1 in order to I PD to control the short-circuit current limit level, which is greater than I INRUSHIf this is the case, the control circuit can switch off the power converter 206, at least partially in response to the detection that the charge level of the buffer capacitor Cd is below the threshold charge level. The control circuit can operate the switch Q1 to PD on I INRUSH to control the charging of the buffer capacitor Cd. The control circuit 102 can monitor the charge level of the buffer capacitor Cd, detect that the charge level corresponds to at least the threshold charge level, and, at least in part as a reaction to the detection that the charge level corresponds to at least the threshold charge level, switch on the power converter 206.
[0040] To further illustrate exemplary implementations of the present revelation, Fig. 5 the PD section 200 of Fig. 2, including in particular the PD interface control 100 of Fig. 1, and furthermore including a pair of 502 rectifiers, according to some exemplary implementations. In the PoE system 300 of Fig. 3. The pair of rectifiers 502 can be coupled to the second PI 304B to provide polarity correction for the power supplied by the PSE 202 via the network cable 302. In this respect, the pair of rectifiers 502 can convert an input voltage of one of two polarities into an output voltage of one of the two polarities. The PD section 200 also includes an input capacitor C1, which can be used for signature recognition during the recognition process, where the PD determines whether it is PoE-compatible.
[0041] In some examples, the control circuit 102 of the PD interface controller 100 can determine whether to connect or disconnect the auxiliary power source 204 from the PD section 200 by detecting the presence of an upper supply rail of the auxiliary power source 204. In some of these examples, as shown, the PD section 200 can include a voltage divider circuit 504 to reduce the upper supply rail of the auxiliary power source to a voltage level that can be detected by the PD interface controller 100. The PD section 200 can further include an OR diode, shown as a high-side OR diode D1, which can prevent a backflow of current to the auxiliary power source 204 when the PD section 200 is powered by the PSE 202.
[0042] As in Fig. As shown in Figure 5, in examples where the PD interface controller 100 detects that the charge level of the buffer capacitor Cd is below the threshold charge level (during the switchover from the auxiliary power source 204 to the PSE 202), the PD interface controller 100 can disable a Power GOOD signal (PGOOD signal) to switch off the power converter 206, and I PDThe inrush current level is controlled to charge the buffer capacitor Cd. In some examples, the power converter 206 can temporarily reduce its power consumption based on the status of an ST signal from the PD interface controller 100. In this respect, the ST signal can be a communication signal to notify the power converter 206 when the auxiliary power source 204 is connected or disconnected. The PD interface controller 100 can monitor the charge level of the buffer capacitor Cd, detect that the charge level of the buffer capacitor Cd is at least equal to the threshold charge level, and activate the PGOOD signal to turn on the power converter.
[0043] Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D and Fig. Section 6E are flowcharts illustrating various steps in a procedure 600 according to some exemplary implementations. The procedure includes detecting a switchover from an auxiliary power source to a power supply device as the power source for a powered device in a Power-over-Ethernet system, as described in block 602 of Fig. 6A. The method includes, at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to the powered device from the power supply unit to a short-circuit current limit for a duration less than a short-circuit time limit, wherein the short-circuit current limit is greater than a starting current limit of the powered device, in order to charge a buffer capacitor of the powered device, as shown in Block 604. The method includes, following the control of the current to the powered device from the power supply unit to the short-circuit current limit for a duration less than the short-circuit time limit, allowing the current to flow freely from the power supply unit to the powered device, as shown in Block 606, e.g.by fully turning on an inline switch, such as Q1.
[0044] In some examples, before the current can flow freely from the power supply device to the powered device at block 606, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than the short-circuit time limit, method 600 includes detecting that a charge level of the buffer capacitor is at least equal to a threshold charge level, as in block 608 of Fig. 6B shown.
[0045] In some examples, before the current can flow freely from the power supply device to the powered device at block 606, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than the short-circuit time limit, method 600 includes detecting that a charge level of the buffer capacitor is below a threshold charge level, as in block 610 of Fig. 6C is shown. In some of these examples, the method includes, at least in part as a response to the detection that the charge level of the buffer capacitor is below the threshold charge level, switching off a power converter of the powered device, as shown in Block 612. The method includes, following the switching off of the power converter of the powered device, controlling the current to a starting inrush current limit of the powered device in order to charge the buffer capacitor, as shown in Block 614. The method includes the detection that the charge level of the buffer capacitor is at least equal to the threshold charge level, as shown in Block 616. The method includes, at least in part as a response to the detection that the charge level of the buffer capacitor is at least equal to the threshold charge level, switching on the power converter, as shown in Block 618.
[0046] In some examples, during an inrush current stage, method 600 includes controlling the current to the starting inrush current limit of the powered device in order to charge the buffer capacitor, as in block 620 of Fig. 6D shown. In some of these examples, the method following to control the current from the power supply device to the powered device to the starting inrush current limit of the powered device includes allowing the current to flow freely from the power supply device to the powered device, as shown in Block 622, for example by fully turning on an inline switch, such as Q 1.
[0047] In some examples, the switching is a second switching, and method 600 includes detecting a first switching from the power supply device to the auxiliary power source as the power source for the powered device, as in block 624 of Fig. 6E shown. In some of these examples, the method includes, at least in part in response to the detection of the first switchover from the power supply unit to the auxiliary power source as the power source for the powered device, interrupting the current to the powered device from the power supply unit, as shown in Block 626.
[0048] As explained above and repeated below, the present disclosure includes, without limitation, the following exemplary implementations.
[0049] Clause 1. An interface control of a powered device comprising: a switch for controlling power to a powered device from a power supply unit which provides power to the powered device via a network cable, wherein the powered device is also designed to receive power from an auxiliary power source; and control circuitry which is designed at least to: detect a switch from the auxiliary power source to the power supply unit as the power source for the powered device;at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the switch to control the current to the powered device from the power supply unit to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge a buffer capacitor of the powered device, this short-circuit current limit being greater than a starting inrush current limit of the powered device; and subsequently controlling the switch to control the current to the powered device from the power supply unit to the short-circuit current limit level for a duration less than a short-circuit time limit, fully opening the switch to allow current to flow from the power supply unit to the powered device.
[0050] Clause 2. The interface control of a powered device according to Clause 1, wherein, before the switch is fully turned on to allow current to flow from the power supply device to the powered device, after the current to the powered device has been controlled from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the control circuit is designed to detect that a charge level of the buffer capacitor corresponds to at least a threshold charge level.
[0051] Clause 3. The interface control of a powered device according to Clause 2, wherein the control circuit is designed to detect that the charge level of the buffer capacitor is at least equal to the threshold charge level in response to a measurement of a voltage drop across the switch.
[0052] Clause 4. The interface control of a powered device according to any one of Clauses 1 to 3, wherein, before the switch is fully turned on to allow current to flow from the power supply device to the powered device, and after the current to the powered device from the power supply device has been reduced to the short-circuit current limit level for a duration less than a short-circuit time limit, the control circuit is designed to: detect that a charge level of the buffer capacitor is below a threshold charge level; or, at least in part in response to the detection that the charge level of the buffer capacitor is below the threshold charge level, turn off a power converter of the powered device.Following the switching off of the power converter, actuation of the switch to control the current from the power supply device to the inrush current limit of the powered device in order to charge the buffer capacitor; detection that the charge level of the buffer capacitor is at least equal to the threshold charge level; and at least partly in response to the detection that the charge level of the buffer capacitor is at least equal to the threshold charge level, switching on the power converter.
[0053] Clause 5. The interface control of a powered device according to any one of Clauses 1 to 4, wherein during an inrush current stage the control circuit is designed to: turn on the switch to control the current from the power supply device to the inrush current limit of the powered device in order to charge the buffer capacitor; and subsequently to control the current from the power supply device to the inrush current limit of the powered device in order to charge the buffer capacitor, fully turn on the switch to allow the current from the power supply device to flow from the power supply device to the powered device.
[0054] Clause 6. The interface control of a powered device according to any one of Clauses 1 to 5, wherein the switching is a second switching and the control circuit is designed to: detect a first switching from the power supply device to the auxiliary power source as the power source for the powered device; and at least in part, in response to the detection of the first switching from the power supply device to the auxiliary power source as the power source for the powered device, turn off the switch to interrupt the current to the powered device from the power supply device.
[0055] Clause 7. A powered device comprising: a power converter for providing a regulated voltage to a load from a power source, wherein the powered device is configured to receive current from a power supply unit which supplies current to the powered device via a network cable, wherein the powered device is further configured to receive current from an auxiliary power source; a buffer capacitor coupled to an input of the power converter; and an interface controller of a powered device for controlling the current to the powered device from the power supply unit, wherein the interface controller of the powered device includes at least the following: detecting a switch from the auxiliary power source to the power supply unit as the power source for the powered device;at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge the buffer capacitor, the short-circuit current limit being greater than a starting inrush current limit of the powered device; and subsequently controlling the current to the short-circuit current limit level for a duration less than the short-circuit time limit, allowing the current to flow freely from the power supply unit to the powered device.
[0056] Clause 8. The powered device according to Clause 7, wherein, before the interface control of the powered device allows the current to flow freely from the power supply unit to the powered device, after the control of the current to the powered device from the power supply unit to the short-circuit current limit level, for a duration less than a short-circuit time limit, the interface control of the powered device is designed to detect that a charge level of the buffer capacitor corresponds to at least a threshold charge level.
[0057] Clause 9. The powered device according to Clause 8, wherein the interface control of the powered device is designed to detect that the charge level of the buffer capacitor is at least equal to the threshold charge level, in response to a measurement of a voltage drop across a switch.
[0058] Clause 10. The powered device according to any one of Clauses 7 to 9, wherein, before the interface control of the powered device allows current to flow freely from the power supply unit to the powered device, after the control of the current to the powered device from the power supply unit to the short-circuit current limit level, for a duration less than a short-circuit time limit, the interface control of the powered device is designed to: detect that a charge level of the buffer capacitor is below a threshold charge level; at least in part in response to the detection that the charge level of the buffer capacitor is below the threshold charge level, switch off the power converter of the powered device;Following the switching off of the power converter of the powered device, the current from the power supply unit is controlled to the starting inrush current limit of the powered device in order to charge the buffer capacitor; it is detected that the charge level of the buffer capacitor is at least equal to the threshold charge level; and at least in part in response to the detection that the charge level of the buffer capacitor is at least equal to the threshold charge level, the power converter is switched on.
[0059] Clause 11. The powered device according to any one of Clauses 7 to 10, wherein during an inrush current stage the interface control of the powered device is designed to: control the current from the power supply device to the powered device to the inrush current limit of the powered device in order to charge the buffer capacitor; and subsequently to control the current from the power supply device to the powered device to the inrush current limit of the powered device in order to charge the buffer capacitor, allowing the current to flow freely from the power supply device to the powered device.
[0060] Clause 12. The powered device according to any of Clauses 7 to 11, wherein the switching is a second switching and the interface control of the powered device is designed to: detect a first switching from the power supply device to the auxiliary power source as the power source for the powered device; and at least partially in response to the detection of the first switching from the power supply device to the auxiliary power source as the power source for the powered device, interrupt the power to the powered device from the power supply device.
[0061] Clause 13. A method comprising: detecting a switch from an auxiliary power source to a power supply unit as the power source for a powered device in a Power-over-Ethernet system; at least in part in response to the detection of the switch from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to the powered device from the power supply unit to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge a buffer capacitor of the powered device, wherein the short-circuit current limit is greater than a starting inrush current limit of the powered device;and subsequently to control the current to the supplied device from the power supply unit to the short-circuit current limit level for a period of time less than a short-circuit time limit, allowing the current to flow freely from the power supply unit to the supplied device.
[0062] Clause 14. The procedure according to Clause 13, wherein, before allowing the current to flow freely from the power supply device to the powered device, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the procedure includes detecting that a charge level of the buffer capacitor is at least equal to a threshold charge level.
[0063] Clause 15. The procedure according to Clause 14, wherein the charge level of the buffer capacitor is at least equal to the threshold charge level and is detected in response to a measurement of a voltage drop across a switch.
[0064] Clause 16. The procedure according to any one of Clauses 13 to 15, wherein, before allowing current to flow freely from the power supply device to the fed device, after controlling the current to the fed device from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the procedure comprises: detecting that a charge level of the buffer capacitor is below a threshold charge level; at least in part in response to detecting that the charge level of the buffer capacitor is below the threshold charge level, switching off a power transformer of the fed device; after switching off the power transformer of the fed device, controlling the current to the starting inrush current limit of the fed device in order to charge the buffer capacitor;Detect that the charge level of the buffer capacitor is at least equal to the threshold charge level; and, at least in part as a reaction to the detection that the charge level of the buffer capacitor is at least equal to the threshold charge level, switch on the power converter.
[0065] Clause 17. The method according to any one of Clauses 13 to 16, wherein, during an inrush current stage, the method comprises: controlling the current from the power supply device to the powered device to the inrush current limit of the powered device in order to charge the buffer capacitor; and subsequently, to control the current from the power supply device to the powered device to the inrush current limit of the powered device in order to charge the buffer capacitor, allowing the current to flow freely from the power supply device to the powered device.
[0066] Clause 18. The method according to any one of Clauses 13 to 17, wherein the switching is a second switching, and the method comprises: detecting a first switching from the power supply device to the auxiliary power source as the power source for the powered device; and at least in part in response to detecting the first switching from the power supply device to the auxiliary power source as the power source for the powered device, interrupting the power to the powered device from the power supply device.
[0067] Experts in the field relating to the disclosure will be able to think of many modifications and other implementations of the disclosure set forth herein that incorporate the advantages of the teachings set forth in the foregoing description and the accompanying figures. It is therefore understood that the disclosure is not intended to be limited to the specific implementations disclosed and that modifications and other implementations are intended to fall within the scope of protection of the accompanying claims. Although the foregoing description and the accompanying figures describe exemplary implementations in the context of certain exemplary combinations of elements and / or functions, it is further understood that alternative implementations can provide other combinations of elements and / or functions without deviating from the scope of protection of the accompanying claims.In this respect, other combinations of elements and / or functions than those explicitly described above are conceivable, as can be demonstrated in some of the accompanying claims. Although specific terms are used herein, they are used only in a general and descriptive sense and not for the purpose of limitation. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] US 63 / 525,815
[0001] US 18 / 404,554
[0001] Cited non-patent literature
[0000] Change-Over from Auxiliary Power in a Power over Ethernet System, eingereicht am 10. Juli 2023
[0001]
Claims
[1] Interface control of a powered device, comprising: a switch for controlling the current to a powered device from a power supply unit that supplies power to the powered device via a network cable, wherein the powered device is also designed to receive power from an auxiliary power source; and Control circuit designed to at least: Detecting a switch from the auxiliary power source to the power supply unit as the power source for the powered device; at least in part as a reaction to the detection of the switch from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the switch to supply current to the powered device from the to control the power supply device to a short-circuit current limit level for a duration less than a Short-circuit time limit to charge a buffer capacitor of the powered device, wherein this short-circuit current limit is greater than a starting inrush current limit of the powered device; and Following the control of the switch to control the current to the supplied device from the power supply unit to the short-circuit current limit level for a period of time less than a short-circuit time limit, complete switching on of the switch, to enable the electricity from the Power supply to the powered device flows. [2] Interface control of a powered device according to claim 1, wherein, before the switch is fully turned on to allow the current to flow from the power supply device to the powered device, after the current to the powered device has been controlled from the power supply device to the short-circuit current limit level for a period of time which is less than a short-circuit time limit, the control circuit is designed to detect that a charge level of the buffer capacitor corresponds to at least a threshold charge level. [3] Interface control of a powered device according to claim 2, wherein the control circuit is designed to detect that the charge level of the buffer capacitor is at least equal to the threshold charge level in response to a measurement of a voltage drop across the switch. [4] Interface control of a powered device according to claim 1, wherein, before the switch is fully turned on to allow current to flow from the power supply device to the powered device, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the control circuit is designed to: Detect that the charge level of the buffer capacitor is below the threshold charge level; at least partly in response to the detection that the charge level of the buffer capacitor is below the threshold charge level, switching off a power converter of the powered device; following the switching off of the power converter, actuation of the switch, to control the current from the power supply unit to the starting inrush current limit of the powered device in order to charge the buffer capacitor; Recognize that the charge level of the buffer capacitor is at least equal to the threshold charge level; and at least partly in response to the recognition that the charge level of the buffer capacitor corresponds at least to the threshold charge level, Switching on the power converter. [5] Interface control of a powered device according to claim 1, wherein during an inrush current stage the control circuit is designed to: Turning on the switch to cut off the power from the The power supply unit is controlled to the inrush current limit of the powered device in order to charge the buffer capacitor; and Following this, to control the current from the power supply unit to the starting current limit of the powered device in order to charge the buffer capacitor, the switch is fully turned on to allow the current to flow from the power supply unit to the powered device. [6] Interface control of a powered device according to claim 1, wherein the switching is a second switching, and the control circuit is designed to: Detecting an initial switchover from the power supply unit to the auxiliary power source as the power source for the powered device; and at least in part as a reaction to the detection of the first switchover from the power supply unit to the auxiliary power source as the power source for the powered device, switching off the switch to interrupt the current to the powered device from the power supply unit. [7] Powered device comprising: a power converter for providing a regulated voltage to a load from a power source, wherein the powered device is designed to receive power from a power supply unit which supplies power to the powered device via a network cable, wherein the powered device is further designed to receive power from an auxiliary power source; a buffer capacitor coupled to an input of the power converter; and an interface control of a powered device for controlling the current to the powered device from the power supply unit, wherein the interface control of a powered device includes at least the following: Detecting a switch from the auxiliary power source to the power supply unit as the power source for the powered device; at least partly in response to the detection of the switch from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to a Short-circuit current limit level for a duration less than a short-circuit time limit to charge the buffer capacitor, wherein the short-circuit current limit is greater than a starting current limit of the powered device; and Following the control of the current to the short-circuit current limit level for a period of time less than the short-circuit time limit, allow the current to flow freely from the power supply device to the supplied device. [8] Powered device according to claim 7, wherein before the interface control of the powered device allows the current to flow freely from the power supply unit to the powered device, after the control of the current to the powered device from the power supply unit to the short-circuit current limit level, for a duration which is less than a short-circuit time limit, the interface control of the powered device is designed to detect that a charge level of the buffer capacitor corresponds to at least a threshold charge level. [9] Powered device according to claim 8, wherein the interface control of the powered device is designed to detect that the charge level of the buffer capacitor is at least equal to the threshold charge level in response to a measurement of a voltage drop across a switch. [10] Powered device according to claim 7, wherein, before the interface control of the powered device allows the current to flow freely from the power supply unit to the powered device, after the control of the current to the powered device from the power supply unit to the short-circuit current limit level, for a duration that is less than a short-circuit time limit, the interface control of the powered device is designed to: Detect that the charge level of the buffer capacitor is below the threshold charge level; at least partly in response to the detection that the charge level of the buffer capacitor is below the threshold charge level, switching off the power converter of the powered device; Following the switching off of the power converter of the powered device, the current from the power supply unit is controlled to the starting current limit of the powered device in order to charge the buffer capacitor; Recognize that the charge level of the buffer capacitor is at least equal to the threshold charge level; and at least partly in response to the recognition that the charge level of the buffer capacitor corresponds at least to the threshold charge level, Switching on the power converter. [11] Powered device according to claim 7, wherein during an inrush current stage the interface control of the powered device is designed to: Controlling the current from the power supply unit to the powered device to the starting current limit of the powered device in order to charge the buffer capacitor; and Subsequently, to control the current from the power supply unit to the powered device at the inrush current limit of the powered device, in order to charge the buffer capacitor, enable, that the current can flow freely from the power supply unit to the powered device. [12] Powered device according to claim 7, wherein the switching is a second switching and the interface control of a powered device is designed to: Detecting an initial switchover from the power supply unit to the auxiliary power source as the power source for the powered device; and at least in part as a reaction to the detection of the first switch from the power supply unit to the auxiliary power source as the power source for the powered device, interrupting the current to the powered device from the power supply unit. [13] Procedure that includes: Detecting a switch from an auxiliary power source to a power supply unit as the power source for a powered device in a Power-over-Ethernet system; at least in part in response to the detection of the switchover from the auxiliary power source to the power supply unit as the power source for the powered device, controlling the current to the powered device from the power supply unit to a short-circuit current limit level for a duration less than a short-circuit time limit in order to charge a buffer capacitor of the powered device, wherein the short-circuit current limit is greater than a starting current limit of the powered device; and Subsequently, to control the current to the supplied device from the power supply unit to the short-circuit current limit level for a duration that is less than a short-circuit time limit, enable, that the current can flow freely from the power supply unit to the powered device. [14] Method according to claim 13, wherein, before enabling the current to flow freely from the power supply device to the powered device, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the method comprises detecting that a charge level of the buffer capacitor corresponds to at least a threshold charge level. [15] Method according to claim 14, wherein the charge level of the buffer capacitor is at least equal to the threshold charge level and is detected in response to a measurement of a voltage drop across a switch. [16] The method of claim 13, wherein, before enabling the current to flow freely from the power supply device to the powered device, after controlling the current to the powered device from the power supply device to the short-circuit current limit level for a duration less than a short-circuit time limit, the method comprises: Detect that the charge level of the buffer capacitor is below the threshold charge level; at least partly in response to the detection that the charge level of the buffer capacitor is below the threshold charge level, switching off a power converter of the powered device; after switching off the power converter of the powered device, Controlling the current to the starting inrush current limit of the powered device in order to charge the buffer capacitor; Recognize that the charge level of the buffer capacitor is at least equal to the threshold charge level; and at least partly in response to the recognition that the charge level of the buffer capacitor corresponds at least to the threshold charge level, Switching on the power converter. [17] Method according to claim 13, wherein during an inrush current stage the method comprises: Controlling the current from the power supply unit to the powered device to the starting current limit of the powered device in order to charge the buffer capacitor; and The following measures are taken to control the current from the power supply unit to the powered device, limiting the inrush current of the powered device to charge the buffer capacitor, and to allow the current to flow freely from the power supply unit to the powered device. [18] The method of claim 13, wherein the switching is a second switching, and the method comprises: Detecting an initial switchover from the power supply unit to the auxiliary power source as the power source for the powered device; and at least in part as a reaction to the detection of the first switch from the power supply unit to the auxiliary power source as the power source for the powered device, interrupting the current to the powered device from the power supply unit.
Citation Information
Patent Citations
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