METHOD FOR RUNNING A SIMULATION ON A REAL PROCESSOR

Description

[0001] The invention relates to a method for performing a simulation on a real processor of a first processor type, wherein the simulation comprises at least one simulation model compiled for the first processor type.

[0002] A virtual electronic control unit (V-ECU) is software that simulates a real ECU or part of a real ECU in a simulation scenario. Different V-ECU versions cover a wide range of variations – from very simple versions to a complete version that includes all components of a real ECU. In a simplified model, a V-ECU might contain only a single application software component, abstracting away the various underlying layers of the operating system and drivers. In a more complex version, the V-ECU contains several interconnected software components, such as the complete functionality of an ECU. In the automotive sector, this includes, for example, the AUTOSAR Runtime Environment (RTE) and the operating system for realistic task scheduling.If needed, selected software components can be added to simulate bus communication or NVRAM. A virtual ECU (V-ECU) becomes even more realistic when the actual base software code used in production code is added. A V-ECU thus contains components of application and base software and therefore offers functionalities comparable to those of real ECUs. It is used, for example, for validation during computer-based simulation.

[0003] Since the use of a virtual ECU (V-ECU) does not involve working with actual control unit hardware, the simulation can be performed faster than real time, making the analysis of the simulated control unit very time-saving and convenient. Software-in-the-loop testing (SIL testing) in computer-based simulations allows for the simulation and testing of software functions, V-ECUs, or complete V-ECU networks.

[0004] The software development process for classic automotive applications, such as powertrain or braking systems, as well as e-drive applications and autonomous driving functions, can be significantly accelerated using SIL testing through virtual testing and validation. This allows a DUT (device under test) to be conveniently simulated on a computer, connected to physically based models, and test scripts to be easily reused later on hardware-in-the-loop (HIL) systems.

[0005] For SIL testing, complex simulation systems are typically created. The models for such a simulation system can be compiled in binary format or exist as code to be compiled. Especially in the area of ​​software validation, the software can be in both forms. In the first case, the models are processor- and operating system-specific. In the second case, the models are generally more flexible in this respect, but this type of deployment is not always available for various reasons. An emulator can emulate any processor code if a corresponding processor model is available. However, emulation is significantly slower than native execution of instructions on the target processor. Once the binary code for the processor is compiled, the software can be run on a virtual machine.Once the binary code for the processor and operating system of the simulator is compiled, it can be executed directly on the computer without virtualization.

[0006] The Wikipedia page "Virtualization" (https: / / en.wikipedia.org / wiki / Virtualization) describes the creation of a virtual version of hardware platforms, storage devices, or network resources. It explains that virtualization makes it possible to run multiple operating systems simultaneously on a single physical system. This is achieved using hypervisors or virtual machine monitors (VMMs), which act as intermediaries between the hardware and the virtual machines. The page discusses various types of virtualization (e.g., hardware, storage, and network virtualization) and their advantages, such as improved resource utilization and flexibility. Historical developments, application examples, and security aspects are also briefly covered.

[0007] The Wikipedia page "QEMU" (https: / / en.wikipedia.org / wiki / QEMU) describes QEMU as a free and open-source emulator and virtualizer. It allows programs and entire operating systems designed for one CPU architecture to run on another, such as ARM on x86. QEMU supports both system emulation (complete machines) and user-mode emulation (individual programs). In combination with KVM on Linux, QEMU can also provide hardware-assisted virtualization at near-native speed. It is often used for developing, testing, and operating virtual machines. QEMU is cross-platform, supports snapshots, device emulation, network and storage emulation, and is actively developed.

[0008] The ArchWiki page "QEMU" (https: / / wiki.archlinux.org / title / QEMU) provides a guide to installing and using QEMU on Arch Linux. QEMU is a free emulator and virtualizer that supports various architectures. The page describes setting up QEMU with or without KVM (for hardware virtualization), configuring virtual machines (including networking, drives, and graphics output), and offers tips for performance optimization. It also covers advanced scenarios such as using UEFI, PCI passthrough, and integration with virt-manager. Numerous command examples and links to related tools complete this practical guide. The page is intended for advanced Linux users.

[0009] The purpose of the invention is to provide great flexibility in the selection of models as well as in the selection of the target platform for the simulation, and to achieve a working configuration in an efficient manner.

[0010] This problem is solved by the subject matter of claim 1. Preferred embodiments are found in the dependent claims.

[0011] According to the invention, a method for performing a simulation on a real processor of a first processor type is provided, wherein the simulation comprises at least one simulation model compiled for the first processor type, with the following method step: Execution of the simulation model compiled for the first processor type on the real processor of the first processor type as an emulation of the processor of the first processor type, characterized in that the execution of a simulation model compiled for a specific processor type on an emulated processor of the corresponding processor type is achieved by starting a simulation run with an emulation for one of the available processor types present on the processor and, if this simulation run cannot be completed successfully, switching to a simulation run with an emulation for another processor type until a simulation run has been successfully completed.

[0012] A key aspect of the invention is that the simulation initially provides processor emulation for all models, including, in particular, a simulation model compiled for the processor type of the real processor. This differs from the conventional approach, where, for example, in a SIL simulation, code is typically compiled to match the SIL simulator. The invention deliberately accepts that the method described above makes the SIL simulator somewhat more complex. However, the advantage of the invention lies in its significant flexibility in both the selection of models and the selection of the simulation's target platform. A user of the inventive method can, for example, choose a specific target architecture for the simulator in a cloud application if it best suits their requirements, without having to consider other compatibilities.At least the initial execution of the models in an emulation ensures that the simulation can be carried out correctly, even if it is not optimal for the execution speed.

[0013] Furthermore, this method allows the binaries in the emulator to be run on different processor models, enabling the processor type to be determined through error-free simulation runs. The invention stipulates that initially all models are run with a single emulator. This allows all target systems for which a processor model exists to be simulated. Whether the processor model actually exists can thus be easily determined. This relieves the user of configuration tasks. While in conventional methods the processor model was implicitly predetermined by the simulator, it is now possible to determine existing compatibility in a simple and reliable manner, particularly if it is not explicitly stated or available.

[0014] According to a preferred further development, it is now provided that the simulation includes at least one simulation model compiled for a second processor type different from the first processor type, with the following procedure step: execution of the simulation model compiled for the second processor type on the real processor of the first processor type as an emulation of the processor of the second processor type.

[0015] This embodiment of the invention takes into account the situation that the simulation may include at least one simulation model compiled for a second processor type different from the first. In this case, emulation of a processor of the second processor type on the real processor is necessary to enable execution of the simulation model compiled for the second processor type on the real processor. While here, executing the simulation model necessarily requires emulation of a processor of the processor type for which the simulation model is compiled on the real processor, this would not be the case in the situation described at the outset. There, the simulation includes a simulation model compiled for the first processor type, so that emulation would not actually be required.In other words, according to the invention, regardless of the processor type for which a simulation model is compiled, at least initially, an emulation of the corresponding processor type always takes place on the real processor, even if the emulated processor type matches the processor type of the real processor. To make the method particularly efficient, preferably, at least initially, no check is performed at all, or the processor type for which the simulation model is compiled matches the processor type of the real processor.

[0016] When the text refers to at least an initial execution of the models in an emulation, and when it states that, at least initially, an emulation of the corresponding processor type on the real processor always takes place, even if the emulated processor type matches the processor type of the real processor, and that preferably, at least initially, no check is made at all as to whether the processor type for which the simulation model is compiled matches the processor type of the real processor, this means that this applies at the beginning of the procedure, i.e., at least for a first simulation run. As explained below, however, it is sometimes possible to dispense with the emulation in question in subsequent simulation runs.

[0017] From this perspective, a preferred embodiment of the invention provides that, after executing the simulation model compiled for the first processor type on the processor of the first processor type as an emulation thereof, the following steps are carried out: Running such simulation models of the simulation on a virtual machine of the real processor, which are compiled for the processor type of the real processor but not for the operating system of the real processor, as well as running such simulation models of the simulation on the real processor without emulation, which are compiled for the processor type of the real processor as well as for the operating system of the real processor.

[0018] In this preferred embodiment of the invention, existing hardware is used more efficiently without requiring any changes to the simulation system. As a result, two use cases can be easily addressed: scalable use of general-purpose hardware and efficient utilization of specialized hardware. In particular, outside of cloud applications, the same simulation can run as usual as a compiled file directly on a computer, thus fulfilling debugging requirements without additional obstacles.

[0019] Furthermore, according to a preferred embodiment of the invention, the simulation determines which simulation model requires the most time to execute and identifies the processor type for which this simulation model is compiled. Preferably, the subsequent process automatically switches to the determined processor type.

[0020] This allows the best hardware to be suggested for each model. The models can also contain unknown binaries, as described previously. Through simulation, the simulator can identify which model is the bottleneck in the computation and whether emulation is currently being performed for that model, meaning that faster execution would be possible without such emulation.

[0021] The invention will now be explained in more detail using a preferred embodiment and with reference to the drawing.

[0022] The drawing shows Fig. 1 schematically a method according to a preferred embodiment of the invention.

[0023] According to the in Fig. 1 In the illustrated preferred embodiment of the invention, an overall system is provided that comprises four different simulation models. The sub-models of the overall system are compiled for different processor types. This is shown in Fig. 1 shown schematically under a): Three V-ECU models are provided, in Fig. 1 Designated V-ECU 1, V-ECU 2, and V-ECU 3, these are compiled for ARM / QNX (processor model: ARM / operating system: QNX), x64 / QNX (processor model: x64 / operating system: QNX), and x86 / Windows (processor model: x86 / operating system: Windows), respectively. Additionally, a Plant model is planned, compiled for x64 / Ubuntu (processor model: x64 / operating system: Ubuntu).

[0024] Under b) is in Fig. 1 It is shown that the simulation system runs on a simulator within an x64 / Ubuntu system, whereby in the first simulation run all four models are operated under an emulation of their respective processor model, as indicated by the abbreviation "em." for all four models. This is the realization of the essential feature of the invention, namely that, regardless of the processor type for which a simulation model is compiled, the invention always performs, at least initially, an emulation of the corresponding processor type on the real processor, even if the emulated processor type matches the processor type of the real processor.

[0025] The current situation is that, in principle, all models except the one created for x64 / Ubuntu must run in an emulation, since the simulation system runs on a simulator within an x64 / Ubuntu system. Therefore, the x64 / Ubuntu model could run more efficiently directly, without emulation. To enable this after the process has started, i.e., after the first simulation run, the following procedure is used: a simulation run is started using an emulation for one of the available processor types that is available on the processor. If this simulation run cannot be completed successfully, the process switches to a simulation run using an emulation for a different processor type until a simulation run is successfully completed—in this case, until it has been determined that the Plant model has been compiled for 64 / Ubuntu.The Plant model can therefore run directly (of course) on the real processor without emulation, which is in . Fig. 1 is marked with "nat.".

[0026] The V-ECU 2 model occupies a special position: While it is compiled for the processor type of the real processor, it is not compiled for the operating system of the real processor. In this situation, more efficient operation can be achieved by running this model under emulation on a virtual machine (VM) of the real processor, here designated with "em. / VM".

[0027] According to a preferred embodiment of the invention, it is also possible for the simulator to suggest optimal hardware with respect to the models. The models can also contain unknown binaries, as described above. Through the simulation, the simulator can determine which model represents the bottleneck in the computation and whether this model is emulated or not, and thus potentially executed faster.

[0028] For example, this is the case when the simulator detects that a simulation system consists of 3 models for an ARM processor, 4 freely compiled models, and 5 models for an x64 processor. If, as described previously, it is determined that the models compiled for the ARM processor represent the computational bottleneck, but the simulation is running on an x64 system, an automated output can be generated indicating that using ARM hardware in the cloud would be more efficient than the currently used x64 hardware.

[0029] A key advantage of the invention is that the processor emulation of the models, which is always performed initially and therefore standard, enables hardware-independent simulation, while allowing hardware and operating system requirements to be used without further configuration of the simulation model. Since a user of the invention does not have to decide in advance whether they require high flexibility or high efficiency, different user interests can be met simultaneously.

Claims

1. Method for executing a simulation on a real processor of a first processor type, wherein the simulation comprises at least one simulation model which is compiled for the first processor type, with the following method step: executing the simulation model compiled for the first processor type on the real processor of the first processor type as emulation of the processor of the first processor type, characterised in that the execution of a simulation model compiled for a specific processor type on an emulated processor of the corresponding processor type is achieved by starting a simulation run with an emulation present on the processor for one of the available processor types and, if this simulation run cannot be successfully completed, switching to a simulation run with an emulation for another processor type until a simulation run has been successfully completed.

2. Method according to claim 1, wherein the simulation comprises at least one simulation model which is compiled for a second processor type different from the first processor type, with the following method step: executing the simulation model compiled for the second processor type on the real processor of the first processor type as emulation of the processor of the second processor type.

3. Method according to claim 1 or 2, wherein, after executing the simulation model compiled for the first processor type on the real processor of the first processor type as emulation of the processor of the first processor type, the following steps are performed: executing such simulation models of the simulation on a virtual machine of the real processor, which are compiled for the processor type of the real processor but not for the operating system of the real processor, and executing such simulation models of the simulation on the real processor without emulation, which are compiled for the processor type of the real processor and for the operating system of the real processor.

4. Method according to one of the preceding claims, wherein the simulation determines which simulation model requires the most time for execution, and determines for which processor type this simulation model is compiled.

5. Method according to claim 4, wherein for the further method subsequently the system automatically switches to the determined processor type.