SACRIFICE CACHE WITH SUPPORT FOR EMPTYING WRITE MISS ENTRY ENTRIES
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- TEXAS INSTRUMENTS INC
- Filing Date
- 2020-05-26
- Publication Date
- 2026-05-13
AI Technical Summary
Existing cache systems face challenges in maintaining high performance while ensuring fault tolerance due to the introduction of timing overhead from error correcting codes (ECC) and susceptibility to data corruption from cosmic rays or malicious memory accesses, particularly in critical systems like self-driving vehicles.
Implementing a caching system with a first and second sub-cache configuration, where the second sub-cache stores write-miss data and includes line type bits and an eviction controller to manage write-miss data, allowing for efficient data handling and conflict resolution.
Enhances cache performance and fault tolerance by optimizing data storage and eviction strategies, reducing latency and improving overall system reliability in fault-intolerant environments.