POWER DISTRIBUTION FROM THE LOAD POINT WITH COOLING

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to power distribution, and more particularly, to power distribution from a point-of-load (POL) with cooling.BACKGROUND

[0002] As ASIC (Application-Specific integrated Circuit) process nodes advance and device power continues to increase, delivering requisite power is becoming more challenging. Higher power distribution also presents additional thermal challenges.

[0003] US 2003 / 147225 discloses a technique of, and a system for conditioning power for a consuming device. In this regard, a power conditioning module, affixed to an integrated circuit device, conditions power to be applied to the integrated circuit device. The power conditioning module includes a semiconductor substrate having a first interface and a second interface wherein the first interface opposes the second interface. The power conditioning module further includes a plurality of interface vias, to provide electrical connection between the first interface and the second interface, and a first set of pads, disposed on the first interface and a second set of pads disposed on the second interface. Each of the pads is connected to a corresponding one of the interface vias on either the first or second interface. The power conditioning module also includes electrical circuitry, disposed within semiconductor substrate, to condition the power to be applied to the integrated circuit device. The electrical circuitry may be disposed on the first interface, the second interface, or both interfaces. Moreover, the electrical circuitry includes at least one voltage regulator and at least one capacitor.

[0004] US 5901040 discloses a heat sink assembly for the removal of heat from semiconductor and power converter modules. The packaging design for semiconductor modules and power converter modules provides efficient heat removal and a tight Faraday Cage. There is a heat transfer layer sandwiched between a CPU module and a power converter module. The heat sink assembly includes a heat transfer layer, a fin stack, and a series of heat pipes. The heat transfer layer has a slot for passage of power cables and sense lines which connects both the CPU module and the power converter module, and the power converter module and the printed circuit board. The heat sink chamber also serves as a Faraday Cage and thus attenuates EMI from the semiconductor module, the power converter module, the power cables, and the sense lines.

[0005] US 6285550 discloses a compact sub cooling method and apparatus arranged for simultaneously sub cooling both a processor and it companion voltage regulator for enhanced performance. A preferred embodiment of the invention provides for advantageous arrangement of the voltage regulator and memory proximate to the processor for high speed operation. In a preferred embodiment, a circuit board arrangement includes a processor requiring at least one bias voltage, and further includes a companion voltage regulator for providing the bias voltage. The voltage regulator is arranged sufficiently proximate to the processor, so as to limit inductance of electrical coupling therebetween. In a preferred embodiment, a piggy-back design is utilized, wherein the voltage regulator is stacked on top of the processor. Furthermore, a sub cooling module is utilized to simultaneously sub cool both the processor and the voltage regulator below ambient temperature, thereby potentially enhancing the performance of both components. In a preferred embodiment, an evaporator module is sandwiched between the voltage regulator and processor, and the evaporator module interoperates with a compressor and condenser to accomplish sub cooling of the voltage regulator and processor components.

[0006] US 5053920 discloses a three-dimensional integrated power distribution and regulation apparatus for providing regulated power to a plurality of chips mounted on a module. The apparatus has a busbar mounted on the module, this busbar receiving high voltage power as an input. A plurality of power regulators are mounted on the busbar and are electrically coupled to this busbar. The power regulators are point-of-load regulators that receive high voltage power as an input and produce regulated power to the busbar. The busbar is electrically coupled to the chips and provides the chips with the regulated power. Heat and losses are reduced since the power regulators are mounted on the module, close to the chips themselves.BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram illustrating an example of power distribution through Point-of-Load (POL) modules. Figure 2 is a schematic perspective of the POL modules and a cold plate comprising power delivery blocks with power vias for delivery of power from the POL modules, in accordance with one embodiment. Figure 3 is a schematic perspective of the POL modules and cold plate of Figure 2 with a substrate and die package interposed between two cold plates, in accordance with one embodiment. Figure 4 is a cross-sectional schematic of the components shown in Figure 3 illustrating additional detail, in accordance with one embodiment. Figure 5 schematically illustrates components of Figure 4 attached to the cold plate of Figure 2, in accordance with one embodiment. Figure 6 illustrates control plane communications transmitted through the POL module and the cold plate, in accordance with one embodiment. Figure 7 illustrates control plane communications transmitted through one of the power delivery blocks in the cold plate, independent from the POL module, in accordance with another embodiment. Figure 8 illustrates optics transmitted through the cold plate, in accordance with one embodiment. Figure 9 illustrates details of the power delivery block, in accordance with one embodiment. Figure 10 is a flowchart illustrating an overview of a process for implementing a power distribution system for delivering power from the POL module through the cold plate, in accordance with one embodiment. Figure 11 is a side view illustrating an example of a temperature distribution through the cold plates, in accordance with one embodiment. Figure 12 is a plan view of the cold plate and power delivery blocks in accordance with one embodiment. Figure 13 is a schematic perspective of a cold plate with regulated POL modules inserted into the cold plate, in accordance with one embodiment.

[0008] Corresponding reference characters indicate corresponding parts throughout the several views of the drawings.DESCRIPTION OF EXAMPLE EMBODIMENTS Overview

[0009] The invention is set out in the independent claim and preferred features are set out in the dependent claims.

[0010] According to the invention, an apparatus generally comprises a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.

[0011] In one or more embodiments, the cold plate comprises a plurality of electrical paths for transmitting power from the power component to the integrated circuit.

[0012] In one or more embodiments, the power component comprises a regulated point-of-load (POL) module interconnected with a fixed POL module via an electrical connection.

[0013] In one or more embodiments, the substrate and the integrated circuit comprise a multi-chip module.

[0014] In one or more embodiments, the integrated circuit comprises an ASIC (Application-Specific Integrated Circuit) operable to perform network processing functions.

[0015] In one or more embodiments, the apparatus further comprises a second cold plate and a thermal interposer positioned between the second cold plate and the integrated circuit.

[0016] In one or more embodiments, the cold plate comprises a power delivery block inserted into the cold plate, the electrical path extending through the power delivery block.

[0017] In one or more embodiments, the power delivery block comprises a printed circuit board and the electrical path comprises a power via formed in the printed circuit board.

[0018] In one or more embodiments, the power is transmitted through the power via at a current of at least 10 amps.

[0019] In one or more embodiments, the cold plate comprises a plurality of printed circuit boards inserted into the cold plate, each of the printed circuit boards comprising at least one power via forming the electrical path.

[0020] In one or more embodiments, the power component is configured for receiving pulse power.

[0021] In one or more embodiments, at least one component on the substrate is coupled to fiber and copper connections.

[0022] In one or more embodiments, the cold plate further comprises a communication path for transmitting communications through the cold plate.

[0023] According to the invention, at least one photonic chip is attached to the same side of the substrate as the integrated circuit and the cold plate further comprises an opening for transmitting optics through the cold plate.

[0024] In one or more embodiments, the cold plate comprises a multi-phase cold plate.

[0025] In one or more embodiments, the power component comprises a fixed point-of-load (POL) module and the electrical path comprises a regulated POL module located within the cold plate and coupled to the fixed POL module for delivering the power from the fixed POL module to the integrated circuit.

[0026] In another embodiment, an apparatus generally comprises a point-of-load (POL) power supply comprising a fixed POL interconnected with a regulated POL electrically coupled with a substrate and die package, and a cold plate interposed between the regulated POL and the substrate and die package. Power is transmitted from the regulated POL to the substrate and die package through the cold plate.

[0027] In another embodiment, an apparatus generally comprises a cold plate comprising an upper surface configured for receiving a point-of-load (POL) module and a lower surface configured for attachment to a substrate having at least one die attached thereto, and a power delivery block inserted into the cold plate and comprising at least one power via for delivering power from the POL module to the die attached to the substrate.

[0028] A method, which does not form part of the claimed invention, generally comprises inserting a power delivery block into a cold plate, the power delivery block comprising an electrical path extending from a first surface of the cold plate to a second surface of the cold plate, attaching a point-of-load (POL) module to the first surface of the cold plate, and attaching a substrate to the second surface of the cold plate, wherein a die is attached to an opposite side of the substrate. Power is distributed from the POL module to the die through the power delivery block in the cold plate.

[0029] Further understanding of the features and advantages of the embodiments described herein may be realized by reference to the remaining portions of the specification and the attached drawings.Example Embodiments

[0030] The following description is presented to enable one of ordinary skill in the art to make and use the embodiments. Descriptions of specific embodiments and applications are provided only as examples, and various modifications will be readily apparent to those skilled in the art. Thus, the embodiments are not to be limited to those shown, and the invention is only limited by the scope of the appended claims. For purpose of clarity, details relating to technical material that is known in the technical fields related to the embodiments have not been described in detail.

[0031] A power distribution system may be configured to deliver power from a point-of-load (POL) to an ASIC (Application-Specific Integrated Circuit) or other integrated circuit. As power requirements increase, additional thermal considerations may be needed. In package optic applications may present additional challenges. For example, fiber and copper attachments (FAU (Fiber Attachment (Array) Unit), CAU (Copper Attachment (Array) Unit)) may introduce clearance requirements impacting cooling solutions.

[0032] The embodiments described herein provide a power delivery and cooling arrangement with a substrate positioned adjacent to one side of a cold plate and POL components placed on opposite side of the cold plate. As described in detail below, electrical paths are formed in the cold plate to allow power to pass from the POL to electronic components (die, integrated circuit, ASIC, chip) coupled to the substrate. The cold plate may comprise, for example, a power delivery block (e.g., PCB (Printed Circuit Board)) with one or more power vias for transferring power through the cold plate. In another example, the cold plate may comprise a power component (e.g., regulated POL) for transferring power through the cold plate.

[0033] In one or more embodiments, an apparatus comprises a POL power supply comprising a fixed POL interconnected with a regulated POL electrically coupled with a substrate and die package, and a cold plate interposed between the regulated POL and the substrate and die package. Power is transmitted from the regulated POL to the substrate and die package through the cold plate. If additional cooling is needed, the substrate and die package may be positioned between two cold plates. In one or more embodiments, high amounts of current (e.g., ≥ 500amps, ≥1000amps) are transferred into the substrate and die package, thereby allowing for improved efficiency.

[0034] The embodiments described herein operate in the context of a data communications network including multiple network devices. The network may include any number of network devices in communication via any number of nodes (e.g., routers, switches, gateways, controllers, edge devices, access devices, aggregation devices, core nodes, intermediate nodes, power sourcing equipment, powered devices, or other network devices), which facilitate passage of data within the network. One or more of the network devices may comprise one or more power distribution systems described herein. The network device may further include any combination of memory, processors, power supply units, and network interfaces.

[0035] Referring now to the drawings, and first to Figure 1, a block diagram illustrating an example of power distribution through a POL power supply located on a board 10 is shown, in accordance with one embodiment. Power is delivered at element 12 to a plurality of POLs (POL modules (circuits), power components) 14a, 14c, 14d, 14e. In one example, pulse power at a voltage greater than 100V (e.g., 108V, 380V) or any other suitable voltage, is delivered to the fixed POL 14a. The power source 12 may also deliver pulse power to POLs 14c, 14d, and 14e (e.g., fixed POLs). In another example, the power source 12 delivers 54VDC (or any other suitable voltage (e.g., intermediate bus voltage level selected based on overall system efficiency, routeability, and cost)) to POL modules 14c, 14d, 14e. The fixed POL 14a transfers power (e.g., at 54VDC or other voltage) to the regulated POL (POL converter, POL regulator) 14b, which distributes power to ASICs 16 (e.g., integrated circuit, die, chip, multi-chip module, and the like). As described below, the fixed POL 14a may be connected to the regulated POL 14b through a bus bar interconnect or any other suitable electrical connection. The regulated POL 14b may provide, for example 150amp or greater output. Each power connection may include 10Mbps (or any other data rate) communications, for example. In the example shown in Figure 1, power is delivered from the regulated POL module 14b to the ASICs 16 via a voltage rail. Power may be provided to the ASICs 16 in a multi-drop arrangement, for example.

[0036] It is to be understood that the term "POL module" as used herein may refer to various types of POL configurations, including, for example, discrete POLs and modules or power delivery block based voltage regulator designs. Also, it may be noted that the POLs may be single phase or multi-phase POLs that may work together to deliver one or more output.

[0037] System components (POL modules, cold plates, electronic package (substrate and die package)) are connected to the board 10. The board 10 may comprise a printed circuit board or the components may be directly attached to sheet metal modules, a line card, or any other suitable support member. For example, a line card circuit board may be removed and the electronic package interconnected through fiber and copper connections at the ASIC edge.

[0038] As previously noted, pulse power may be supplied to one or more of the POL modules. The term "pulse power" (also referred to as "pulsed power") as used herein refers to power that is delivered in a plurality of voltage pulses (sequence of voltage pulses) 18 in which voltage varies between a very small voltage (e.g., close to 0V, 3V) during a pulse-off time 19a and a larger voltage (e.g., ≥12V) during a pulse-on time 19b. High voltage pulse power (high voltage pulses) (e.g., >56V, ≥60V, ≥300V) may be transmitted from power sourcing equipment (PSE) to a powered device (PD) for use in powering the powered device, whereas low voltage pulse power (low voltage pulses) (e.g., ~12V, ~24V, ≤30V, ≤ 56V) may be used over a short interval for start-up (e.g., initialization, synchronization, charging local energy storage, powering up a controller, testing, or any combination thereof). The pulse power may also be delivered in multiple phases, with the pulses offset from one another between phases to provide continuous power. Pulse power transmissions may be through cables, transmission lines, bus bars, backplanes, PCBs, and power distribution systems, for example.

[0039] It is to be understood that the voltage, power, and current levels described herein are only provided as examples and power may be delivered at different levels (volts, amps, watts) than described herein without departing from the scope of the embodiments. Also, power may delivered as ESP (Extended Safe Power) (e.g., pulse power, multi-phase pulse power, pulse power with fault detection and safety protection), PoE (Power over Ethernet), or in accordance with any current standard or future standard.

[0040] Figure 2 is a perspective schematic illustrating a connection between a fixed POL 20 and a regulated POL 22, and distribution of power through a cold plate 25, in accordance with one embodiment. The fixed POL module 20 may provide input power to the regulated POL module 22 via an electrical connection 24 comprising, for example, a bus bar, wire, or other interconnect. For simplification, only one POL module 22 is shown connected to the cold plate 25, however, any number of POL modules may be connected to the cold plate. Each POL may provide a single voltage rail or multiple voltage rails, as shown in Figure 1.

[0041] As shown in Figure 2, the cold plate 25 comprises a plurality of power delivery blocks 26 each comprising a plurality of power vias (electrical paths) 28 for transmitting power through the cold plate, from the POL module 22 to an electronic package (substrate and die package) (described below with respect to Figure 4). Power is transmitted from a first side (e.g., upper surface 27a as shown in Figure 2) to a second side (e.g., lower surface 27b as shown in Figure 2) of the cold plate 25 opposite and generally parallel to the first side. In one or more embodiments, the power delivery block 26 comprises a small (miniature) power printed circuit board. Based on the application, other components may also be inserted into the cold plate 25 or strategically placed cutouts may also be used.

[0042] It should be noted that the terms lower, upper, bottom, top, below, above, horizontal, vertical, and the like, which may be used herein are relative terms dependent upon the orientation of the package and components and should not be interpreted in a limiting manner. These terms describe points of reference and do not limit the embodiments to any particular orientation or configuration.

[0043] The power delivery block 26 comprises a plurality of through holes (vias) 28, which extend through the entire thickness of the power delivery block (as shown in phantom in Figure 3) and are plated along their interior surfaces. The through hole may, for example, be created using a drilling process and plated with a metallic material (e.g., copper or any conductive or metallic layer). The plating may effectively cover the barrel of the hole and create the electrical path through the cold plate 25.

[0044] The term "power delivery block" as used herein may refer to any block of thermal and conductive material in which electrical paths (e.g., power vias) may be formed to allow for the passage of power directly through the cold plate 25. Although the term "printed circuit board" is used herein as an example of a substrate for the power delivery block 26, in other implementations the PCB may be replaced with other substrates (e.g., ceramic circuit boards) or other elements. Also, non-printed circuit boards may be used for the power delivery block 26. For example, a piece of glass may be laser patterned with waveguides and plated with metal vias to form a combined optical path and electrical path. Also, as previously noted other components in addition to or instead of the PCB may be inserted into the cold plate.

[0045] The cold plate 25 may comprise, for example, liquid, gas, or multi-phase (multi-phase cold plate) based cooling. The through power vias 28 may deliver 10amps per tube, for example, and may be cooled by the cold plate 25. In one or more embodiments, the cold plate 25 is formed with one or more openings for insertion of one or more power delivery blocks 26, which may be, for example, press fit into the cold plate 25. An epoxy resin or adhesive fill may be used to press and position the power delivery block 26 within the cold plate 25. The epoxy resin may be used to account for tolerances between the power delivery block 26 and cold plate opening. If the cold plate 25 utilizes cooling tubes or reservoirs, these are routed or positioned around the power delivery block openings. The cold plate 25 keeps a temperature rise low for the power vias 28, thereby maximizing current transfer from the POL 22 to the substrate and die package. In one example, the cold plate 25 is configured with multiple internal zones to maintain optical temperature below 75 degrees Celsius. An example of a temperature distribution through the cold plates is shown in Figure 11 and described below. It is to be understood that the cold plate and temperatures described herein are only examples and other designs may be used to maintain cooling at different temperatures.

[0046] As shown in Figure 3, the power delivery blocks 26 and vias 28 formed therein extend through the cold plate 25 to provide power to an attached electronic package (substrate and die package) 31. For simplification, only a portion of the power delivery blocks 26 and vias 28 are shown in phantom extending through the cold plate 25. Also, the electronic package 31 is shown as a single block structure, but it is to be understood that the package may comprise one or more substrates with any number of components (integrated circuit, ASIC, die, chip, chiplet, optical engine, FAU / CAU) attached thereto, as described below with respect to Figure 4.

[0047] In one or more embodiments, an apparatus comprises the cold plate 25 having an upper surface 27a configured for receiving the point-of-load (POL) module 22 and a lower surface 27b configured for attachment to a substrate having at least one die attached thereto (as shown in Figure 4 and described below), and the power delivery block 26 inserted into the cold plate and comprising the power via 28 for delivering power from the POL module to the die attached to the substrate.

[0048] In one or more embodiments, an additional cold plate 37 may be used, with the electronic package 31 interposed between the two cold plates 25, 37 to provide additional cooling to the electronic package. It may be noted that use of the second cooling plate 37 is optional based on power and cooling requirements. Although a second cooling plate is not shown in the examples of Figures 5, 6, 7, and 8, a second cooling plate may also be used.

[0049] Also, it is to be understood that the cold plate may comprise any number of individual cold plates. For example, the cold plate 25 may comprise two or more smaller cold plates with one or more of the power delivery blocks or electrical paths interposed therebetween.

[0050] Referring now to Figure 4, a cross-sectional schematic illustrates an apparatus comprising a substrate 41 having a first surface 41a and a second surface 41b opposite to the first surface, an integrated circuit (one or more die (chip)) 43 attached to the first surface of the substrate, and a cold plate 45 attached to the second surface of the substrate and comprising an electrical path (e.g., power via) 48 extending therethrough for transmitting power from a power component (e.g., POL module) 42 to the integrated circuit. The term "substrate" as used herein may refer to an electrical board, ceramic board, or an element formed from any other suitable material.

[0051] Bus bars 44 are shown connected to a multi-zone POL 40 (e.g., with DC power to rail voltage) with POL modules 42 attached to the cold plate 45 configured to distribute power from the POL modules to an electronic package comprising the substrate 41 and the integrated circuit 43 (ASIC, NPU (Network Processing Unit), die, chip) and two optical engines (photonic chips) 49 (SerDes (Serializer / Deserializer) chiplet) attached thereto. The electronic package (also referred to herein as a substrate and die package) may comprise one or more integrated circuit, ASIC, NPU, MCM, die, chip, chiplet, processor, or electronic component attached to one or more substrates. In the example of Figure 4, the substrate and die package includes the substrate 41, NPU 43, optical engines 49 and FAU / CAU 50. It is to be understood that this is only an example and the substrate and die package may include any number of components in any arrangement. The FAU / CAU 50 may be attached to a lower surface of the optical engine 49 (as shown in Figure 4) or positioned on an upper surface or side of the optical engine 49. In the example of Figure 4, a second cold plate 47 is thermally coupled to the NPU 43 through a thermal conductor (interposer) 51. The thermal conductor (or a plurality of thermal conductors) may be positioned across multiple die. One or more embodiments may also include an optional lid between the multi-chip module and the cold plate 47.

[0052] As previously described, the cold plate 45 includes one or more power delivery blocks 46 (e.g., PWR PCB) inserted into the cold plate, with one or more electrical paths (power vias) 48 formed therein. In one or more embodiments, the power delivery blocks 46 are formed separately from the cold plate 45 and inserted into openings 56 formed in the cold plate for receiving the blocks. As discussed above, an epoxy resin or adhesive fill may be used to press and position the power delivery blocks within the openings 56 in the cold plate 45.

[0053] The substrate 41 may comprise traces 53 and pads 55 embedded within or deposited on the substrate for connection with the power vias 48 and die 43. Etching, deposition, bonding, or other processes may be used to form the traces and pads, as is well known by those skilled in the art. The substrate 41 may be bonded to the cold plate 45 using solder processes, as well known by those skilled in the art

[0054] In one example, the entire assembly shown in Figure 4. may have a height of less than 50mm. For example, the POL modules 42 may have a height of approximately 15mm to 20mm, the cold plates 45, 47 may each have a height of approximately 5mm to 8mm and the optical engine 49 may have a height of approximately 2mm to 3mm. The package may be, for example 70mm x 70mm or larger. It is to be understood that these dimensions and the components and arrangement shown in Figure 4 are only examples and other types or number of components with different sizes and arrangement, or additional components may be used without departing from the scope of the embodiments. For example, one or more integrated circuits may be positioned on an upper surface of the cold plate 45 (side opposite the substrate 41).

[0055] Figure 5 schematically illustrates placement of the substrate and die package (substrate 41, ASIC 43, photonic chip 49, FAU / CAU 50) below the cold plate 25 shown in Figure 2. As previously noted, the substrate 41 may comprise any number of ASICs 43 operable to receive power from one or more POL modules 22 positioned on the upper surface of the cold plate 25 or individual substrates and die packages may be positioned below the cold plate.

[0056] In addition to passing power through the power delivery block 26, communications (e.g., control plane communications) may also pass through the power delivery block. In one or more embodiments, control communications for the regulated POL and for the ASIC to a system FPGA (Field-Programmable Gate Array) may pass through the cold plate 25 or through ribbon cables.

[0057] Figure 6 illustrates an example in which control plane communications pass through the POL circuit (POL modules 60, 62 and interconnect) and through communication vias 68 formed in power delivery blocks 66 along with power vias 28. In the example shown in Figure 6, control plane communications pass through the fixed POL over path 64a, over the interconnect at 64b and through the regulated POL 62 at 64c. The power delivery blocks 66 include communication vias 68 in addition to the power vias 28 to provide electrical and communication paths through cold plate 25 to substrate and die package 31. In one example, lower speed communications pass through the POL (e.g., 200Mbps range). The cold plate 25 may include any combination of power delivery blocks with power vias, communication vias, or both power and communication vias.

[0058] Figure 7 illustrates another example in which control plane communications are provided through separate communications elements 70, 71 (e.g., via ribbon cable or other means), which may be used to move control communications in and out of the package. The communications module 71 interfaces with a communications block 76 (e.g., PCB) inserted into the cold plate 25. The communications block 76 includes one or more communications path (via) 78 formed therein. In one or more embodiments full speed PCIe (Peripheral Component Interconnect express) or faster may be used. The cold plate 25 may be connected to any number or combination of POL modules 22 and communication modules (COMMs 71).

[0059] According to the invention, optics may also pass through the cold plate and substrate so that both power and optics connections are at the POL and bus bar. Figure 8 illustrates an example in which a passageway is created to allow light to pass through a cold plate 85 and package substrate to reach the optical engine (photonic die) 49. The passageway 80 may be configured for light, laser written waveguides in glass, free space optics, or optical fiber, for example. A cutout is made in the cold plate 85 and substrate 81 with passageway 80 inserted therein to link POL module 82 and bus bar 24 to the photonics chip 49. The passageway 80 may comprise, for example, one or more waveguides defining an optical assembly or an opening for receiving fiber optics. The passageway structure 80 may be aligned and exposed to the photonics die 49 and power bridge (power components) as shown in Figure 8, or may interconnect through a connector with interlocking features, for example. The passageway 80 may be attached to the die using active or passive alignment processes and adhesive, such as an index matching epoxy, for example. Also, as previously noted the optical path may be combined with the electrical path. For example, a piece of glass may be laser patterned with waveguides and plated with metal vias to form a combined optical path and electrical path. Also, more than one passageway 80 may be formed in the cold plate 85 and substrate 81 to communicate with one or more photonic die 49.

[0060] In one or more embodiments, the passageway structure 80 for the optics may be part of a dedicated cutout for the optical path separate from the electronics. For example, similar to the embodiment described above for the communications in Figure 7, one or more of the power delivery blocks 26 may be replaced with an optics passageway structure.

[0061] Figure 9 is a perspective schematic of a power delivery block 96, in accordance with one embodiment. As previously described, the power delivery block 96 may comprise a printed circuit board or other substrate comprising multiple layers 90a, 90b, 90c, 90d. The inner plane layers 90b, 90c may provide greater current density. Planes may be added to provide power filter shapes to provide LC (inductor (L), capacitor (C)) filtering in the power delivery structure. In the example shown in Figure 9, two PCBs are used with components 94 interposed therebetween (e.g., capacitors, inductors, POL components, FET (Field-Effect Transistor) controller, and the like). It is to be understood that the power delivery block may include any number of layers, a single block, multiple blocks with components installed therebetween, and any number of vias 92 for power or communications.

[0062] Figure 10 is a flowchart illustrating an overview of a process for implementing the power distribution and cooling system. At step 100, the power delivery block 46 is inserted into the cold plate 45 (Figures 4 and 10). As previously described, the power delivery block may comprise a PCB or other substrate with one or more electrical paths (power vias) extending therethrough. The power delivery block 46 may be press into the cold plate 45 and secured in place with an epoxy resin or adhesive fill, for example. The POL module 42 is attached to a first surface (upper surface in Figure 4) of the cold plate (step 102) and the substrate 41 with the die 43 is attached to a second surface (lower surface in Figure 4) of the cold plate (step 104). Power is distributed from the POL module to the die through the power delivery block in the cold plate (step 106).

[0063] It is to be understood that the process shown in Figure 10 and described above is only an example and steps may be added, modified, combined, or reordered. For example, if an optical passageway 80 is used, the passageway may be attached to the die / optical engine first.

[0064] Figure 11 is a side view illustrating an example of a temperature distribution through the cold plates, in accordance with one embodiment. POL modules 122 are mounted on a first cold plate 125 comprising power vias 128, as previously described. A substrate and die package 131 is positioned on an opposite side of the first cold plate 125 and interposed between the first cold plate 125 and a second cold plate 137. As previously described, a thermal conductor may be positioned between the die and the second cold plate 137. Flow direction through the cold plates 125 and 137 is indicated by arrows on the cold plates. The temperature distribution example shown in Figure 11 is for an inlet temperature of 20 degrees Celsius and a flow rate of 5.0 LPM (2x2.5 LPM) with an 1800W package.

[0065] Figure 12 is a plan view of the cold plate 125 and power delivery blocks 126, in accordance with one embodiment. Flow direction is from an inlet manifold 127 to an exhaust manifold 129, as indicated by the arrow. Four power delivery blocks 126 with power vias 128 are inserted into the cold plate 125. In one example, the cold plate 125 has a variable fin density to obtain uniform flow at a given cross section. For example, the cold plate 125 may include low density fin columns 140 along outer edges and high density fin columns 142 along a central portion of the cold plate. In one example, the second cold plate 137 (Figure 11) may have a uniform fin density. Fin pitch, thickness, number of fins, and manifold channel dimensions may be optimized to minimize pressure drop and obtain nearly uniform flow for both cold plates.

[0066] Figure 13 illustrates another embodiment of the power distribution system. In the example shown in Figure 13, regulated POL modules 152 are inserted directly into openings formed in a cold plate 155. The regulated POL modules 152 may each be connected to a fixed POL module 150 for delivering power from the fixed POL to the substrate and die package attached to an opposite side of the cold plate (not shown), as previously described. In this embodiment, the regulated POL module 152 defines an electrical path from the fixed POL module 150 coupled to the regulated POL module through connection 154. A thermal interface or heat transfer path may be provided for the embedded POL module 152.

[0067] As can be observed from the foregoing, one or more embodiments described herein provide advantages over conventional systems. For example, one or more embodiments allow for high efficiency transfer of high amounts of current into an electronic package (e.g., ≥ 1000amps). In one or more embodiments, the arrangement of the cold plate (or cold plates), substrate, and die allow for improved thermal efficiency. The power delivery block inserted into the cold plate allows for cooling of the power vias while providing an electrical passageway from the power component to the integrated circuit directly through the cold plate.

[0068] In summary an apparatus according to the invention includes a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.

[0069] Accordingly, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

Claims

1. An apparatus comprising: a substrate (41) comprising a first surface (41a) and a second surface (41b) opposite to said first surface (41a); an integrated circuit (43) and at least one photonic chip (49) attached to said first surface (41a) of the substrate (41); and a cold plate (45) attached to said second surface (41b) of the substrate (41) with an electrical path (48) extending through the cold plate (45) for transmitting power from a power component (42) connected to the cold plate (45), to the integrated circuit (43), wherein the cold plate (45) and the substrate (41) further comprise openings (80) for transmitting optics through the cold plate (45) and the substrate (41) to the at least one photonic chip (49).

2. The apparatus of claim 1 wherein the cold plate (45) comprises a plurality of electrical paths (48) for transmitting the power from the power component (42) to the integrated circuit (43).

3. The apparatus of claim 1 or 2, wherein the power component (42) comprises a regulated point-of-load, POL, module interconnected with a fixed POL module via an electrical connection.

4. The apparatus of any of claims 1 to 3, wherein the substrate (41) and the integrated circuit (43) comprise a multi-chip module.

5. The apparatus of any of claims 1 to 4, wherein the integrated circuit (43) comprises an ASIC, Application-Specific Integrated Circuit, operable to perform network processing functions.

6. The apparatus of any of claims 1 to 5, further comprising a second cold plate (47) and a thermal interposer (51) positioned between said second cold plate (47) and the integrated circuit (43).

7. The apparatus of any of claims 1 to 6, wherein the cold plate (45) comprises a power delivery block (46) inserted into the cold plate (45), said electrical path (48) extending through the power delivery block (46).

8. The apparatus of claim 7, wherein the power delivery block (46) comprises a printed circuit board and said electrical path (48) comprises a power via formed in the printed circuit board.

9. The apparatus of claim 8, wherein the power is transmitted through the power via at a current of at least 10 amps.

10. The apparatus of any of claims 1 to 9, wherein the cold plate (45) comprises a plurality of printed circuit boards inserted into the cold plate (45), each of the printed circuit boards comprising at least one power via forming said electrical path (48).

11. The apparatus of any of claims 1 to 10, wherein the power component (42) is configured for receiving pulse power.

12. The apparatus of any of claims 1 to 11, wherein the at least one photonic chip (49) is coupled to fiber and copper connections (50).

13. The apparatus of any of claims 1 to 12, wherein the cold plate (45) further comprises a communication path (68) for transmitting communications through the cold plate (45).

14. The apparatus of any of claims 1 to 13, wherein the power component (42) comprises a fixed point-of-load, POL, module and the electrical path (48) comprises a regulated POL module located within the cold plate (45) and coupled to the fixed POL module for delivering the power from the fixed POL module to the integrated circuit (43).