Quantum circuit

EP4497091A1Pending Publication Date: 2025-01-29FORSCHUNGSZENTRUM JULICH GMBH
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Patent Information

Application Number
EP2023713638
Authority / Receiving Office
EP · EP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-03-22
Filing Date
2023-03-21
Publication Date
2025-01-29

AI Technical Summary

Technical Problem

Existing methods for tuning quantum states in qubit circuits are time-consuming and require complex hardware due to the need for extensive data lines to external computers, limiting scalability.

Method used

A quantum technological circuit with locally integrated components, including a qubit circuit, bias circuit, readout circuit, and adjustment circuit, which iteratively adjusts bias signals to achieve desired quantum states without external computer processing, reducing the need for complex cabling and enabling scalability.

Benefits of technology

This solution significantly reduces the time required for setting operating points and enhances scalability by allowing highly integrated electronics to evaluate and set bias signals locally, eliminating the need for extensive data lines and complex external processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a quantum circuit (1) comprising the following circuit components (3, 4, 5, 6, 7, 8) that are locally associated with one another: a qubit circuit (3) with quantum states that can be adjusted according to a bias signal; a bias circuit (4) for applying an output bias signal (11), encoded by an input signal (10) of the bias circuit (4), to the qubit circuit (3); a read-out circuit (5), communicatively connected to the qubit circuit (3), for reading out a quantum state adjusting in response to the applied output bias signal (11) and for outputting a read-out signal (13) encoding the read-out quantum state; and an adjusting circuit (6), communicatively connected to the bias circuit (4) and the read-out circuit (5), for executing an iterative algorithm which applies iterative values for the input signal (10) to the bias circuit (4), starting with an initial value, and continues the iteration, according to the respective responsively output read-out signal (13) of the read-out circuit (5), until the output read-out signal (13) corresponds to the adjustment of a desired quantum state.
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Description

[0001] QUANTUM CIRCUIT

[0002] The invention relates to a quantum technology circuit.

[0003] At least one of the circuit components of quantum technology circuits consists of a qubit circuit, which can be implemented using various technologies, such as quantum dot technologies or superconducting quantum technologies. In these technologies, it is known to set suitable quantum states of the qubit circuits by applying a corresponding bias signal to determine the operating points. Such a suitable quantum state can be used to realize a physical qubit. This tuning process is traditionally performed manually and is time-consuming due to the large number of variables to be adjusted, which may also be interdependent.

[0004] To reduce the time required for tuning, computer-based methods have been proposed in the past, some of which also utilize artificial intelligence. In all of these methods, the quantum states of the qubit circuit, usually located in a cryostat, are read out. The readout signals are transmitted to an external computer located outside the cryostat, where they are centrally stored and processed. However, these methods have the disadvantage that their hardware implementation is complex due to the large number of data lines required from the qubit circuit to the external computer. They are also not scalable, partly due to the amount of data to be processed.

[0005] In contrast, the object of the invention is to facilitate the setting of the operating point and, in particular, to reduce the time required for this purpose.

[0006] According to the invention, this object is achieved in that the quantum technological circuit comprises the following locally assigned

[0007] Circuit components comprising: a qubit circuit with quantum states adjustable in response to a bias signal; a bias circuit for applying an output bias signal encoded by an input signal of the bias circuit to the qubit circuit; a readout circuit in communication with the qubit circuit for reading out the quantum state adjusted in response to the applied output bias signal and for outputting a readout signal encoding the readout quantum state;and a setting circuit in communication with the bias circuit and the readout circuit for executing an iterative algorithm which, starting with an initial value, iteratively applies values ​​for the input signal to the bias circuit and, depending on the respective readout signal output by the readout circuit in response thereto, continues the iteration until the output readout signal corresponds to the setting of a desired quantum state.;

[0008] In the quantum technology circuit according to the invention, the components used to realize the desired quantum state of the qubit circuit are locally assigned to one another. Complex cabling with a computer located outside a circuit carrier is thus eliminated. Each qubit circuit is locally assigned a setting circuit for setting the operating point. The data describing the state of the qubit circuit are thus evaluated locally, and the input signals to the bias circuit are set locally. This solution is therefore scalable. The reading of the quantum state of the qubit circuit, the evaluation, and the setting of the bias signals can be performed by highly integrated electronics that are locally assigned to a qubit or a group of qubits that can be realized using the qubit circuit.

[0009] The local assignment of the circuit components can be realized by arranging them on a common, one-piece circuit carrier. Individual circuit components can expediently be connected to one another by at least one interposer provided on the circuit carrier.

[0010] The qubit circuit has adjustable quantum states depending on a bias signal. A suitable quantum state can be used to realize a physical qubit.

[0011] In one example, the qubit circuit may comprise a single circuit for generating a single physical qubit. Alternatively, the qubit circuit may also comprise a single circuit for generating multiple physical qubits, for example, two, three, or more physical qubits. The physical qubits have physical qubit states. Alternatively, the qubit circuit may comprise a plurality of qubit circuits, wherein each qubit circuit may serve the majority to generate one or more physical qubits.

[0012] The quantum-technology circuit further comprises a bias circuit for applying an output bias signal, encoded by an input signal of the bias circuit, to the qubit circuit. The bias signal can thus be used to set a suitable quantum state and thus the operating point of the qubit circuit. The output bias signal can be, for example, a voltage signal or a current signal. How the input signal of the bias circuit is iteratively determined is explained below.

[0013] The quantum technology circuit also has a readout circuit that is communicatively connected to the qubit circuit. The readout circuit serves to read out the quantum state that is adjusted in response to the applied output bias signal and to output a readout signal encoding the readout quantum state to the adjustment circuit. A specific implementation of such a readout circuit is explained further below in connection with a specific example of a qubit circuit. In one embodiment, the readout circuit can also be suitable for reading out the physical qubit state. Additionally or alternatively, the quantum technology circuit can, in one embodiment, have a state readout circuit for reading out the physical qubit state.

[0014] To adjust the operating point, the quantum technology circuit also features an adjustment circuit. The adjustment circuit applies an initial value for the input signal to the bias circuit. In response to the input signal, the bias circuit applies an output bias signal encoded by this signal to the qubit circuit. This sets a specific quantum state of the qubit circuit. This quantum state is read out by the readout circuit, encoded into a readout signal, and output to the adjustment circuit. Depending on this output signal, the adjustment circuit applies a new input signal to the bias circuit. This iteration continues until the desired quantum state is achieved. The operating point is then set.

[0015] The qubit circuits usable for the inventive solution can, in particular, be known quantum dot circuits, which can be designed as charge qubits or as spin qubits, in particular STo spin qubits. These quantum dot circuits have control electrodes (gate electrodes) to which the bias signal is applied in the form of voltage levels. The values ​​of these levels, for example, adjust the charge state of the quantum dot circuit, i.e., the number of electrons present there and / or their spin state.

[0016] The bias circuit preferably comprises a bias voltage generation circuit for generating a bias voltage. The output bias signal can comprise this bias voltage. The bias circuit generating the bias signal is preferably designed as a digital-to-analog converter whose digital input signal encodes its analog output voltage signal, which is applied to the qubit circuit as the output bias signal.

[0017] Another example of a qubit circuit is superconducting quantum circuits, in particular transmon qubits, which can also be tuned by an electrical bias signal.

[0018] In one embodiment of the invention, the readout circuit can be arranged directly adjacent to the qubit circuit. "Directly adjacent" here means that no other circuit component is arranged between the qubit circuit and the readout circuit. The readout of the resulting quantum state by the readout circuit can then be carried out in particular by translating the setting of the quantum state into a capacitance change (charge to capacitance), which is then detected using RF reflectometry or charge-based capacitance measurement (CBCM). This allows the readout circuit to detect very small capacitance changes that depend on whether electron tunneling is quantum mechanically forbidden or permitted due to the state of the qubit circuit (in the case of a spin qubit, the spin alignment).This is encoded into a readout signal corresponding to a logical 0 or 1. For example, 1 signals that tunneling is possible, and 0 indicates that tunneling is quantum-mechanically forbidden due to the Pauli spin blockade. The readout signals 1 or 0 output by the readout circuit thus encode the respective quantum state being read out.

[0019] Alternatively, in one embodiment, the resulting quantum state can be read out by a readout circuit that has a charge sensor, such as a quantum point contact (QPC) charge sensor or a single electron transistor or a sensing dot (SD) (see, for example, C. Meyer, “Quantum Computing with Semiconductor Quantum Dots,” E. Kammerloher et al., “Sensing dot with high output swing for scalable baseband readout of spin qubits,” arXiv:2107.13598v1). Such an embodiment is particularly advantageous if the quantum state to be set is related to a charge state or can be translated into a charge state. A readout circuit that has a charge sensor, and in particular the charge sensor itself, is preferably arranged directly adjacent to the qubit circuit.

[0020] In a further embodiment, the bias circuit can be arranged directly adjacent to the qubit circuit. Here, too, "directly adjacent" means that no other circuit component is arranged between the qubit circuit and the bias circuit.

[0021] The initial value used by the iterative algorithm of the tuning circuit for the input signal to the base circuit can, in particular, be a value based on knowledge of the physical properties of the qubit circuit. In particular, the physical properties of the qubit circuit can determine the limits within which the bias signal must lie for meaningful operation. Then, for example, a value midway between these limits can be chosen as the initial value. The iterative algorithm is preferably based on a stability diagram that describes, for example, the number of electrons in the quantum dot circuit as a function of the voltage levels applied to its control electrodes.

[0022] The quantum technology circuit can optionally have a state control circuit that is communicatively connected to the qubit circuit and that manipulates the physical qubit states of the qubit circuit depending on a control input signal. The quantum technology circuit can optionally have a control circuit that is communicatively connected to the state control circuit and that, depending on a control signal supplied from outside the circuit, either starts the setting operation of the setting circuit or is switched to a normal operating mode in which it outputs control input signals to the state control circuit. This allows qubit manipulations to be performed, such as those required for applications in the field of quantum computing. The setting circuit can, in particular, be designed as a component of the control circuit.Alternatively, in one example, the control circuit may be a separate circuit from the adjustment circuit. In this embodiment, the state control circuit and the control circuit are additional circuit components of the quantum technology circuit.

[0023] In one embodiment of the invention, at least one of the circuit components can be program-controlled. In particular, in one embodiment, the at least one program-controlled circuit component can comprise a microprocessor. For example, the qubit circuit and / or the bias circuit and / or the readout circuit and / or the setting circuit and / or the state control circuit and / or the control circuit can be program-controlled. In one embodiment, at least one of the circuit components can be a hard-wired circuit component. In a further embodiment of the invention, at least a first circuit component can be program-controlled and at least a second circuit component can be a hard-wired circuit component.

[0024] In one embodiment of the invention, the adjustment circuit may comprise a Turing-complete processor. The iterative algorithm may then be executed on the Turing-complete processor. Alternatively, in one embodiment, the algorithm may be executed by hard-wired hardware tailored to the iterative algorithm, according to an application-specific integrated circuit (ASIC).

[0025] Low temperatures may be required to generate quantum states. The quantum circuit is then preferably arranged in a cryostat or similar device. In such a case, it is advantageous if at least one circuit component of the quantum circuit is a cryogenic circuit component. In particular, the qubit circuit and / or the bias circuit and / or the readout circuit and / or the adjustment circuit and / or the state control circuit and / or the control circuit is a cryogenic circuit. This enables reliable function of the circuit components even at low temperatures.

[0026] In one embodiment, the quantum-technology circuit is manufactured using a CMOS manufacturing process. The circuit components can then be CMOS-based circuit components, and in particular CMOS-based cryogenic circuit components.

[0027] The circuit components can be formed, in particular, on a common circuit carrier. The circuit carrier can, in particular, be formed in one piece. In particular, the circuit carrier can be formed from a semiconductor substrate. The circuit components can, for example, be formed on, in particular directly on or in, the circuit carrier.

[0028] The invention is explained in more detail in the following description with reference to the drawing. It shows:

[0029] Fig. 1 is a schematic representation of a quantum technological circuit according to the invention.

[0030] Fig. 1 shows a quantum technology circuit 1 according to the invention. The quantum technology circuit 1 has a circuit carrier 2. Several circuit components, namely a qubit circuit 3, a bias circuit 4, a readout circuit 5, an adjustment circuit 6, a control circuit 8 containing the adjustment circuit 6, and a state control circuit 7, are arranged on the circuit carrier 2. The circuit components 4, 5, 6, 7, 8 can, for example, be formed on, directly on, or in the circuit carrier 2. In the embodiment of the invention shown in Fig. 1, the circuit carrier 2 is formed in one piece. However, the invention is not limited thereto.

[0031] The qubit circuit 3 has adjustable quantum states depending on a bias signal. To determine the operating points of the qubit circuit 3, suitable quantum states must be set by applying a corresponding bias signal. Such a suitable quantum state can be used to realize a physical qubit. The qubit circuit 3 can, for example, have a quantum dot circuit. Additionally or alternatively, the qubit circuit 3 can have a superconducting quantum circuit.

[0032] The quantum technology circuit 1 further comprises a bias circuit 4 for applying an output bias signal 11 encoded by an input signal 10 of the bias circuit 4 to the qubit circuit 3.

[0033] Furthermore, the qubit circuit 3 is in communication with the readout circuit 5. The readout circuit 5 serves to read out the quantum state of the qubit circuit 3, which is adjusted in response to the applied output bias signal 11, and to output a readout signal 13 encoding the readout quantum state. The readout circuit 5 has a readout function 12 for this purpose.

[0034] The circuit carrier 2 further comprises, as a circuit component, an adjustment circuit 6, which is communicatively connected to the bias circuit 4 and the readout circuit 5, for executing an iterative algorithm. Starting with an initial value, the iterative algorithm iteratively applies values ​​for the input signal 10 to the bias circuit 4. The bias circuit 4 then, in response to the input signal 10, applies an output bias signal 11 encoding the input signal 10 to the qubit circuit 3. This sets a quantum state of the qubit circuit 3. The quantum state is read out by the readout circuit 5 and output to the adjustment circuit 6 as a readout signal 13 encoding the readout quantum state. Depending on the output readout signal 13 of the readout circuit 5, the iteration is now continued until the output readout signal 13 corresponds to the setting of a desired quantum state.

[0035] The quantum technology circuit 1 according to the invention can further comprise a state control circuit 7, as shown in Fig. 1. However, this state control circuit 7 is not required for the operating point setting and is optional. The state control circuit 7 is in communication with the qubit circuit 3 and, depending on a control input signal 14, effects a manipulation 15 of the physical qubit states of the qubit circuit 3.

[0036] The circuit carrier 2 further comprises a control circuit 8. In the embodiment shown, the setting circuit 6 is formed as a component of the control circuit 8. Alternatively, the setting circuit 6 can be formed separately from the control circuit 8. The control circuit 8 is in communication with the state control circuit 7. The control circuit 8 can be connected via a voltage supply line 20 to a voltage supply (not shown) arranged outside the circuit carrier 2. This allows the circuit components of the quantum technology circuit 1 to be supplied with voltage. A control signal 21 can be supplied to the control circuit 8 from outside the circuit carrier 2.Depending on the control signal 21, either the adjustment operation of the adjustment circuit 6 can be started or it can be switched to a normal operating mode, in which the control circuit 8 outputs control input signals 14 to the state control circuit 7. The form of the control input signals 14 can be specified externally by control signals 22. The control input signals 14 can cause a manipulation 15 of the physical qubit states of the qubit circuit 3, effected by the state control circuit 7. This allows applications in the field of quantum information processing to be realized.

[0037] The control circuit 8 can also have an output with which output signals 23 can be output from the circuit 1. These output signals 23 can, for example, encode the quantum state of the qubit circuit 3 and / or a physical qubit state. The output signals 23 can, for example, be output to a computer (not shown) arranged outside the circuit carrier 2.

[0038] In the embodiment of the quantum technology circuit 1 according to the invention shown in Fig. 1, the readout circuit 5 is arranged directly adjacent to the qubit circuit 3. This means that no further circuit component is arranged between the qubit circuit 3 and the readout circuit 5. Furthermore, the bias circuit 4 is arranged directly adjacent to the qubit circuit 3. As a concrete implementation of the quantum technology circuit 1 shown in Fig. 1, an example may be mentioned in which the qubit circuit 3 comprises a quantum dot circuit. The quantum dot circuit can be designed as a charge qubit or as a spin qubit, in particular as an ST0 spin qubit. The bias circuit 4 can preferably comprise a bias voltage generation circuit for generating a bias voltage.This bias voltage generation circuit is preferably designed as a digital-to-analog converter whose digital input signal 10 encodes its analog output voltage signal (i.e., the output bias signal 11). The quantum dot circuit has control electrodes (gate electrodes) to which the output bias signal 11 of the bias circuit 4 is applied. This allows quantum states of the quantum dot circuit to be set as charge states (i.e., the number of electrons present there and / or their spin states). The number of electrons in the quantum dot can usually be set via a plunger gate; this can also be controlled with a bias voltage. This makes it possible to adjust the potential well, tunnel barriers between quantum dots and qubits, as well as the number of electrons in each quantum dot.

[0039] In the case of a quantum dot circuit, the resulting quantum state can be read out, in particular, by translating the setting of the quantum state into a change in capacitance (charge to capacitance). The change in capacitance can then be detected using RF reflectometry or charge-based capacitance measurement (CBCM). In this case, the readout circuit 5 detects a very small change in capacitance, which depends on whether the tunneling of an electron is possible due to the spin alignment of the qubit or is quantum-mechanically forbidden due to the Pauli spin blockade. This is converted into a logical 0 or a logical 1 and passed by the readout circuit 5 as a readout signal 13 to the setting circuit 6. For translating the quantum state into a change in capacitance, it is advantageous if the readout circuit 5, as shown in Fig.1, is arranged directly adjacent to the qubit circuit 3. Alternatively, in one example, the readout circuit 5 may comprise a charge sensor, e.g., a quantum dot charge sensor or a single-electron transistor or a sensing dot for reading the resulting quantum state.

[0040] In the embodiment explained, at least one of the

[0041] Circuit components can be program-controlled. For example, the adjustment circuit 6 can comprise a Turing-complete processor for executing the iterative algorithm. Alternatively, the adjustment circuit 6 can comprise, for example, hard-wired hardware specifically tailored to the iterative algorithm (in the sense of an application-specific integrated circuit (ASIC)).

[0042] Preferably, the qubit circuit 3, the bias circuit 4, and the readout circuit 5 are implemented on a single chip. The chip is then mounted on the circuit carrier 2. It is advantageous if the readout circuit 5 and the bias circuit 4 are arranged as close as possible to the qubit circuit 3. Since digital signals can be transmitted between the readout circuit 5 and the adjustment circuit 6, as well as between the control circuit 8 and the bias circuit 4, spatial proximity is not so relevant here.

[0043] The signals exchanged between the circuit components are indicated in Fig. 1 by arrows (reference numerals 10, 11, 12, 13, 14), which also indicate the direction of the signal exchange. However, it is also possible that additional signals are exchanged between the circuit components, for example, signals related to a communication protocol. Such optional signals are indicated in Fig. 1 by dashed arrows.

[0044] List of reference symbols for quantum technology circuits

[0045] Circuit carrier

[0046] Qubit circuit

[0047] Bias circuit

[0048] Readout circuit

[0049] Adjustment circuit

[0050] State control circuit

[0051] control circuit

[0052] Input signal of the bias circuit

[0053] Output bias signal

[0054] Readout function of the readout circuit

[0055] Readout signal

[0056] Control input signal

[0057] Qubit manipulation

[0058] Power supply

[0059] control signal

[0060] control signal

[0061] Output signal

Claims

Patent claims 1. Quantum technological circuit (1) comprising the following locally assigned circuit components (3, 4, 5, 6, 7, 8): a qubit circuit (3) with quantum states adjustable depending on a bias signal; a bias circuit (4) for applying an output bias signal (11) encoded by an input signal (10) of the bias circuit (4) to the qubit circuit (3); a readout circuit (5) in communication connection with the qubit circuit (3) for reading out a quantum state adjusting itself in response to the applied output bias signal (11) and for outputting a readout signal (13) encoding the readout quantum state;and a setting circuit (6) in communication connection with the bias circuit (4) and the readout circuit (5) for executing an iterative algorithm, which, starting with an initial value, iteratively applies values ​​for the input signal (10) to the bias circuit (4) and, depending on the respective readout signal (13) output by the readout circuit (5), continues the iteration until the output readout signal (13) corresponds to the setting of a desired quantum state.

2. Circuit (1) according to claim 1, characterized in that the qubit circuit (3) comprises a quantum dot circuit and / or a superconducting quantum circuit.

3. Circuit (1) according to one of claims 1 or 2, characterized in that the bias circuit (4) has a bias generation circuit for generating a bias voltage.

4. Circuit (1) according to claim 3, characterized in that the bias generation circuit comprises a digital-to-analog converter.

5. Circuit (1) according to one of the preceding claims, characterized in that the readout circuit (5) is arranged directly adjacent to the qubit circuit (3).

6. Circuit (1 ) according to one of the preceding claims, characterized in that the bias circuit (4) is arranged directly adjacent to the qubit circuit (3).

7. Circuit (1) according to one of the preceding claims, wherein the circuit (1) further comprises a state control circuit (7) which is in communication connection with the qubit circuit (3) and which, depending on a control input signal (14), effects a manipulation of the physical qubit states of the qubit circuit (3), and further comprises a control circuit (8) which is in communication connection with the state control circuit (7) and which, depending on a control signal (21) supplied from outside the circuit (1), either starts the setting operation of the setting circuit (6) or is switched to a normal operating mode in which it outputs control input signals (14) to the state control circuit (7).

8. Circuit (1 ) according to one of the preceding claims, wherein at least one of the circuit components (3, 4, 5, 6, 7, 8) is program-controlled.

9. Circuit (1 ) according to one of the preceding claims, characterized in that the setting circuit (6) comprises a Turing-complete processor.

10. Circuit (1 ) according to one of the preceding claims, characterized in that at least one circuit component (3, 4, 5, 6, 7, 8) of the quantum technology circuit (1 ) is a cryogenic circuit component.

11. Circuit (1 ) according to one of the preceding claims, characterized in that the quantum technology circuit (1 ) is manufactured using a CMOS manufacturing process.

12. Circuit (1) according to one of the preceding claims, characterized in that its circuit components (3, 4, 5, 6, 7, 8) are formed on a common circuit carrier (2).