Method of identifying message end points in a message stream

Abstract

A method for identifying message end points in real-time in a data transmission of contiguous multibyte messages in an integrated circuit is provided. The method includes receiving a data transmission of bytes over one or more clock cycles. The data transmission includes a plurality of contiguous multibyte messages. The method also includes generating an array of data values for each of the one or more clock cycles, storing the arrays, and identifying end points of one or more messages of the plurality of contiguous multibyte messages based on the stored arrays.

Description

METHOD OF IDENTIFYING MESSAGE END POINTS IN A MESSAGE STREAMTECHNICAL FIELD

[0001] The present disclosure relates to a method for processing data in an integrated circuit, and, in particular, to determine message end points in a high bandwidth message stream in an integrated circuit.BACKGROUND

[0002] In recent years, electronic devices incorporating System-on-Chip (SoC) circuits have become ubiquitous. SoC devices are integrated circuits that combine computing components such as processor cores, memory, input / output interfaces, a graphics processing unit (GPU), and secondary storage interfaces on a single substrate or microchip.

[0003] The trend towards SoC has been driven by demand for small consumer electronics devices such as smart phones and tablets and the use of SoC in embedded systems such as Internet-of-Things (loT) devices and WiFi routers. SoCs have a number of advantages over traditional integrated circuit designs including improved power efficiency, space saving, better performance, and lower manufacturing costs.

[0004] The evolution of SoC technology has also driven development in monitoring methods, which has led to the integration of monitoring functionality onto the SoC. Monitoring devices may perform functions such as tracing the execution of programs executed by a CPU. A monitoring device may output data in the form of a continuousstream of messages that contain monitoring information about the SoC. These messages may be sent off chip for further analysis or stored in memory.

[0005] Prior to communicating or storing the messages, the messages are packed into fixed sized frames. In order to maximize the utilization of the available frame size while reducing software decoding overheads, only complete messages are packed into frames. This requires knowing where each message ends to be able to determine whether a message will fit into the current frame or whether the message should be placed in a subsequent frame.

[0006] When a single message is sent in each clock cycle, it is straightforward to determine the end point of the message, for example, from knowledge of the message length indicated in the message header. However, when multiple messages are communicated in each clock cycle, knowing where each message starts in the message stream requires knowledge of where the previous message finished. Further, messages may span multiple clock cycles, so where the first message in the clock cycle starts is to be kept track of cycle-to-cycle.

[0007] A linked list may be used to keep track of message start and end points in a cycle, where each element in the list points to the byte position of the next message start point. Constructing such a linked list sequentially results in a circuit design that cannot meet required timing constraints to maintain throughput.SUMMARY AND DESCRIPTION

[0008] The scope of the present invention is defined solely by the appended claims and is not affected to any degree by the statements within this summary.

[0009] The present embodiments may obviate one or more of the drawbacks or limitations in the related art. For example, a method for identifying message end points in real-time in a data transmission of contiguous multibyte messages in an integrated circuit is provided.

[0010] The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description, and the figures.

[0011] According to a first aspect, a method for identifying message end points in real-time in a data transmission of contiguous multibyte messages in an integrated circuit is provided. The method includes receiving a data transmission of bytes over one or more clock cycles. The data transmission includes a plurality of contiguous multibyte messages. The method includes generating an array of data values for each of the one or more clock cycles, storing the arrays, and identifying end points of one or more of the messages based on the stored arrays. In a first stage of one or more stages, generating the array of data values for each clock cycle includes determining a first data value for each byte location of the clock cycle. The first data value includes a sum of the byte location and an output of a function that receives a byte corresponding to the byte location and, when the byte corresponds to a first byte of a message, outputs the length of the message. The first stage includes generating, for each byte location, a list of data values, where: i) the first entry of the list includes the first data value for the byte location; and ii) each subsequent entry includes a) either the first data value for the byte location indicated by the preceding entry, or b) the preceding entry when the preceding entry exceeds the number of byte locations in the clock cycle.

[0012] The method according to the first aspect enables efficient computation of message end points in a data transmission of contiguous messages. In particular, the method speculatively determines message end points in parallel and identifies the actual message end points in the message stream from the speculatively computed data.

[0013] In a first implementation of the method according to the first aspect, if the first stage is a first stage of two or more stages, in the second and each subsequent stage, generating the array includes: obtaining, for each byte location, the list of data values from the preceding stage; and generating a further list of data values for each byte location. The further list includes a list of lists of data values, where: i) the first entry of the further list includes the list of data values from the preceding stage for the byte location; and ii) each subsequent entry includes the list of data values for the byte location indicated by the last data value in the preceding entry.

[0014] The method according to the first implementation form enables computation of a large number of message end points in a message stream by pipelining the speculative computation over multiple stages.

[0015] In a second implementation form, each of the one or more stages takes place in one clock cycle.

[0016] In a third implementation form, identifying the end point of each message in the plurality of messages includes identifying, from the array corresponding to the first clock cycle, the end point of each message that is received in the first clock cycle and terminates in the first clock cycle.

[0017] In a fourth implementation form, identifying the end point of each message of the plurality of messages further includes: identifying, for each subsequent clock cycle, based on the array corresponding to the preceding clock cycle, a byte location of astarting point of the first message received in the subsequent clock cycle; and identifying, from the array corresponding to the subsequent clock cycle, the end point of each message that is received in the subsequent clock cycle and terminates in the subsequent clock cycle.

[0018] In a fifth implementation form, the method includes: packing the plurality of messages into one or more frames; and communicating the one or more frames to an external device via a communication interface.

[0019] In a sixth implementation form, the communication interface is a Universal Serial Bus (USB), Ethernet, PCIe, or JTAG.

[0020] In a seventh implementation form, the number of stages is determined based on computational capacity and a required message throughput.

[0021] According to a second aspect, an integrated circuit configured to identify message end points in real-time in a data transmission of contiguous multibyte messages in an integrated circuit is provided. The integrated circuit includes circuitry configured to: receive a data transmission of bytes over one or more clock cycles; generate an array of data values for each of the one or more clock cycles; store the arrays; and identify end points of one or more of the messages based on the stored arrays. In a first stage of one or more stages, to generate the array of data values for each clock cycle, the integrated circuit is configured to: determine a first data value for each byte location of the clock cycle. The first data value includes a sum of the byte location and an output of a function that receives a byte corresponding to the byte location and, when the byte corresponds to a first byte of a message, outputs the length of the message. The integrated circuit is configured to generate, for each byte location, a list of data values, where: i) the first entry of the list includes the first data value for the byte location; and ii) each subsequententry includes a) either the first data value for the byte location indicated by the preceding entry, or b) the preceding entry when the preceding entry exceeds the number of byte locations in the clock cycle.

[0022] These and other aspects of the invention will be apparent from the embodiments described below.BRIEF DESCRIPTION OF THE DRAWINGS

[0023] For a more complete understanding of the present disclosure, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

[0024] Figure 1 shows a schematic diagram of an integrated circuit, according to an example.

[0025] Figures 2A to 2E show an exemplary depiction of an array used to identify message end points in a data transmission.

[0026] Figure 3 shows a block diagram of a method for identifying message end points in a data transmission, according to an example.DETAILED DESCRIPTION

[0027] Example embodiments are described below in sufficient detail to enable those of ordinary skill in the art to embody and implement the systems and processes herein described. Embodiments may be provided in many alternate forms and should not be construed as limited to the examples set forth herein.

[0028] Accordingly, while embodiments may be modified in various ways and take on various alternative forms, specific embodiments thereof are shown in the drawings anddescribed in detail below as examples. There is no intent to limit to the particular forms disclosed. On the contrary, all modifications, equivalents, and alternatives falling within the scope of the appended claims should be included. Elements of the example embodiments are consistently denoted by the same reference numerals throughout the drawings and detailed description where appropriate.

[0029] The terminology used herein to describe embodiments is not intended to limit the scope. The articles “a,” “an,” and “the” are singular in that the articles have a single referent; however, the use of the singular form in the present document should not preclude the presence of more than one referent. In other words, elements referred to in the singular may number one or more, unless the context clearly indicates otherwise. The terms “comprises,” “comprising,” “includes,” and / or “including,” when used herein, specify the presence of stated features, items, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, items, steps, operations, elements, components, and / or groups thereof.

[0030] Unless otherwise defined, all terms including technical and scientific terms used herein are to be interpreted as is customary in the art. Terms in common usage should also be interpreted as is customary in the relevant art and not in an idealized or overly formal sense unless expressly so defined herein.

[0031] Figure 1 is a simplified schematic diagram showing an integrated circuit 100 in a System on Chip (SoC) arrangement, according to an example. The integrated circuit 100 may be used in conjunction with other methods and systems described herein.

[0032] The integrated circuit 100 includes system circuitry 110 that includes subblocks 120, 130, 140 representing core devices m the integrated circuit 100. Core devices 120, 130, 140 may include: central processing units (CPUs), memory, input / outputdevices, secondary storage devices, graphical processing units (GPUs), custom logic, any other type of component suitable for a SoC architecture, or any combination thereof. In other examples of integrated circuits, the system circuitry 110 may include more or fewer than the three core devices 120, 130, 140 shown in Figure 1.

[0033] The integrated circuit 100 includes monitoring circuitry 150. The monitoring circuitry 150 is able to monitor the core devices 120, 130, 140. For example, monitoring circuitry 150 may be configured to trace the execution of programs on a core device, perform data analytics, or provide status information relating to core device operations.

[0034] The monitoring circuitry 150 is connected to a communicator 160. In some cases, the communicator 160 enables communication with off-chip devices. In other cases, the communicator 160 is configured to communicate data with other devices on the integrated circuit (e.g., a memory or storage device). Examples of communicators include: ITAG, parallel trace input / output, Aurora based high-speed serial interface, USB, Ethernet, RS232, PCIe, and CAN. Although Figure 1 illustrates one communicator, any number of communicators may be provided on the integrated circuit 100.

[0035] Messages from the monitoring circuitry 150 are sent to the communicator 160, via data bus 170. The data bus 170 may be limited to communicate a fixed maximum amount of data per clock cycle, such as 128 or 256 bits. Each message includes a data payload and a message header. Each message is at least 2 bytes long, and the byte length of the message may be computed from the first byte of the message. Messages may be 3-6 bytes but may be longer in some cases. To maximize the available bandwidth, messages are packed contiguously as a message stream over multiple clock cycles. Some messages also span more than one clock cycle.

[0036] When messages are received at the communicator 160, the messages are placed into frames of fixed length. A typical frame payload may be of the order 1 - 100 kilobytes or higher. In order to maximize the utilization of the available frame size while reducing software decoding overheads, only complete messages are packed into frames. This requires knowledge of message end points in the message stream to be able to determine whether a message will fit into the current frame or whether the message should be placed in a subsequent frame.

[0037] A linked list data structure where each element in the list points to the byte position of the next message start point may be used to keep track of message start and end points in a cycle. As it is not possible to create a large enough linked list to point to all message locations in a single clock cycle, the computation may be pipelined so that the full linked list of message locations is built up over multiple clock cycles.

[0038] A further complication arises due to messages spanning multiple clock cycles: the start of the first message in a clock cycle is pointed to by the last message from the previous cycle. Therefore, the starting point of the first complete message in a cycle is only known once the previous cycle has been evaluated. Thus, if it takes three clock cycles to determine all message end points in a cycle, the evaluation for the next cycle cannot begin until this has completed. This results in only a third of available bandwidth being used, negating the benefit of using a packed message stream.

[0039] These problems may be addressed using speculative computation: every byte location of data received in each clock cycle is treated as though the byte location is the start of a message, and a linked list is constructed for each location. By the time the computation for the final pipelining stage has completed, the end point of the last message from the previous cycle is known and the list of end points that corresponds tothe actual byte locations of message end points for the clock cycle may be selected from the computed lists.

[0040] Figure 2 A shows the first step of the first pipeline stage of the computation, according to an example. The computation begins as soon as data is received at the communicator 160 and continues for the duration of the data transmission. In the method described herein, it is assumed that a function that will output the length of a message from a byte when the byte corresponds to the first byte of a message exists. This is the case, for example, where the message includes a message header that includes the message length in the first byte.

[0041] The first line 210 shows byte location address for 16 bytes, corresponding to the bytes received in a first cycle. In other examples, more or fewer bytes may be transmitted in each cycle, and the methods described herein may be adapted to those cases. The second line 220 shows data values that are computed for each of the 16 byte locations. The values in line 220 are determined by executing the function that outputs a message length when the byte for that byte location is the first byte of a message. For example, for byte location 0, the data value in the second line 220 is 3. This provides that if the byte for byte location 0 is the first byte of the message, that message has length 3. Similarly, for byte location 1, the data value is 3, and therefore, if the byte for byte location 1 is the first byte of a message, then that message has length 3. In either case, if the byte is not the first byte of a message, then the data value in the second line 220 is effectively junk data.

[0042] The third line 230 shows the result of the first pipeline stage of the computation and includes the addition of the determined “message lengths” to the byte locations. The entries are computed in parallel for all byte locations in the cycle and donot require knowledge of where the actual message start and end positions are in the cycle, or where the last message from the previous cycle finished. However, in the case where the byte for the respective byte location actually corresponds to the first byte of a message, the computed data value in the third line 230 corresponds to the byte location address for the end point of the message and the start of the next message. For example, for byte location 0, the data value in the second line 220 is 3, and so, the data value in the third line 230 is 0 + 3 = 3. Therefore, if the byte for byte location 0 is the first byte of a message, then the first byte of the next message is at byte location 3. For byte location 1 , the data value in the second line 220 was also 3, and so, the data value in the third line is 1 + 3 = 4. Therefore, if the byte for byte location 1 is the first byte of a message, the first byte of the next message is at byte location 4.

[0043] Figure 2B shows the second step of the first pipeline stage of the computation. In Figure 2B, an array 240 of data values is constructed based on the computation from the first step. The array includes three-element lists for each byte location address 210. The first line of the array 240 is line 230 as shown in Figure 2 A.

[0044] In the second step, for any byte location where the computation from line 230 points to a location that is outside of the cycle, then all the remaining values for that byte location are set to point to the same value. For example, the value for byte location 15 in the first line 230 is 18, which lies outside the cycle. Hence, the other values for byte location 15 are also 18. Similarly, for byte locations 14 and 12, the first value is 16, which is a location outside of the cycle, and the remaining values are therefore 16.

[0045] Figure 2C shows the third and final step of the first pipeline stage of the computation. Figure 2C shows the same array as array 240. In Figure 2C, each value in the second line of array 240 is determined based on the byte location indicated from thefirst line 230. For example, the entry in first line 230 of byte location 0 is 3. The entry in the second line of array 240 for byte location 0 is 5 because the first entry for byte location 3 is 5. The entry in the third line, for byte location 0, is 9 because the first entry in byte location 5 is 9. The computation of array 240 shown in Figures 2A - 2C takes place in one clock cycle.

[0046] Figure 2D shows a portion of the computation from the first step of the second pipeline stage of the computation. The top element 250 of the three-element list in the array 240 at byte location 0 is 9. This provides that if byte location 0 is the first byte of a message, then byte location 9 will also be a byte location of the first byte of a message. In the second pipeline stage, the entire list 260 computed for byte location 9 in the first pipeline stage is stacked on top of the list for byte location 0. Similarly, the top element 270 of the list for byte location 9 is 15, and the list 280 for byte location 15 is stacked on top of the lists for byte locations 0 and 9, respectively. The computation for all byte locations may proceed in a similar fashion in parallel during the second pipeline stage.

[0047] Figure 2E shows the completed computation after the first step of the second pipeline stage. An array 290 including 16 x 9 element lists of values has been computed. Each of these 9 element lists provides 9 byte locations for the start points of messages. It is still unknown which list is the correct list that corresponds to the actual byte locations of messages. However, the correct list may be determined by this stage in the computation, since the list from the first clock cycle of the transmission is always the list for byte location 0, and the first byte location that determines the list for the current cycle may be determined from the top element of the list from the preceding clock cycle.

[0048] Figure 3 is a block diagram of a method 300 for identifying message end points in real-time in a data transmission of contiguous multibyte messages in anintegrated circuit. The method 300 may be implemented in conjunction with other methods and systems described herein.

[0049] At block 310, the method 300 includes receiving a data transmission of bytes over one or more clock cycles. The data transmission includes a plurality of contiguous multibyte messages.

[0050] At block 320, the method 300 includes generating an array of data values for each of the one or more clock cycles. In a first stage, generating the array of data values for each clock cycle includes determining a first data value for each byte location of the clock cycle. As previously described in relation to line 230 in Figure 2A, the first data value includes a sum of the byte location and an output of a function that receives a byte corresponding to the byte location and when the byte corresponds to a first byte of a message, outputs the length of the message.

[0051] The first stage further includes generating a list of data values for each byte location where the first entry of the list includes the first data value for the byte location, and each subsequent entry in the list includes either the first data value for the byte location indicated by the preceding entry in the list, or the preceding entry itself, in the case where the preceding entry exceeds the number of byte locations in the clock cycle. After the first stage, an array similar to array 240 shown in Figure 2C is generated.

[0052] In some cases, there may be further stages of computation, as shown in the example in Figures 2D and 2E. In the second and each subsequent stage, generating the array includes obtaining, for each byte location, the list of data values from the preceding stage (e.g., list 260 and list 280 obtained from the array 240) and generating a further list of data values for each byte location. The first entry of the further list includes the list of data values from the preceding stage for the byte location, and each subsequent entryincludes the list of data values for the byte location indicated by the last data value in the preceding entry. The same process may be repeated in subsequent stages.

[0053] At block 330, the method 300 includes storing the arrays. At block 340, the method includes identifying end points of one or more of the messages based on the stored arrays.

[0054] According to examples of the method 300, identifying the message end points may include identifying, from the array corresponding to the first clock cycle, the end point of each message that is received in the first clock cycle and terminates in the first clock cycle. With reference to Figure 2E, if the array 290 represents the array for the first clock cycle, the message end points would be 3, 5, 9 11, 13, and 15, as these are the values in the array 290 for byte location 0.

[0055] The method 300 may further include identifying, for each subsequent clock cycle, based on the array corresponding to the preceding clock cycle, a byte location of a starting point of the first message received in the subsequent clock cycle, and identifying, from the array corresponding to the subsequent clock cycle, the end point of each message that is received in the subsequent clock cycle and terminates in the subsequent clock cycle. With reference to Figure 2E, if the array 290 represents the array for the first clock cycle, then the byte location of the starting point of the first message received in the subsequent clock cycle would be byte location 2 (e.g., the third list), as the last message in the array 290 for byte location 0 has the value 18. The end points of all other messages may be determined from the array for the second clock cycle similar to array 290 by reading the list at byte location 2.

[0056] In some cases, the method 300 includes packing the plurality of messages into one or more frames and communicating the one or more frames to an external device viaa communication interface. Messages may be packed based on the end points of the messages in the message stream. As previously described, only complete messages are placed into frames, and therefore, packing messages into frames may include determining, based on the end point of the message, whether a message should be placed in a current frame or a subsequent frame.

[0057] The number of stages required to achieve 100% throughput for the method 300 may be determined based on a number of message end points that may be determined given the available computational capacity, and the maximum number of messages being received in a clock cycle. For example, in the example shown in Figures 2A - 2E, the maximum number of messages in a clock cycle is 8, since each message is at least 2 bytes, and there are 16 bytes per clock cycle. Therefore, since 3 end points may be determined from array 240 after the first stage, and 9 end points may be determined from array 290 after the second stage, two stages are required to be able to determine all message end points. In lower performance applications, where maintaining 100% throughput is not required, the input may be stalled while the computation of message end points catches up with the data received in the transmission.

[0058] The present disclosure is described with reference to flow charts and / or block diagrams of the method, devices, and systems according to examples of the present disclosure. Although the flow diagrams described above show a specific order of execution, the order of execution may differ from that which is depicted. Blocks described in relation to one flow chart may be combined with those of another flow chart. In some examples, some blocks of the flow diagrams may not be necessary, and / or additional blocks may be added.

[0059] The present inventions can be embodied in other specific apparatus and / or methods. The described embodiments are to be considered in all respects as illustrative and not restrictive. In particular, the scope of the invention is indicated by the appended claims rather than by the description and figures herein. All changes that come within the meaning and range of equivalency of the claims are to be embraced within their scope.

[0060] The elements and features recited in the appended claims may be combined in different ways to produce new claims that likewise fall within the scope of the present invention. Thus, whereas the dependent claims appended below depend from only a single independent or dependent claim, it is to be understood that these dependent claims may, alternatively, be made to depend in the alternative from any preceding or following claim, whether independent or dependent. Such new combinations are to be understood as forming a part of the present specification.

[0061] While the present invention has been described above by reference to various embodiments, it should be understood that many changes and modifications can be made to the described embodiments. It is therefore intended that the foregoing description be regarded as illustrative rather than limiting, and that it be understood that all equivalents and / or combinations of embodiments are intended to be included in this description.

Claims

CLAIMS1. A method for identifying message end points in real-time in a data transmission of contiguous multibyte messages in an integrated circuit, the method comprising: receiving a data transmission of bytes over one or more clock cycles, the data transmission comprising a plurality of contiguous multibyte messages; generating an array of data values for each of the one or more clock cycles; storing the arrays; and identifying end points of one or more messages of the plurality of contiguous multibyte messages based on the stored arrays, wherein, in a first stage of one or more stages, generating the array of data values for each of the one or more clock cycles comprises: determining a first data value for each byte location of the respective clock cycle, the first data value comprising a sum of the respective byte location and an output of a function that receives a byte corresponding to the respective byte location and, when the byte corresponds to a first byte of a message of the plurality of contiguous multibyte messages, outputs a length of the message; and generating, for each byte location of the respective clock cycle, a list of data values, wherein a first entry of the list of data values comprises the first data value for the respective byte location, and wherein each subsequent entry of the list of data values comprises: the first data value for the byte location indicated by the preceding entry of the list of data values; orthe preceding entry of the list of data values when the preceding entry exceeds a number of byte locations in the respective clock cycle.

2. The method of claim 1 , wherein when the first stage is a first stage of two or more stages, in a second stage and each subsequent stage of the two or more stages, generating the array of data values comprises: obtaining, for each byte location of the respective clock cycle, the list of data values from the preceding stage of the two or more stages; and generating a further list of data values for each byte location of the respective clock cycle, the further list comprising a list of lists of data values, wherein a first entry of the further list of data values comprises the list of data values from the preceding stage for the respective byte location, and wherein each subsequent entry of the further list of data values comprises the list of data values for the byte location indicated by a last data value in the preceding entry.

3. The method of claim 1, wherein each of the one or more stages takes place in one clock cycle.

4. The method of claim 1 , wherein identifying the end points of the one or more messages of the plurality of contiguous multibyte messages comprises: identifying, from an array of the stored arrays corresponding to a first clock cycle of the one or more clock cycles, an end point of each message of the plurality of contiguous multibyte messages that is received in the first clock cycle and terminates in the first clock cycle.

5. The method of claim 4, wherein identifying the end points of the one or more messages of the plurality of contiguous multibyte messages, further comprises: identifying, for each subsequent clock cycle of the one or more clock cycles, based on the array of data values of the stored arrays corresponding to the preceding clock cycle of the one or more clock cycles, a byte location of a starting point of a first message received in the respective subsequent clock cycle; and identifying, from the array of data values of the stored arrays corresponding to the respective subsequent clock cycle, the end point of each message of the plurality of contiguous multibyte messages that is received in the respective subsequent clock cycle and terminates in the respective subsequent clock cycle.

6. The method of claim 1, further comprising: packing the plurality of contiguous multibyte messages into one or more frames; and communicating the one or more frames to an external device via a communication interface.

7. The method of claim 6, wherein the communication interface is a Universal Serial Bus (USB), Ethernet, PCIe, or JTAG.

8. The method of claim 1, wherein a number of stages of the one or more stages is determined based on computational capacity and a required message throughput.

9. An integrated circuit configured to identify message end points in real-time in a data transmission of contiguous multibyte messages in the integrated circuit, the integrated circuit comprising circuitry configured to: receive a data transmission of bytes over one or more clock cycles, the data transmission comprising a plurality of contiguous multibyte messages; generate an array of data values for each clock cycle of the one or more clock cycles; store the arrays; and identify end points of one or more messages of the plurality of contiguous multibyte messages based on the stored arrays, wherein, in a first stage of one or more stages, to generate the array of data values for each clock cycle of the one or more clock cycles, the circuitry of the integrated circuit is further configured to: determine a first data value for each byte location of the respective clock cycle, the first data value comprising a sum of the respective byte location and an output of a function that receives a byte corresponding to the respective byte location and, when the byte corresponds to a first byte of a message of the plurality of contiguous multibyte messages, outputs a length of the message; and generate, for each byte location of the respective clock cycle, a list of data values, wherein a first entry of the list of data values comprises the first data value for the respective byte location, and wherein each subsequent entry of the list of data values comprises: the first data value for the respective byte location indicated by the preceding entry of the list of data values, orthe preceding entry of the list of data values when the preceding entry of the list of data values exceeds a number of byte locations in the respective clock cycle.

10. The integrated circuit of claim 9, wherein when the first stage is a first stage of two or more stages, in a second stage and each subsequent stage of the two or more stages, the circuitry of the integrated circuit is further configured to: obtain, for each byte location of the respective clock cycle, the list of data values from the preceding stage of the two or more stages; and generate a further list of data values for each byte location of the respective clock cycle, the further list comprising a list of lists of data values, wherein a first entry of the further list of data values comprises the list of data values from the preceding stage of the two or more stages for the respective byte location, and wherein each subsequent entry of the further list of data values comprises the list of data values for the respective byte location indicated by a last data value in the preceding entry.

11. The integrated circuit of claim 9, wherein each of the one or more stages takes place in one clock cycle.

12. The integrated circuit of claim 9, wherein the circuitry of the integrated circuit being configured to identify the end points of the one or more messages of the plurality ofcontiguous multibyte messages comprises the circuitry of the integrated circuit being configured to: identify, from the array of data values corresponding to a first clock cycle of the one or more clock cycles, the end point of each message of the plurality of contiguous multibyte messages that is received in the first clock cycle and terminates in the first clock cycle.

13. The integrated circuit of claim 12, wherein the circuitry of the integrated circuit being configured to identify the end points of the one or more messages of the plurality of contiguous multibyte messages comprises the circuitry of the integrated circuit being further configured to: identify, for each subsequent clock cycle of the one or more clock cycles, based on the array of data values of the stored arrays corresponding to the preceding clock cycle of the one or more clock cycles, a byte location of a starting point of a first message received in the respective subsequent clock cycle; and identify, from the array of data values of the stored arrays corresponding to the respective subsequent clock cycle, the end point of each message of the plurality of contiguous multibyte messages that is received in the respective subsequent clock cycle and terminates in the respective subsequent clock cycle.

14. The integrated circuit of claim 9, wherein the integrated circuit comprises a communication interface, and wherein the integrated circuit is further configured to:pack the plurality of contiguous multibyte messages into one or more frames; and communicate the one or more frames to an external device via the communication interface.

15. The integrated circuit of claim 14, wherein the communication interface is a Universal Serial Bus (USB), Ethernet, PCIe or JTAG.

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