Power supply for an electronic device

Abstract

Powering an Electronic Device This description relates to a power management circuit (400) for an electronic module comprising: - a first state machine (404) configured to receive a first deactivation command (MOD1_EN) from said module, and to verify that said first command (MOD1_EN) remains the same for a first minimum duration; and - a second state machine (407) configured to cut off the power supply to at least a first part (450) of said module when said second state machine (407) receives a second command (DIS_REQ) from the first state machine (404) indicating that said first command (MOD1_EN) has remained the same for a first minimum duration, said at least a first part (450) of said module being powered by a first supply voltage (VBAT_FCT1) from a battery. Figure for the abbreviation: Fig. 3

Description

Title of the invention: Power supply for an electronic device Technical field

[0001] The present description relates generally to electronic systems and devices, and the power supply of these systems and devices. Prior art

[0002] The most complex electronic devices such as computers, smartphones and tablets today have a multitude of functionalities that can be implemented by different modules and circuits included in these devices.

[0003] Managing the power supply of these circuits and modules becomes increasingly complex as new features are added.

[0004] It would be desirable to be able to improve at least in part certain aspects of known electronic devices, and more particularly their power supply management. Summary of the invention

[0005] There is a need for electronic devices that manage their power supply more reliably.

[0006] There is a need for electronic devices that consume less power.

[0007] One embodiment overcomes all or part of the drawbacks of known electronic devices.

[0008] One embodiment provides a power management circuit for an electronic module comprising: - a first state machine configured to receive a first command to deactivate said module, and to verify that said first command remains the same for a first minimum duration; and - a second state machine configured to cut off the power supply to at least a first part of said module when said second state machine receives a second command from the first state machine indicating that said first command has remained the same for a first minimum duration, said at least a first part of said module being powered by a first supply voltage from a battery.

[0009] Another embodiment provides a method for powering an electronic module comprising a power management circuit for an electronic module comprising: - a first state machine configured to receive a first command to deactivate said module, and to verify that said first command remains the same for a first minimum duration; and - a second state machine configured to cut off the power supply to at least a first part of said module when said second state machine receives a second command from the first state machine indicating that said first command has remained the same for a first minimum duration, said at least a first part of said module being powered by a first supply voltage from a battery.

[0010] According to one embodiment, the first deactivation command corresponds to a first state of a first control signal of said module.

[0011] According to one embodiment, the first signal is obtained from a second control signal of the module and a third signal indicating the state of a second supply voltage of the module.

[0012] According to one embodiment, when the first control signal changes to the first state, the first state machine is configured to count the time during which the first signal remains in this first state.

[0013] According to one embodiment, upon receipt of said second command, the second state machine is configured to electrically isolate said first part of said module from other circuits.

[0014] According to one embodiment, upon receipt of said second command, the second state machine is configured to allow the power supply of at least a second part of said module, distinct from said first part, to operate.

[0015] According to one embodiment, the first state machine is configured to provide the second command regardless of the operating state of the first module.

[0016] According to one embodiment, the management circuit further comprises a wake-up circuit configured to start said module upon receipt of a third start command.

[0017] According to one embodiment, in which the third start command is generated when the first control signal of said module changes to a second state, different from the first state.

[0018] Another embodiment provides an electronic module comprising a power management circuit described previously.

[0019] According to one embodiment, the electronic module is a secure element.

[0020] According to one embodiment, the electronic module is configured to implement implements near-field communication.

[0021] Another embodiment provides an electronic device comprising a battery and an electronic module described above. Brief description of the drawings

[0022] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0023] [Fig.l] represents, very schematically and in the form of blocks, an example of an electronic device;

[0024] [Fig.2] represents, very schematically and in the form of blocks, the different states of a circuit or module of the device of [Fig.l];

[0025] [Fig. 3] represents, very schematically and in the form of blocks, an embodiment of an electronic device;

[0026] [Fig.4] represents, very schematically and in the form of blocks, an embodiment of a power management circuit included in the embodiment of [Fig.3];

[0027] [Fig.5] represents a block diagram illustrating the operation of the device of [Fig.3];

[0028] [Fig.6] represents timing diagrams illustrating the operation of the device of [Fig.3]; and

[0029] [Fig.7] represents other timing diagrams illustrating the operation of the device of [Fig.3]. Description of the embodiments

[0030] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been shown and are detailed. In particular, the details of the circuits of the embodiments described below are not described in their entirety, and are within the scope of the person skilled in the art.

[0032] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0033] In the following description, when referring to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., are used, unless otherwise specified, to refer to the orientation of the figures.

[0034] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0035] [Fig.l] represents, very schematically and in the form of blocks, an example of electronic device 100.

[0036] The electronic device 100 comprises a processor 101 (CPU) adapted to implement different processing of data stored in memories and / or provided by other circuits and / or modules of the device 100.

[0037] The electronic device 100 further comprises different types of memories 102 (MEM), including, for example, a read-only memory, a volatile memory, and / or a non-volatile memory. Each memory is adapted to store different types of data.

[0038] The electronic device 100 further comprises power supply circuits 103 (ALIM). The circuits 103 manage the power supply of the various circuits and modules of the device 100. The circuits 103 comprise, for example, a battery, means for recharging the battery, voltage adaptation circuits, such as voltage regulators, etc.

[0039] The electronic device 100 may further comprise circuits 104 (NFC) adapted to implement near field communication, or near field communication module 104, or NFC module 104. The NFC module 104 comprises, for example, oscillating / resonant circuits, data transmission and reception circuits, data conversion circuits, power supply control circuits, etc.

[0040] The electronic device 100 further comprises circuits or modules 105 (FCT) adapted to implement different functions of the device 105. The circuits 35 are diverse, and may comprise measurement circuits, data analysis circuits, sensors, etc. According to one example, the circuits or modules 105 may comprise a secure element adapted to manage sensitive data, or secret data.

[0041] The electronic device 100 further comprises input and output circuits 106 (FO) of the device 100. The circuits 106 comprise, for example, connectors allowing the device 100 to transmit and receive data, display devices, etc.

[0042] The electronic device 100 further comprises one or more communication buses 107 adapted to connect two, or more than two, circuits or modules of the device 100 to each other. A single bus 107 is shown in [Fig.l]. The bus or buses 100 can allow data and / or instruction signals, but also energy to be transferred between two or more circuits or modules of the device 100.

[0043] [Fig.2] represents, very schematically and in the form of blocks, a module 200 of the device 100 described in relation to [Fig.1] and its different operating modes.

[0044] The module 200 may be different modules or circuits of the device 100. According to one example, the module 200 is an NFC module of the type of the module 104 described in relation to [Fig.l]. According to another example, the module 200 is one of the circuits 105 described in relation to [Fig.l]. According to one example, the module 200 is one of the circuits 106 described in relation to [Fig.l].

[0045] The module 200 has several operating modes, each having a different power supply mode.

[0046] A first operating mode of the module 200 is the active mode 201 (ACT), or full power mode, in which the module 200 is powered to be able to implement all of its functionalities, in other words, all of the circuits and components of the module 200 are likely to be powered to be implemented. It is during this operating mode that the energy consumption of the module 200 is likely to be maximum.

[0047] A second operating mode of the module 200 is the low power mode 202 (LOW P), in which the module 200 is powered only to implement a reduced number of functionalities, so as to save energy. In other words, during this operating mode, not all of the circuits and components of the module can be powered at the same time. According to another example, during this mode, the clock frequencies of the processor(s) of the module 200 are reduced. According to one example, the module 200 may comprise several different low power modes making it possible to implement different functionalities of the module 200.

[0048] A third operating mode of the module 200 is the very low power mode 203 (HIB), or hibernation mode, in which the module 200 is powered only to implement a very small number of functionalities. The very low power mode 203 is a variant of the low power mode 202. During this mode, the module 200 reduces its energy consumption to a minimum by implementing only very few functionalities. According to one example, during this operating mode the module only implements the functionalities allowing it to "wake up", that is to say only the functionalities allowing it to switch to another operating mode. According to another example, during this operating mode, the module only implements the functionalities allowing it to "wake up" and functionalities consuming only very little energy.

[0049] A fourth operating mode of the module 200 is the inactive mode 204 (DIS), or deactivated mode, in which the module 200 is only powered to implement a very reduced number of functionalities, all of its main functionalities being deactivated compared to the very low consumption mode, and cannot implement any of its functionalities except the functionalities allowing it to "wake up". In practice, during the inactive mode 204, the module 200 is disconnected from its energy source, the battery of the device 100 for example. According to a variant, if the module 200 is used as an intermediary to power other circuits or modules, then this functionality can be preserved during the inactive mode.

[0050] [Fig. 3] represents, very schematically and in the form of blocks, an embodiment of an electronic device 300, of the type of the device 100 described in relation to [Fig. 1], comprising an embodiment of an electronic module 301 (M0D1) of the type of the module 200 described in relation to [Fig. 2].

[0051] Only a part of the device 300 is shown in [Fig.3]. This part comprises: - the module 301; - a power supply circuit 302; - a 303 processor; - two electronic modules 304 (M0D2) and 305 (M0D5); and - an electrical insulation circuit 306 (ISO).

[0052] The power supply module 302 comprises a battery 3021 (BAT) and a control circuit 3022 (CMD). The power supply module provides power supply voltages to the various modules of the device 300 via the control circuit 3021 or directly via the battery. More particularly, the battery 3021 directly provides a power supply voltage VBAT, and the control circuit 3022 provides, via a power supply rail, at least one input / output power supply voltage VIO. The voltage VIO is a power supply voltage whose state depends on the operating state of the device 300. According to one example, when the device 300 is off, the voltage VIO is in a low state.

[0053] As previously stated, the module 301 is of the type of the module 200 described in relation to [Fig. 2]. According to one embodiment, the module 301 is adapted to implement at least one functionality, for example two functionalities in the case of [Fig. 3]. In addition, according to one embodiment, the module 301 directly receives the supply voltage VBAT from the battery 3021 of the supply circuit 302, without the control circuit 3022 serving as an intermediary. The module 301 further receives, via a supply rail, the input / output supply voltage VIO. Thus, the module 301 comprises: - first circuits 3011 (FCT1) implementing a first functionality; - second circuits 3012 (FCT2) implementing a second functionality; and - a 3013 power management circuit (ALIM MANAG).

[0054] According to one embodiment, the first functionality is the main functionality of the module 301, and when the module 301 is in an inactive mode, of the type of mode 204 described in relation to [Fig.2], the first functionality is not powered. The first circuits 3011 receive, from the circuit 3013, a supply voltage VBAT_FCT1, and a control signal FCT1_EN.

[0055] Furthermore, and according to one example, the first functionality is adapted to exchange data and / or energy with one or more modules of the device 300, for example the module 305 in [Fig. 3]. When the module 301 is in an inactive mode, the module 301, and more particularly the circuits 3011, are electrically isolated from the module 305 via the isolation circuit 306. Thus when the module 301 is in an inactive mode, the first functionality is not powered, and the isolation circuit 306 is activated.

[0056] According to one example, the second functionality is an auxiliary functionality of the module 301, and when the module 301 is in an inactive mode, of the type of mode 204 described in relation to [Fig. 2], the second functionality is always powered. The second circuits 3012 receive, from the circuit 3013, a supply voltage VBAT_FCT2, and a control signal FCT2_EN. According to one example, the second functionality can be used to power one or more other modules or circuits of the device 300. In [Fig. 3], the second functionality exchanges data and / or energy with the module 304.

[0057] According to one embodiment, the power management circuit 3013 directly receives a supply voltage VBAT from the battery 3021 of the power supply circuit 302 and the voltage VIO from the control circuit 3022 of the power supply circuit 302. The circuit 3013 further receives a control signal MOD1_EN from the module 301, for example from the processor 303. The control signal MOD1_EN is an activation signal for the module 301, and makes it possible, more particularly, to deactivate the module 301. In other words, when the activation signal is in a first state, for example a high state, the module 301 is active, in a low consumption mode or in a very low consumption mode, such as the modes 201, 202, or 203 described in relation to [Fig. 2], and when the activation signal is in a second state, for example example a low state, the module 301 goes into the inactive mode, of the type of mode 204 described in relation to [Fig.2], regardless of the operating mode in which module 301 was previously. Circuit 3013 therefore makes it possible to manage the power supply of the various functionalities of module 301 according to the state of the control signal MOD1_EN.

[0058] Furthermore, the communication bus transmitting the control signal MOD1_EN is powered by the supply voltage VIO. If the supply voltage VIO is no longer able to supply the MOD1_EN control signal, for example if the VIO supply voltage is in a low state, then the MOD1_EN control signal is also in a low state. The power management circuit 3013 may include one or more circuits for differentiating a low state of the MOD1_EN signal coming from a command or a low state of the VIO supply voltage. Such a circuit is described in relation to [Fig.4].

[0059] An example of embodiment of the circuit 3013 and its operation is detailed in relation to figures 4 to 7.

[0060] [Fig.4] represents, very schematically and in the form of blocks, a circuit 400 of the type of circuit 3013 described in relation to [Fig.3], and circuits 450 (FCT1) of the type of circuits 3011 described in relation to [Fig.3].

[0061] As described in relation to [Fig. 3], the circuit 400 is a power management circuit for an electronic module of an electronic device. This electronic module receives a supply voltage VBAT supplied by a battery, and an input / output supply voltage VIO supplied by a control circuit of a power supply circuit. The voltages VBAT and VIO are identical to the voltages VBAT and VIO described in relation to [Fig. 3]. In addition, the electronic module is adapted to receive the control signal MOD1_EN described in relation to [Fig. 3]. In the example of [Fig. 4], the control signal MOD1_EN comprises two states, including: - a high state indicating that the module comprising the circuit 400 is in an active mode, a low consumption mode, or a very low consumption mode; and - a low state indicating that the module comprising the circuit 400 is in an inactive state, or indicating that the supply voltage VIO is not prepared to supply the communication bus delivering the voltage MOD1_EN.

[0062] The person skilled in the art will know how to adapt the circuit 400 with a control signal MOD1_EN comprising the following two states: - a low state indicating that the module comprising the circuit 400 is in an active mode, a low consumption mode, or a very low consumption mode; and - a high state indicating that the module comprising the circuit 400 is in an inactive state, or indicating that the supply voltage VIO is not prepared to supply the communication bus delivering the voltage MOD1_EN.

[0063] The circuit 400 comprises a connection rail 401 (FO ALIM) receiving the supply voltage VIO and the control signal MOD1_EN. The connection rail 401 is supplied by the supply voltage VIO provided by the supply rail of the supply circuit of the electronic device comprising the module comprising the circuit 400.

[0064] The circuit 400 further comprises a voltage detector circuit 402 (VOLT DETECT) adapted to detect the presence or absence of the supply voltage VIO. For this, the circuit 402 receives the supply voltage VIO, and provides at the output an information signal VIO_EN indicating by a first state that the supply voltage VIO is present, or is high enough to supply the connection rail 401, and therefore the module comprising the circuit 400, and by a second state that the supply voltage VIO is not present, or is not high enough to supply the connection rail 401.

[0065] The circuit 400 further comprises a circuit 403 (MOD1_EN_CLAMP), adapted to check the state of the control signal MOD1_EN as a function of the state of the signal VIO_EN. For this, the circuit 403 receives the signals MOD1_EN and VIO_EN, and provides as output an information signal MOD1_EN_CLAMP. The information signal MOD1_EN_CLAMP comprises a high state indicating that the module comprising the circuit 400 receives a VIO supply voltage and is in an active mode, a low consumption mode, or a very low consumption mode. The information signal MOD1_EN_CLAMP further comprises a low state indicating that the module is in an inactive mode and / or does not receive a VIO supply voltage. The circuit 403 can, furthermore, make it possible to determine whether the MOD1_EN signal is in a low state because the VIO supply voltage is in a low state, or whether the MOD1_EN signal is in a low state due to the sending of a command from the processor.

[0066] The circuit 400 further comprises a first state machine 404 (FSM1_MOD1_EN) receiving the information signal MOD1_EN_CLAMP and providing as output a request signal DIS_REQ. The role of the state machine 404 is to verify that a request from the processor to put the module into an inactive state has a sufficiently long duration. In other words, the state machine 404 verifies that after its transition to a low state, the signal MOD1_EN_CLAMP remains in this low state for a sufficiently long time, that is to say at least for a minimum duration. For this, at each falling edge of the signal MOD1_EN_CLAMP, the state machine 404 starts a counter. If the value of this counter exceeds a threshold value without the MOD1_EN_CLAMP signal having a rising edge, i.e. without the MOD1_EN signal having a rising edge or without the VIO_EN signal having a falling edge, then the module must be switched to an inactive mode.On the contrary, if the MOD1_EN_CLAMP signal has a rising edge, that is to say if one of the MOD1_EN and VIO_EN signals has a rising or falling edge, before the counter value reaches the said threshold value, then the module must not go into an inactive mode. The advantage of this state machine is that it avoids "false" commands allowing the module to go into an inactive mode. The signal . DIS_REQ provided by the state machine indicates whether the module should be put into an inactive mode or not.

[0067] The circuit 400 further comprises an edge detection circuit 405 (MOD1_EN EDGE_DETECT) receiving the signal MOD1_EN_CLAMP, and providing, at output, rising edge MOD1_EN_R and falling edge MOD1_EN_F alert signals.

[0068] The circuit 400 further comprises a wake-up circuit 406 (WUP) receiving the rising edge alert signals MOD1_EN_R and falling edge alert signals MOD1_EN_F, and providing, at output, a wake-up signal WUP_REQ. The circuit 406 makes it possible to send a wake-up command each time the signal MOD1_EN_CLAMP has a rising or falling edge.

[0069] The circuit 400 further comprises a second state machine 407 receiving the signals DIS_REQ and WUP_REQ, and providing the signal FCT1_EN. The state machine 407 is made active by the wake-up signal WUP_REQ. The state machine 407 is used to start or stop the power supply of the module according to the command transmitted by the signal DIS_REQ. The state machine 407 is further used to start or stop the isolation circuit(s) of the electronic device.

[0070] Finally, the circuit 400 further comprises a power supply circuit 408 (INT PWR SUPP) adapted to supply the battery supply voltage VBAT to the circuits 450 if the state machine 407 requests it, or to stop the power supply by the supply voltage VBAT. For this, the circuit 408 receives the voltage VBAT and the signal FCT1_EN, and provides the signal VBAT_FCTL as output. The circuit 400 may, for example, comprise regulators making it possible to adapt the amplitude of the voltage VBAT.

[0071] The circuits 450 may comprise a reset circuit 451 receiving the signal MOD1_EN_CLAMP.

[0072] [Fig. 5] represents a block diagram illustrating the operation of the circuit 400 described in relation to [Fig. 4]. More particularly, [Fig. 5] illustrates the operation of the circuit 400 when the module comprising it switches from an active mode, a low power mode or a very low power mode, to an inactive mode. [Fig. 5] further illustrates the operation of the circuit 400 when the module which switches from an inactive mode to an active mode, a low power mode or a very low power mode.

[0073] It should be noted that in [Fig.5], the supply voltage VIO remains in a high state. The cases where the supply voltage VIO goes to a low state are described in relation to Figures 6 and 7.

[0074] At an initial step 501 (Ist STATE), the module is in an active mode, a low consumption mode or a very low consumption mode, i.e. a mode in which at least part of the circuitry and / or functionality of the module is powered. The MOD1_EN control signal is in a high state.

[0075] At a step 502 (MOD1_EN F), the control signal MOD1_EN has a falling edge, and therefore changes from the high state to the low state. In other words, the processor, or the circuit providing the control signal MOD1_EN, indicates that the module must go into an inactive mode. It is assumed that the voltage VIO is present.

[0076] At a step 503 (WUP + RST + START COUNTER), the circuit 403 provides a signal MOD1_EN_CLAMP presenting and a falling edge to the circuit 405, to the state machine 404 and to the reset circuit 451 of the circuits 450.

[0077] Circuit 405 detects this falling edge and informs circuit 406 via signal MOD1_EN_F. Circuit 406 then sends a wake-up request, via signal WUP_REQ, to state machine FSM2_POWER. According to one example, circuit 406 can also send this wake-up request to other circuits of the device comprising the module.

[0078] State machine 404 receives the MOD1_EN_CLAMP signal and starts the counter at the time of the falling edge. The value C of the counter increases as long as the MOD1_EN_CLAMP signal does not have a falling edge.

[0079] The reset circuit 451 receives the signal MOD1_EN_CLAMP, and, according to a example, initiates the reset of the functionality implemented by the 450 circuits.

[0080] At a step 504 (C>CMAX), if the signal MOD1_EN_CLAMP has a rising edge, i.e. if the signal MOD1_EN has a rising edge or if the signal VIO_EN has a falling edge, before the value C exceeds a threshold value CMAX (output N), then the next step is a step 505 (WUP -> ACT). On the contrary, if the value C of the counter of the state machine 404 exceeds the threshold value CMAX without the signal MOD1_EN_CLAMP having a rising edge, i.e. without the signal MOD1_EN having a rising edge or without the signal VIO_EN having a falling edge, (output Y), then the next step is a step 506 (ISO).

[0081] At step 505, the signal MOD1_EN_CLAMP did not remain in a low state long enough for the command to switch to an inactive mode to be taken into account. The circuit 405 detects the rising edge of the signal MOD1_EN_CLAMP and informs the circuit 406, via the signal MOD1_EN_R, which then takes care of waking up the useful circuits of the module.

[0082] At step 506, the MOD1_EN_CLAMP signal has remained low long enough for the command to switch to an inactive mode to be taken into account. The state machine 404 sends a request to switch to inactive mode, via the DIS_REQ signal, to the state machine 407.

[0083] At a step 507 (DIS), the state machine 407 receives the request, and cuts the power supply to the circuits 450. For this, the state machine 407 generates the signal FCT1_EN and sends it to the circuit 408. According to an example, if the state machine 407 is adapted to provide a signal of the type of the signal FCT1_EN for each functionality implemented by the module. If a functionality, of the type of the second functionality of the circuits 3012, must remain powered during the inactive mode, the state machine 407 gives the request to the circuit 408.

[0084] At a step 550 (MOD1_EN R), the module has remained in an inactive mode for some time, and receives a command to switch to an active mode, a low-power mode or a very low-power mode. In other words, the MOD1_EN signal has remained in one state for some time, and at the time of step 550, has a rising edge. It is always assumed that the VIO voltage is still present.

[0085] At a step 551 (WUP -> ACT), the module is switched to an active mode. As the VIO voltage is present, the MOD1_EN_CLAMP signal also has a rising edge which is detected by the circuit 405. The wake-up circuit 406 receives the information and then wakes up the state machine 407 and all the circuits useful for starting the module.

[0086] Figures 6 and 7 include 6 timing diagrams (A), (B), (C), (D), (E) and (F) illustrating more precise examples of operations of the module comprising the circuit 400, and in particular the different hardware and software states implemented during the transition from an active mode to an inactive mode.

[0087] The module is considered to include different states including: - the active state ACT corresponding to the active mode of the module, or to a low consumption mode of the module, or a very low consumption mode of the module; - the hardware startup state HW_B during which the module starts its circuits and components; - the software startup state SW_B during which the module starts the software(s) it implements; - the RST reset state during which the module restarts; - the inactive state DIS corresponding to the inactive mode of the module.

[0088] Each timing diagram (A), (B), (C), (D), (E) and (F) comprises a curve representing the time evolution of the input / output supply voltage VIO, a curve representing the time evolution of the signal MOD1_EN, or voltage MOD1_EN, and an axis illustrating the different states of the module during the evolution of the voltages VIO and MOD1_EN.

[0089] The timing diagram (A) illustrates the case where a deactivation request, i.e. a request to switch to inactive mode, is sent to the module. In addition, the timing diagram (A) illustrates the case where the deactivation request is long enough to be considered.

[0090] At an initial time tAO, the module is in an active state ACT and the voltages VIO and MOD1_EN are both in a high state.

[0091] At a time tAl, after the state tAO, the signal MOD1_EN has a falling edge, and goes to a low state. The voltage VIO remains in a high state. The reset circuit 451 of the circuits 450 of the module starts and resets the functionality of the circuits 450 as described previously. The module is then in the reset state RST. During this state RST, the state machine 404 starts its counter. In the case of the timing diagram (A), the value C of the counter exceeds the threshold value CMAX, the module therefore goes to the inactive state DIS.

[0092] At a time tA2, after state tAl, the voltage VIO has a falling edge, and goes to a low state. The signal MOD1_EN remains in a low state. The module is still in inactive mode.

[0093] At a time tA3, after state tA2, voltage VIO has a rising edge and goes to a high state. Signal MOD1_EN remains in a low state. The module goes from the inactive state DIS to the hardware start state HW_B. At the end of state HW_B, the circuitry of the module is started, in particular, state machine 404 is started and detects that signal MOD1_EN is still in the low state. State machine 404 then starts its counter and the module returns to the reset state RST. Value C of the counter again exceeds threshold value CMAX, so the module goes to the inactive state DIS.

[0094] At a time tA4, after state tA3, the signal MOD1_EN has a rising edge and goes to a high state. The voltage VIO remains at a high state. The module goes to the hardware startup state HW_B, then to the software startup state, and finally to the active state.

[0095] The timing diagram (B) illustrates the case where a deactivation request, i.e. a request to switch to inactive mode, is sent to the module. In addition, the timing diagram (B) illustrates the case where the deactivation request is not long enough to be taken into account.

[0096] At an initial time tBO, the module is in an active state ACT and the voltages VIO and MOD1_EN are both in a high state.

[0097] At a time tB 1, after state tBO, the signal MOD1_EN has a falling edge, and goes to a low state. The voltage VIO remains in a high state. As described previously, the module is then in the reset state RST. During this RST state, the state machine 404 starts its counter. In the case of the timing diagram (B), the value C of the counter does not reach the threshold value CMAX.

[0098] At a time tB2, after state tB1, the voltage VIO has a falling edge and goes to a low state. The signal MOD1_EN remains at a low state. The module then goes into a software startup state, then when its software is started into a state to be defined OS. Here it is the software of the module, and also of the device comprising the module, which defines what can happen.

[0099] At a time tB3, after state tB2, the voltage VIO has a rising edge, and goes to a high state. The signal MOD1_EN remains in a low state. The module goes from the inactive state DIS to the hardware start state HW_B. At the end of state HW_B, the circuits of the module are started, in particular, the state machine 404 is started and detects that the signal MOD1_EN is still in the low state. The state machine 404 then starts its counter, and the module returns to the reset state RST. The value C of the counter does not reach the threshold value CMAX.

[0100] At a time tB4, after state tB3, the signal MOD1_EN has a rising edge, and goes to a high state. The voltage VIO remains at a high state. The module goes to the software start state SW_B, then to the active state.

[0101] Timing diagram (C) illustrates a variant of the case of timing diagram (A), where a deactivation request, i.e. a request to switch to inactive mode, is sent to the module because the power rail providing the VIO supply voltage is turning off. In addition, timing diagram (C) illustrates the case where the deactivation request is long enough to be taken into account.

[0102] At an initial time tCO, the module is in an active state ACT and the voltages VIO and MOD1_EN are both in a high state.

[0103] At a time tCl, after the state tCO, the signal MOD1_EN has a falling edge, and goes to a low state. The voltage VIO remains in a high state. As described previously, the module is then in the reset state RST. During this state RST, the state machine 404 starts its counter. In the case of the timing diagram (C), the value C of the counter exceeds the threshold value CMAX, the module therefore goes to the inactive state DIS.

[0104] At a time tC2, after state tCl, voltage VIO has a falling edge and goes to a low state. Signal MOD1_EN remains in a low state. As detected by circuit 403, signal MOD1_EN is in a state because the supply voltage is at a low state and not because the processor is asking the module to go to an inactive mode. Circuit 403 therefore deduces that circuits 450 must be restarted. The module therefore goes to the hardware startup state HW_B, then to the software startup state SW_B, and finally to a software state to be defined OS, for example a low power mode or a very low power mode.

[0105] At a time tC3, after state tC2, the voltage VIO has a rising edge, and goes to a high state. The signal MOD1_EN remains in a low state. The circuits of the module being started, the state machine 404 detects that the MOD1_EN signal is still low. The state machine 404 then starts its counter, and the module returns to the reset state RST. The value C of the counter exceeds, for example, the threshold value CMAX, so the module goes to the inactive state DIS.

[0106] At a time tC4, after state tC3, the signal MOD1_EN has a rising edge, and goes to a high state. The voltage VIO remains at a high state. The module goes to the hardware startup state HW_B, then to the software startup state, and finally to the active state.

[0107] Timing diagram (D) illustrates a variant of the case of timing diagram (B), where a deactivation request, i.e. a request to switch to inactive mode, is sent to the module because the power supply rail providing the VIO supply voltage is turning off. In addition, timing diagram (D) illustrates the case where the deactivation request is not long enough to be taken into account.

[0108] At an initial time tDO, the module is in an active state ACT and the voltages VIO and MOD1_EN are both in a high state.

[0109] At a time tDl, after the state tDO, the signal MOD1_EN has a falling edge, and goes to a low state. The voltage VIO remains in a high state. As described previously, the module is then in the reset state RST. During this state RST, the state machine 404 starts its counter. In the case of the timing diagram (D), the value C of the counter does not reach the threshold value CMAX.

[0110] At a time tD2, after state tD1, the voltage VIO has a falling edge, and goes to a low state. The signal MOD1_EN remains at a low state. The module then goes into a software startup state, then when its software(s) are started into a state to be defined OS.

[0111] At a time tD3, after state tD2, voltage VIO has a rising edge and goes to a high state. Signal MOD1_EN remains in a low state. The module goes from the inactive state DIS to the hardware start state HW_B. At the end of state HW_B, the circuitry of the module is started, in particular, state machine 404 is started and detects that signal MOD1_EN is still in the low state. State machine 404 then starts its counter and the module returns to the reset state RST. Value C of the counter does not reach threshold value CMAX.

[0112] At a time tD4, after state tD3, the signal MOD1_EN has a rising edge, and goes to a high state. The voltage VIO remains at a high state. The module goes to the software start state SW_B, then to the active state.

[0113] The timing diagram (E) illustrates a module startup sequence, i.e. the startup of the VIO power supply, then the transition from an inactive state to an active state.

[0114] At an initial time tEO, the voltage VIO and the signal MOD1_EN are in a low state. The module is in an inactive state DIS.

[0115] At a time tEl, subsequent to the state tEO, the voltage VIO has a rising edge, and goes to a high state. The signal MOD1_EN remains in a low state. The module goes to a hardware start state HW_B. At the end of the state HW_B, the circuits of the module are started, in particular, the state machine 404 is started and detects that the signal MOD1_EN is still in the low state. The state machine 404 then starts its counter, and the module returns to the reset state RST. The value C of the counter does not reach the threshold value CMAX, and the module goes to an inactive state DIS.

[0116] At a time tE2, after state tEl, the signal MOD1_EN has a rising edge, and goes to a high state. The voltage VIO remains at a high state. The module can start, it then goes to the hardware start state HW_B, then to the software start state, and finally to the active state.

[0117] The timing diagram (F) illustrates a module reset sequence, i.e. the transition from an active state ACT to an inactive state DIS then to an active state ACT.

[0118] At an initial time tFO, the voltage VIO and the signal MOD1_EN are in a high state. The module is in an active state ACT.

[0119] At a time tFl, after the state tFO, the signal MOD1_EN has a falling edge, and goes to a low state. The voltage VIO remains in a high state. The reset circuit 451 of the circuits 450 of the module starts and resets the functionality of the circuits 450 as described previously in relation to figures 4 and 5. The module is then in the reset state RST. During this state RST, the state machine 404 starts its counter. In the case of the timing diagram (F), the value C of the counter exceeds the threshold value CMAX, the module therefore goes to the inactive state DIS.

[0120] At a time tF2, after state tFl, the signal MOD1_EN has a rising edge, and goes to a high state. The voltage VIO remains at a high state. The module can start, it then goes to the hardware start state HW_B, then to the software start state SW_B, and finally to the active state ACT.

[0121] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0122] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

Claims

Claims

1. Power management circuit (3013; 400) of an electronic module (104; 105; 106; 200; 300) comprising: - a first state machine (404) configured to receive a first deactivation command (MOD1_EN) of said module (104; 105; 106; 200; 300), and to verify that said first command (MOD1_EN) remains the same for a first minimum duration; and - a second state machine (407) configured to cut off the power supply of at least a first part (3011, 3012; 450) of said module (104; 105; 106; 200; 300) when said second state machine (407) receives a second command (DIS_REQ) from the first state machine (404) indicating that said first command (MOD1_EN) has remained the same for a first minimum duration, said at least a first part (3011, 3012; 450) of said module (104; 105; 106; 200;300) being powered by a first supply voltage (VBAT_FCT1) of a battery, in which the first deactivation command corresponds to a first state of a first control signal (MOD1_EN_CLAMP) of said module (104; 105; 106; 200; 300).;

2. Circuit according to claim 1, in which the first signal (MOD1_EN_CLAMP) is obtained from a second control signal (MOD1_EN) of the module and a third signal (VIO_EN) indicating the state of a second supply voltage (VIO) of the module.

3. A circuit according to claim 1 or 2, wherein, when the first control signal (MOD1_EN_CLAMP) changes to the first state, the first state machine (404) is configured to count the time during which the first signal (MOD1_EN) remains in this first state.

4. Circuit according to claim 1 to 3, wherein, upon receipt of said second command (DIS_REQ), the second state machine (407) is configured to electrically isolate said first part (3011, 3012; 451) of said module from other circuits.

5. Circuit according to any one of claims 1 to 3, wherein, upon receipt of said second command (DIS_REQ), the second state machine (407) is configured to allow operation the power supply of at least a second part (3012, 3011) of said module, distinct from said first part (3011, 3012).

6. Circuit according to any one of claims 1 to 5, wherein the first state machine (404) is configured to provide the second command (DIS_REQ) regardless of the operating state of the first module.

7. Circuit according to any one of claims 1 to 6, wherein the management circuit (3013; 400) further comprises a wake-up circuit (406) configured to start said module (104; 105; 106; 200; 300) upon receipt of a third start command (WUP_REQ).

8. Circuit according to any one of claims 2 to 7, wherein the third start command is generated when the first control signal (MOD1_EN) of said module (104; 105; 106; 200; 300) changes to a second state, different from the first state.

9. Electronic module comprising a power management circuit according to any one of claims 1 to 8.

10.

11. Module according to claim 9, being a secure element. Module according to claim 9 or 10, configured to implement near field communication.

12. An electronic device comprising a battery and an electronic module according to any one of claims 9 to 11.

13. Method for powering an electronic module (104; 105; 106; 200; 300) according to any one of claims 9 to 11 comprising a step of powering said module (104; 105; 106; 200; 300).

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