Radio frequency receiver

Abstract

Radio Frequency Receiver This description concerns a circuit (102) comprising: - a receiving element (104) configured to receive an analog signal; - a receiving chain (106) configured to convert the received analog signal into a digital signal; and - a correction chain (114) configured to generate a digital signal reconstructing the dynamic nonlinearities produced by the receiving chain, based on the digital signal and a first filter, the processing circuit being further configured to generate a corrected signal by removing the reconstructed dynamic nonlinearities from the digital signal. Figure for the abbreviation: Fig. 1

Description

Title of the invention: Radio frequency receiver technical field

[0001] This description relates generally to methods and circuits for receiving radio frequency signals. Previous technique

[0002] High-speed communication networks, such as for example 5G telecommunication networks with a data rate for example between 1 and 10 Gbits per second, require high-frequency carriers.

[0003] However, the electronic components of circuits, such as low-noise amplifiers and analog-to-digital converters, are not always suitable for handling high frequencies. Indeed, when used at high frequencies, these components exhibit defects that cause, in particular, the appearance of non-linearities in a signal. Some non-linearities are frequency-dependent. These non-linearities are called dynamic and are particularly problematic for analog-to-digital converters, especially above 5 GHz.

[0004] The appearance of non-linearities during the conversion of a signal, and following high-frequency sampling, is aggravated by the aging of the components and / or by use subjected to extreme temperature variations, for example in the case of satellites, and / or by manufacturing hazards of the components and circuits.

[0005] There is therefore a need for a solution to correct these non-linearities arising from the receiving chain. In particular, there is a need for a solution to correct these non-linearities by digital signal processing, without prior knowledge of the converted signal. Summary of the invention

[0006] One embodiment provides a circuit comprising: - a receiving element configured to receive an analog signal; - a receiving chain configured to convert the received analog signal into a digital signal; and - a correction chain configured to generate a digital signal reconstructing dynamic non-linearities produced by the receiving chain, based on the digital signal and a first filter, the calculation circuit being further configured to generate a corrected signal by removing the dynamic non-linearities reconstructing the digital signal.

[0007] According to one embodiment, the receiving chain comprises a link circuit, a low noise amplifier and an interleaved analog-to-digital converter.

[0008] According to one embodiment, the above circuit further includes a non-volatile memory storing instructions enabling the programming of the correction chain, the circuit further includes a processor configured to execute the instructions following the reception, by the receiving element, of the analog signal.

[0009] According to one embodiment, the correction chain is implemented by application-specific integrated circuit.

[0010] One embodiment provides a method comprising: - the reception, by a receiving element of a circuit, of an analog signal; - the conversion, via a circuit reception chain, of the analog signal to a digital signal; - the generation, by a correction chain, of a signal estimating dynamic non-linearities produced by the receiving chain, based on the digital signal and on a first digital filter; and - the generation of a corrected digital signal, by removing the reconstructed dynamic non-linearities from the digital signal.

[0011] According to one embodiment, the generation of dynamic nonlinearities by the correction chain comprises: - oversampling of the digital signal; - the application of a second filter to the oversampled signal; - the generation of harmonics and intermodulation products of rank 3 by multiplying by a coefficient the cube of the oversampled and filtered digital signal; - the application of the first filter to the harmonics and intermodulation products of rank 3; and - subsampling of filtered rank 3 harmonics and intermodulation product.

[0012] According to one embodiment, the second filter is an infinite impulse response filter synthesized to reverse the phase rotation induced by an analog filter of the receiving chain.

[0013] According to one embodiment, the first filter is an infinite impulse response digital filter configured to model the analog filter of the receiving chain.

[0014] According to one embodiment, the first filter is a filter configured so that its transfer function corresponds to the transfer function of the receiving chain to within 3dB in amplitude and to within 2° in phase up to the cutoff frequency.

[0015] According to one embodiment, the amplitude transfer function F of the first filter is of the form 'Nb is the number of coefficients in the numerator of the first filter, Na is the number of coefficients in the denominator of the first filter and where the coefficients (aa letL, „ l are optimized following the execution of a optimization algorithm.

[0016] According to one embodiment, the correction chain further includes the application of a gain correction operation.

[0017] According to one embodiment, the correction chain is further configured to oversample the digital signal by a number N, N being an integer greater than or equal to 2, and for example equal to 8.

[0018] According to one embodiment, the above process further includes subsampling the reconstituted third-order harmonics and intermodulation products, the subsampling is for example a decimation by the number N.

[0019] According to one embodiment, the oversampling, by the correction chain, of the undersampled digital signal comprises the application of a plurality of successive operations, each operation comprising: - the insertion of a zero between each sample; and - the application of a low-pass filter with a finite impulse response, or the application of a high-pass filter with a finite impulse response.

[0020] According to one embodiment, the above process further includes the application of a finite impulse response bandpass filter and the application of a delay compensation operation to the digital signal, before generating the corrected digital signal. Brief description of the drawings

[0021] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0022] [Fig.1] represents in a very schematic way and in block form, an electronic device according to an embodiment of the present description;

[0023] [Fig.2] represents in a very schematic way and in block form, an embodiment of a reception chain configured to convert an analog signal to a digital signal;

[0024] Figure 3 illustrates the spectrum of a signal processed, in the second Nyquist band, by the reception chain of [Fig.2] during conversion;

[0025] Figure 4 illustrates frequency characteristics during the implementation of a dynamic nonlinearity reconstruction process using a correction chain, involving oversampling, according to an example of implementation of this description;

[0026] [Fig.5A] illustrates, in block form, a method for reconstructing dynamic non-linearity and correcting a signal according to an example of an embodiment of the present description;

[0027] [Fig.5B] is a block diagram illustrating an example of a digital representation of the receiving chain;

[0028] [Fig. 6] is a flowchart illustrating steps, carried out upstream and from of measurements, of synthesis of a filter of the correction chain according to an example of implementation of the present description;

[0029] [Fig.7A] is a graph illustrating the amplitudes of the transfer functions of the synthesized filter and a simulated filter;

[0030] [Fig.7B] is a graph illustrating the phases of the transfer functions of the synthesized filter and the simulated filter;

[0031] [Fig.8A] is a graph illustrating the amplitudes of the transfer functions of another synthesized filter and another filter used in the correction chain;

[0032] [Fig.8B] is a graph illustrating the phases of the transfer functions of the other synthesized filter and the other filter used in the correction chain;

[0033]

[0034] [Fig.9] is a graph illustrating the correction of a signal according to an example of an embodiment of the present description;

[0035] Fig. 1OA is a graph illustrating the signal-to-noise ratio of a converted multi-tone signal before correction; and

[0036] [Fig.1OB] is a graph illustrating the signal-to-noise ratio of a multi-tone signal converted after correction according to an embodiment of the present description. Description of the implementation methods

[0037] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0038] For the sake of clarity, only the steps and elements necessary for understanding the described embodiments have been shown and are detailed. In particular, the various sampling, oversampling, and undersampling methods are not described in detail and are known to those skilled in the art.

[0039] Unless otherwise specified, when referring to two interconnected elements, this means directly connected without intermediate elements other than conductors, and when referring to two connected (in English "coupled") elements between them, this means that these two elements can be connected or linked via one or more other elements.

[0040] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0041] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0042] Fig. 1 represents, in a very schematic way and in block form, an electronic device 100 comprising an integrated circuit 102 according to an embodiment of the present description.

[0043] The electronic device 100 further comprises a receiving element 104, for example an antenna, configured to receive analog signals at a high data rate. By way of example, the receiving element 104 is configured to receive an RF (Radio Frequency) signal with a frequency in the range of, for example, 1 to 30 GHz, and transmitting data at a rate between 10 gigasamples per second and 15 gigasamples per second.

[0044] The electronic device 100 is for example a wireless and / or mobile device, such as computer equipment, a smartphone, etc.

[0045] The circuit 102 further includes a receiving circuit 106 (RECEIP. CHAIN) comprising a front-end circuit 108 (RF FRONT END) and an analog-to-digital converter 110 (ADC). The receiving circuit 106 is configured to generate a digital signal based on an analog signal received by the receiving element 104.

[0046] By way of example, the receiving element 104 is connected to the receiving circuit 106 via one or more wires 112.

[0047] According to one embodiment, the circuit 102 further includes a correction chain 114. The correction chain 114 is configured to correct the digital signal. By way of example, the correction includes the suppression of dynamic nonlinear noise occurring during the conversion of the analog signal by the receiver circuit 106. The nonlinear noise is initially static noise; following processing by the front-end circuit 108, and in particular by a filter of the front-end circuit 108, this noise becomes dynamic. Indeed, the filter of the front-end circuit 108 modifies the phase and amplitude of the nonlinearities according to their frequency. The correction chain 114 is, for example, connected to the receiver circuit 106 via a bus 116.

[0048] The circuit 102 further includes, for example, a non-volatile memory 118 (NV MEM), a generic processor 120 (CPU), a volatile memory 122 (RAM), for example a random access memory and / or a computing unit 124. The computing unit 124 includes, for example, one or more hardware accelerators.

[0049] According to one embodiment, the correction chain 114 is implemented by an application-specific integrated circuit (ASIC). According to another embodiment, the non-volatile memory 118 comprises instruction codes 126 (INSTRUCTIONS) configured to, when executed by the processor 120 and / or the calculation circuit 124, program the correction chain 114 and correct the digital signal.

[0050] By way of example, the correction includes the suppression of dynamic non-linear noise occurring during the conversion of the analog signal by the receiving circuit 106.

[0051] Figure 2 represents in a very schematic way and in block form, an embodiment of the reception chain 106 configured to convert an analog signal x(t) received for example via the receiver 104, into a digital signal z[k], where the variable * is a time variable and the variable & is a discrete variable.

[0052] The receiving circuit 106 includes the front-end circuit 108 and the analog-to-digital converter 110.

[0053] The front-end circuit 108 includes, for example, a balancing circuit 200 (BALUN, from the English "Balanced to Unbalanced") configured to transform the analog signal x(t) into differential signals xp(t), equal to the signal x(t), and Xn(t), equal to the opposite of the signal x(t). The front-end circuit 108 further includes a low-noise amplifier circuit 202 (LNA, from the English "Low Noise Amplifier") configured to generate analog signals yp(t) and yn(t) by amplifying the analog signals xp(t) and xn(t) while minimizing the noise induced by the amplifier 202 itself.

[0054] The analog signals yp(t) and yn(t) are then supplied to the analog-to-digital converter 110. By way of example, converter 110 is a time-interleaved analog-to-digital converter (TiADC) configured to sample the analog signals y(t) and y(t) at very high frequencies, for example at a sampling frequency Fs between 1 and 10 GHz. By way of example, converter 110 comprises several analog-to-digital converters in parallel.

[0055] The converter 110 includes, for example, a track and hold circuit 204 configured to sample the analog signals yp(t) and y(t), for example by blocking them for a given period of time. In another example, the 204 circuit is a sample-and-hold circuit.

[0056] The converter 110 further includes a quantizer 206 (QUANTIZER) configured to quantize, or encode, the blocked analog signals into digital signals k] and JH[&], on a plurality of bits.

[0057] Fig. 3 illustrates the spectrum of a signal processed by the receiving chain of Fig. 2 during conversion.

[0058] When the input signal has frequency components in the GHz range and the sampling frequency is also in the GHz range, the low-noise amplifier 202 and the converter 110 generate significant dynamic nonlinearities during signal processing, which impair the quality of the converted signal. In particular, these nonlinearities add noise to the signal, resulting in a decrease in the signal-to-noise ratio (SNR) and therefore a loss of information.

[0059] A graph 300 illustrates the signal x(t) in the frequency domain. In particular, graph 300 illustrates the magnitude |X(t)| of the spectrum of the signal x(t) as a function of the frequency f, expressed in GHz. The spectrum is then composed of two parts 302 and 304 symmetrical with respect to the axis f = 0. In this example, the received signal is in the second Nyquist band, between FJ and Fs, where Fs is the sampling period.

[0060] A graph 306 illustrates the spectrum \Y(f) | of the signal yp(t) at the output of the front circuit 108. The spectrum then includes nonlinearities 308, resulting for example from the processing of the high-frequency signal by the amplifier 110. The nonlinearities 308 include for example harmonics and intermodulation products of rank 3. The nonlinearities 308 also include for example harmonics of rank 2 and / or of rank greater than 3 and / or frequency components resulting from intermodulation products (in English "spurs").

[0061] A graph 310 illustrates the spectrum |Z( / ) | of the signal z[Æ] at the output of the converter 110.

[0062] The spectrum |Y(f)| was, for example, sampled at the sampling frequency Fs. The frequency Fs is, for example, chosen to be greater than 2FB, where FB is the signal bandwidth, in order to avoid aliasing of the spectrum during signal sampling. The signal spectrum, as well as the various nonlinearities, were replicated periodically every Fs GHz during the sampling process. The portion of the spectrum located within the first Nyquist band (I), that is, in the frequency range [0, Fs / 2] GHz, comprises the information, represented by a portion of the spectrum 312, that we wish to extract. This information is the same as that contained in the input signal and represented by the portion of the spectrum 302 and / or 304. However, the first Nyquist band also includes non-linearities 314, including, for example, rank harmonics and intermodulation products 3.

[0063] Fig. 4 illustrates frequency characteristics during the implementation of a method for reconstructing dynamic nonlinearities by a correction chain and in particular by a method described in relation to Fig. 5A.

[0064] Fig. 5A illustrates, in block form, a method for reconstructing dynamic nonlinearities and correcting a signal according to an example of an embodiment of the present description.

[0065] In a step 500 (CONVERT.), the analog signal X ( t ) is for example received by the receiving element 104, is processed by the front circuit 108 and then is sampled and digitized by the analog-to-digital converter 110, resulting in a signal £[&].

[0066] Graph 400 in Figure 4 illustrates the spectrum |Z( / )| of the signal z[k]. The spectrum then includes nonlinearities 402 corresponding to the replications of the nonlinearities 308 that took place during sampling in step 500.

[0067] The process continues in a phase 502 (CORRECTION), for example executed by the correction chain 114. In another example, phase 502 is carried out via the processor 120 by executing the codes 126.

[0068] Phase 502 includes an upsampling step 503 comprising, for example, steps 504 (ZERO STUFFING) and 505 (FIR BPF II NYQUIST BAND). During the upsampling step 503, the signal is, for example, upsampled at a frequency Fos equal to N x Fs. By way of example, step 504 includes an insertion of Nl zeros between each sample, and step 505 includes the application of a finite impulse response bandpass filter isolating the second Nyquist band (II). In another example, step 503 includes a plurality, for example, three, successive steps of inserting a zero between each sample, as well as a filtering step. For example, N = 2An, where n is an integer, for example, 3, and step 503 includes n successive upsampling steps by a factor of 2.For example, each upsampling step by a factor of 2 includes a step of inserting one zero between each sample, as well as a filtering step. For example, the filtering includes the application of a low-pass or high-pass filter with a finite impulse response. Phase 502 further includes a series of steps 506 to 509, subsequent to . step 503, as well as a step 510, carried out for example in parallel with steps 503, 506 to 509.

[0069] In particular, steps 503, 506 to 509 are intended to make an approximate reconstruction of the harmonics and the 3rd rank intermodulation products present in the first Nyquist band of the spectrum |Z( / ) | and generated during the passage of the signal through the receiving chain 106.

[0070] Step 503 includes the insertion of Nl samples of value 0 during step 504. Following step 504, a bandpass filter isolating the second Nyquist band (II) is applied in a step 505 (FIR BPF II NYQUIST BAND).

[0071] Graph 404 illustrates the effect of applying step 504 on the spectrum of the signal being processed. The information contained in the second Nyquist band is shown by portions of spectrum 408. The sampling frequency of the signal is then the frequency Fos, equal to N x Fs.

[0072] Following steps 504 and 505, the second Nyquist band is isolated. An example of the spectrum of the signal being processed is illustrated by Figure 410. The second Nyquist band then comprises dynamic nonlinearities 412 to be reconstructed and corrected, and a portion 414 corresponding to the net signal. The sampling frequency is then the Fos frequency.

[0073] The process then continues in step 506 (FILTER1) in which a filter, for example an infinite impulse response (IIR) filter, is applied. In one embodiment, the filter is synthesized beforehand and is intended to reverse the phase rotation induced by the conversion of the signal x(t) by the receiving circuit 106. More precisely, the filter used in step 506 inverts the amplitude and phase of the signal carrying the information. By way of example, the inversion of the amplitude corresponds to multiplying the gain of the front-end circuit 108 by the inverse of the gain. The gain of the front-end circuit 108 is, for example, considered to be a constant value, equal to the average of the gain of the circuit 108 over a frequency range, for example, over the second Nyquist band.

[0074] The third-order harmonics and intermodulation products are then generated in step 507 (cx x3), where * is the signal obtained at the output of step 506. Step 507 consists of multiplying the cube of the signal * by a coefficient c determined beforehand. The 414 portion of the spectrum serves, for example, as a basis for reconstructing the dynamic nonlinearities. Indeed, the 412 portion of the spectrum is assumed to be negligible compared to the 414 portion because of its low amplitude. Since the value of the coefficient c is small, the result of multiplying the 412 portion by c, performed in step 507, remains negligible.

[0075] In another example, a gain correction step (not illustrated in [Fig.5A]) is performed between step 506 and step 507. The output signal of step 506 is then multiplied by the inverse of the average gain over the second Nyquist band.

[0076] The coefficient c is obtained for example by simulation of the receiving circuit 106. As an example, the coefficient c is obtained following the calculation of the amplitude of the harmonics and intermodulation products of rank 3 generated using an analog model of the receiving circuit 106 and / or using laboratory measurements on the receiving circuit 106. The model of the circuit is for example a SPICE model etc.

[0077] The harmonics and third-order intermodulation products generated in step 507 and then filtered in step 508 are a reconstruction of the dynamic nonlinearities 412. The reconstruction of the dynamic nonlinearities 412 is thus an estimate of these nonlinearities. An example of the spectrum 416 associated with the harmonics and third-order intermodulation products generated in step 507 is illustrated by a graph 418. Although the nonlinearities 412 include nonlinearities other than the harmonics and third-order intermodulation products, these are, for example, considered negligible. Indeed, even-order harmonics and intermodulation products are eliminated by processing into a differential signal by the link circuit 200. Harmonics and intermodulation products of order greater than or equal to 5 are less important than those of order 3 and can be considered negligible.

[0078] Following step 507, the process continues in step 508 (FILTER2) ​​in which another filter, synthesized upstream, is applied to the third-order harmonics and intermodulation products generated during step 507. Applying this filter modifies the amplitude and phase of the generated third-order harmonics and intermodulation products. In one embodiment, this filter is configured to approximate the amplitude and phase changes experienced by the analog signal x(t) during its processing by the receiver circuit 106.

[0079] By way of example, the filter used in step 507 has the form l\ where the coefficients (b^. and (p, ^*-1) are, for example, derived from a simulation of the front-end circuit 108. The values ​​of the terminals Na and N b are derived from the characteristics of the synthesized infinite impulse response filter.

[0080] The filtered third-order harmonics and intermodulation products are then downsampled in an embodiment of step 509 (DOWNSAMPLING). By way of example, the downsampling is a decimation by the number N, consisting, by For example, removing Nl samples every N samples allows the sampling frequency to return to the frequency Fs.

[0081] In step 510 (FIR BPF DELA Y), a delay is applied to the signal z[Æ] to compensate for a delay caused by the oversampling step 503. As an example, the delay is implemented in hardware using a shift register.

[0082] By way of example, step 510 is executed, for example by processor 120, in parallel with steps 503, 506 to 509. In another example, step 510 is executed before step 503 and the result is stored, for example in a register of the circuit, or in volatile memory 122 while awaiting the completion of step 502. In yet another example, step 510 is performed following step 509. The value of the signal z[k] is then, for example, copied into a register or into volatile memory 122 while awaiting the completion of step 509.

[0083] By way of example, a step identical to step 510 is also carried out on the output signal of step 508, and before the subsampling of step 509. By way of example, the execution of this step depends on the number of coefficients used in one or more finite impulse response filters during the upsampling step 505.

[0084] A graph 420 illustrates the spectrum of the signal obtained following step 509. In particular, a part of the spectrum 422, located in the first Nyquist band, corresponds to a correction term of the signal z [ k ].

[0085] Following phase 502, a step 511 allows the correction of the signal z[k]. A digital signal ] is then generated by removing the correction signal, obtained in step 509, from the signal z[k], delayed in step 510.

[0086] The coefficient c as well as the coefficients ] (^)o^ <v sont Pæ" exemple calculated from a numerical model of the receiving chain 106 described in relation to [Fig.5B]. As an example, this model is used in simulations of the behavior of the receiving chain 106, for example SPICE simulations.

[0087] Fig. 5B is a block diagram illustrating an example of a digital representation of the receiving chain 106.

[0088] A digital model 512 of the receiving chain 106 takes, for example, as input data, a vector *. The vector * is, for example, a digital, and therefore discrete, and oversampled signal. The signal * models, for example, a continuous analog signal. As an example, oversampling corresponds to sampling at a frequency equal to N times the sampling frequency Fs.

[0089] By way of example, the digital modeling 512 includes a part 514 modeling the behavior of the front circuit 108 and a part 516 modeling the behavior of the analog-to-digital converter 110.

[0090] Part 514 includes, for example, an operation (x 4- ex3) modeling the generation of the harmonics and intermodulation products of rank 3. This operation adds to the vector * the product CX x, modeling the harmonics and intermodulation products of rank 3, and where the coefficient c is the same coefficient as described in relation to step 507. The vector x + cx3 then corresponds to the signal to which the harmonics and intermodulation products of rank 3 are added.

[0091] Part 514 further includes a filtering operation, applying the FILTER2 filter, described in relation to step 508 of Figure 5A, to the noisy signal x + CX3-

[0092] Part 516 includes, for example, a downsampling operation enabling the digital model 512 to provide an output vector J corresponding to an analog signal sampled at the sampling frequency Fs.

[0093] Fig. 6 is a flowchart illustrating steps in the synthesis of the filters, applied during steps 506 and 508 for example by the correction chain 114 or the processor 120, according to an example of an embodiment of the present description.

[0094] By way of example, a template, including the frequency, amplitude and phase responses of an analog filter included in the front circuit 108, is obtained following one or more simulations of the front circuit 108. The implementation of the process described in relation to [Fig. 6] allows the synthesis of the digital filters used in steps 506 and 508. These two filters are assumed to be infinite impulse response (IIR) filters, which have the advantage of being able to simulate the behavior of analog filters including a non-linear phase rotation.

[0095] The process described in relation to [Fig.6] is for example carried out before the manufacture of the electronic device 100 and is for example executed by a computer.

[0096] In step 600 (TRANSFERT FUNCTIONS AND COEFFICIENTS CHOICE), transfer functions corresponding to analog filters are chosen arbitrarily or randomly. For example, a list of transfer functions associated with analog filters is stored in the computer's non-volatile memory. Once the transfer function(s) have been selected, their coefficients are also chosen arbitrarily, for example, randomly. For example, the coefficients represent a gain and / or a cutoff frequency / pulse and / or a damping factor, etc., of the transfer functions.

[0097] In a step 601 (DIGITAL FILTER COMPUTATION), a digital filter is calculated, for example by a computer processing unit, from the functions of transfer and coefficients selected during step 600. As an example, the calculation of the filter includes, for example, the calculation of a transfer function by applying a bilinear transform allowing the transfer function(s) operating in the analog domain to be converted into a transfer function operating in the digital domain.

[0098] In a step 602 (STABLE?), the processing unit determines whether the digital filter is stable or not. For example, the processing unit checks whether the poles of the transfer function of the synthesized digital filter have a magnitude strictly less than 1. If it is determined that the filter is not stable (branch N), the process resumes at step 600 by selecting other transfer functions.

[0099] If, during step 602, it is determined that the filter is stable (branch Y), the process continues in step 603 (CORRECT?). During step 603, the amplitude and phase transfer functions of the synthesized digital filter are compared with the filter template of the front-end circuit 108. For example, the comparison is performed on the basis of a mean, for example weighted, of the squared errors in amplitude and phase. If it is determined that the digital filter does not correspond to the analog filter (branch N), the process resumes at step 600 in which other transfer functions are selected.

[0100] If, during step 603, it is determined that the digital filter corresponds to the analog filter, the process continues in a coefficient improvement step 604 (OPTIMIZATION). For example, the computer's processing unit executes an optimization algorithm, such as a simulated annealing algorithm, to modify the coefficients to obtain a transfer function that approximates the characteristics of the analog filter. For example, the function to be minimized by the simulated annealing algorithm is a mean, for example weighted, of the root mean square errors between the frequency responses in amplitude and phase of the synthesized digital filter and the analog filter. For example, the frequency responses in amplitude and phase of the analog filter are obtained from the simulation of the front-end circuit 108.Although the example of the simulated annealing algorithm is given, other optimization algorithms, such as Newton's or least-squares algorithms, gradient descent algorithms, or any other stochastic optimization algorithms, can be adapted.

[0101] Once the coefficients of the transfer functions of the synthesized digital filter have been improved, the process continues in step 605 (DIGITAL FILTER OK?). During step 605, it is verified whether the synthesized digital filter meets predetermined criteria, with respect to the analog filter obtained by simulating the front-end circuit 108. By way of example, the criteria include a criterion of maximum difference between the frequency responses in amplitude and phase of the two filters. For example, if the frequency responses exhibit a deviation greater than 3 dB in amplitude or a deviation greater than 2° in phase, the criteria are deemed not to have been met. The deviation values ​​of 3 dB and / or 2° are given for illustrative purposes only and are not exhaustive. A person skilled in the art will be able to adapt them, as well as the parameters of the optimization process chosen during step 604, according to the desired level of precision. Indeed, it is of course possible to modify parameters, or exploration values, allowed for each coefficient to be optimized, such as, for example, the upper and / or lower bounds and / or the step size between successive values ​​taken by a coefficient. The parameters listed are a non-exhaustive list of the parameters taken into account by an optimization algorithm. These parameters depend on the algorithm chosen.

[0102] If, during step 605, it is determined that the criteria are not met (branch N), the process resumes in an embodiment of the optimization step 604. As an example, each new embodiment of step 604 is carried out by increasing the accuracy of the optimization algorithm.

[0103] If, during step 605, it is determined that the criteria are met (branch Y), then the process terminates in a step 606 (END) and the digital filter is ready. According to one embodiment, the application of the digital filter to a signal is then implemented as code from among the 126 codes. In another example, the application of the filter is implemented in hardware in the correction chain 114.

[0104] Figure 7A is a graph illustrating the amplitudes of the transfer functions of the synthesized filter and a simulated filter. In particular, Figure 7A illustrates amplitudes of 700 and 702 of the transfer functions.

[0105] The amplitude of the transfer function 700 (SPICE) is obtained, for example, from the frequency response amplitudes of an analog simulation of the front-end circuit 108 or from laboratory measurements. These frequency response amplitudes and phase response amplitudes are those to be approximated using a synthesized filter. The amplitude 702 of the transfer function (DIGITAL) is obtained, for example, by applying the method described in relation to [Fig. 6]. In this example, the root mean square error between the two amplitudes is 1.1052 dB.

[0106] The [Fig.7B] is a graph illustrating phases 704 and 706 of the transfer functions (SPICE, DIGITAL).

[0107] The transfer function 704 (SPICE) is obtained, for example, from the phase-frequency responses of a simulation of the front-end circuit 108. For example, a SPICE simulation. The amplitude transfer function 706 is obtained, for example, by applying the method described in relation to [Fig. 6]. In this example, the root mean square error between the two transfer functions is 1.1299°.

[0108] Transfer functions 702 and 706 are, for example, the transfer functions of the synthesized digital filter used in step 508.

[0109] Figure 8A is a graph illustrating curves 804 and 806 representing the amplitude of two transfer functions. Curve 804, shown as a dashed line, represents the zero gain of a synthesized digital version of a filter, known as a phase inverter. The phase inverter filter induces a phase rotation compensating for the frequency response in phase of a simulation of the front-end circuit 108 or that induced by a digital filter obtained by applying the method described in relation to Figure 6 and from the frequency response of the front-end circuit 108. Curve 806 is obtained, for example, by applying the method described in relation to Figure 6 to obtain a synthesized digital version of the analog filter known as the phase inverter. As an example, following the application of the synthesized digital filter, the processed signal is multiplied by the inverse of the gain of the analog filter in the second Nyquist band.

[0110] Figure 8B is a graph illustrating phase transfer functions 800 and 802. As an example, the phase transfer function 800 is obtained from the negative of the phase rotations induced by a digital filter obtained by applying, to an analog filter obtained by simulation of the front-end circuit 108 or by laboratory measurements, one of the methods described in relation to Figure 6. In another example, the phase transfer function 800 is obtained from the negative of the phase rotation of an analog filter obtained by simulation of the front-end circuit 108 or by laboratory measurements. The phase transfer function 802 is, for example, obtained by applying the method described in relation to Figure 6 to obtain a digital filter, called a phase inverter, with infinite impulse response. The transfer function 802 is then used in step 506.

[0111] Figure 9 is a graph illustrating the correction of a signal following the application of the method described in relation to Figure 5A. In particular, the signal tested is a sampled sine wave whose frequency varies between 1 and F2 GHz, with FY and F2 being greater than 1. Curve 900 illustrates the amplitude of the 3rd-order harmonics at the output of the receiving circuit 106. Curve 902 illustrates the amplitude of the highest nonlinearity, including the 3rd-order and higher-order harmonics and intermodulation products, after signal correction according to the method described in relation to [Fig. 5A]. Curve 904 illustrates what would be considered an "ideal" 20 dB correction of these harmonics. Curve 902 is at most about ten dB away from the "ideal" curve 904. The signal correction is therefore effective. Furthermore, it can be seen that the correction performed does not introduce any new nonlinearities. Indeed, the precision of the process described in relation to the [Fig.5A] is an O(xA5). Nonlinearities of orders other than 3 that would be higher than the nonlinearities. Initial third-order nonlinearities could be introduced. However, curve 902, representing the amplitude of the highest nonlinearity, regardless of rank or nature, guarantees that this is not the case.

[0112] Figure 10A is a graph illustrating the signal-to-noise ratio of a converted signal. In particular, Figure 1OA illustrates a spectrum of a converted multi-tone signal whose harmonics and third-order intermodulation product have not been corrected. The multi-tone signal comprises two blocks of 900 tones, for a total of 1800 tones, the two blocks being 116 MHz apart. The phase of each tone is random. The signal-to-noise ratio is then represented by a difference of 1002 between the high (corresponding to the two tone blocks) and low (noise) parts of the spectrum.

[0113] Figure 10B is a graph illustrating the signal-to-noise ratio of a signal converted and corrected according to the method described in relation to Figure 5A. In particular, Figure 1OB illustrates a spectrum 1004, for example, corresponding to the same signal as illustrated in Figure 1OA, but for which third-order harmonics and intermodulation products have been generated and reconstructed, according to the embodiment described in relation to Figure 5A. A difference 1006 between the high and low parts of the spectrum represents the signal-to-noise ratio. It can be seen that the signal-to-noise ratio is significantly better once the signal has been corrected according to the embodiment described in relation to Figure 5A.

[0114] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to those skilled in the art. In particular, the sampling, oversampling, and undersampling methods can be adapted. For example, oversampling methods can be carried out progressively, in several steps. For example, oversampling is performed by several oversamplings by a factor of two, consisting of inserting a zero between each sample and applying a half-band low-pass or high-pass FIR filter after each zero insertion. Similarly, the combination of filters used in steps 506 and 508 can vary.

[0115] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional indications given above. In particular, with regard to the synthesis of the filters used in steps 506 and 508.

Claims

Demands

1. Circuit (102) comprising: - a receiving element (104) configured to receive an analog signal (x(t)); - a receiving chain (106) configured to convert the received analog signal into a digital signal and comprising an analog filter; and - a correction chain (114) configured to generate a digital signal reconstructing dynamic nonlinearities produced by the receiving chain, based on the digital signal and a first filter (FILTER2), the calculation circuit being further configured to generate a corrected signal (zc) by removing the reconstructed dynamic nonlinearities from the digital signal, the first filter being a digital filter with infinite impulse response configured to model the analog filter of the receiving chain (106), the amplitude transfer function F of the first filter is of the form: , F(Z) - 5 X.i+L / =1 where Nb is the number of coefficients in the numerator of the first filter, where Na is the number of coefficients in the denominator of the first filter and where the coefficients [ah 1 and L» « l are optimized following the execution of an optimization algorithm.

2. Circuit according to claim 1, wherein the receiving chain (106) comprises a linking circuit (200), a low noise amplifier (202) and an interleaved analog-to-digital converter (110).

3. Circuit according to claim 1 or 2, further comprising a non-volatile memory (118) storing instructions (126) enabling the programming of the correction chain (114), the circuit further comprising a processor (120) configured to execute the instructions following the reception, by the receiving element (104) of the analog signal (x(t)).

4. Circuit according to claim 1 or 2, wherein the correction chain (114) is implemented by application-specific integrated circuit.

5. Method comprising: - the reception, by a receiving element (104) of a circuit (102), of an analog signal (x(t)); - the conversion, via a receiving chain (106) of the circuit, of the analog signal to a digital signal (y); - the generation, by a correction chain (114), of a signal estimating dynamic nonlinearities produced by the receiving chain, on the basis of the digital signal and on the basis of a first digital filter (FILTER2), the first filter being a digital filter with infinite impulse response configured to model an analog filter included in the receiving chain, the amplitude transfer function F of the first filter being of the form: , where Nb is the number of coefficients of the numerator of the first filter, where Na is the number of coefficients of the denominator of the first filter and where the coefficients ffc h 1 and (g J are optimized following the execution of an optimization algorithm;and - the generation of a corrected digital signal (zc), by removing the reconstructed dynamic non-linearities from the digital signal.;

6. A method according to claim 5, wherein the generation of dynamic nonlinearities by the correction chain (114) comprises: - oversampling of the digital signal (y); - application of a second filter (FILTER1) to the oversampled signal; - generation of the 3rd rank harmonics and intermodulation products by multiplying by a coefficient (c) the cube of the oversampled and filtered digital signal; - application of the first filter (FILTER2) ​​to the 3rd rank harmonics and intermodulation products; and - downsampling of the filtered 3rd rank harmonics and intermodulation product.

7. Method according to claim 6, wherein the second filter (FILTER1) is an infinite impulse response filter synthesized to reverse the phase rotation induced by the analog filter of the receiving chain (106).

8. A method according to claim 7, wherein the first filter (FILTER1) is a filter configured such that its transfer function corresponds to the transfer function of the receiving chain at within 3dB in amplitude and within 2° in phase up to the cutoff frequency.

9. A method according to any one of claims 6 to 8, wherein the correction chain (114) further comprises the application of a gain correction operation.

10. A method according to any one of claims 6 to 9, wherein the correction chain is further configured to oversample the digital signal by a number N, N being an integer greater than or equal to 2, and for example equal to 8.

11. A method according to claim 10, further comprising subsampling of the reconstituted 3rd rank harmonics and intermodulation products, the subsampling being for example a decimation by the number N.

12. A method according to claim 10 or 11, wherein the oversampling, by the correction chain (114), of the undersampled digital signal comprises the application of a plurality of successive operations, each operation comprising: - the insertion of a zero between each sample; and - the application of a finite impulse response low-pass filter, or the application of a finite impulse response high-pass filter.

13. A method according to any one of claims 5 to 12, further comprising the application of a finite impulse response bandpass filter and the application of a delay compensation operation to the digital signal, before generating the corrected digital signal (zc).

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