Enhanced Light Extraction Optoelectronic Device

Abstract

Title: Enhanced Light Extraction Optoelectronic Device The invention relates to an optoelectronic device (1) comprising a substrate (10) extending mainly in a longitudinal (XY) plane, an array of diodes (100a, 100b, 100c, 100d) arranged on the substrate (10), and at least one first diode (100a) bordered by a trench (1000). The trench is delimited by a flank (150a) of the first diode and separates the first diode from a second diode (100b). The first diode is configured to emit or receive light in a range of interest. The trench comprises a dielectric layer (200) transparent in the range of interest and having a lateral portion (200a) covering the flank of the first diode, and a volume (1500) in contact with the lateral portion, so as to define an interface with the lateral portion. The interface forms a reflection interface (250a) and forms a reflection angle with the longitudinal plane less than 89°.Figure for the abridged version: Fig.3C.

Description

Title of the invention: Optoelectronic device with improved light extraction Technical field

[0001] The present invention relates to the field of microelectronics and optoelectronics technologies, in particular the manufacture of arrays of light-emitting or receiving diodes such as LEDs (from the English "Light-Emitting Diode", translating into French as electroluminescent diode), and in particular micro-LEDs. It finds particularly advantageous but non-limiting application in micro-LED-based display systems, or optical communication systems. STATE OF THE ART

[0002] When manufacturing a diode, and particularly a micro-diode, it is common to form a mirror on its side walls. Such a mirror has two main functions: to avoid the phenomenon of optical crosstalk between the LEDs when they are networked and to increase the extraction or detection of light emitted or received by the LED.

[0003] A known method for manufacturing high-density LED arrays is to transfer an epitaxially grown substrate onto a support substrate, then to single out the LEDs by forming trenches in the epitaxially grown substrate. The mirrors bordering the LEDs are then typically obtained by filling the trenches between the LEDs with a suitable material.

[0004] In this process, the trenches are typically made by anisotropic plasma etching in order to achieve LEDs having flanks perpendicular to the support substrate. However, it has been noted in practice that after such etching, the flanks of the LEDs are not perpendicular to the support substrate, as expected, but have an inclination giving the LEDs a flared shape towards the carrier substrate, as is highlighted by the view reproduced in [Fig.lA]. By subsequently depositing a reflective material in the trenches ([Fig.lB]), the mirror will be inclined by being oriented opposite the carrier substrate (reflection angle arefl') and will therefore have the effect, in the case of an emitting diode, of redirecting the light emitted by the LED towards the carrier substrate. This situation is detrimental to the extraction of light by the upper face of the LED.In the case of a receiving diode, this reduces the light receiving area, which is detrimental to the detection efficiency.

[0005] In addition, this etching process tends to reduce the emissive surface or the surface of reception of the LED, i.e. here the surface area of ​​its upper face, which further minimizes light extraction or light detection.

[0006] Another approach consists of forming mirrors between the LEDs, not against their side walls but on an element located between two adjacent LEDs. Such a method is notably described in document US 2021328116 AL. This approach, however, requires a large spacing between the adjacent LEDs and therefore does not allow the production of micro-LED matrices having a high density.

[0007] There is therefore a need to improve light extraction or light reception within a micro-LED array. Preferably, this improvement would be achieved without having to compromise a significant reduction in array density or an increase in optical crosstalk. SUMMARY

[0008] To achieve this objective, a first aspect of the invention relates to an optoelectronic device comprising: • a substrate having an upper face extending mainly in a plane called the longitudinal plane, • a matrix of light-emitting or photoreceiving diodes arranged on the upper face of the substrate, at least a first diode of the matrix being bordered by a trench, the trench being delimited in part by a flank of the first diode, the trench separating the first diode from a second diode of the matrix, the first diode being configured to emit or receive light in a range of wavelengths called the range of interest.

[0009] The trench includes: • a dielectric layer based on at least one dielectric material, having a lateral portion at least partially covering the side of the first diode, the dielectric layer being transparent in the range of interest, • a volume in contact with the lateral portion of the dielectric layer so as to define an interface with the lateral portion of the dielectric layer.

[0010] The device is characterized in that the interface forms a reflection interface for the light emitted or received by the first diode, the reflection interface forming a so-called reflection angle with the longitudinal plane, measured in the volume, less than 89°, so that the reflection interface moves away from the first diode in the longitudinal plane as it moves away from the substrate.

[0011] Thus, the lateral portion of the dielectric layer is arranged to define a light reflection interface shaped to compensate for the unfavorable inclination of the sides of the LED typically obtained by anisotropic etching.

[0012] In the case of an emitting diode, the reflection interface between the lateral portion of the dielectric layer and the volume makes it possible to reflect the light emitted by the first light-emitting diode not being directly extracted by its upper face. The inclination of the reflection interface makes it possible to redirect this light towards the upper face and therefore to facilitate its extraction. The light extraction of the first light-emitting diode is thus significantly improved.

[0013] In the case of a receiving diode, the reflection interface between the lateral portion of the dielectric layer and the volume makes it possible to reflect towards the active zone of the first diode the light arriving close to the first diode or arriving on the first diode but not towards its active zone. The inclination of the reflection interface makes it possible to redirect this light towards the active zone and therefore to facilitate its detection. The light detection of the first diode is thus greatly improved.

[0014] Furthermore, the presence of the lateral portion against the sides of the first diode makes it possible to increase the surface area of ​​the regions through which the light can be extracted or received in the case of a receiving diode. Indeed, the light can be extracted or captured at certain angles through the dielectric layer. Thanks to this, the light extraction or the light detection is even more improved.

[0015] Furthermore, the reflection of the light emitted or received by the first diode towards its edge makes it possible to prevent it from interfering with the light emitted or received by the other diodes of the matrix and in particular by the second diode. The phenomenon of optical crosstalk between the diodes of the matrix, or optical crosstalk, is thus limited or even eliminated.

[0016] It should be noted that the lateral portion of the dielectric layer can be very thin, typically from 10 nm down to 1 pm. The improvement of optical extraction or light detection and the reduction of the optical crosstalk phenomenon are therefore obtained by conceding very little space and therefore without having to reduce the density of the matrix significantly, or even without reducing it at all.

[0017] A second aspect of the invention relates to a method of manufacturing an optoelectronic device comprising the following steps: • Provide a stack including: i. a substrate having an upper face extending mainly in a plane called the longitudinal plane, ii. an array of light-emitting or light-receiving diodes arranged on the upper face of the substrate, at least a first diode of the array being bordered by a trench, the trench being delimited in part by a flank of the first diode, the trench separating the first diode from a second diode of the array, the first diode being configured to emit light in a range of wavelengths called the range of interest, • Forming in the trench a dielectric layer based on a dielectric material and comprising a lateral portion covering at least in part the side of the first diode, the dielectric layer being transparent in the range of interest, and thus forming within the trench a volume in contact with the lateral portion.

[0018] The method is characterized in that the deposition of the dielectric layer is carried out so that the contact between the lateral portion of the dielectric layer and the volume forms an interface called a reflection interface for the light emitted or the light received by the first diode, so that the reflection interface forms a so-called extraction angle with the longitudinal plane, measured in the volume, less than 89°, so that the reflection interface moves away from the first diode in the longitudinal plane as it moves away from the substrate.

[0019] This method is perfectly compatible with the transfer of a continuous epitaxial layer onto the substrate, then the singularization within the epitaxial layer of the diodes. It is therefore not necessary to go through a transfer with alignment of the diodes. In other words, this method is perfectly compatible with a singularization of the diodes by self-aligned lithography and etching. The formation of the diodes can therefore be done with the high precision of known lithography methods.

[0020] The advantages provided by the device according to the invention apply mutatis mutandis to the method according to the invention, and vice versa. BRIEF DESCRIPTION OF THE FIGURES

[0021] The aims, objects, as well as the characteristics and advantages of the invention will emerge more clearly from the detailed description of an embodiment thereof which is illustrated by the following accompanying drawings in which:

[0022] [Fig. 1 A] [Fig. 1 A] represents a view of a diode obtained by anisotropic plasma etching.

[0023] [Fig.lB] [Fig.lB] represents a view of a mirror formed between two diodes obtained by anisotropic plasma etching.

[0024] [Fig.2A] Figures 2A to 4D illustrate different embodiments of the method according to the invention in which the volume contained in the trench is filled.

[0025] [Fig.2B]

[0026] [Fig.2C]

[0027] [Fig.2D]

[0028] [Fig.2E]

[0029] [Fig.3A]

[0030] [Fig.3B]

[0031] [Fig.3C]

[0032] [Fig.4A]

[0033] [Fig.4B]

[0034] [Fig.4C]

[0035] [Fig.4D]

[0036] [Fig.5] Figures 5 and 6 illustrate embodiments of the method according to the invention in which the volume contained in the trench is not filled.

[0037] [Fig.6]

[0038] The drawings are given as examples and are not limiting of the invention. They constitute schematic representations of principle intended to facilitate the understanding of the invention and are not necessarily on the scale of practical applications. In particular, the dimensions are not representative of reality. DETAILED DESCRIPTION

[0039] Before beginning a detailed review of embodiments of the invention, optional features which may possibly be used in combination or alternatively are set out below:

[0040] According to one embodiment, the reflection angle is less than 85°, preferably less than 70°.

[0041] According to one embodiment, the volume contains a layer called a metallic layer based on a first metallic material, at least a lateral portion of the metallic layer extending from the reflection interface. The metallic constitution of the lateral portion of the metallic layer allows excellent reflection of the light in the range of interest, i.e. the emission range or the reception range. While promoting extraction or reception, it also makes it possible to greatly limit the phenomenon of optical crosstalk.

[0042] According to one embodiment, the metal layer completely covers the reflection interface and preferably completely covers the dielectric layer located in the trench.

[0043] According to one example, the metal layer has a thickness e3Oo taken in a direction perpendicular to the reflection interface, with e3Oo>5Onm, preferably e3Oo >100nm. These thicknesses are advantageous for limiting the phenomenon of optical crosstalk.

[0044] According to one example, the lateral portion of the metal layer has an external face, opposite the reflection interface, and in which the volume contains a layer called a filling layer, the filling layer extending from the external face of the lateral portion of the metal layer.

[0045] According to one example, the filling layer is based on a second material metal, preferably identical to the first metallic material. The metallic constitution of the filling layer makes it possible to further limit the phenomenon of optical crosstalk between the first diode and the second diode.

[0046] According to one example, the metal layer and the filling layer completely fill the volume.

[0047] According to one example, the first metallic material is taken from the following materials: copper, aluminum, titanium, titanium nitride, gold, nickel, platinum, silver.

[0048] According to one example, the volume comprises a vacuum, preferably the volume is empty. The reflection interface then corresponds to the interface between the lateral portion of the dielectric layer and the air or between the metal layer (if present) and the vacuum. The reflection permitted by such an interface is very advantageous for light extraction.

[0049] According to one example, the dielectric layer is based on at least one of the following materials: SiO2, SiN, SiON, Al203. It may also be a stack comprising at least one of these materials.

[0050] According to one example, the substrate comprises a plurality of metal vias, each metal via being underlying, in a transverse direction perpendicular to the longitudinal plane, a separate diode, in electrical conduction with said diode.

[0051] According to one embodiment of the method, the deposition of the dielectric layer comprises a non-conformal deposition on the flank of the first diode, the parameters of the non-conformal deposition being adjusted so as to obtain the reflection angle. The non-conformity of the deposition, usually considered as a disadvantage, is here used as an advantage to achieve the desired inclination for the reflection interface.

[0052] According to one example, said parameters of the non-conforming deposit include in particular: a deposition temperature, a deposition pressure, a deposition power and a deposition angle measured between the deposited species flow and the longitudinal plane.

[0053] According to one embodiment, the method further comprises the formation of a layer called a metallic layer based on a first metallic material, at least one lateral portion of the metallic layer extending from the reflection interface.

[0054] According to one embodiment, the lateral portion of the metal layer has an external face, opposite the reflection interface, the method further comprising the formation of a layer called a filling layer in the volume, the filling layer extending from the external face of the lateral portion of the metal layer (300).

[0055] According to one embodiment, the method further comprises forming a primer layer in the volume, on the upper face of the substrate, the primer layer being based on a metallic primer material.

[0056] According to one embodiment, the method further comprises forming a secondary filling layer based on a metallic filling material from the primer layer, for example by electrodeposition. The secondary filling layer makes it possible to both improve light extraction and reduce the optical crosstalk phenomenon.

[0057] The present patent application can apply to both a photoreceiving diode and a light-emitting diode (as well as to networks of such diodes). The term "diode" is therefore understood to mean either "photoreceiving diode" or "light-emitting diode". In the present patent application, the terms "light-emitting diode", "light-emitting diode" and "LED" are used synonymously. A "diode" can also be understood to mean a "micro-diode". A "micro-diode" is a diode whose dimensions do not exceed 1 mm (1 mm = 103 m).

[0058] In the present application, it is understood that a layer is transparent in a given wavelength range when it has a transmittance greater than or equal to 70%, preferably greater than 90%, preferably greater than or equal to 95%. In other words, it has an absorbance less than or equal to 30%, preferably less than or equal to 10%, preferably less than or equal to 5% in this range.

[0059] It is specified that, in the context of the present invention, the terms "on", "overcomes", "covers", "underlying", "facing" and their equivalents do not necessarily mean "in contact with". Thus, for example, the deposition, transfer, bonding, assembly or application of a first layer on a second layer does not necessarily mean that the two layers are in direct contact with each other, but means that the first layer at least partially covers the second layer by being either directly in contact with it or by being separated from it by at least one other layer or at least one other element.

[0060] A layer may also be composed of several sub-layers of the same material or of different materials.

[0061] A substrate, a layer, a device, “based” on a material M, is understood to mean a substrate, a layer, a device comprising this material M only or this material M and possibly other materials, for example alloying elements, impurities or doping elements.

[0062] The term “selective etching with respect to” or “etching exhibiting selectivity with respect to” means etching configured to remove a material A or a layer A with respect to a material B or a layer B, and exhibiting an etching rate of the material A greater than the etching rate of the material B. The selectivity is the ratio between the etching rate of the material A and the etching rate of the material B. The selectivity between A and B is denoted SA:B.

[0063] A reference frame, preferably orthonormal, comprising the axes X, Y, Z is represented in Figures 2A to 6. The Z direction may be referred to as the “stacking direction”.

[0064] In the present patent application, we will preferably speak of thickness for a layer and of height for a structure or a device. The height is taken perpendicular to the longitudinal plane XY. The thickness is taken in a direction normal to the main extension plane of the layer. Thus, a layer typically has a thickness along Z, when it extends mainly along the longitudinal plane XY, and a projecting element, for example an isolation trench, has a height along Z. The relative terms “on”, “under”, “above”, “below”, “underlying” preferably refer to positions taken in the Z direction.

[0065] The terms “substantially”, “approximately”, “of the order of” mean “to within 10%, preferably to within 5%”.

[0066] Several embodiments of the method according to the invention will now be described with reference to FIGS. 2A to 6.

[0067] [Fig.2A] illustrates the provision of a substrate 10. This is typically a substrate 10 comprising an integrated circuit, which may be designated ASIC, from the English “Application Specific Integrated Circuit” (in French “integrated circuit for a specific application”).

[0068] The substrate 10 has an upper face 11 extending mainly in a plane parallel to the longitudinal plane XY.

[0069] The substrate 10 may for example comprise a flush layer 13 and a support substrate 14. The support substrate 14 may for example be a silicon substrate.

[0070] The substrate 10, typically the flush layer 13, preferably comprises a plurality of metal vias 15 preferably flush with the upper face 11 of the substrate 10. Each of these metal vias 15 may be in contact with a metal pad 16. The metal vias 15 may for example be based on tungsten and the metal pads may for example be based on copper or aluminum.

[0071] [Fig.2B] then illustrates the transfer, on the upper face 11 of the substrate 10, of an epitaxial substrate 100.

[0072] The epitaxially grown substrate 100 has a lower face 102 facing the upper face 11 of the substrate 10 and an upper face 101, opposite its lower face 102. Both extend mainly in one of the planes parallel to the longitudinal plane XY. The epitaxially grown substrate 100 has a thickness eioo along the stacking direction Z. Typically, e»» is between 100 nm and 10 pm.

[0073] The epitaxially grown substrate 100 is based on a semiconductor material. The epitaxially grown substrate 100 comprises an active region 110. This active region 110 is the site of radiative recombinations of electron-hole pairs making it possible to obtain or absorb light radiation. The active region 131 typically comprises a plurality of quantum wells, for example formed by emissive layers based on GaN, InN, InGaN, AlGaN, AIN, AlInGaN, GaP, AlGaP, AlInGap, AlGaAs, GaAs, InGaAs, AlIlAs, or a combination of several of these materials.

[0074] In order to guarantee the good holding of the epitaxial substrate 100 with the substrate 10, the transfer of the epitaxial substrate 100 can be done by bonding by means of an adhesion layer 50 extending between the upper face 11 of the substrate 10 and the lower face 102 of the epitaxial substrate 100. The adhesion layer 50 has a thickness e50 in the stacking direction Z.

[0075] As illustrated by the transition from [Fig.2B] to [Fig.2C], a lithography and etching step is then carried out to singularize a plurality of islands from the active layer 100. For the sake of simplification, the flared shape given to the islands by this etching step is not illustrated in [Fig.2C] and in the following figures. Each of these islands forms a diode 100a, 100b, 100c, 100d. Each diode 100a, 100b, 100c, 100d comprises a portion of the active region 110 of the epitaxial substrate 100. The set of diodes 100a, 100b, 100c, 100d is called a diode matrix 100a, 100b, 100c, 100d.

[0076] The singulation of the diodes 100a, 100b, 100c, 100d involves the formation of trenches 1000 within the epitaxial substrate 100. Each of these trenches 1000 passes through the epitaxial substrate 100 over its entire thickness ei00. If an adhesion layer 50 is located between the substrate 10 and the epitaxial substrate 100, the trenches 1000 preferably also pass through the adhesion layer 50 over its entire thickness e50. If the adhesion layer 50 is not metallic, this precaution is however not necessary.

[0077] Two adjacent diodes (for example the diodes referenced 100a and 100b in the figures) are separated by a trench 1000. If we consider a first diode 100a and a second diode 100b adjacent to each other, the trench 1000 separating them extends at least between a flank 150a of the first diode 100a and a flank 150b of the second diode 100b. These flanks 150a, 150b are opposite each other. In the same way, the other trenches 1000 extend at least between two flanks of two adjacent diodes.

[0078] Each trench 1000 has a width 1000, measured between the two flanks 150a, 150b of the two diodes 100a, 100b between which it extends. The width 1000 is illustrated in [Fig.2C]. The width 1000 corresponds to the smallest distance between these flanks 150a, 150b. Since the distance between the flanks 150a, 150b can vary along the stacking direction Z due to etching effects, it is chosen to measure the width 1000 at the foot of the diodes 100a, 100b, that is to say in the plane parallel to the longitudinal plane XY including the diodes 100a, 100b closest to the substrate 10. In the case of flanks 150a, 150b having a curved shape in the longitudinal plane XY (for example example if the diodes 100a, 100b have a circular shape in projection in the longitudinal plane XY), the width 1000 is effective, in projection in the longitudinal plane XY, between a single point of the flank 150a of the first diode 100a and a single point of the flank 150b of the second diode 100b. In the case of flanks 150a, 150b parallel to each other, the width 1000 is effective over the entire extent of these two flanks 150a, 150b.

[0079] Typically, l1000 is less than 3 pm, preferably greater than 500 nm, preferably greater than 750 nm, and typically substantially equal to 1 pm.

[0080] Each trench 1000 also has a height h1Ooo, measured in projection in a plane parallel to the stacking direction Z. h1Ooo is preferably greater than 100 nm, and typically less than 10 pm.

[0081] The stack provided at the start of the method according to the invention corresponds to the stack illustrated in [Fig.2C].

[0082] [Fig.2D] then illustrates the deposition of a dielectric layer 200. The dielectric layer 200 is deposited in the trenches 1000 so as to cover the flanks delimiting said trenches 1000. Typically, for the trench 1000 extending between the first diode 100a and the second diode 100b, the dielectric layer 200 is deposited so as to cover the flank 150a of the first diode 100a and the flank 150b of the second diode 100b. This will be described in more detail with reference to [Fig.2E].

[0083] The dielectric layer 200 is preferably also deposited at the bottom of the trenches 1000, typically in contact with the upper face 11 of the substrate 10 when the trenches 1000 completely pass through the adhesion layer 50 or when there is no adhesion layer 50. The portion of the dielectric layer 200 formed at the bottom of a trench 1000 is designated lower portion 200ab. It has an upper face 201AB extending mainly in a plane parallel to the longitudinal plane XY.

[0084] The dielectric layer 200 is furthermore advantageously deposited on the upper face 101 of the epitaxial substrate 100, which, at this stage of the process, is composed of the upper faces 101a, 101b, 101c, 101d of each of the diodes 100a, 100b, 100c, 100d.

[0085] [Fig.2E] is an enlargement of [Fig.2D] showing a trench 1000 separating a first diode 100a from a second diode 100b. This figure allows a better visualization of how the dielectric layer 200 is deposited within a trench 1000.

[0086] The dielectric layer 200 is deposited so as to have at least one lateral portion 200a at least partially covering the flank 150a of the first diode 100a. It is preferably deposited so as to also have at least one other lateral portion 200b at least partially covering the flank 150b of the second diode 100b.

[0087] The dielectric layer 200 is furthermore deposited so as to define a volume 1500 in the trench 1000. Thus, the two lateral portions 200a, 200b are preferably not in contact, or if they are, this is not the case over their entire height in the stacking direction Z. If it is intended, as will be described further in certain embodiments, that the volume 1500 is filled, then the two lateral portions can be in contact but an opening must be kept so that the filling of the volume 1500 can be carried out. At this stage of the method, the volume 1500 is empty, that is to say it is free of materials. The volume 1500 is typically filled with air.

[0088] The dielectric layer 200 at least partially separates the volume 1500 from the first diode 100a and the second diode 100b.

[0089] Each lateral portion 200a, 200b forms with the volume 1500 a reflection interface 250a, 250b.

[0090] The lateral portions 200a, 200b of the dielectric layer 200 each also have an internal flank 260a, 260b, opposite the reflection interfaces 250a, 250b and facing the first diode 100a and the second diode 100b respectively.

[0091] Preferably, the dielectric layer 200 is deposited in contact with the first diode 100a and the second diode 100b. Thus, the lateral portions 200a, 200b preferably extend respectively from the flank 150a of the first diode 100a and from the flank 150b of the second diode 100b. In this case, the internal flanks 260a, 260b of the lateral portions 200a, 200b of the dielectric layer 200 and the flanks 150a, 150b of the first and second diodes 100a, 100b are therefore merged.

[0092] The deposition of the dielectric layer 200 is configured so that the reflection interfaces 250a, 250b form an angle, called the reflection angle arefl, with the longitudinal plane XY of less than 89°, preferably less than 85°, preferably less than 70°. The reflection angle arefl is measured in the volume 1500.

[0093] The reflection angle arefl can be measured by projecting the reflection interface 250a, 250b considered in a plane called the projection plane perpendicular to the longitudinal plane XY.

[0094] According to one example, the reflection interface 250a, 250b extends mainly and preferably entirely in a plane called the interface plane. In this case, the projection plane is also perpendicular to the interface plane.

[0095] Alternatively, the reflection interface extends in a curved shape, for example in a circular shape along any section parallel to the transverse plane XY. In this case, the reflection interface 250a, 250b forms for example a ring in projection in the transverse plane XY. In this case, the projection plane is also perpendicular to the tangent plane at the location of the reflection interface 250a where the measurement is carried out.

[0096] arefl is preferably the same for the two lateral portions 250a and 250b and therefore for the two diodes 100a and 100b.

[0097] In order to allow the inclination of the reflection interfaces 250a, 250b, the deposition of the dielectric layer 200 advantageously comprises a non-conformal deposition making it possible to form the lateral portions 200a, 200b in a shape allowing this inclination.

[0098] In a perfectly conventional manner, a non-conformal deposit is characterized by the fact that the thickness of the deposited layer is not constant. This thickness, at any point of this layer, is measured perpendicular to the tangent to the layer or to the pattern underlying the conformal layer. In [Fig. 2E], it is clear that the thickness e200a of the dielectric layer 200 at the upper face of the diode 100 is greater than the thickness e200ob of the dielectric layer 200 at the upper face of the diode 100. e200a is typically greater than 10 nm, for example greater than 30 nm. e200a is typically less than 1 pm, for example less than 300 nm. It is interesting to note that the greater the ratio 1000 / 1000, the greater the thickness e200a can be and the greater the reflection angle can be. Advantageously, 1 iooo / hiooo is greater than or equal to 0.2.

[0099] Preferably, the non-conformal deposition is carried out so that the reflection interfaces 250a, 250b have a constant slope. Thus the thickness e200 of the dielectric layer increases continuously in the direction of the opening of the trench 1000.

[0100] Such a deposition can be carried out by plasma-enhanced chemical vapor deposition (commonly referred to as PECVD), by physical vapor deposition (commonly referred to as PVD), or by ion beam deposition (commonly referred to as IBD). Whatever the process chosen, the parameters thereof are adjusted in order to obtain a non-conformal deposition. In particular, the following parameters are adjusted to obtain the desired non-conformal deposition: the deposition power, the pressure, the deposition temperature, the deposition angle.

[0101] Several methods that may be used to form the dielectric layer 200 non-conformally are described below: • CVD deposition in a high-frequency generator (e.g. 13.56 MHz), at a power of 300W, at a pressure of 2.5 Torr and a temperature of 240°C, for example with N2O as oxidizing gas and preferably with silane (SiH4) as precursor gas. The ratio of oxidizing gas to precursor gas is greater than or equal to 20, preferably greater than or equal to 80. • PVD deposition with a SiO2 target, a mixture of argon (30sccm) and O2 (45 sccm), with a pulsed DC generator and a power of 3000W, a pressure of 0.5 mT and at room temperature. The deposition is preferably done in the stacking direction Z. • IBD deposition with a SiO2 target and krypton ions (4 sccm), a plasma generated with a radiofrequency (RF) generator, a power of 700 W, a pressure of 0.45 mT, a deposition angle - i.e. the angle between the flow of species to be deposited and the longitudinal XY plane - of 5°, and at room temperature.

[0102] The dielectric layer 200 is formed from a dielectric material. The dielectric material and the thickness of the dielectric layer 200 are chosen so that the dielectric layer 200 is transparent in the emission or reception range of the diodes 100a, 100b, 100c, 100d. We speak of emission range for light-emitting diodes and of reception range for photoreceiving diodes. To designate generally one or the other of these ranges, depending on the nature of the diode, we speak of range of interest.

[0103] As described above, the dielectric layer 200 is not deposited in a conformal manner and therefore does not have a constant thickness. The transparency of the dielectric layer 200 will therefore be evaluated in its thickest portions. Typically, the dielectric layer 200 is thickest in its portions surmounting the diodes 100a, 100b, 100c, 100d and / or at the level furthest from the substrate 10 of its lateral portions 200a, 200b.

[0104] The dielectric layer 200 may in particular be based on one of SiO2, SiN, SiON or even alumina. It may also be a stack of several of these materials.

[0105] The following figures also focus on these two diodes 100a, 100b and the trench 1000 separating them, but it is understood that the different steps of the method can be applied to all the diodes 100a, 100b, 100c, 100d of the matrix and to all the trenches 1000.

[0106] As described in the following paragraphs, volume 1500 may be left empty, or may be filled, partially or entirely.

[0107] Figures 3A to 4D illustrate embodiments in which the volume 1500 is at least partially filled.

[0108] As illustrated in [Fig.3A], a metal layer 300 is advantageously formed in the volume 1500 so as to cover at least part of the lateral portions 200a, 200b of the metal layer 200.

[0109] The metal layer 300 is thus deposited so as to have at least one lateral portion 300a covering at least in part the lateral portion 200a of the dielectric layer 200 covering the flank 250a of the first diode 100a. It is preferably filed so as to also present at least one other lateral portion 300b covering at least in part the lateral portion 200b of the dielectric layer 200 covering the flank 150b of the second diode 100b.

[0110] The lateral portions 300a, 300b of the metal layer 300 are in direct contact with the lateral portions 200a, 200b of the dielectric layer 200. Thus, these portions 300a, 300b extend from the reflection interfaces 250a, 250b.

[0111] The lateral portions 300a, 300b of the metal layer 300 each have an external flank 350A, 350B, opposite the reflection interface 250a, 250b.

[0112] Preferably, the two lateral portions 300a, 300b of the metal layer 300 are not in contact. Their external flanks 350A, 350B are thus opposite each other without touching. The volume 1500 is therefore not entirely filled at this stage.

[0113] The metal layer 300 is typically also deposited on the upper faces 101a, 101b of the diodes 100a, 100b and in the bottom of the trench 1000, on the upper face 201AB of the lower portion 200ab of the dielectric layer 200. The portion of the metal layer 300 formed on the upper face 201AB of the lower portion 200ab of the dielectric layer 200 is designated lower portion 300aB of the metal layer 300. It has an upper face 301AB extending mainly in a plane parallel to the longitudinal plane XY.

[0114] The metal layer 300 can for example be deposited in a conformal manner.

[0115] The deposition of the metal layer 300 can be done by PVD, CVD or even electro grafting.

[0116] The metal layer 300 is based on a first metal material giving this layer 300 a reflective property for the light emitted by the diodes 100a, 100b. The light emitted by a diode 100a, 100b not being directly extracted at the upper face 101a, 101b of the diode 100a, 100b is thus reflected at the reflection interface 250a, 250b constituted in this embodiment by the interface between the dielectric layer 200 and the metal layer 300.

[0117] The first metallic material may for example be taken from copper, aluminum, gold, nickel, platinum and silver. Copper may in particular be deposited by electrografting. This material allows in particular good reflection of light whose emission range corresponds to a shade of red (between 620 nm and 800 nm approximately). The aluminum may in particular be deposited by several cycles each comprising a PVD or CVD deposition and a sputtering step in order to move aluminum deposited at the bottom of trench 1000 against the lateral portions 200a, 200b of the dielectric layer 200. The sputtered species may be taken from the following gases: argon, krypton, neon, N2, O2 or a combination of these gases. Aluminum allows in particular good reflection of light whose range emission corresponds to a shade of blue (between approximately 430 nm and 520 nm) or a shade of green (between approximately 520 nm and 565 nm). These ranges are around the wavelengths set by the International Commission on Illumination (CIE) for the three physical primary colors: 700 nm for red, 536.1 nm for green and 435.8 nm for blue. Ideally, the wavelengths emitted by light-emitting diodes are close to these values.

[0118] The metal layer 300 has a thickness e300 measured in different directions depending on the portion considered. In the typical case of a conformal deposition, e300 is identical in all the portions of the metal layer 300. At least at the level of the lateral portions 300a, 300b, e300 is preferably greater than 50 nm, preferably greater than 100 nm. e300 is typically less than 200 nm, preferably less than 150 nm.

[0119] The metal layer 300 not only has the role of optical reflector but also the role of electrical conductor: it makes it possible to route an electrical current from the top of this same trench 1000 to the bottom of the trench 1000.

[0120] As illustrated in [Fig.3B], the volume 1500 is then advantageously filled with a filling layer 400. The latter extends between the external flanks 350a, 350b of the lateral portions 300a, 300b of the metal layer 300 and is preferably in contact with them. It is also preferably in contact with the upper face 301ab of the lower portion 300ab of the metal layer 300.

[0121] Thus, preferably, the filling layer 400 and the metal layer 300 together fill the entire volume 1500.

[0122] In this embodiment, the reflection of the light emitted by the diodes 100a, 100b is ensured by the metal layer 300. It is therefore not necessary for the filling layer 400 to be made of a material with reflective optical properties. It will nevertheless be preferred for the filling layer 400 to be based on a second metal material, preferably identical to the first metal material.

[0123] The filling layer 400 can for example be deposited by any known deposition techniques, for example CVD, PVD, ALD, IBD, ECD (from the English “Electrochemical Deposition”).

[0124] As illustrated by the transition from [Fig.3B] to [Fig.3C], a polishing step is then typically carried out, for example by chemical-mechanical polishing (commonly referred to as CMP), to remove the portions of the metal layer 300 located on the upper faces 101a, 101b of the diodes 100a, 100b. This makes it possible to prevent the light emitted by the diodes 100a, 100b or reflected by the reflection interfaces 250a, 250b in the direction of their upper faces 101a, 101b from being reflected in the direction of the substrate 10. openings can be arranged in the portions of the dielectric layer 200 located on the upper faces 101a, 101b of the diodes 100a, 100b in order to ensure the electrical connection of the diodes 100a, 100b by their upper face 101a, 101b.

[0125] [Fig.3C] schematically illustrates the reflection of the light emitted by the first diode 100a by the reflection interface 250a formed by the contact between the lateral portion 200a of the dielectric layer and the lateral portion 300a of the metal layer 300. The inclination according to the angle aext of this interface makes it possible to redirect the light in order to allow its extraction by the upper face 101a of the diode 100a.

[0126] According to another embodiment, illustrated in FIGS. 4A to 4D, in which the volume 1500 is at least partially filled, a primer layer 500 is first formed at the bottom of the trench 1000. More precisely, in the typical case where a lower portion 200ab of the dielectric layer 200 covers the upper face 11 of the substrate, the primer layer 500 is deposited on the upper face 201AB of this lower portion 200ab. Otherwise, the primer layer 500 is directly deposited on the upper face 11 of the substrate 10.

[0127] The seed layer 500 is typically deposited by a non-conformal deposition process. In this case, the seed layer 500 does not extend against the reflection interfaces 250a, 250b. However, it typically extends over the upper faces 101a, 101b of the diodes 100a, 100b.

[0128] The primer layer 500 can for example be deposited by PVD.

[0129] The primer layer 500 is based on a metallic primer material. The material primer metal can be taken from copper and aluminum.

[0130] The primer layer 500 also makes it possible to route an electric current into the bottom of the trenches 1000.

[0131] As illustrated in [Fig.4B], a secondary filler layer 600 is then formed in the volume 1500 from the seed layer 500. Preferably, the seed layer 500 and the secondary filler layer 600 together completely fill the volume 1500.

[0132] The secondary filling layer 600 may in particular be formed by an electrodeposition process. This deposition may be carried out using a bottom-up approach, more commonly referred to as “bottom-up”. The secondary filling layer 600 may be formed using a bottom-up type TSV (for “Through Silicon Via”) chemistry.

[0133] The secondary filling layer 600 is based on a second metallic material giving this layer 600 a reflective property for the light emitted by the diodes 100a, 100b. The light emitted by a diode 100a, 100b is not directly extracted after its emission at the upper face 101a, 101b of the diode 100a, 100b is thus reflected at the reflection interface 250a, 250b constituted in this embodiment by the interface between the dielectric layer 200 and the secondary filling layer 600.

[0134] As illustrated by the transition from [Fig.4C] to [Fig.4D], a polishing step is then typically carried out, for example by CMP, to remove the portions of the seed layer 500 and the secondary filling layer 600 located on the upper faces 101a, 101b of the diodes 100a, 100b. This makes it possible to prevent the light emitted by the diodes 100a, 100b or reflected by the reflection interfaces 250a, 250b in the direction of their upper faces 101a, 101b from being reflected in the direction of the substrate 10.

[0135] [Fig.4D] schematically illustrates the reflection of the light emitted by the first diode 100a by the reflection interface 250a formed by the contact between the lateral portion 200a of the dielectric layer and the secondary filling layer 600. The inclination according to the angle arefi of this interface makes it possible to redirect the light in order to allow its extraction by the upper face 101a of the diode 100a.

[0136] According to an embodiment illustrated in [Fig.5], the volume 1500 located in each trench 1000 is left empty. By left empty, it is meant that no material is deposited there. The volume 1500 is therefore free of materials. It can be filled with air or another gas.

[0137] According to another embodiment illustrated in [Fig.6], the dielectric layer 200 is raw until its various portions extending from the upper faces 101a, 101b, 101c, 101d of the diodes 100a, 100b, 100c, 100d of the matrix come into contact. The dielectric layer 200 then forms, among other things, a continuous layer 2000, an upper face 2001 of which extends mainly in a plane parallel to the longitudinal plane XY. The volumes 1500 are then entirely closed.

[0138] In the embodiments illustrated in Figures 5 and 6, the reflection interfaces 250 are formed by the interfaces between the lateral portions 200a, 200b of the dielectric layer 200 and the empty volume 1500. The reflection is enabled by the difference between the refractive indices of the dielectric material and the air.

[0139] In order to optimize the reflection at the interface between the dielectric material and the air, it is preferably provided that the dielectric material has a refractive index n2Oo greater than the refractive index of the semiconductor material of the epitaxial substrate 100.

[0140] In the case where the dielectric layer 200 is raw until it forms a continuous layer 2000, a plurality of electrodes 700 are then advantageously deposited on the upper face 2001 of the continuous layer 2000. Advantageously, each electrode 700 is deposited directly above a trench 1000 in the stacking direction Z. Openings are preferably provided in the continuous layer 2000 so that each electrode 700 can be electrically connected to the su- upper 101a, 101b of a diode 100a, 100b.

[0141] The embodiments where the volume 1500 is left empty are particularly advantageous for light extraction. It also makes it possible to limit to a certain extent the phenomenon of optical crosstalk.

[0142] Another aspect of the invention relates to an electronic device obtainable by any of the embodiments of the method according to the invention described above.

[0143] This device comprises at least the substrate 10, the first diode 100a within the matrix of diodes 100a, 100b, 100c, 100d, the trench 1000 bordering the first diode 100a and extending between the first diode 100a and the second diode 100b, as well as the lateral portion 200a and the volume 1500 as defined previously with reference to the method according to the invention.

[0144] The different embodiments of this device correspond to figures 3C, 4D, 5 and 6.

[0145] Through the different embodiments described above, it clearly appears that the invention proposes an effective solution for improving light extraction and reducing optical crosstalk in a micro-LED matrix.

[0146] The invention is not limited to the embodiments previously described and extends to all embodiments covered by the invention.

Claims

Claims

1. Optoelectronic device (1) comprising: • a substrate (10) having an upper face (11) extending mainly in a plane called the longitudinal plane (XY), • a matrix of photoemitting or photoreceiving diodes (100a, 100b, 100c, 100d) arranged on the upper face (11) of the substrate (10), at least a first diode (100a) of the matrix being bordered by a trench (1000), the trench (1000) being delimited in part by a flank (150a) of the first diode (100a), the trench (1000) separating the first diode (100a) from a second diode (100b) of the matrix, the first diode (100a) being configured to emit or receive light in a range of wavelengths called the range of interest, the trench (1000) comprising: • a dielectric layer (200) based on at least one dielectric material, having a lateral portion (200a) at least partially covering the flank (150a) of the first diode (100a), the dielectric layer (200) being transparent in the range of interest, • a volume (1500) in contact with the lateral portion (200a) of the dielectric layer (200) so as to define an interface with the lateral portion (200a) of the dielectric layer (200),

2.

3. characterized in that the interface forms a reflection interface (250a) for the light emitted or received by the first diode (100a), the reflection interface (250a) forming a so-called reflection angle with the longitudinal plane (XY), measured in the volume (1500), less than 89°, so that the reflection interface (250a) moves away from the first diode (100a) in the longitudinal plane (XY) as it moves away from the substrate (10). Device according to the preceding claim in which the angle of reflection is less than 85°, preferably less than 70°. Device according to any one of the preceding claims in which the volume (1500) contains a layer called a metallic layer. (300) based on a first metallic material, at least one lateral portion (300a) of the metallic layer (300) extending from the reflection interface (250a).

4. Device according to the preceding claim in which the metal layer (300) completely covers the reflection interface (250a) and preferably, completely covers the dielectric layer located in the trench (1000).

5. Device according to the preceding claim in which the metal layer (300) has a thickness e300 taken in a direction perpendicular to the reflection interface (250a), with e300>50nm, preferably e300>100nm.

6. Device according to the preceding claim in which the lateral portion (300a) of the metal layer (300) has an external face (350a), opposite the reflection interface (250a), and in which the volume (1500) contains a layer called the filling layer (400), the filling layer (400) extending from the external face (350a) of the lateral portion (300a) of the metal layer (300).

7. Device according to the preceding claim in which the filling layer (400) is based on a second metallic material, preferably identical to the first metallic material.

8. Device according to any one of the two preceding claims in which the metal layer (300) and the filling layer (400) entirely fill the volume (1500).

9. Device according to any one of the six preceding claims in which the first metallic material is taken from the following materials: copper, aluminum, titanium, titanium nitride, gold, silver, nickel and platinum.

10. A device according to any one of claims 1 to 5 wherein the volume (1500) comprises vacuum, preferably the volume (1500) is empty.

11. Device according to any one of the preceding claims in which the dielectric layer (200) is based on at least one of the following materials: SiO2, SiN, SiON, Al203.

12. Device according to any one of the preceding claims in which the substrate (10) comprises a plurality of metal vias (15), each metal via (15) being underlying, in a transverse direction (Z) perpendicular to the longitudinal plane (XY), a separate diode (100a, 100b, 100c, 100d), in electrical conduction with said diode (100a, 100b, 100c, lOOd).

13. A method of manufacturing an optoelectronic device (1) comprising the following steps: • Provide a stack including: i. a substrate (10) having an upper face (11) extending mainly in a plane called the longitudinal plane (XY), ii. a matrix of photo-emitting or photo-receiving diodes (100a, 100b, 100c, 100d) arranged on the upper face (11) of the substrate (10), at least a first diode (100a) of the matrix being bordered by a trench (1000), the trench (1000) being delimited in part by a flank (150a) of the first diode (100a), the trench (1000) separating the first diode (100a) from a second diode (100b) of the matrix, the first diode (100a) being configured to emit or receive light in a range of wavelengths called the range of interest, • Forming in the trench (1000) a dielectric layer (200) based on a dielectric material and comprising a lateral portion (200a) covering at least in part the flank (150a) of the first diode (100a), the dielectric layer (200) being transparent in the range of interest, and thus forming within the trench (1000) a volume (1500) in contact with the lateral portion (200a), characterized in that the deposition of the dielectric layer (200) is carried out so that the contact between the lateral portion (200a) of the dielectric layer (200) and the volume (1500) forms an interface called the reflection interface (250a) for the light emitted by the first diode (100a), so that the reflection interface (250a) forms a so-called extraction angle with the longitudinal plane (XY), measured in the volume (1500), less than 89°, so that the reflection interface (250a) moves away from the first diode (100a) in the longitudinal plane (XY) as it moves away from the substrate (10).

14. A method according to the preceding claim wherein the deposition of the dielectric layer (200) comprises a non-conformal deposition on the sidewall. (150a) of the first diode (100a), the parameters of the non-conformal deposition being adjusted so as to obtain the reflection angle.

15. Method according to the preceding claim in which said parameters of the non-conformal deposition include in particular: a deposition temperature, a deposition pressure, a deposition power and a deposition angle measured between a flow of deposited species and the longitudinal plane (XY).

16. Method according to any one of claims 13 to 15 further comprising the formation of a layer called metallic layer (300) based on a first metallic material, at least a lateral portion (300a) of the metallic layer (300) extending from the reflection interface (250a).

17. Method according to the preceding claim in which the lateral portion (300a) of the metal layer (300) has an external face (350a), opposite the reflection interface (250a), the method further comprising the formation of a layer called the filling layer (400) in the volume (1500), the filling layer (400) extending from the external face (350a) of the lateral portion (300a) of the metal layer (300).

18. A method according to any one of claims 13 to 15 further comprising forming a primer layer (500) in the volume (1500), on the upper face (11) of the substrate (10), the primer layer being based on a metallic primer material.

19. A method according to the preceding claim further comprising forming a secondary filler layer (600) based on a metallic filler material from the primer layer (500), for example by electrodeposition.

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