No-go zone circuit

Abstract

Bandgap Circuit This description concerns a bandgap circuit comprising: a first resistor receiving a voltage proportional to the temperature; a second resistor (R2) receiving a voltage complementary to the absolute temperature; a third resistor (R3) through which flows the sum of the currents in the first and second resistors. Each of the second and third resistors (R2; R3) comprises a fixed portion (R20; R30) and N controllable portions (R21, R22; R31, R32), with N greater than or equal to 2. Each controllable portion (R21, R22) of the second resistor is associated with a corresponding controllable portion (R31, R32) of the third resistor. A control circuit (CTRL1) provides, for each controllable portion (R21, R22), the same control signal (STrim1, STrim2) to that controllable portion (R21, R22; R31, R32) and to the one (R31, R32) associated with it. Figure for the abridged version: Fig. 4

Description

Title of the invention: Band gap circuit technical field

[0001] This description relates generally to electronic circuits, and more particularly to bandgap circuits configured to provide a stable voltage over temperature. Previous technique

[0002] Many known electronic devices include a band gap circuit configured to generate a temperature-stable voltage.

[0003] Known bandgap circuits are configured to generate a first voltage equal to or proportional to the difference between the base-emitter voltage of a first bipolar transistor and the base-emitter voltage of a second bipolar transistor n times larger than the first. This first voltage is then proportional to the absolute temperature (PTAT). These known circuits are further configured to generate a second voltage equal to or proportional to the base-emitter voltage of a bipolar transistor, which may or may not be one of the first and second bipolar transistors defined above. This second voltage is then complementary to the absolute temperature (CTAT).A third voltage is then generated from the first and second voltages, and these known circuits are sized so that the third voltage has a value independent of temperature.

[0004] However, known band gap circuits have various disadvantages. Summary of the invention

[0005] There is a need to overcome all or part of the disadvantages of known bandgap circuits of the type described above.

[0006] One embodiment overcomes all or part of the disadvantages of known bandgap circuits of the type described above.

[0007] One embodiment provides a band gap circuit comprising: a first resistor configured to receive a voltage) proportional to the absolute temperature between its terminals; a second resistor configured to receive a voltage) complementary to the absolute temperature between its terminals; a third resistor configured so that the current in the third resistor is equal to the sum of the current in the first resistor and the current in the second resistor; and a control circuit, in which: Each of the second and third resistors comprises a fixed part and N controllable parts, with N an integer greater than or equal to 2; each controllable part is equal to the product of a setting value of said controllable part by an integer determined by a control signal of said controllable part; Each of the N controllable parts of the second resistance is associated with a corresponding controllable part of the third resistance; The control circuit is configured to provide, for each controllable part, the same control signal to said controllable part and to the controllable part associated with it; and at least one controllable part has a setting value different from that of the controllable part associated with it.

[0008] According to one embodiment: A pair of a controllable part of the third resistor and the associated controllable part of the second resistor satisfies one of the following relationships: - the setting value of the controllable part of the third resistor is equal to Gain times the setting value of the associated controllable part of the second resistor; - the setting value of the controllable part of the second resistor is zero; and - The adjustment value of the controllable part of the third resistor is equal to Gain*Vbe(Tr) / EG times the adjustment value of the associated controllable part of the second resistor, with Gain equal to the ratio of the resistance value of the fixed part of the third resistor by the resistance value of the fixed part of the second resistor, Vbe(Tr) the value of the voltage) complementary to the absolute temperature taken at a temperature Tr, Tr the reference temperature for example equal to 300°K, and EG a constant equal to 1.181 V.

[0009] According to one embodiment: another pair of a controllable part of the third resistor and the associated controllable part of the second resistor satisfies another of said relations.

[0010] According to one embodiment: N is greater than or equal to 3; and yet another pair of a controllable part of the third resistance and the associated controllable part of the second resistance satisfies yet another of the said relations.

[0011] According to one embodiment, the fixed parts of the second and third resistors have the same resistance value.

[0012] According to one embodiment, a resistance value of the fixed part of the second resistor is equal to (Utr*ln(n)) times a resistance value of the first resistor, with: EG a constant equal to 1.181 V; Vbe(Tr) the value of the voltage) complementary to the absolute temperature taken at a reference temperature Tr, for example equal to 300°K; Utr equals / q, with k the Boltzmann constant and q the elementary electric charge; and n, a ratio of dimensions between two bipolar transistors configured such that a difference between base-emitter voltages of these two transistors determines and is equal to the voltage) proportional to the absolute temperature.

[0013] According to one embodiment: the band gap circuit comprises two bipolar transistors of a first type among NPN and PNP having their bases connected together; The first of the two bipolar transistors has its emitter connected to a node applying a reference potential and its base and collector coupled, preferably connected, to each other; a second of the two bipolar transistors is n times larger than the first of the two bipolar transistors and has its emitter coupled to the node of application of the reference potential by the first resistance; the band gap circuit includes a third bipolar transistor of the first type having its base and collector coupled to each other by a buffer circuit; The emitter of the third bipolar transistor is connected to the node where the reference potential is applied; and The base of the third bipolar transistor is coupled to the node of application of the reference potential by the second resistor.

[0014] According to one embodiment: the circuit includes a first current mirror configured to provide a copy of the current flowing through the first resistor to a current summation node and to bias the first of said two bipolar transistors; The bandgap circuit includes a second current mirror configured to provide a copy of the current flowing through the second resistor at the current summation node; and the third resistance couples the current summation node to the reference potential application node.

[0015] According to one embodiment, an additional buffer circuit is connected to the current summation node and is configured to provide an output voltage) equal to the voltage) across the third resistor.

[0016] According to one embodiment: The collectors of the two bipolar transistors are coupled to a node for applying a supply potential via the first current mirror; and the buffer circuit coupling the base and collector of the third bipolar transistor couples the base of the third transistor to the second current mirror, the second current mirror coupling this buffer circuit to the node of application of the supply potential. Brief description of the drawings

[0017] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0018] Fig. 1 represents, schematically, an example of a band gap circuit of the type to which the described embodiments apply;

[0019] [Fig.2] represents, in more detail, an example of a band gap circuit of the type of that in [Fig.1];

[0020] Figure 3 schematically represents an example of calibration, or adjustment, of the circuits in Figures 1 and 2; and

[0021] [Fig.4] schematically represents an example of a calibration, or adjustment, embodiment of a band gap circuit of the type of those in Figures 1 and 2. Description of the implementation methods

[0022] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0023] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0024] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.

[0025] In the following description, when referring to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative positional qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to Orientation qualifiers, such as the terms "horizontal", "vertical", etc., refer, unless otherwise specified, to the orientation of the figures.

[0026] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0027] Fig. 1 schematically illustrates an example of a band gap circuit 1 of the type to which the described embodiments apply. More particularly, Fig. 1 illustrates the principle of a band gap circuit configured to provide a temperature-stable voltage Vout(T).

[0028] Circuit 1 includes a resistor RI across which a PTAT-type voltage Vptat(T) is available. In other words, circuit 1 is configured so that the voltage Vptat(T) is available between the terminals of resistor RL II, resulting in a current Iptat(T) flowing through resistor RL.

[0029] Circuit 1 includes a resistor R2 across which a CT AT type voltage Vbe(T) is available. In other words, circuit 1 is configured so that the voltage Vbe(T) is available between the terminals of resistor R2. As a result, a current Iveb(T) flows through resistor R2.

[0030] Thus, in circuit 1: [Math. 1] Tl / t'A Vbe(T) and Ivbe(T) =—— [Math. 2] Iptat (T) = Vptat(T) / R1

[0031] Circuit 1 further includes a resistor R3 configured such that a current Icst(T) equal to the sum of the currents Iveb(T) and Iptat(T) flows through it. The voltage Vout(T) is then available across the resistor R3 and: [Math. 3] v^Vhe(T) . VP™(T) \

[0032] By way of example, the resistor R3 is connected between a node 100 receiving the currents Iveb(T) and Iptat(T) and a node 102 configured to receive a supply potential, for example a low supply potential corresponding to a reference potential, for example ground GND.

[0033] By way of example, to illustrate the operation of circuit 1, in [Fig. 1] resistors RI and R2 are shown connected in parallel between node 100 and a node 104 configured to receive a supply potential, for example a high supply potential Vcc. This representation is purely functional; in practice, resistors RI and R2 are not necessarily connected in the manner described above.

[0034] By way of example, circuit 1 may include a BUF circuit, the BUF circuit being an analog buffer circuit. The BUF circuit is connected to node 100 and is configured to provide, at node 106, a voltage Voutb(T) equal to the voltage Vout(T) by isolating nodes 100 and 106 from each other. The voltage Voutb(T) is then the output voltage of circuit 1. As an alternative example, the BUF circuit is omitted and the voltage Vout(T) is then the output voltage of circuit 1.

[0035] By way of example, although not illustrated in [Fig. 1], circuit 1 comprises two bipolar transistors configured to provide the voltage Vptat(T) from, or equal to, the difference between the two base-emitter voltages of these two bipolar transistors. For example, these two transistors are of the same type, PNP or NPN, receive the same collector current, and have their bases connected together. In addition, one of the two bipolar transistors is n times larger than the other, with n a positive number strictly greater than 1. Furthermore, the smaller of the two bipolar transistors has its collector and base connected together.

[0036] In this case: [Math. 4] V piati T) — ( n ) with Ut = (k*T) / q, T the temperature in Kelvin, k the Boltzmann constant, and q the elementary electric charge equal to 1.6*10-19 coulomb.

[0037] By way of example, although not illustrated in [Fig. 1], circuit 1 includes a bipolar transistor configured to provide the voltage Vbe(T) from, or equal to, its base-emitter voltage. This bipolar transistor is, for example, one of two bipolar transistors configured to generate the voltage Vptat(T) or another bipolar transistor.

[0038] In this case: [Math. 5] Vbe(T) — EG - y- *(EG- Vbe(Tr)^ with Tr a reference temperature for example equal to 300°K, EG a constant equal to 1.181 V, and Vbe(Tr) the base-emitter voltage value of the bipolar transistor at temperature Tr.

[0039] Using equations [Math. 4] and [Math. 5] in equation [Math. 3], it follows that: [Math. 6] Vout(T) = R3^- + ^F2)

[0040] By setting: [Math. 7] JL = ] + and Tr 1 Tr

[0041]

[0042]

[0043]

[0044]

[0045]

[0046]

[0047] [Math. 8] Utr- = We obtain: [Math. 9] Vout(T) =EG*^-^*f;*(EG-Vbe^^ Vout(T) = EG*$-&*(EG-Vbe(Jr) )-^'^{EG-Vbe(Tr) ) +~pW*ln(n) + ^^Utr^nin) VoupT) = EG*^-^*(EG-Vbe(Tr)) + + ^\&*Utr*ln(n) -&*(EG-Vbe(Tr))) Thus, Vout(T) is the sum of a constant term VoutO and a term Vslope(T) varying with temperature, where: [Math. 10] Vont) = *ütr*ln ( n ) + g *Vbe(Tr) and [Math. 11] Vslope(T) = ^*(fpL7r*ln(H) -§*(EG- Vbe(Tr) )) this term being zero when the temperature T is equal to the reference temperature Tr. Circuit 1 is configured so that the voltage Vout(T) is independent of the temperature T, therefore: [Math. 12] *Utr^n(n) -*(EG-Vbe(Tr)) =0 In the case where the two resistors R2 and R3 are fixed (non-adjustable) and correspond respectively to two values ​​of resistors R20 and R30, equation [Math. 12] is valid if: [Math. 13] Æ20= Utr^nin) Equation [Math. 13] can also be written as: [Math. 14] EG = *Utrnn(n) + Vbe(Tr) or [Math. 15] UirTn (n) =-^^( EG-V be (Tr)) The resistance R2 is sized to have a fixed value R20 respecting the equation [Math. 13] above. We therefore expect the voltage Vout(T) to be constant and independent of temperature, and that: [Math. 16] Vont (T) = FG^g = EG*Gam with [Math. 17] Gain =

[0048] Thus, the value R30 is chosen so that R30 = Gain*R20, Gain being a factor determined by the target value of Vout(T).

[0049] By taking equations [Math. 14] and [Math. 17], we obtain: [Math. 18] gain*EG = *EG = *Z7rr*ln(n) + *Vbe(Tr)

[0050] Furthermore, using [Math. 15], equations [Math. 10] and [Math. 11] can be written respectively: [Math. 19] Vont® = ^{EG-Vbe( Tr) ) + ^Vbe( Tr) and [Math. 20] Vslopet T) =^*(EG-Vbe(T^

[0051] Figure 2 represents, in more detail, an example of a band gap circuit 1.

[0052] Circuit 1 comprises resistor RI, a bipolar transistor T1, and a bipolar transistor T2 of the same type, NPN or PNP, as transistor T1 and n times larger than transistor TL. Transistors T1 and T2 are configured to provide, across resistor RI, the voltage Vptat(T) equal to the difference between their base-emitter voltages, and defined by equation [Math. 4]. The current Iptat(T) then flows through resistor RL.

[0053] For example, transistors T1 and T2 are of the NPN type. For example, transistor T1 has its base coupled, for example connected, to its collector, and its emitter connected to node 102, while transistor T2 has its base connected to the base of transistor T1, and its emitter coupled to node 102 by resistor RL. For example, the collectors of both transistors T1 and T2 are coupled to node 104 by MOS transistors M1 and M2 respectively; in this P-channel example, transistors M1 and M2 are connected in current mirror configuration. For example, transistors M1 and M2 are identical.

[0054] Circuit 1 comprises resistor R2 and a bipolar transistor T3 of the same type, NPN or PNP, as transistors T1 and T2. Transistor T3 is configured to supply, across resistor R2, its base-emitter voltage Vbe(T) as defined by equation [Math. 5]. The current Ivbe(T) then flows through resistor R2.

[0055] For example, transistor T3 has its base coupled to its collector by a buffer circuit, for example a MOS transistor M4, for example an N-channel transistor in this example, configured as a source follower. Furthermore, transistor T3 has, for example, its emitter connected to node 102 and its collector coupled to the node by a MOS transistor M3, in this example a P-channel transistor, transistor M3 being, for example, configured in current mirroring with transistors M1 and M2. In addition, transistor T3 has its base coupled to node 104 by via a MOS transistor M5, in this example a P-channel transistor. For example, transistor M5 has its drain connected to the drain of transistor M4.

[0056] Circuit 1 further includes node 100 and resistor R3, resistor R3 being connected between node 100 and node 102.

[0057] Circuit 1 includes a current mirror configured to supply the current Iptat(T) to node 100. For example, this current mirror includes transistor M2 and a channel MOSFET M6 of the same type as transistor M2, with transistor M6 being connected in a current mirror configuration with transistor M2. In other words, transistors M1, M2, and M6 form a current mirror configured to bias transistor T1 and supply node 100 with a copy of the current Iptat(T) flowing through resistor R3.

[0058] Circuit 1 also includes a current mirror configured to supply the current Ivbe(T) to node 100, or, in other words, to supply node 100 with a copy of the current Iveb(T) flowing through resistor R2. For example, this current mirror includes transistor M5 and a channel MOS transistor M7 of the same type as that of transistor M5, transistor M7 being mounted in current mirroring with transistor M5.

[0059] Thus, the current Icst(T) flows through the resistance R3 and the voltage Vout(T) is available across the terminals of the resistance R3.

[0060] In the case where resistors R2 and R3 are fixed and have respective values ​​R20 and R30, the value R20 is chosen to satisfy equation [Math. 13] and the value R30 is chosen to satisfy equation [Math. 17]. However, in practice, manufacturing variations lead to errors in the equations described above, for example, in the values ​​of resistors R20 and R30. As a result, for example, at temperature Tr, the voltage Vout(T) may not be equal to the target value EG*Gain.

[0061] It is therefore generally planned to be able to adjust the value of the resistances R2 and R3 to compensate for the effect of manufacturing variations, at least at temperature Tr.

[0062] Fig. 3 represents, schematically, an example of calibration, or adjustment, of the circuits of figures 1 and 2.

[0063] More specifically, [Fig. 3] illustrates an example where resistors R2 and R3 are each implemented by a series combination of a constant resistance and a single controllable resistance. In other words, each of resistors R2 and R3 comprises a fixed part and a single controllable part.

[0064] Thus, resistor R2 comprises a fixed part (or fixed resistance) 300 and a controllable part (or controllable resistance) 302. Resistors 300 and 302 are connected in series across the terminals of resistor R2. Similarly, resistor R3 comprises a fixed part (or fixed resistance) 304 and a controllable part (or controllable resistance) 306. Resistors 304 and 306 are connected in series across the terminals of resistor R3.

[0065] The fixed part 300, respectively 304, of the resistor R2, respectively R3, has a resistance value R20, respectively R30.

[0066] The controllable portion 302 of resistor R2 has a value equal to the product of a setting value R2T1 and an integer Trim. The integer Trim is determined by a control signal sTrim. In other words, the resistance value of portion 302 of resistor R2 is equal to R2T1*Trim. For example, the Trim value is between -8 and +8.

[0067] The controllable part 306 of the resistor 32 has a value equal to the product of a setting value R3T1 by the integer Trim. In other words, the resistance value of the part 306 of the resistor R3 is equal to R3T1*Trim.

[0068] Thus, both resistors R2 and R3 are controlled by the same sTrim signal. Circuit 1 (not detailed in [Fig.3]) then includes a CTRL control circuit configured to provide the sTrim signal for controlling resistors R2 and R3.

[0069] The values ​​of resistors R2 and R3 can therefore be written as: [Math. 21] RI = R2Q + RZTRTrim [Math. 22] Ri = #30 + R3T ​​l*Trim

[0070] The values ​​R20 and R30 are chosen so that R20 satisfies equation [Math. 13] and R30 satisfies equation [Math. 17]. Thus, in the absence of dispersion, equations [Math. 13] and [Math. 14] are valid if Trim is zero, i.e., if there is no adjustment of resistors R2 and R3, which is logical.

[0071] Equation [Math. 13] can be written: [Math. 23] #20 = R1*(EG- Vbe(Tr) )

[0072] By way of example, to simplify the description of [Fig. 3], the R2T1 and R3T1 adjustment values ​​are each taken to be equal to a ROTI value, and the Gain factor is chosen to be equal to 1, from which it follows that: [Math. 24] R2 = #20* ( 1 + ^Trim) = #3

[0073] Using equation [Math. 24], equations [Math. 19] and [Math. 20] can then be written: [Math. 25] VoutO = EG + *(EG-Vbe(Tr)) and [Math. 26] Vslope (T) = *(EG-Vbe(Tr})

[0074] Thus, if at temperature Tr the voltage Vout(Tr) is not equal to EG in this example where the Gain factor is equal to 1, it is possible, by modifying the value of the Trim number, to bring the voltage Vout(Tr) back to the value EG. However, the value of the Trim number causes a change in the value of the factor R20 / Rl*(l + (R0Tl / R20)*Trim)*Utr*ln(n) - (Eg - Vbe(T)), therefore in the slope of the Vlope(T) part of the voltage Vout(T).

[0075] Symmetrically, a modification of the Trim number to modify the slope of the Vslope(T) part of the voltage Vout(T) necessarily results in a modification of the absolute value of the VoutO part of the voltage Vout(T).

[0076] This interdependence of the setting of the value of VoutO and the slope of the part Vslope(T) is also present when the factor G is chosen to be different from 1, although this is not detailed here.

[0077] The interdependence of the setting of the constant value VoutO of the voltage Vout(T) and the setting of the slope of the part Vslope(T) of the voltage Vout(T) is not desirable, for example in applications where the voltage Vout(T) must have a value as constant as possible over a whole temperature range.

[0078] It is also preferable that the sTrim signal controls both resistors R2 and R3 simultaneously and in the same way to avoid a complex adjustment procedure.

[0079] To overcome the above drawbacks, it is proposed here that: Each of the resistors R2 and R3 comprises a fixed part and N controllable parts, with N an integer greater than or equal to 2; each controllable part is equal to the product of a setting value of the controllable part by an integer determined by a control signal of that controllable part; Each of the N controllable parts of the resistor R2 is associated with a corresponding controllable part of the resistor R3; a control circuit is configured to provide, for each controllable part, the same control signal to that controllable part and to the controllable part associated with it; and at least one controllable part has a setting value different from that of the controllable part associated with it.

[0080] Indeed, as will be detailed later with examples, this allows that, for each pair of associated controllable parts comprising a controllable part of the resistance R2 and a part of the resistance R3, the effect of a modification of the control signal of this pair of associated controllable parts is independent of the effect of a modification of the control signal of another pair of associated controllable parts.

[0081] More specifically, the setting values ​​of each of the controllable parts of a pair of associated controllable parts can be determined so that a modification of the control signal of this pair of associated controllable parts results in: a simultaneous modification of the value of VoutO and the slope of the voltage Vslope(T); or a change in the value of VoutO without changing the slope of the voltage Vslope(T); or a change in the slope of the voltage Vslope(T) without changing the value of VoutO.

[0082] It is therefore possible, with N control signals of the N pairs of associated controllable parts, to make N settings independent of each other.

[0083] Fig. 4 schematically represents an example of a calibration, or adjustment, embodiment of the band gap circuit 1, in the case where the resistors R2 and R3 are as defined above, i.e. with each having N controllable parts, the controllable parts of the resistors R2 and R3 being associated in pairs comprising a controllable part of the resistor R2 and a controllable part of the resistor R3, both controlled by the same signal.

[0084] In the example in [Fig.4], N is equal to 2.

[0085] In [Fig.4], only the resistors R2 and R3 of circuit 1 and the CTRL1 control circuit of resistors R2 and R3 are detailed.

[0086] The resistor R2 comprises a fixed part (or resistor) R20 and N controllable parts (or resistors) R2i, where i is an integer index from 1 to N. The resistors R20 and R2i are connected in series across the terminals of the resistor R2. In the example in [Fig. 4], where N equals 2, the resistor R2 therefore comprises two controllable parts, R21 and R22.

[0087] Similarly, the resistor R3 comprises a fixed part (or resistor) R30 and N controllable parts (or resistors) R3i. The resistors R30 and R3i are connected in series across the terminals of the resistor R3. In the example of [Fig. 4], where N equals 2, the resistor R3 therefore comprises two controllable parts R31 and R32.

[0088] Each part R2i of the resistor R2 is associated with a corresponding part R3i of the resistor R3. In the example of [Fig.4] where N is equal to 2, the part R21 of the resistor R2 is associated with the corresponding part R31 of the resistor R3, and the part R22 of the resistor R2 is associated with the corresponding part R32 of the resistor R3.

[0089] Each part R2i of the resistor R2 has a resistance value equal to the product of a setting value R2Ti of the part R2i and an integer Trimi, the value of the Trimi number being determined by a control signal STrimi of the part R2i. Thus, in the example of [Fig. 4] where N equals 2, the part R21 is equal to R2Tl*Triml and the part R22 is equal to R2T2*Trim2. By way of example, each Trimi number can take any integer value from an integer value -A to an integer value +A, with A a strictly positive integer value, for example equal to 8.

[0090] Symmetrically, each part R3i of the resistor R3 has a resistance value equal to the product of a setting value R3Ti of the part R3i and the corresponding integer Trimi. Thus, in the example of [Fig. 4] where N equals 2, part R31 is equal to R3Ti*Triml and part R32 is equal to R3Ti2*Trim2.

[0091] In resistors R2 and R3, for each pair of associated controllable parts R2i and R3i, both controllable parts R2i and R3i of the pair are controlled by the same STrimi signal, which determines the value of the Trimi number. For example, in [Fig. 4], where N equals 4, the associated controllable parts R21 and R31 are controlled by the same STrimi signal, which determines the value of the Trimi number, and the associated controllable parts R22 and R32 are controlled by the same STrim2 signal, which determines the value of the Trim2 number.

[0092] The STRimi signals are provided by the CTRL1 circuit.

[0093] The Trimi numbers are determined independently of each other, or, put another way, the STrimi signals are independent of each other.

[0094] The resistance values ​​of the fixed parts R20 and R30 of the resistors R2 and R3 are chosen to verify the equations [Math. 13] and [Math. 17].

[0095] Thus, in [Fig.4]: [Math. 27] R2 = A20 + R2TÏ*Triml + R2T2*Trim2 R2 = Æ20*( 1 + ™*Trim 1 + *Trim2) and [Math. 28] R3 = Æ30 + R3T ​​STrimi + R3T2*Trim2 R3 = Æ30* (1 + “r *Triml + *Trim2)

[0096] In equation [Math. 27], we set: [Math. 29] x - *Trim 1 + *Triml

[0097] Since x is in practice small compared to 1, we use the following limited expansion: [Math. 30] Ï7" ~ 1+A'

[0098] From which it follows that: [Math. 31]

[0099] And so that: [Math. 32] B ~ feïï * (1 - W "Trim 1 - W *T™n2 ) * (1 + ® ^Trim 1 + *Trim2 )

[0100] Substituting, in equation [Math. 19]: - R3 / R2 by its expression according to equation [Math. 32], and - R3, by its expression according to [Math. 28] in the term R3 / R20, we then obtain: [Math. 33] KM K ' KM \ K2U K~U / ' KM txM! \ ) [Math. 34] )7 / 170 = ^+70-^+7^271 + ^+7 / 1( / 1+^-^+7711 / 1+7 / , / (771 + ^+2711 / 2^0-^+777) / 2+- / ^2 / ) + ^ ^+ / 7ml'( 1-^+77ot1 +^'27w2) "l'W / / ) - ^'27;rtr2+( 1 + ^'2 / ml-r-^'77w^

[0101] Neglecting all the terms in Triml*Trim2, Triml*Triml and Trim2*Trim2 in the expression [Math. 34] above, we then obtain: [Math. 35] Vûtrt^fflpEG-^pVbeiTr) + !^*lrbnl'>EG-1^-*'Trim)*Vbe(Tr} + !^iG'riml*EG-Jffî*Vrim2'->yb^^ +^*( rm2)*Vb^(Tr) - — ' ^^^Triml^beÇI'r) -^*^^*Tri>n2*-Vbé(Tr)

[0102] Expanding the expression [Math. 35] above, we obtain: [Math. 36] VoM~ m^G-Tr ) + ^^+7 / 17))(+^6--^^77))71-^7(77)+^--^)77712+5 / ( / -^^+77.7^2^ / ^(71-)+^ ---- + ^7+7 / 1) / 11^ / ^(7)-) ■ ~”^^“Trim2'!Vbe(Tr) VoutO = ^*EG+^- *Triml*EG + *Trim2*EG - ü * W Trén ( Tr) - *Trim2 *Vbe ( Tr )

[0103] And so: [Math. 37] VoutQ = Gam^EG + Trimr(^*EG- *Vbe(Tr) ) + Trim2*( ^EG - *Vbe(Tr) ))

[0104] Similarly, by substituting, in equation [Math. 20]: - R3 / R2 by its expression according to equation [Math. 32], and - R3, by its expression according to [Math. 28] in the term R3 / R20, we then obtain: [Math. 38] Vslope(T) = Tÿï + ( -1-(- . vbe(Tr JJ - ^7+ ( li-~^'Trtinl + ^~"i riml^ECr-Vbeyir') ) + ( ^~K'Tri>nl}* (1 + -^+2 V / Ki'lr) J +^3 ( (l + ^'iTriml + ^~22',i |■im2\*IE0-Vbe(it) ) )

[0105] Neglecting, as for VoutO, the terms in Triml*Triml, Triml*Trim2 and Trim2*Trim2 gives: [Math. 39] V^)pe(T)= ^nnm\)'H EG A'he.(Tr} ) +C,àn[ ^nr'm2}-(EG-Vhe{Tr)) )

[0106] From which it follows that: [Math. 40] Vslope(T) = Gai^^\EG - Vbe(Tr)y(( ^*Triml) + ( ^^TrM) )

[0107] In equations [Math. 37] and [Math. 40] above, the effects of modifications to the Trimi numbers are added together in the expressions for VoutO and Vslope(T), without the effect of a modification to one of the Trimi numbers affecting the effect of a modification of another of the Trimi numbers. In particular, equation [Math. 40] shows that the slope of the term Vslope(T) does not depend on the setting of R3.

[0108] Thus, as previously stated, the adjustment values ​​of each of the controllable parts R2i and R3i of a pair of associated controllable parts can be determined such that a modification of the STrimi signal, and therefore of the Trimi number, corresponding to this pair of controllable parts R2i and R3i results in: a simultaneous modification of the value of VoutO and the slope of the voltage Vslope(T); or a change in the value of VoutO without changing the slope of the voltage Vslope(T); or a change in the slope of the voltage Vslope(T) without changing the value of VoutO.

[0109] Thus, a first Trimi number can be modified (or used) to implement one of the three modifications listed above, while a second Trimi number can be modified (or used) to implement another of the three modifications listed above.

[0110] For example, considering a Gain factor equal to 1 (R30 = R20), and a pair R2i, R3i of a given index i, and assuming that R2Ti = R3Ti for this index i, a change in the Trim number corresponding to this index results in a simultaneous change in the voltage VoutO and the slope of the voltage Vslope(T). For example, applying this to the pair R21, R31 of index i equal to 1, that is, choosing R2T1 = R3T1 = ROTI, we obtain: [Math. 41] VoutO = EG + Trim 1 (EG- Vbe(Tr)) + Trim2*(*EG-*Vbe(Tr)) [Math. 42] Vslope(T)= ^*(EG-Vbe(Tr) )*(™*Triml + ^Triml)

[0111] We then find, in the expression of VoutO according to equation [Math. 41], the right-hand side of equality [Math. 25] with Trim = Trimi, and, in the expression of Vslope(T) according to equation [Math. 42], the right-hand side of equality [Math. 26] with Trim = Trimi.

[0112] In other words, by taking, for a given pair R2i, R3i of index i, the adjustment values ​​R2Ti and R3Ti to be equal to each other, the number Trimi can be used to implement the adjustment simultaneously modifying the value of the voltage VoutO and the slope of the voltage Vslope(T) as is the case in [Fig.3]. However, compared to [Fig. 3], it is then possible to use a pair R2i, R3i with a different index i to make another adjustment, for example to modify the value of the voltage VoutO without changing the value of the voltage slope Vslope(T) or to modify the value of this slope without changing the value of the voltage VoutO.

[0113] As another example, considering a unity Gain factor and a pair R2i, R3i of a given index i, the corresponding adjustment values ​​R2Ti and R3Ti can be determined such that a change in the Trim number corresponding to this given index i results in a change in the slope of the voltage Vslope(T), without changing the value VoutO. For example, to achieve this, the adjustment values ​​R2Ti and R3Ti of this pair R2i, R3i of a given index i are chosen such that R2Ti*Vbe(Tr) = R3Ti*EG. For example, applying this to the pair R21, R31 of index i equal to 1, that is, choosing R2Ti*Vbe(Tr) = R3Ti*EG in equations [Math. 37] and [Math. 40] above, we obtain: [Math. 43] VoutO = EG + Trim2*( *EG - *Vbe( Tr) ) and [Math. 44] Vslope (T) = ~~~ *(EG-Vbe(Tr))*( *7 rjm 1 + ¢7 rim2 )

[0114] Thus, in equations [Math. 43] and [Math. 44], a change in the Trimi number only changes the value of the slope of the voltage Vslope(T), without changing the value of VoutO.

[0115] As another example, considering a unity Gain factor and a pair R2i, R3i of a given index i, the corresponding adjustment values ​​R2Ti and R3Ti can be determined such that a change in the Trim number corresponding to this given index i results in a change in the value VoutO, without changing the slope of the voltage Vslope(T). For example, to achieve this, the adjustment values ​​R2Ti and R3Ti of this pair R2i, R3i of a given index i are chosen so that R2Ti is zero. For example, applying this to the pair R21, R31 of index i equal to 1, that is, choosing R2T1 = 0 in equations [Math. 37] and [Math. 40] above, we obtain: [Math. 45] Vout0 = EG + Triml*(^*EG) + Trim2*(^*EG-^*Vbe(Tr} ) and [Math. 46] Vslope(T) = ^f*(EG-Vbe(Tr))*^*Trim2

[0116] Thus, in equations [Math. 45] and [Math. 46], a change in the Trimi number only changes the value of VoutO, without changing the value of the slope of the voltage Vslope(T).

[0117] An example where N equals 2 has been described above in relation to [Fig. 4]. However, in other examples, N may equal 3. Equations [Math. 37] and [Math. 40] then become: [Math. 47] VoutQ = Gam*(EG + Triml^ ^*Vbe(Tr)) + Trina*(^EG-^*Vbe(Tr) ) + Trim3*(^EG~^*Vbe{Tr) )) And [Math. 48] Vslope(T) = Gain*(EG-Vbe(Tr) ) ( ^*Triml) + ( ^*Trim2) + ( ^*Trim3) )

[0118] In the case N = 3, for example, a first Trim number, for example Trim1, is used to simultaneously adjust the slope of the voltage Vslope(T) and the value of the voltage VoutO; a second Trim number, for example Trim2, is used to adjust the voltage VoutO without changing the slope of the voltage Vslope(T); and a third Trim number, for example Trim3, is used to adjust the slope of the voltage Vslope(T) without changing the value of the voltage VoutO. For example, in the case of a Gain factor of unity, the adjustment values ​​are chosen as follows: -R2T1 = R3T1; - R2T2 = 0; and - R2T3*Vbe(Tr) = R3T3*EG.

[0119] Applying this to equations [Math. 47] and [Math. 48] (with Gain = 1), we then obtain: [Math. 49] Vout0 = EG+Trimï\^ÿ-*(EG - Vbe(Tr) ) ) + Trim2*(^*EG) and [Math. 50] Vslope(T) - ~L~.* ( EG - Vba{1 f ) ritn 14-*7 rim3)

[0120] These equations [Math. 49] and [Math. 50] clearly show that: - a change in the Trimi number results in a simultaneous change in the voltage VoutO and the slope of the voltage Vslope(T); - a change in the Trim2 value results only in a change in the VoutO voltage; and - a change in the Trim3 number results in a change only in the slope of the voltage Vslope(Tr).

[0121] More generally, equations [Math. 37], [Math. 40] and [Math. 47], [Math. 48] can be generalized to any N greater than or equal to 2, the voltage VoutO and the voltage Vslope(T) then being written: [Math. 51] V <w0 = Gain^EG + ™ *EG - *Vbe( Tr) )) et [Math. 52] Vslopei T) = Gain* *( Tr)) *T rimi

[0122] In the examples described above, the Gain factor has been taken to be 1. However, in other examples, circuit 1 can be sized so that, at the temperature Tr, the voltage Vout(T) is equal to the product of the value EG by the gain Gain having a value different from 1.

[0123] For example, taking the example above where N equals 3 and where Trim1 allows simultaneous adjustment of the value of VoutO and the slope of Vslope(T), Trim2 allows adjustment of the voltage VoutO without changing the slope of the voltage Vslope(T) and Trim3 allows adjustment of the slope of the voltage Vslope(T) without changing the value of the voltage VoutO, the adjustment values ​​are chosen as follows: - R3T1 = Gain*R2Tl; - R2T2 = 0; and - Gain*R2T3*Vbe(Tr) = R3T3*EG.

[0124] Applying this to equations [Math. 51] and [Math. 52] above in the case N = 3, we then obtain: [Math. 53] = Gain*(£G + E^Tn>m*( )) VoutO = G^EG + TrM*( ^*EG- ) + Trb>a*(^*£G-^^*Vbe(Tr) ) +Trint3*(^EG-St^2»Vbe(Tr) ) VoutO = Gain*EG + Triml* ( *( EG - Vbe( Tr ) ) ) + Trim2*EG [Math. 54] Vslope (T) = *Gain* (EG -Vbe(Tr)) *T rimi Vslope(T) = ^*(EG-Vbe(Tr))*(Z£2^*Trim^^ Vslope(T) = ^f^(EG-Vbe(Tr))*(&&^

[0125] It is clear from equations [Math. 53] and [Math. 54] that a change in Trim1 results in a change in the slope of Vslope(T) and in the value of VoutO, that a change in Trim2 only changes the value of VoutO without changing the slope of Vslope(T), and that a change in Trim3 only changes the slope of Vslope(T) without changing the value of VoutO.

[0126] Various embodiments and variants have been described. A person skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will become apparent to a person skilled in the art. In particular, a person skilled in the art will be able to adapt the above description to the case where N is strictly greater than 3, although preferably N is equal to 2 or 3, and even more preferably equal to 3.

[0127] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional indications given above. In particular, a person skilled in the art is able to adapt the example circuit 1 of [Fig. 2], in which the potential Vcc is positive with respect to the reference potential GND, to the case where the potential Vcc is negative with respect to the potential of reference by replacing all NPN type bipolar transistors with PNP type bipolar transistors, and, for example, all P-channel MOS transistors with N-channel MOS transistors and vice versa.

Claims

Claims

1. A bandgap circuit (1) comprising: a first resistor (RI) configured to receive a voltage (Vptat(T)) proportional to the absolute temperature between its terminals; a second resistor (R2) configured to receive a voltage (Vbe(T)) complementary to the absolute temperature between its terminals; a third resistor (R3) configured so that a current in the third resistor is equal to the sum of a current in the first resistor (RI) and a current in the second resistor (R2); and a control circuit (CTRL1), in which: each of the second and third resistors (R2; R3) comprises a fixed part (R20; R30) and N controllable parts (R21, R22; R31, R32), with N an integer greater than or equal to 2; each controllable part (R21, R31; R22, R32) is equal to the product of a setting value (R2T1, R3T1; R2T2, R3T2) of said controllable part by an integer (Triml; Trim2) determined by a control signal (STriml; STrim2) of said controllable part; each of the N controllable parts (R21, R22) of the second resistor (R2) is associated with a corresponding controllable part (R31, R32) of the third resistor (R3); the control circuit (CTRL1) is configured to provide, for each controllable part (R21, R22; R31, R32), the same control signal (STriml, STrim2; STriml, STrim2) to said controllable part (R21, R22; R31, R32) and to the controllable part (R31, R32; R21, R22) associated with it; and at least one controllable part has a different setting value than the controllable part associated with it.

2. A bandgap circuit (1) according to claim 1 wherein: a pair of a controllable portion (R31, R32) of the third resistor (R3) and the associated controllable portion (R21, R22) of the second resistor (R2) satisfies one of the following relationships: - the setting value (R3T1, R3T2) of the controllable part (R31, R32) of the third resistor (R3) is equal to Gain times the setting value (R2T1, R2T2) of the associated controllable part (R21, R22) of the second resistor (R2); - the setting value (R2T1, R2T2) of the controllable part (R21, R22) of the second resistor (R2) is zero; and - the setting value (R3T1, R3T2) of the controllable part (R31, R32) of the third resistor (R3) is equal to Gain*Vbe(Tr) / EG times the setting value (R2T1, R2T2) of the associated controllable part (R21, R22) of the second resistor (R2), with Gain equal to the ratio of the resistance value of the fixed part (R30) of the third resistor (R3) by the resistance value of the fixed part (R20) of the second resistor (R2), Vbe(Tr) the value of the voltage (Vbe(T)) complementary to the absolute temperature taken at a temperature Tr, Tr the reference temperature for example equal to 300°K, and EG a constant equal to 1.181 V.

3. A bandgap circuit (1) according to claim 2, wherein: another pair (R31, R32) of a controllable portion of the third resistor (R3) and the associated controllable portion (R21, R22) of the second resistor (R2) satisfies another of said relationships.

4. A bandgap circuit (1) according to claim 3, wherein: N is greater than or equal to 3; and yet another pair of a controllable portion of the third resistor and the associated controllable portion of the second resistor satisfies yet another of said relationships.

5. A bandgap circuit (1) according to any one of claims 1 to 4, wherein the fixed portions (R20, R30) of the second and third resistors have the same resistance value (RO).

6. Bandgap circuit (1) according to any one of claims 1 to 5, wherein a resistance value (RO) of the fixed part (R20) of the second resistor (R2) is equal to (EG-Vbe(Tr)) / (Utr*ln(n)) times a resistance value of the first resistor (RI), with: EG a constant equal to 1.181 V; Vbe(Tr) the value of the voltage (Vbe(T)) complementary to the absolute temperature taken at a reference temperature Tr, for example equal to 300°K; Utr equal to (k*Tr) / q, with k the Boltzmann constant and q the elementary electric charge; and n, a size ratio between two bipolar transistors (Tl, T2) configured so that a difference between base-emitter voltages of these two transistors determines and is equal to the voltage (Vptat(T)) proportional to the absolute temperature.

7. A bandgap circuit (1) according to any one of claims 1 to 6, wherein: the bandgap circuit (1) comprises two bipolar transistors (Tl, T2) of a first type among NPN and PNP having their bases connected to each other; a first (Tl) of the two bipolar transistors (Tl, T2) has its emitter connected to a node (102) for applying a reference potential (GND) and its base and collector coupled, preferably connected, to each other; a second (T2) of the two bipolar transistors (Tl, T2) is n times larger than the first of the two bipolar transistors (Tl, T2) and has its emitter coupled to the node (102) for applying the reference potential (GND) by the first resistor (RI); the bandgap circuit (1) comprises a third bipolar transistor (T3) of the first type having its base and collector coupled to each other by a buffer circuit (M4); the emitter of the third bipolar transistor (T3) is connected to the node of application of the reference potential;and the base of the third bipolar transistor (T3) is coupled to the node (102) for applying the reference potential (GND) by the second resistor (R2).;

8. The bandgap circuit (1) of claim 7, wherein: the circuit comprises a first current mirror (M1, M2, M6) configured to provide a copy of the current (Iptat(T)) flowing in the first resistor (RI) to a current summing node (100) and to bias the first (T1) of said two bipolar transistors (T1, T2); the bandgap circuit (1) comprises a second current mirror (M5, M7) configured to provide a copy of the current (Ivbe(T)) flowing in the second resistor (R2) to the current summing node (100); and the third resistor (R3) couples the current summing node (100) to the node (102) for applying the reference potential (GND).

9. Bandgap circuit (1) according to claim 8, wherein, an additional buffer circuit (BUF) is connected to the current summing node (100) and is configured to provide an output voltage (Voutb(T)) equal to the voltage (Vout(T)) across the third resistor (R3).

10. A circuit according to claim 8 or 9, wherein: the collectors of the two bipolar transistors (Tl, T2) are coupled to a node (104) for applying a supply potential (Vcc) by the first current mirror (Ml, M2, M6); and the buffer circuit (M4) coupling the base and the collector of the third bipolar transistor (T3) couples the base of the third transistor to the second current mirror (M5, M7), the second current mirror (M5, M7) coupling this buffer circuit (M4) to the node (104) of application of the supply potential (Vcc).

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