Method of manufacturing an optoelectronic device

The method addresses the efficiency and stability issues of UV LEDs by using selectively etched GaN nanostructures and a III-N alloy stack, reducing photon absorption and stress, and improving the overall performance of UV optoelectronic devices.

FR3156997A1Active Publication Date: 2025-06-20COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +2
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Patent Information

Application Number
FR2023014496
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-19
Publication Date
2025-06-20
Estimated Expiration
2043-12-19

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Abstract

Method for manufacturing an optoelectronic device with vertical nanostructures, comprising an active zone (ZA) designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; the vertical nanostructures being made of n-type doped gallium nitride GaN, and formed on selective epitaxy zones (SAG) by epitaxial growth; the method comprising a step of selective etching of the vertical nanostructures retaining a remaining part (30) of each vertical nanostructure, adapted to retain mechanical strength of lateral zones (41) of an electron transport layer made of a type III-N alloy comprising aluminum Al. Figure 5
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Description

Title of the invention: Method for manufacturing an optoelectronic device Technical field

[0001] The invention relates to the technical field of manufacturing an optoelectronic device. More specifically, the optoelectronic device may be a light-emitting device or a photodetector. The light-emitting device is designed to emit ultraviolet (UV) photons from radiative recombinations of electron-hole pairs. The photodetector is designed to generate electron-hole pairs from absorbed ultraviolet photons.

[0002] The invention finds its application in particular in the manufacture of light sources, displays, detectors for imaging (eg biology) etc. State of the art

[0003] Conventionally, a planar light-emitting diode (LED) for UV emission successively comprises a sapphire substrate A12O3, a thick layer of aluminum nitride AIN, a stack of thin layers made of an alloy of type IILN. The stack successively comprises an electron transport layer, an active zone, a hole transport layer. The active zone, conventionally comprising quantum wells, is designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs. Such a planar LED has a low efficiency (of the order of 10%) due to the thin-film technology. In particular, the presence of structural and point defects reduces the internal quantum efficiency.

[0004] In this respect, a nanowire LED for UV emission constitutes an interesting alternative to a planar LED. Indeed, the absence of structural defects (of the dislocation type) makes it possible to envisage a significant increase in efficiency. The growth of nanowires in aluminum nitride AIN (or in aluminum-gallium nitride AlGaN) on an industrial scale by metalorganic vapor phase epitaxy (MOVPE) is not yet perfectly mastered, due to the low diffusion of aluminum Al atoms. On the other hand, the organized growth of nanowires of gallium nitride GaN by MOVPE is perfectly mastered.

[0005] Thus, it is known from the state of the art, in particular from the document V. Grenier et al., “UV-A to UV-B electroluminescence of core-shell GaN / AlGaN wire hetero-structures”, Appl. Phys. Lett., 121, 131102, 2022, to manufacture a nanowire LED for UV emission by performing epitaxial growth of the LED stack (electron transport layer, active zone, hole transport layer) around gallium nitride GaN nanowires. This is called core-shell epitaxial growth, where the core is formed by a nanowire and the shell is formed by the stack extending around the nanowire.

[0006] However, such a method of the state of the art is not entirely satisfactory insofar as: (i) the gallium nitride GaN core absorbs a large part of the UV photons emitted by the active area, the band gap of the gallium nitride being smaller than the energy of the emitted UV photons; (ii) the epitaxial growth of the LED stack (based on aluminum-gallium nitride AlGaN) generates elastic stresses along the tensile nanowire which promotes the formation of cracks extending perpendicular to the nanowire. Statement of the invention

[0007] The invention aims to remedy all or part of the aforementioned drawbacks. To this end, the invention relates to a method for manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate, made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer, formed on the substrate, and delimiting selective epitaxy zones; - vertical nanostructures, made of n-type doped gallium nitride GaN, formed on the selective epitaxy zones by epitaxial growth; b) forming an electron transport layer, made of a III-N type alloy comprising aluminum Al, around each vertical nanostructure by epitaxy; the electron transport layer having an upper zone and lateral zones; c) exposing the vertical nanostructures by removing the upper region of the electron transport layer; (d) performing selective etching of the exposed vertical nanostructures so as to: - etch a portion of each exposed vertical nanostructure; - retaining a remaining portion of each exposed vertical nanostructure, suitable for maintaining mechanical strength of the lateral areas of the electron transport layer; step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN versus type III-N alloy containing aluminum Al; e) forming a stack, made of a III-N type alloy comprising aluminum Al, on the lateral zones of the electron transport layer by epitaxy; the stack successively comprising an active zone and a hole transport layer; the active zone being designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons.

[0008] Thus, such a method according to the invention makes it possible to reduce the absorption of UV photons emitted by the active zone compared to the state of the art, thanks to steps c) and d) which lead to a partial etching of the vertical nanostructures (core). The selectivity of the partial etching of the gallium nitride GaN core compared to the shell (electron transport layer) is obtained thanks to the presence of aluminum Al in the III-N type alloy of the electron transport layer.

[0009] Furthermore, such a method according to the invention makes it possible to reduce the elastic stresses along the vertical nanostructures compared to the state of the art, because step e) of forming the stack by epitaxy is carried out with a partially etched core, and not with the initial core, which limits the formation of cracks extending perpendicular to the vertical nanostructures. Cracks can be avoided during the formation of the stack if the elastic energy of the lateral zones of the electron transport layer is limited to 4 J / m2.

[0010] The invention also relates to a method for manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate, made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer, formed on the substrate, and delimiting selective epitaxy zones; - vertical nanostructures, made of n-type doped gallium nitride GaN, formed on the selective epitaxy zones by epitaxial growth; b') forming a stack, made from a type III-N alloy comprising aluminum Al, around each vertical nanostructure by epitaxy; the stack successively comprising: - an electron transport layer; - an active zone, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a hole transport layer; the stack having an upper zone and side zones; c) expose the vertical nanostructures: - by removing the upper area of ​​the stack; or - by the formation, intentional or unintentional, of at least one orifice passing through the stack; (d) performing selective etching of the exposed vertical nanostructures so as to: - etch a portion of each exposed vertical nanostructure; - retain a remaining portion of each exposed vertical nanostructure, suitable for maintaining mechanical strength of the lateral areas of the stack; step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN relative to the type III-N alloy comprising aluminum Al.

[0011] Thus, such a method according to the invention makes it possible to reduce the absorption of UV photons emitted by the active zone compared to the state of the art, thanks to steps c') and d) which lead to a partial etching of the vertical nanostructures (core). The selectivity of the partial etching of the gallium nitride GaN core compared to the shell (stack) is obtained thanks to the presence of aluminum Al in the III-N type alloy of the stack.

[0012] The method according to the invention may comprise one or more of the following characteristics.

[0013] According to a characteristic of the invention, step c) is carried out so that the removal of the upper zone of the electron transport layer is obtained by reactive ion etching.

[0014] Thus, an advantage provided by such a technique is to allow both ani-sotropy and selectivity of the etching.

[0015] According to a characteristic of the invention, step c') is carried out so that the removal of the upper zone of the stack is obtained by reactive ion etching.

[0016] Thus, an advantage provided by such a technique is to allow both ani-sotropy and selectivity of the etching.

[0017] According to a characteristic of the invention, step c') is executed so that: - the intentional formation of said at least one orifice passing through the stack is obtained by photolithography followed by etching; - the unintentional formation of said at least one orifice passing through the stack is obtained by cracks generated during the epitaxy of step b').

[0018] According to a characteristic of the invention, the III-N type alloy is chosen from a ternary alloy of aluminum-gallium nitride AlGaN, a quaternary alloy of aluminum-indium-gallium nitride AlInGaN, a quinary alloy of aluminum-indium-gallium nitride aluminum-boron-indium-gallium AlBInGaN.

[0019] According to a characteristic of the invention, the III-N type alloy comprises aluminum Al in an atomic proportion greater than or equal to 5%.

[0020] Thus, an advantage provided is to improve the selectivity of the partial etching of the vertical nanostructures.

[0021] According to a characteristic of the invention, the selective etching is carried out during step d): - by thermal annealing under an atmosphere comprising dihydrogen H2 and ammonia NH3; or - by plasma etching; or - by chemical etching.

[0022] According to a characteristic of the invention, step a) is carried out so that the vertical nanostructures are chosen from nanowires, nanotubes, nanoribbons, nanopillars, nanoneedles, nanocones, nanostraws, nanowalls.

[0023] According to a characteristic of the invention, step a) is carried out so that the substrate is made of a material chosen from silicon Si, silicon carbide SiC, gallium nitride GaN, aluminum nitride AIN, sapphire A12O3.

[0024] Thus, an advantage provided by such substrates is to allow epitaxial growth of gallium nitride GaN.

[0025] According to a characteristic of the invention, step a) is carried out so that the dielectric layer is made of a material chosen from silicon dioxide SiO2 and silicon nitride Si3N4.

[0026] According to a characteristic of the invention, the electron transport layer comprises n-type dopants, preferably silicon Si atoms or germanium Ge atoms.

[0027] Thus, one advantage provided is to increase the electrical conductivity of the electron transport layer.

[0028] According to a characteristic of the invention, the hole transport layer comprises p-type dopants, preferably magnesium Mg atoms.

[0029] Thus, one advantage provided is to increase the electrical conductivity of the hole transport layer.

[0030] According to a characteristic of the invention, the active zone comprises at least one quantum well successively comprising: - a first barrier layer, made from a ternary alloy of aluminum-gallium nitride AlxGai_xN; - an active layer, made of a ternary alloy of aluminum-gallium nitride AlyGai yN with "y" strictly greater than "x", designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer, made from a ternary alloy of aluminum-gallium nitride AlxGabxN; said at least one quantum well being able to be one-dimensional, two-dimensional or three-dimensional.

[0031] According to a characteristic of the invention, the active zone comprises at least one quantum well successively comprising: - a first barrier layer, made from an aluminum-gallium nitride alloy AlGaN; - an active layer, made of a quaternary alloy of aluminum-indium-gallium nitride AlInGaN or of a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer, made from an aluminum-gallium nitride alloy AlGaN; said at least one quantum well being able to be one-dimensional, two-dimensional or three-dimensional.

[0032] Definitions

[0033] - By “substrate” is meant a self-supporting physical support, made of a material base from which an optoelectronic device can be formed. A substrate can be a "slice", also called a "wafer" which is generally in the form of a disc cut from an ingot of a crystalline material.

[0034] - By "dielectric" we mean that the layer is made of a material having an electrical conductivity at 300 K less than or equal to 106 S / cm.

[0035] - By "selective epitaxy zone" (SAG for "Selective Area Growth" in French English), refers to localized areas of the substrate surface, delimited by the dielectric layer, which have undergone epitaxial growth, while the rest of the substrate surface has not undergone epitaxial growth, the dielectric layer forming a growth mask. This is also known as zone-selective epitaxy. Each localized area of ​​the substrate surface that has undergone epitaxial growth forms a growth crystal seed, from which a vertical nanostructure can grow. Homoepitaxy is when the growth crystal seed and the vertical nanostructure are made of the same material. Heteroepitaxy is when the growth crystal seed and the vertical nanostructure are made of different materials.

[0036] - By "exposing the vertical nanostructures" we mean an action of exposing partially the vertical nanostructures so that the vertical nanostructures have at least one free surface.

[0037] - By "nanostructure" is meant a structure of which at least one of its dimensions is on the nanometric scale, that is to say between 0.1 nm and 10000 nm.

[0038] - By "vertical nanostructure" is meant a nanostructure extending along a direction corresponding to the normal to the surface of the substrate on which the dielectric layer is formed, i.e. the vertical direction under normal conditions of use of the optoelectronic device. As a non-limiting example, the vertical nanostructure may be columnar in shape, i.e. the vertical nanostructure may have a form factor ("aspect ratio" in English) strictly greater than 1. The form factor is the ratio between the height (thickness) and the width of the vertical nanostructure. The height (thickness) is the dimension along the normal to the surface of the substrate on which the dielectric layer is formed.

[0039] - By "IILN type alloy" is meant an alloy between at least one element of the column III of the periodic table of elements (TPE) and nitrogen N. The alloy can be binary in the presence of a single element from column III of the TPE and nitrogen N. The alloy can be ternary in the presence of two elements from column III of the TPE and nitrogen N. The alloy can be quaternary in the presence of three elements from column III of the TPE and nitrogen N etc.

[0040] - By "upper zone" is meant the highest zone of the transport layer of electrons along the normal to the surface of the substrate on which the dielectric layer is formed. Similarly, the highest area of ​​the stack formed during step b') is understood to be along the normal to the surface of the substrate on which the dielectric layer is formed.

[0041] - By "lateral zone" is meant an area bordering one side of the transport layer of electrons. Similarly, an area bordering one side of the stack formed in step b') is meant. The lateral areas of the electron transport layer are connected to each other by the upper area of ​​the electron transport layer. Similarly, the lateral areas of the stack formed in step b') are connected to each other by the upper area of ​​the stack.

[0042] - By "selective etching of a material A with respect to a material B" is meant that material A can be etched without attacking material B. In practice, the etchant is generally chosen so that the etching rate of material A is at least 3 times higher (preferably at least 5 times higher, more preferably at least 10 times higher) than the etching rate of material B.

[0043] - By "maintain mechanical strength", we mean that the lateral areas of the electron transport layer resist rupture at the end of step d) in response to mechanical stress. Similarly, it is understood that the lateral zones of the stack formed during step b') resists breaking at the end of step d) in response to mechanical stress.

[0044] - By “comprising successively an element A, an element B etc.”, we mean that elements A and B are arranged consecutively in a defined order along the normal to a surface receiving elements A and B. For example, the surfaces receiving the stack formed during step e) are the surfaces of the lateral zones of the electron transport layer. The surfaces receiving the stack formed during step b') are the surfaces (upper, lateral) of each of the vertical nanostructures around which the stack extends.

[0045] - By "ultraviolet" (UV) is meant photons emitted or absorbed in at least one of the following spectral ranges: (i) UV-A: [315 nm; 400 nm] (ii) UV-B: [280 nm; 315 nm] (iii) UV-C: [100 nm; 280nm]

[0046] - By “thermal annealing” is meant a heat treatment comprising: (i) a phase of gradual temperature increase (rise ramp) until a temperature called the annealing temperature is reached; (ii) a holding phase (plateau) at the annealing temperature, for a period called the annealing time; (iii) a cooling phase. A thermal budget is an input of thermal energy, determined by the choice of an annealing temperature value and the choice of an annealing duration value.

[0047] - By "n-type dopants" we mean species (eg impurities) which, introduced in the matrix of the III-N type alloy, donate an electron to the conduction band.

[0048] - By "p-type dopants" we mean species (eg impurities) which, introduced in the matrix of the III-N type alloy, accept an electron from the valence band (i.e. donate a hole to the valence band).

[0049] - The expression "quantum well" can designate a monodi quantum well dimensional, a two-dimensional quantum well (also called a quantum wire), a three-dimensional quantum well (also called a quantum dot). Brief description of the drawings

[0050] Other characteristics and advantages will appear in the detailed description of different embodiments of the invention, the description being accompanied by examples and references to the attached drawings.

[0051] [Fig-1] is a schematic sectional view, illustrating a step a) of a method according to the invention.

[0052] [Fig.2] is a schematic sectional view, illustrating a step b) of a method according to the invention.

[0053] [Fig.3] is a schematic sectional view, illustrating a step c) of a method according to the invention.

[0054] [Fig.4] is a schematic sectional view, illustrating a step d) of a method according to the invention carried out after step c) illustrated in [Fig.3].

[0055] [Fig.5] is a schematic sectional view, illustrating a step e) of a method according to the invention.

[0056] [Fig.6] is a schematic sectional view, illustrating a step b') of a method according to the invention.

[0057] [Fig.7] is a schematic sectional view, illustrating a first mode of implementation of a step c') of a method according to the invention, with a removal of the upper zone of the stack.

[0058] [Fig.8] is a schematic sectional view, illustrating a step d) of a method according to the invention carried out after step c') illustrated in [Fig.7].

[0059] [Fig.9] is a schematic sectional view, illustrating a second mode of implementation of a step c') of a method according to the invention, with an intentional formation of at least one orifice passing through the stack.

[0060] [Fig. 10] is a schematic sectional view, illustrating a step d) of a method according to the invention carried out after step c') illustrated in [Fig.9].

[0061] [Fig. 11] is a schematic sectional view, illustrating a third mode of implementation of a step c') of a method according to the invention, with an unintentional formation of orifices passing through the stack.

[0062] [Fig. 12] is a schematic sectional view, illustrating a step d) of a method according to the invention carried out after step c') illustrated in [Fig. 11].

[0063] [Fig. 13] is a partial schematic sectional view, illustrating an optoelectronic device obtained by a method according to the invention, the active zone of the stack being detailed in particular.

[0064] It should be noted that the drawings described above are schematic, and are not necessarily to scale for the sake of readability and to simplify their understanding. In particular, only one nanostructure is shown and the views are on an enlarged scale for the reasons mentioned above. The sections are made along the normal to the surface of the substrate on which the dielectric layer is formed. Detailed description of the implementation methods

[0065] Elements that are identical or provide the same function will bear the same references for the different embodiments, for the sake of simplification.

[0066] 1st object: active zone formed after partial etching of the nanostructures

[0067] An object of the invention is a method of manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate 1, made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer 2, formed on the substrate 1, and delimiting selective epitaxy zones S AG; - vertical 3 nanostructures, made of n-type doped gallium nitride GaN, formed on the selective epitaxy zones S AG by epitaxial growth; b) forming an electron transport layer 4, made of a type III-N alloy comprising aluminum Al, around each vertical nanostructure 3 by epitaxy; the electron transport layer 4 having an upper zone 40 and lateral zones 41; c) exposing the vertical nanostructures 3 by removing the upper zone 40 of the electron transport layer 4; d) performing selective etching of the exposed vertical nanostructures 3 in order to: - etch a portion of each exposed vertical nanostructure 3; - retaining a remaining portion 30 of each exposed vertical nanostructure 3, adapted to retain mechanical strength of the lateral zones 41 of the electron transport layer 4; step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN relative to the type III-N alloy comprising aluminum Al; e) forming a stack, made of a III-N type alloy comprising aluminum Al, on the lateral zones 41 of the electron transport layer 4 by epitaxy; the stack successively comprising an active zone ZA and a hole transport layer 5; the active zone ZA being designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons.

[0068] Step a)

[0069] The substrate 1 used during step a) is made of a material allowing epitaxial growth of gallium nitride GaN. Step a) is advantageously carried out so that the substrate 1 is made of a material chosen from silicon Si, silicon carbide SiC, gallium nitride GaN, aluminum nitride AIN, sapphire A12O3.

[0070] The dielectric layer 2, formed on the substrate 1, delimits selective SAG epitaxy zones. Step a) is advantageously carried out so that the dielectric layer electrical 2 is made of a material chosen from silicon dioxide SiO2 and silicon nitride Si3N4.

[0071] The vertical nanostructures 3 are made of n-type doped gallium nitride GaN. The n-type dopants are preferably silicon atoms Si or germanium atoms Ge. The vertical nanostructures 3 are formed on the selective epitaxy zones S AG by epitaxial growth, preferably by organometallic vapor phase epitaxy. Step a) is advantageously carried out so that the vertical nanostructures 3 are chosen from nanowires, nanotubes, nanoribbons, nanopillars, nanoneedles, nanocones, nanostraws, nanowalls.

[0072] Step b)

[0073] The electron transport layer 4 formed during step b) is made of a type IILN alloy comprising aluminum Al. The type IILN alloy is advantageously chosen from a ternary alloy of aluminum-gallium nitride AlGaN, a quaternary alloy of aluminum-indium-gallium nitride AlInGaN, a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN. The type III-N alloy advantageously comprises aluminum Al in an atomic proportion greater than or equal to 5%.

[0074] The electron transport layer 4 is formed during step b) around each vertical nanostructure 3 by epitaxy, preferably by organometallic vapor phase epitaxy. The electron transport layer 4 formed during step b) has an upper zone 40 and lateral zones 4L

[0075] The electron transport layer 4 formed during step b) advantageously comprises n-type dopants, preferably silicon Si atoms or germanium Ge atoms.

[0076] Step c)

[0077] Step c) consists of exposing the vertical nanostructures 3 by removing the upper zone 40 of the electron transport layer 4 formed during step b).

[0078] Step c) is advantageously carried out so that the removal of the upper zone 40 of the electron transport layer 4 is obtained by reactive ion etching.

[0079] Step d)

[0080] Step d) consists of carrying out selective etching suitable for partially etching the vertical nanostructures 3 exposed at the end of step c). The non-etched part 30 of each vertical nanostructure 3 has a volume suitable for maintaining mechanical strength of the lateral zones 41 of the electron transport layer 4 formed during step b). In other words, the remaining part 30 (i.e. non-etched) of each exposed vertical nanostructure 3 forms a pedestal allowing to maintain mechanical strength of the lateral zones 41 of the electron transport layer 4.

[0081] Step d) is carried out with an etching agent allowing selective etching of the gallium nitride GaN (i.e. the material of the vertical nanostructures 3) relative to the III-N type alloy comprising aluminum Al (i.e. the material of the electron transport layer 4).

[0082] Selective etching is advantageously carried out during step d): - by thermal annealing (eg at a temperature of 1000°C) under an atmosphere comprising dihydrogen H2 and ammonia NH3; or - by plasma etching (eg under a gas based on dichlorine Cl2); or - by chemical etching (eg with potassium hydroxide KOH or with phosphoric acid H3PO4).

[0083] Step e)

[0084] The stack formed during step e) is made from a type IILN alloy comprising aluminum Al. The type IILN alloy is advantageously chosen from a ternary alloy of aluminum-gallium nitride AlGaN, a quaternary alloy of aluminum-indium-gallium nitride AlInGaN, a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN.

[0085] The stack is formed during step e) on the lateral zones 41 of the electron transport layer 4 by epitaxy, preferably by organometallic vapor phase epitaxy. The stack formed during step e) successively comprises an active zone ZA and a hole transport layer 5.

[0086] The active zone ZA may be designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs. Alternatively, the active zone ZA may be designed to generate electron-hole pairs from absorbed ultraviolet photons.

[0087] According to a first mode of implementation, the active zone ZA comprises at least one quantum well successively comprising: - a first barrier layer Bl, made from a ternary alloy of aluminum-gallium nitride AlxGabxN; - an active layer CA, made of a ternary alloy of aluminum-gallium nitride AlyGai yN with “y” strictly greater than “x”, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer B2, made from a ternary alloy of aluminum-gallium nitride AlxGai_xN.

[0088] Said at least one quantum well may be one-dimensional, two-dimensional or three-dimensional.

[0089] According to a second mode of implementation, the active zone ZA comprises at least one quantum well successively comprising: - a first barrier layer Bl, made from an aluminum-gallium nitride alloy AlGaN; - an active layer CA, made of a quaternary alloy of aluminum-indium-gallium nitride AlInGaN or of a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer B2, made from an aluminum-gallium nitride alloy AlGaN.

[0090] Said at least one quantum well may be one-dimensional, two-dimensional or three-dimensional.

[0091] The hole transport layer 5 advantageously comprises p-type dopants, preferably magnesium Mg atoms.

[0092] 2nd object: active zone formed before partial etching of the nanostructures

[0093] The invention also relates to a method for manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate 1, made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer 2, formed on the substrate 1, and delimiting selective epitaxy zones S AG; - vertical 3 nanostructures, made of n-type doped gallium nitride GaN, formed on the selective SAG epitaxy zones by epitaxial growth; b') forming a stack, made from an IILN type alloy comprising aluminum Al, around each vertical nanostructure 3 by epitaxy; the stack successively comprising: - an electron transport layer 4; - an active zone ZA, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a hole transport layer 5; the stack having an upper zone ZS and lateral zones ZL; c) expose the 3 vertical nanostructures: - by removing the upper zone ZS from the stack; or - by the formation, intentional or unintentional, of at least one orifice O crossing the stack; d) performing selective etching of the exposed vertical nanostructures 3 in order to: - etch a portion of each exposed vertical nanostructure 3; - retain a remaining portion 30 of each exposed vertical nanostructure 3, suitable for maintaining mechanical strength of the lateral zones ZL of the stack; step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN relative to the type III-N alloy comprising aluminum Al.

[0094] Step a)

[0095] The substrate 1 used during step a) is made of a material allowing epitaxial growth of gallium nitride GaN. Step a) is advantageously carried out so that the substrate 1 is made of a material chosen from silicon Si, silicon carbide SiC, gallium nitride GaN, aluminum nitride AIN, sapphire A12O3.

[0096] The dielectric layer 2, formed on the substrate 1, delimits selective SAG epitaxy zones. Step a) is advantageously carried out so that the dielectric layer 2 is made of a material chosen from silicon dioxide SiO2 and silicon nitride Si3N4.

[0097] The vertical nanostructures 3 are made of n-type doped gallium nitride GaN. The n-type dopants are preferably silicon atoms Si or germanium atoms Ge. The vertical nanostructures 3 are formed on the selective epitaxy zones SAG by epitaxial growth, preferably by organometallic vapor phase epitaxy. Step a) is advantageously carried out so that the vertical nanostructures 3 are chosen from nanowires, nanotubes, nanoribbons, nanopillars, nanoneedles, nanocones, nanostraws, nanowalls.

[0098] Step b')

[0099] The stack formed during step b') is made from a type IILN alloy comprising aluminum Al. The type IILN alloy is advantageously chosen from a ternary alloy of aluminum-gallium nitride AlGaN, a quaternary alloy of aluminum-indium-gallium nitride AlInGaN, a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN. The type IILN alloy advantageously comprises aluminum Al in an atomic proportion greater than or equal to 5%.

[0100] The stack is formed during step b') around each vertical nanostructure 3 by epitaxy, preferably by organometallic vapor phase epitaxy. The stack formed during step b') has an upper zone ZS and ZL side zones.

[0101] The stack formed during step b') successively comprises an electron transport layer 4, an active zone ZA, a hole transport layer 5.

[0102] The electron transport layer 4 advantageously comprises n-type dopants, preferably silicon Si atoms or germanium Ge atoms.

[0103] The active zone ZA may be designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs. Alternatively, the active zone ZA may be designed to generate electron-hole pairs from absorbed ultraviolet photons.

[0104] According to a first mode of implementation, the active zone ZA comprises at least one quantum well successively comprising: - a first barrier layer Bl, made from a ternary alloy of aluminum-gallium nitride AlxGabxN; - an active layer CA, made of a ternary alloy of aluminum-gallium nitride AlyGai yN with “y” strictly greater than “x”, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer B2, made from a ternary alloy of aluminum-gallium nitride AlxGai_xN.

[0105] Said at least one quantum well may be one-dimensional, two-dimensional or three-dimensional.

[0106] According to a second mode of implementation, the active zone ZA comprises at least one quantum well successively comprising: - a first barrier layer Bl, made from an aluminum-gallium nitride alloy AlGaN; - an active layer CA, made of a quaternary alloy of aluminum-indium-gallium nitride AlInGaN or of a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer B2, made from an aluminum-gallium nitride alloy AlGaN.

[0107] Said at least one quantum well may be one-dimensional, two-dimensional or three-dimensional.

[0108] The hole transport layer 5 advantageously comprises p-type dopants, preferably magnesium Mg atoms.

[0109] Step c')

[0110] Step c') consists of exposing the vertical nanostructures 3.

[0111] According to a first embodiment, step c') is executed by removing the upper zone ZS from the stack formed during step b'). Step c') is advantageously executed so that the removal of the upper zone ZS from the stack is obtained by reactive ion etching.

[0112] According to a second embodiment, step c') is carried out by an intentional or unintentional formation of at least one orifice O passing through the stack formed during step b'). Step c') is advantageously carried out so that the intentional formation of said at least one orifice O passing through the stack is obtained by photolithography followed by etching (e.g. of the reactive ion etching type). Step c') is advantageously carried out so that the unintentional formation of said at least one orifice O passing through the stack is obtained by cracks F generated during the epitaxy of step b').

[0113] Step d)

[0114] Step d) consists of carrying out selective etching suitable for partially etching the vertical nanostructures 3 exposed at the end of step c'). The non-etched part 30 of each vertical nanostructure 3 has a volume suitable for maintaining mechanical strength of the lateral zones ZL of the stack formed during step b'). In other words, the remaining part 30 (i.e. non-etched) of each exposed vertical nanostructure 3 forms a pedestal making it possible to maintain mechanical strength of the lateral zones ZL of the stack.

[0115] Step d) is carried out with an etching agent allowing selective etching of the gallium nitride GaN (i.e. the material of the vertical nanostructures 3) relative to the IILN type alloy comprising aluminum Al (i.e. the materials of the stack).

[0116] Selective etching is advantageously carried out during step d): - by thermal annealing (eg at a temperature of 1000°C) under an atmosphere comprising dihydrogen H2 and ammonia NH3; or - by plasma etching (eg under a gas based on dichlorine Cl2); or - by chemical etching (eg with potassium hydroxide KOH or with phosphoric acid H3PO4).

[0117] The invention is not limited to the embodiments disclosed. Those skilled in the art are able to consider their technically operational combinations and to substitute equivalents for them.

Claims

Claims

1. Method of manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate (1), made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer (2), formed on the substrate (1), and delimiting selective epitaxy zones (SAG); - vertical nanostructures (3), made of n-type doped gallium nitride GaN, formed on the selective epitaxy zones (SAG) by epitaxial growth; b) forming an electron transport layer (4), made of a III-N type alloy comprising aluminum Al, around each vertical nanostructure (3) by epitaxy; the electron transport layer (4) having an upper zone (40) and lateral zones (41); c) exposing the vertical nanostructures (3) by removing the upper region (40) of the electron transport layer (4); d) performing selective etching of the exposed vertical nanostructures (3) so as to: - etch a portion of each exposed vertical nanostructure (3); - retaining a remaining portion (30) of each exposed vertical nanostructure (3), adapted to retain mechanical strength of the lateral zones (41) of the electron transport layer (4); step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN relative to the type III-N alloy comprising aluminum Al; e) forming a stack, made of a III-N type alloy comprising aluminum Al, on the lateral zones (41) of the electron transport layer (4) by epitaxy; the stack successively comprising an active zone (ZA) and a hole transport layer (5); the active zone (ZA) being designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons.

2. Method of manufacturing an optoelectronic device, comprising the steps: a) use: - a substrate (1), made of a material allowing epitaxial growth of gallium nitride GaN; - a dielectric layer (2), formed on the substrate (1), and delimiting selective epitaxy zones (SAG); - vertical nanostructures (3), made of n-type doped gallium nitride GaN, formed on the selective epitaxy zones (SAG) by epitaxial growth; b') forming a stack, made from a III-N type alloy comprising aluminum Al, around each vertical nanostructure (3) by epitaxy; the stack successively comprising: - an electron transport layer (4); - an active zone (ZA), designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a hole transport layer (5); the stack having an upper zone (ZS) and lateral zones (ZL); c) expose the vertical nanostructures (3): - by removing the upper zone (ZS) of the stack; or - by the formation, intentional or unintentional, of at least one orifice (O) passing through the stack; d) performing selective etching of the exposed vertical nanostructures (3) so as to: - etch a portion of each exposed vertical nanostructure (3); - retaining a remaining portion (30) of each exposed vertical nanostructure (3), suitable for retaining mechanical strength of the lateral zones (ZL) of the stack; step d) being carried out with an etching agent allowing selective etching of the gallium nitride GaN relative to the type III-N alloy comprising aluminum Al.

3. A method according to claim 1, wherein step c) is performed such that the removal of the upper region (40) of the electron transport layer (4) is achieved by reactive ion etching.

4. Method according to claim 2, wherein step c') is carried out so that the removal of the upper zone (ZS) of the stack is obtained by reactive ion etching.

5. Method according to claim 2, in which step c') is carried out so that: - the intentional formation of said at least one orifice (0) passing through the stack is obtained by photolithography followed by etching; - the unintentional formation of said at least one orifice (0) passing through the stack is obtained by cracks (F) generated during the epitaxy of step b').

6. Method according to one of claims 1 to 5, in which the III-N type alloy is chosen from a ternary alloy of aluminum-gallium nitride AlGaN, a quaternary alloy of aluminum-indium-gallium nitride AlInGaN, a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN.

7. Method according to one of claims 1 to 6, in which the III-N type alloy comprises aluminum Al in an atomic proportion greater than or equal to 5%.

8. Method according to one of claims 1 to 7, in which the selective etching is carried out during step d): - by thermal annealing under an atmosphere comprising di-hydrogen H2 and ammonia NH3; or - by plasma etching; or - by chemical etching.

9. Method according to one of claims 1 to 8, in which step a) is carried out so that the vertical nanostructures (3) are chosen from nanowires, nanotubes, nanoribbons, nanopillars, nanoneedles, nanocones, nanostraws, nanowalls.

10. Method according to one of claims 1 to 9, in which step a) is carried out so that the substrate (1) is made of a material chosen from silicon Si, silicon carbide SiC, gallium nitride GaN, aluminum nitride AIN, sapphire A12O3.

11. Method according to one of claims 1 to 10, in which step a) is carried out so that the dielectric layer (2) is made of a material chosen from silicon dioxide SiO2 and silicon nitride Si3N4.

12. Method according to one of claims 1 to 11, wherein the electron transport layer (4) comprises n-type dopants, preferably silicon atoms Si or germanium atoms Ge.

13. Method according to one of claims 1 to 12, in which the layer of hole transport (5) comprises p-type dopants, preferably magnesium Mg atoms.

14. Method according to one of claims 1 to 13, in which the active zone (ZA) comprises at least one quantum well successively comprising: - a first barrier layer (Bl), made of a ternary alloy of aluminum-gallium nitride AlxGabxN; - an active layer (CA), made of a ternary alloy of aluminum-gallium nitride AlyGai yN with “y” strictly greater than “x”, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer (B2), made of a ternary alloy of aluminum-gallium nitride AlxGa[ xN ; said at least one quantum well being able to be one-dimensional, two-dimensional or three-dimensional.

15. Method according to one of claims 1 to 13, in which the active zone (ZA) comprises at least one quantum well successively comprising: - a first barrier layer (Bl), made from an aluminum-gallium nitride alloy AlGaN; - an active layer (AC), made of a quaternary alloy of aluminum-indium-gallium nitride AlInGaN or of a quinary alloy of aluminum-boron-indium-gallium nitride AlBInGaN, designed to emit ultraviolet photons from radiative recombinations of electron-hole pairs, or designed to generate electron-hole pairs from absorbed ultraviolet photons; - a second barrier layer (B2), made from an aluminum-gallium nitride alloy AlGaN; said at least one quantum well being able to be one-dimensional, two-dimensional or three-dimensional.

Citation Information

Patent Citations

  • Optoelectronic device, associated display screen and method for fabricating such an optoelectronic device

    US20210391500A1