Device comprising a metallic track and method for manufacturing the device

Abstract

Device comprising a metallic track and method of manufacturing the device Device (100) comprising: - a first layer (150); - a trench (O1) partially traversing the first layer (150) extending from a first face (F1), and being filled by: - ​​a conductive etching stop layer (140); - a conductive barrier layer (130) covering the conductive etching stop layer (140); and - a track (110) of a first metallic material in contact with the barrier layer (130), in the trench (O1); - an opening (O2) in the first layer (150) extending from a second face (F2), opposite the first face (F1), of the dielectric or semiconducting layer (150), the opening traversing the first layer (150) to the etching stop layer (140); and a first layer (170) of a second metallic material covering the walls of the opening (O2). Figure for the abbreviation: Fig. 1B

Description

Title of the invention: Device comprising a metallic track and method for manufacturing the device. Technical field

[0001] This description relates generally to electronic devices and their manufacturing processes. Previous technique

[0002] In microelectronics, a device may include conductive traces connected to connection pads. Certain metallic materials, copper for example, exhibit a risk of electromigration when a high electric current passes through them and a risk of corrosion when in contact with a humid environment. To mitigate these risks, it is known to position a diffusion barrier layer in contact with these metallic materials to limit the electromigration phenomenon.

[0003] However, existing solutions for forming such devices present the risk that the connection pads are not sufficiently protected against electromigration and corrosion.

[0004] There is a need to improve devices comprising one or more metal tracks connected to connecting pads and their manufacturing processes. Summary of the invention

[0005] One embodiment provides a device comprising: on a substrate: - a dielectric or semiconducting layer; - a trench in the dielectric or semiconducting layer extending from a first face of the dielectric or semiconducting layer, the trench partially traversing the dielectric or semiconducting layer and being filled by; - a conductive etching stop layer covering the trench walls and in contact with the dielectric or semiconducting layer; - a conductive barrier layer covering the conductive etching stop layer; and - a track of a first metallic material in contact with the barrier layer, in the trench; - an opening in the dielectric or semiconductor layer extending from a second face, opposite the first face, of the dielectric or semiconductor layer, the opening passing through the dielectric or semiconductor layer to the etching stop layer; and - a first layer of a second metallic material covering the walls of the opening.

[0006] According to one embodiment, the first layer of the second metallic material forms a connecting pad.

[0007] According to one embodiment, the device comprises a second layer of a third metallic material covering the first layer, the third metallic material being, for example, gold, titanium or tungsten titanium.

[0008] According to one embodiment, the track is a safety track configured to break in the event of tearing or fracture of the optical diffuser.

[0009] Another embodiment provides for a manufacturing process comprising: on a substrate - an engraving of a trench in a dielectric or semiconducting layer extending from a first face of the dielectric or semiconducting layer, the trench partially crossing the dielectric or semiconducting layer; - a deposit of a conductive etching stop layer covering the walls of the trench and in contact with the dielectric or semiconducting layer; - a deposit of a conductive barrier layer covering the conductive etching stop layer; - a deposit of a track in a first metallic material in contact with the barrier layer, in the trench; - an etching of an opening in the dielectric or semiconductor layer extending from a second face, opposite the first face, of the dielectric or semiconductor layer, the opening passing through the dielectric or semiconductor layer until it exposes a portion of the etching stop conductive layer; and - a deposit of a first layer of a second metallic material covering the walls of the opening.

[0010] According to one embodiment, the process further comprises, before the track deposition step, a step of deposition of particles of the first metallic material on the surface of the barrier layer, the particles serving as primers for the track deposition.

[0011] According to one embodiment, the track is deposited by electrolytic deposition.

[0012] According to one embodiment, the process further includes, before the engraving of the opening, a thinning step to expose the dielectric or semiconducting layer outside the trench.

[0013] According to one embodiment, the opening is formed by plasma etching.

[0014] According to one embodiment, the process further comprises, before the etching of the opening, the thinning of the substrate to expose the second face of the dielectric or semiconducting layer.

[0015] According to one embodiment, the conductive etching stop layer is made of titanium nitride and has, for example, a maximum thickness between 30nm and 100nm.

[0016] According to one embodiment, the barrier layer is made of tantalum nitride or tantalum.

[0017] According to one embodiment, the first metallic material is copper.

[0018] According to one embodiment, the second metallic material is gold, titanium or tungsten titanium.

[0019] According to one embodiment, the use of the device described above includes applying a current to the track and detecting an open circuit preventing the conduction of this current. Brief description of the drawings

[0020] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0021] [Fig.1A] and [Fig.1B] are cross-sectional views of a device comprising a metallic track according to an embodiment of the present description;

[0022] the [Fig.2A], the [Fig.2B], the [Fig.2C], the [Fig.2D], the [Fig.2E], the [Fig.2F] and the [Fig.2G] are perspective and section views and [Fig.2H], [Fig.2I] and [Fig.2J] are section views of successive stages of a manufacturing process of the device of figures IA and IB according to an embodiment of the present description;

[0023] [Fig.3] is a partial cross-sectional view of another device comprising a metallic track according to an embodiment of the present description, acquired by transmission electron microscopy and energy-dispersive X-ray spectroscopy;

[0024] [Fig. 4A] represents titanium atoms included in the device of [Fig. 3]; and

[0025] [Fig.4B] represents tantalum atoms included in the device of [Fig.3]. Description of the implementation methods

[0026] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0027] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the manufacturing processes involved in the manufacture of an electronic device such as the Photolithography, the different types of engraving and deposition processes are known to the person in the trade.

[0028] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0029] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0030] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0031] Figures [Fig. 1A] and [Fig. 1B] are cross-sectional views of a device 100 comprising a metallic track 110 according to an embodiment of this description. Figure [Fig. 1B] corresponds to a cross-sectional view of the device 100 of Figure [Fig. 1A] along axis AL

[0032] The device 100 includes for example a substrate 120. The substrate 120 is for example a slice of silicon or glass.

[0033] The metallic track 110 is formed on the substrate 120, for example in direct contact with its surface. The metallic track 110 is a conductive track configured to carry an electric current. The metallic track 110 is made of a first metallic material, for example copper, aluminum, etc. The metallic track 110 has, for example, a thickness between 100 nm and 250 nm, for example between 160 nm and 200 nm.

[0034] A diffusion barrier layer 130 covers the metal track 110. The layer 130 covers, for example, the upper surface and sides of the metal track 110. The layer 130 is made of a first conductive material, for example, tantalum nitride and / or tantalum, aluminum, etc. In other embodiments, the layer 130 is made of another conductive material suitable for forming a diffusion barrier layer. The layer 130 is, for example, configured to protect the metal track 110. The layer 130 is, for example, configured to prevent or reduce the electromigration of atoms from the metal track 110 to surrounding layers. The layer 130 is conductive and electrically connected to the metal track 110. The layer 130 has, for example, a thickness of between 5 nm and 25 nm, for example, between 1 and 15 nm.

[0035] A stop layer 140 covers, for example, the top surface and sides of layer 130. Layer 140 is made of a second conductive material, for example, titanium nitride, tantalum nitride, etc. Layer 140 is configured, for example, to protect layer 130. During an etching step configured to expose the stop layer 140, layer 140 is configured, for example, so that layer 130 is not damaged by the etching. Layer 140 is, for example, at least partially sacrificed during the etching step, and layer 130 remains, for example, intact. Layer 140 includes, for example, portions that remain intact during the etching step and that retain an initial thickness corresponding to the maximum thickness of layer 140 after the etching step. The 140 layer, for example, has a maximum thickness between 30nm and 100nm, for example between 40nm and 60nm.In one embodiment, layer 140 has, for example, a maximum thickness exceeding 2% of the total thickness of all layers to be etched, and for example, a maximum thickness in the range of 2% to 4% of the total thickness of all layers to be etched. Layer 140 is conductive and electrically connected to layer 130. Titanium nitride has high resistivity and is not usually used for an etching stop layer. However, it is a material resistant to an etching process, for example, a plasma etching process, and the choice of the thickness of layer 140 compensates for the high resistivity.

[0036] A dielectric or semiconducting layer 150 is formed on the substrate 120. The metallic track 110 and the layers 130 and 140 are, for example, in a trench 01 of the layer 150 such that the layer 150 is in contact with the layer 140. The thickness El of the layer 150 is, for example, greater than the depth PI of the trench 01. The trench 01 extends from a first face Fl of the layer 150, the trench 01 partially traversing the layer 150. The layer 150 includes an opening 02 in the layer 150 extending from a second face F2 of the layer 150, the face F2 being opposite the face FL. The opening 02 partially traverses the thickness of the layer 150 and extends to the layer 140. The layer 150 is, for example, silicon, silicon oxide, tetraethyl orthosilicate etc. According to one embodiment, layer 150 comprises a set of dielectric and / or semiconducting layers.Layer 150, for example, has a thickness between 1pm and 2.5pm, for example between 1.5pm and 2pm.

[0037] A first metallization layer 170, in a second metallic material, is in contact with layer 150 and layer 140. Layer 170 is formed on the second face F2 of layer 150 and covers the sides of layer 150 in the opening 02. Layer 170 covers the part of layer 140 exposed by the opening 02. According to one embodiment, layer 140 is not continuous: it has For example, it was partially damaged during the creation of the opening 02. Layer 170 is, for example, made of gold, titanium, tungsten titanium, titanium nitride, etc. Layer 170 is electrically connected to layer 140, layer 130, and the metal track 110. Layer 170 is, for example, on the surface of device 100 and in contact with the external environment.

[0038] Layer 170 is for example a connection pad 180 of device 100 configured for example to connect device 100 to an external electronic circuit, not shown.

[0039] The presence of the etching stop layer 140 in the stack comprising this layer 140 and the diffusion barrier layer 130 has the advantage of protecting the diffusion barrier layer 130 during an etching phase and of preventing electromigration of atoms from the metal track 110 to the first metallization layer 170 and corrosion of the metal track 110.

[0040] Figures 2A to 2G are perspective and sectional views and Figures 2H to 2J are sectional views of successive stages of a manufacturing process of the device 100 of Figures IA and IB according to an embodiment of the present description.

[0041] Certain elements of figures 2A to 2J are identical to elements of figures IA and IB, and these elements are designated by the same references and are not described again in detail.

[0042] Fig. 2A presents an example of a device 200 presenting a starting point for the manufacturing process of the device 100 of figures IA and IB.

[0043] The device 200 of [Fig.2A] comprises the dielectric or semiconducting layer 150 of Figures IA and IB on a temporary substrate 210. In the example of [Fig.2A], the layer 150 comprises a stack of dielectric and / or semiconducting layers and includes an optical diffuser comprising, for example, polysilicon diffraction structures 220.

[0044] The stacking of layers of layer 150 is obtained for example according to manufacturing steps known to a person skilled in the art and which will not be detailed.

[0045] An optional first photolithography step is, for example, carried out to generate a first mask 230 on the first face Fl of the layer 150 used to form a first opening corresponding to the trench 01. The first mask 230 is, for example, a photosensitive resin. The trench 01 represents, for example, a pattern corresponding to the trajectory of the metal track 110 in Figures 1A and 1B. The width L1 of the trench 01 is, for example, greater than the width of the metal track 110.

[0046] A first etching step is for example carried out following the photolithography step to etch layer 150 at the position of trench 01.

[0047] After the first etching step, the first mask 230 is for example removed, for example by abrasive polishing.

[0048] Fig. 2B represents the device 200 of Fig. 2A after a step of depositing the etching stop layer 140. The layer 140 covers at least partially the surface of the layer 150 and, in particular, covers the walls of the trench 01.

[0049] The deposition step is carried out for example by physical vapor phase deposition, chemical vapor phase deposition, etc.

[0050] Layer 140 is, for example, made of titanium nitride or tantalum nitride. One advantage of using one of these materials is that they are already used for other microelectronic applications, making the deposition processes easily feasible. The deposition processes involved in this description, the interaction of these materials with the other materials of the device 100, and the risks of contamination are known and controlled by those skilled in the art. Furthermore, titanium nitride and tantalum nitride are resistant to a plasma etching process. In other embodiments, layer 140 is made of another material suitable for forming a stop layer for etching, in particular plasma etching.

[0051] Fig. 2C represents the device of Fig. 2B after a step of depositing the diffusion barrier layer 130. The layer 130 covers at least partially the surface of the layer 140 and, in particular, covers the walls of the layer 140 in the trench 01.

[0052] The deposition step is carried out for example by physical vapor phase deposition, chemical vapor phase deposition, etc.

[0053] Figure 2D represents the device of Figure 2C after a step of depositing a metallic layer 110'. According to one embodiment, before the step of depositing the metallic layer 110', particles of the first metallic material are, for example, deposited on the surface of the layer 140 and serve as primers for an electrolytic deposition process of the layer 110'. According to another embodiment, the metallic layer 110' is, for example, deposited by chemical vapor deposition.

[0054] The metallic layer 110' covers at least partially the surface of the layer 130 and, in particular, fills the trench 01.

[0055] Figure 2E represents the device of Figure 2D after a thinning step. The device is thinned, for example, so as to expose the first face Fl of layer 150 outside the trench 01. The thinning is carried out, for example, by abrasive polishing.

[0056] Following step 2E, the device comprises the metal track 110. The metal track 110 corresponds to the thinned metal layer 110' and is in contact with its lower face and its lateral faces with a stack of layers including layer 130 and layer 140.

[0057] Figure 2F represents the device of Figure 2E after one or more optional layer deposition steps 240. The layers 240 cover the surface of the metal track 110 and are, for example, dielectric, conductive, and / or semiconductive layers. The metal track 110 is, for example, in contact with a dielectric or semiconductive layer of the stack of layers 240.

[0058] According to one embodiment, the substrate 120 of the device 100 of [Fig.1A] is glued to the surface of the layers 240.

[0059] According to another embodiment, in the absence of layers 240, the substrate 120 is glued to the surface of the first face Fl of the layer 150 and covers the surface of the layer 140.

[0060] Fig. 2G represents the device of Fig. 2F having been turned over to expose the temporary substrate 210.

[0061] Figure 2H shows the device of Figure 2G after a thinning and photolithography step. The device is thinned, for example by chemical etching and / or abrasive polishing, to remove the temporary substrate 210. In addition, a second mask 245 is deposited on the surface of the second face F2 of the layer 150. The second mask 245 is, for example, a photosensitive resin. The second mask includes an aperture aligned with the location of the aperture 02 to be made in the layer 150.

[0062] Figure 21 shows the device of Figure 2H after an etching step, for example plasma etching. The etching process is configured to form the aperture 02 and to expose at least partially the layer 140.

[0063] The aperture 02 extends from the second face F2 and passes through layer 150 until layer 140 is exposed.

[0064] According to some embodiments, layer 140 is partially etched. Layer 140 protects layer 130 during this etching step, particularly in the corners 250.

[0065] The opening 02 has a width L2 which is for example less than or equal to the width L1 of the trench 01.

[0066] The second mask 245 is, for example, removed at the end of the etching step, for example by an aqueous chemical cleaning step. Layer 140 protects layers 130 and 110 from corrosion during this cleaning step.

[0067] Fig. 2J represents the device of Fig. 2I after a step of deposition of the first metallization layer 170. The layer 170 is deposited on the surface of the device of Fig. 2H and covers the surface of the opening 02. The layer 170 is in contact with the layer 150 and / or the layer 140.

[0068] The metallization layer 170 is made of a second metallic material, for example gold, titanium, tungsten titanium, titanium nitride, etc., which is, for example, the same material or a different material from the first metallic material. The metallization layer 170 has, for example, a thickness between 30 nm and 350 nm, for example between 250 nm and 350 nm.

[0069] According to one embodiment, step 2J is repeated several times and layer 170 is covered by one or more successively deposited metallic layers 270. For example, layer 170 is made of titanium, for example with a thickness between 30nm and 75nm, then a second layer of tungsten titanium, for example with 10% tungsten by weight, is deposited on the surface of layer 170, for example with a thickness between 80nm and 120nm, then a third layer of gold, for example with a thickness between 250nm and 350nm, is deposited on the surface of the second layer.

[0070] The corrosion potential of the second metallic material is, for example, higher than the corrosion potential of the first metallic material. The second metallic material is therefore less susceptible to corrosion than the first metallic material. For example, gold has a lower corrosion potential than copper. In particular, if the metallic track 110, or atoms of the first metallic material, come into contact with the second metallic material, then galvanic corrosion may occur.

[0071] The assembly formed by the layer 170, and the metallic layer(s) 270 if present, forms for example the connection pad 180. In an optional etching step following step J, the final shape and dimensions of the connection pad 180 are obtained.

[0072] Following step 2J, a device 100' is obtained similar to the device 100 in Figures IA and IB. In the example of [Fig. 2J], the layer 150 comprises a stack of layers and the metallic layer 270 is formed on the surface of the layer 170.

[0073] According to one embodiment, the materials of layers 110, 130, 140 and 170 are distinct from each other.

[0074] The device 100', comprising an optical diffuser, is a passive device configured to alter the propagation of a light beam (not shown). The device 100' is, for example, configured to attenuate the light intensity of an incident laser beam, for example, a laser with a power between 1W and 2W. The metallic track 110 is, for example, positioned on the optical path of the laser beam and configured to detect a failure of the optical diffuser of the device 100'.

[0075] Layer 150 comprises, for example, polysilicon 220 diffraction structures and is, for example, configured to be partially transparent over a range of a given wavelength and to attenuate the light intensity of a laser beam passing through it. The metal track 110, for example, is a safety track configured to break if the optical diffuser is torn off or fractured. The metal track 110 is, for example, connected in a closed loop to the laser power supply. The laser is automatically switched off, for example, if the metal track 110 is damaged.

[0076] Fig. 3 is a partial cross-sectional view of a device 300 comprising the metallic track 110 of Figures 1A to 2J according to an embodiment of the present description, acquired by transmission electron microscopy and energy-dispersive X-ray spectroscopy.

[0077] Certain elements of [Fig.3] are identical to elements of figures IA and IB, these elements are designated by the same references and are not described again in detail.

[0078] In the example of [Fig.3], three metallic layers 270 cover the layer 170 of the device 300.

[0079] Figure 4A shows the tantalum atoms included in the device of Figure 3.

[0080] In the example of Figures 3 and 4A, layer 130 contains tantalum; for example, it is made of tantalum or tantalum nitride. Figure 4A illustrates that layer 130 remains intact following the etching process of step 21. The metal track 110 remains completely covered by layer 130.

[0081] Figure 4B shows the titanium atoms included in the device of Figure 3.

[0082] In the example of Figures 3 and 4B, layer 140 contains titanium; for example, it is made of titanium or titanium nitride. Layer 140 covers layer 130 to protect it during the etching process of step 21. Layer 170 is, for example, made of titanium. Figure 4B illustrates that layer 140 is intact after the etching process of step 21. Layer 130 is effectively protected by layer 140 during the etching process of step 21.

[0083] Device 100 is, for example, a connection interface between an electronic component or chip and its external environment.

[0084] Device 100 is, for example, a memory cell that is programmable only once.

[0085] The device 100 is, for example, an electronic and / or optical system comprising a metallic line, for example configured for information routing, power supply or as a physical integrity indicator of the device.

[0086] Device 100 in Figures IA and IB, device 100' in [Fig. 2J], and device 300 in Figures 3, 4A, and 4B, for example, have numerous applications in many sectors of industry. For instance, device 100, 100', or 300 is integrated into a system comprising one or more other components.

[0087] The system is intended, for example, to be implemented in personal electronic systems, such as connected systems, for example, using a 5G or radio frequency connection. The system is, for example, a mobile phone or part of a network of a connected object. The system communicates, for example, using 5G, Wi-Fi, or ultra-broadband. The system includes, for example, high-speed interfaces, for example, with advanced filtering and protection against electromagnetic discharge. For example, the system is used in facial recognition systems in personal electronics, for example, in mobile phones or laptops, or in telemetry systems, for example, those included in tablets, or depth sensors.

[0088] The system is intended, for example, to be implemented in communication equipment or in computers and peripherals. For example, the system is used in 5G infrastructures and dedicated data centers. The system includes, for example, silicon carbide diodes, Schottky transistors, protection against electromagnetic discharge, and transient voltage suppression diodes. The system is used, for example, in a satellite, including, for example, integrated passive systems for applications using radio frequencies.

[0089] The system, for example, implements three-dimensional (3D) technologies during its fabrication, i.e., realizations by stacking several silicon wafers (in English, "Silicon tiers"). The system is, for example, a reprogrammable non-volatile memory cell or a stacked image sensor connected on the back side, for example, a back-illuminated sensor produced by 3D technologies.

[0090] An advantage of the presence of the etching stop layer 140 on the surface of the diffusion barrier layer 130 is better protection of the metal track 110 to reduce the risks of electromigration and corrosion.

[0091] Avoiding or reducing the etching of the diffusion barrier layer 130 during the step in [Fig. 2I] is also advantageous when this barrier layer 130 is made of a type of material, for example tantalum, which generates polymeric residues that are difficult to remove. Conversely, it is possible to make the etching stop layer 140 of a material that generates less polluting residues.

[0092] Another advantage of the various embodiments presented is that the strength of the layer stack formed by layers 110, 130, 140 and 170 is little modified by the presence of layer 140.

[0093] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to the person skilled in the art. craft. In particular, although embodiments have been described in which a metal track is electrically connected to a connecting pad, in other embodiments the metal track could be connected to other structures.

[0094] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Device (100, 100') comprising: on a substrate: - a dielectric or semiconducting layer (150); - a trench (01) in the dielectric or semiconducting layer (150) extending from a first face (Fl) of the dielectric or semiconducting layer (150), the trench partially traversing the dielectric or semiconducting layer (150) and being filled by; - a conductive etching stop layer (140) covering the walls of the trench (01) and in contact with the dielectric or semiconducting layer (150); - a conductive barrier layer (130) covering the conductive etching stop layer (140); and - a track (110) of a first metallic material in contact with the barrier layer (130), in the trench (01);- an opening (02) in the dielectric or semiconducting layer (150) extending from a second face (F2), opposite the first face (F1), of the dielectric or semiconducting layer (150), the opening passing through the dielectric or semiconducting layer (150) to the etching stop layer (140); and - a first layer (170) of a second metallic material covering the walls of the opening (02).

2. Device according to claim 1, wherein the first layer (170) of the second metallic material forms a connecting pad (180).

3. Device (100, 100') according to claim 1 or 2, comprising a second layer (270) of a third metallic material covering the first layer, the third metallic material being for example gold, titanium or tungsten titanium.

4. Device (100, 100') according to any one of claims 1 to 3, wherein the etching stop conductive layer (140) is made of titanium nitride and has, for example, a maximum thickness between 30nm and 100nm.

5. Device (100, 100') according to any one of claims 1 to 4, wherein the barrier layer (130) is tantalum nitride or tantalum.

6. Device (100, 100') according to any one of claims 1 to 5, wherein the first metallic material is copper.

7. Device (100, 100') according to any one of claims 1 to 6, wherein the second metallic material is gold, titanium or tungsten titanium.

8. The use of the device (100, 100') according to any one of claims 1 to 7, including the application of a current to the track (110) and the detection of an open circuit preventing the conduction of this current.

9. Optical diffuser (300) comprising the device (100, 100') according to any one of claims 1 to 7, wherein the track (110) is a safety track configured to break in the event of tearing or fracture of the optical diffuser.

10. A manufacturing method comprising: on a substrate - etching a trench (01) in a dielectric or semiconducting layer (150) extending from a first face (Fl) of the dielectric or semiconducting layer (150), the trench partially traversing the dielectric or semiconducting layer (150); - depositing a conductive etching stop layer (140) covering the walls of the trench (01) and in contact with the dielectric or semiconducting layer (150); - depositing a conductive barrier layer (130) covering the conductive etching stop layer (140); - depositing a track (110) in a first metallic material in contact with the barrier layer (130), in the trench (01);- an etching of an opening (02) in the dielectric or semiconducting layer (150) extending from a second face (F2), opposite to the first face (F1), of the dielectric or semiconducting layer (150), the opening passing through the dielectric or semiconducting layer (150) until exposing a part of the etching stop conductive layer (140); and - a deposition of a first layer (170) of a second metallic material covering the walls of the opening (02).

11. A method according to claim 10, further comprising, prior to the track deposition step (110), a particle deposition step of the

12.

13.

14.

15. first metallic material on the surface of the barrier layer (130), the particles serving as primers for the deposition of the track (110). Method according to claim 10 or 11, wherein the deposition of the track (110) is carried out by electrolytic deposition. Method according to any one of claims 10 to 12, further comprising, prior to the engraving of the opening (02), a thinning step to expose the dielectric or semiconducting layer (150) outside the trench (01). A method according to any one of claims 10 to 13, wherein the opening (02) is formed by plasma etching. Method according to any one of claims 10 to 14, further comprising, prior to the engraving of the opening (02), the thinning of the substrate to expose the second face (F2) of the dielectric or semiconducting layer (150).

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