DEVICE FOR GENERATING AT LEAST TWO ELECTRIC CURRENTS

FR3166257A1Pending Publication Date: 2026-03-13ATEQ
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Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-12
Publication Date
2026-03-13

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Abstract

The present invention relates to a device (1) for generating at least two electric currents from a control current (IC), said device (1) comprising: – a first current generation module (3) comprising at least one resistor (R1), referred to as the first resistor, said first module (3) being configured so that a voltage across the first resistor (R1) generates a first current (I1), the voltage applied across the first resistor (R1) being a function of the control current (IC); – a second current generation module (5) comprising at least one resistor (R2), referred to as the second resistor, said second module (5) being configured so that a voltage across the second resistor (R2) generates a second current (I2);– a switching capacitor link module (7) that connects the first module (3) to the second module (5), said link module (7) being configured so that the voltage applied across the first resistor (R1) is applied across the second resistor (R2). Abbreviated figure: Figure 1;
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Claims

Demands

1. Device (1) for generating at least two electric currents from a control current (Ic), said device (1) comprising: - a first current-generating module (3) comprising at least one resistor (RJ, referred to as the first resistor), said first module (3) being configured so that a voltage across the first resistor (Ri) generates a first current (R), the voltage applied across the first resistor (RJ) being a function of the control current (Ic); - a second current-generating module (5) comprising at least one resistor (R2), referred to as the second resistor, said second module (5) being configured so that a voltage across the second resistor (R2) generates a second current (I2);- a switching capacitor link module (7) which connects the first module (3) to the second module (5), said link module (7) being configured so that the voltage applied across the first resistor (Ri) is duplicated across the second resistor (R2).

2. Device (1) according to the preceding claim, characterized in that the first current generation module (3) comprises an operational amplifier (AOi), referred to as the first operational amplifier, mounted in bilateral feedback, said operational amplifier (AOi) having an inverting input, a non-inverting input and an output, the input (3a) of the first module (3) being identified as a dipole whose terminals correspond to the output and the inverting input of said operational amplifier (AOi), the output (3b) of the first module (3) being identified as a dipole whose terminals correspond to the terminals of the first resistor (Ri), the output and the non-inverting input of said operational amplifier (AOi) being connected respectively to the opposite terminals of said first resistor (Ri).

3. Device (1) according to any one of the preceding claims, characterized in that the second current generation module (5) comprises an operational amplifier (AO2), referred to as the second operational amplifier, mounted in bilateral negative feedback, said operational amplifier (AO2) having an inverting input, a non-inverting input and an output, the input (5a) of the second module (5) being identified as a dipole whose terminals correspond to the output and the inverting input of said operational amplifier (AO2), the output and the non-inverting input of said operational amplifier (AO2) being connected respectively to the opposite terminals of said second resistor (R2).

4. Device (1) according to claim 2 or 3, characterized in that the value of the offset voltage of the operational amplifier (AO i, AO2) of the first module (3) and / or the second module (5) is very small compared to the voltage across the first resistor (RJ and / or the second resistor (R2).

5. Device (1) according to any one of claims 2, 3 or 4, characterized in that the input current(s) of the operational amplifier (AOi, AO2) of the first module (3) and / or the second module (5) are very small compared to the value of the first current (Ii) and / or the value of the second current (I2).

6. Device (1) according to any one of the preceding claims, characterized in that the switching capacitor link module (7) is a four-terminal network comprising a first capacitor (Ci) and a second capacitor (Ci) which are connected in parallel with each other through switches (S1, S2), referred to as the first and second switches, the input (7a) of the link module (7) being identified with the terminals of the first capacitor (Ci) and being connected to the output (3b) of the first module (3) through switches (S3, S4), referred to as the third and fourth switches, the output (7b) of the link module (7), connected to the input (5a) of the second module (5), being identified with the terminals of the second capacitor (C2).

7. Device (1) according to claim 6, characterized in that the first and second switches (S1, S2) on the one hand, and the third and fourth switches (S3, S4) on the other hand, are configured to switch in opposite phase.

8. Device (1) according to any one of claims 6 or 7, characterized in that the quantity of charge injected by said switches (SrS4) of the linking module (7) is very small compared to the quantity of charge stored by the first capacitor (Ci) and / or by the second capacitor (C2).

9. Device (1) according to any one of claims 6 to 8, characterized in that the device (1) is configured so that the voltages across the first resistor (RJ, across the first capacitor (Ci), across the second capacitor (C2) and across the second resistor (R2) are substantially equal.

10. Device (1) according to any one of the preceding claims, characterized in that the switching capacitive link module (7) has a switching frequency (fc) very small compared to the charging time of the capacitors (Ci, C2) of the switching capacitive link module (7).

11. Device according to any one of the preceding claims, characterized in that the first resistance (Ri) and the second resistance (R2) have resistance values ​​with a tolerance less than or equal to 1%, and preferably less than or equal to 0.5%.

Citation Information

Patent Citations

  • Switched-capcitor bandgap reference circuit using chopping technique

    US20170115684A1