Display panel, display apparatus, and display panel preparation method

Abstract

The embodiments of the present disclosure relate to a display panel, a display apparatus, and a display panel preparation method. The display panel comprises: a substrate; an auxiliary electrode structure located on one side of the substrate, wherein the auxiliary electrode structure comprises: a conductive base, and an auxiliary electrode located on the conductive base, wherein the auxiliary electrode is provided with an auxiliary electrode hole at least partially exposing the conductive base; a first insulating layer, the first insulating layer covering the auxiliary electrode and being provided with a first through-hole at least partially exposing the auxiliary electrode hole, an orthographic projection of the first through-hole onto the substrate being located within an orthographic projection of the auxiliary electrode hole onto the substrate, and the width of the first through-hole being smaller than the width of the auxiliary electrode hole; and a first electrode, the first electrode passing through the first through-hole and the auxiliary electrode hole so as to be in contact with the auxiliary electrode and the conductive base.

Description

An Organic Light-Emitting Diode (OLED) display device, also known as an organic electroluminescent display device, is a different display device from a conventional liquid crystal display (LCD). Such display technology has the advantages of simple structure, self-luminescence, high contrast, thm thickness, wide viewing angle, fast response time, continuously adjustable luminous color, and being usable in a flexible panel, etc. Therefore, it has become one of the important development directions of new generation display devices, and has received more and more attention. BRIEF DESCRIPTION Embodiments of the present disclosure provide a display panel, a display device, and a method for manufacturing the display panel. In an aspect of the present disclosure, there is provided a display panel including: a substrate; an auxiliary electrode structure on a side of the substrate, the auxiliary electrode structure including: a conductive base, and an auxiliary electrode on the conductive base, the auxiliary electrode having an auxiliary electrode hole at least partially exposing the conductive base; a first insulating layer covering the auxiliary electrode and having a first through-hole at least partially exposing the auxiliary electrode hole, an orthogonal projection of the first through-hole on the substrate being within an orthogonal projection of the auxiliary electrode hole on the substrate, and a width of the first through-hole being smaller than a width of the auxiliary electrode hole; and a first electrode which contacts the auxiliary electrode and the conductive base passing through the first through-hole and the auxiliary electrode hole. In some embodiments involving a display panel, the display panel further includes a plurality of thin film transistors, wherein the auxiliary electrode and a source / drain electrode of the thin film transistor are made of the same material layer. In some embodiments involving a display panel, the display panel further includes: a buffer layer on the substrate, wherein the plurality of thin film transistors are located on a side of the buffer layer away from the substrate; and an interlayer dielectric layer between the buffer layer and the first insulating layer, wherein the interlayer dielectric layer covers active layers and gates of the plurality of thin film transistors, and wherein the source / drain electrode is electrically connected to a source / drain region of the active layer through a first contact hole in the interlayer dielectric layer. In some embodiments involving a display panel, the conductive base is on a side of the buffer layer away from the substrate. In some embodiments involving a display panel, the conductive base and the active layer are made of a same material layer. In some embodiments involving a display panel, the conductive base and the active layer include a semiconductor oxide. In some embodiments involving a display panel, the interlayer dielectric layer has a second through-hole at least partially exposing the conductive base, the auxiliary electrode is located in the second through-hole, and a thickness of the auxiliary electrode is greater than a thickness of the second through-hole. In some embodiments involving a display panel, the conductive base is on a side of the interlayer dielectric layer away from the substrate. In some embodiments involving a display panel, the conductive base includes a metal oxide. In some embodiments involving a display panel, the display panel further includes: a plurality of second electrodes on a side of the first insulating layer away from the substrate, each of the plurality of second electrodes being electrically connected to the source / drain electrode through a contact hole; and a light-emitting functional layer between the first electrode and the plurality of second electrodes, the light-emitting functional layer including a first portion located in the auxiliary electrode hole and a second portion located outside the auxiliary electrode hole, wherein the first portion and the second portion are not connected, wherein the first electrode includes a third portion located on the conductive base and a fourth portion covering the second portion of the light-emitting functional layer, and wherein the third portion and the fourth portion are not connected. In some embodiments involving a display panel, the display panel further includes: a second insulating layer between the first insulating layer and the plurality of second electrodes, the second insulating layer having a third through-hole exposing the first through-hole, an orthographic projection of the first through-hole on the substrate being within an orthographic projection of the third through-hole on the substrate, and a width of the third through-hole being greater than a width of the first through-hole to expose a portion of the first insulating layer; and a pixel-defining layer between the plurality of second electrodes and the light-emitting functional layer, the pixeldefining layer having a plurality of openings exposing the plurality of second electrodes and a fourth through-hole exposing the third through-hole, an orthographic projection of the third through-hole on the substrate being within an orthographic projection of the fourth through-hole on the substrate, and a width of the fourth through-hole being greater than a width of the third through-hole to expose a portion of the second insulating layer. In some embodiments involving a display panel, the first portion of the light-emitting functional layer is located on the conductive base, and the second portion of the light-emitting functional layer is conformally and continuously located on accessible surfaces of the pixeldefining layer, portions of the plurality of second electrodes exposed by the plurality of openings, a portion of the second insulating layer exposed by the fourth through-hole, and a portion of the first insulating layer exposed by the third through-hole. In some embodiments involving a display panel, the second portion of the light-emitting functional layer does not extend into the first through-hole. In some embodiments involving a display panel, the fourth portion of the first electrode is conformally and continuously located on the second portion of the light-emitting functional layer, on a sidewall of the first through hole, and on a sidewall of the auxiliary electrode. In another aspect of the present disclosure, there is further provided a display device including the display panel as described in any of embodiments herein. In yet another aspect of the present disclosure, there is further provided a method for preparing the display panel as described in any of the embodiments herein, the method including: providing a substrate; forming an auxiliary electrode structure on the substrate, the auxiliary electrode structure including: a conductive base, and an auxiliary electrode on the conductive base, the auxiliary electrode having an auxiliary electrode hole at least partially exposing the conductive base; forming a first insulating layer covering the auxiliary electrode and having a first through-hole at least partially exposing the auxiliary electrode hole, an orthographic projection of the first through-hole on the substrate being within an orthographic projection of the auxiliary electrode hole on the substrate, and a width of the first through-hole being smaller than a width of the auxiliary electrode hole; and forming a first electrode which contacts the auxiliary electrode and the conductive base passing through the first through hole and the auxiliary electrode hole. In an embodiment involving a method, the method further including: forming a plurality of thin film transistors on the substrate, wherein the auxiliary electrode and a source / drain electrode of the thin film transistor are made of a same material layer. In an embodiment involving a method, the conductive base and an active layer of the thin film transistor are made of a same material layer. In an embodiment involving a method, the first insulating layer has a second contact hole exposing the source / drain electrode, the method further including: forming a second insulating layer on a side of the first insulating layer away from the substrate, the second insulating layer having a third through-hole exposing the first through-hole and a third contact hole exposing the second contact hole of the first insulating layer; forming a plurality of second electrodes on a side of the second insulating layer away from the substrate, wherein the plurality of second electrodes are electrically connected to the source electrodes through the second contact hole of the first insulating layer and the third contact hole of the second insulating layer, respectively; and forming a pixel-defining layer on a side of the plurality of second electrodes away from the substrate, wherein the pixel-defining layer has a plurality of openings exposing the plurality of second electrodes and a fourth through-hole exposing the third through-hole. In an embodiment involving a method, the conductive base and the second electrode are made of a same material. In an embodiment involving a method, the second contact hole and the first through-hole of the first insulating layer are formed in two different etching steps, respectively. In an embodiment involving a method, the second contact hole is formed before the first through-hole, and wherein the first through-hole is formed after the third and fourth through-holes are formed. In an embodiment involving a method, the auxiliary electrode hole is formed by a wet etching process. In an embodiment involving a method, the first insulating layer is used as a photoresist for forming the auxiliary electrode hole by the wet etching process. In an embodiment involving a method, a layer of light-emitting material is formed by an evaporation process and the first electrode is formed by a sputtering process. Further aspects and areas of applicability will become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific examples herein are intended for purposes of illustration only and are not intended to limit the scope of the present application. BRIEF DESCRIPTION OF THE DRAWINGS The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present application. In the drawings: FIG. 1 illustrates a partial cross-sectional view of a top emission organic light-emitting display panel in the related art; FIG. 2 illustrates a schematic view of an auxiliary electrode structure of a display panel in the related art; FIG. 3 illustrates a schematic cross-sectional view of a display panel in one or more embodiments of the present disclosure; FIG. 4 illustrates a schematic cross-sectional view of another display panel in one or more embodiments of the present disclosure; FIG. 5 schematically illustrates a display device according to one or more embodiments of the present disclosure; FIG. 6 schematically illustrates a flowchart of a method for manufacturing a display panel according to one or more embodiments of the present disclosure; FIG. 7 illustrates a detailed flowchart of a method for manufacturing a display panel in one or more embodiments of the present disclosure; FIG. 8 illustrates a flowchart for manufacturing a thin film transistor and a transition structure for an auxiliary electrode structure in one or more embodiments of the present disclosure; FIGS. 9A to 9H illustrate schematic diagrams of an intermediate process using a method for manufacturing a display panel in one or more embodiments of the present disclosure; FIG. 10 illustrates a formation sequence of major film layers and corresponding hole structures of the display panel shown in FIG. 3; and FIGS. 11 A-l IE illustrate connection relationships among the major film layers of the display panel as shown in FIG. 3. Corresponding reference numerals indicate corresponding parts or features throughout the several views of the drawings. DETAILED DESCRIPTION Various embodiments, which are provided as exemplary examples of the present disclosure, will now be described in detail with reference to the accompanying drawings to enable those skilled in the art to implement the present disclosure. It should be noted that the following accompanying drawings and examples are not meant to limit the scope of the present disclosure. Where particular elements of the present disclosure may be partially or fully implemented using known components, only those parts of such known components that are necessary for an understanding of the present disclosure will be described, and the detailed descriptions of other parts of such known components will be omitted so as not to confuse the present disclosure. Further, various embodiments encompass present and future known equivalents to the components referred to herein by way of illustration. As used herein, the expressions “have”, “comprise” and “contain” as well as grammatical variations thereof are used in a non-exclusive way. Thus, the expression “A has B” as well as the expression “A comprises B” or “A contains B” may both refer to the fact that, besides B, A contains one or more further components and / or constituents, and to the case in which, besides B, no other components, constituents, or elements are present in A. The terms “a / an”, “the”, “said” and “at least one” are used to mean that there are one or more elements / components / etc. As used herein, the term “be located on” does, however, not refer to a specific geometric orientation of the final stack in the display panel or the display device with respect to a direction of a gravitational force but rather indicates a way of manufacturing the stack, which, after manufacturing, could, in general, be placed in any geometric orientation, also such as turned upside down. The terms “first”, “second”, “third”, etc. are used for descriptive purposes only and should not be construed to indicate or imply relative importance and order of formation. In the related art, the OLED display panel is generally composed of a substrate, a cathode, an anode, a light-emitting layer (EML), and the like. Under the action of an electric field, holes generated by the anode and electrons generated by the cathode move and migrate to the lightemitting layer. When they meet in the light-emitting layer, energy excitons are generated, thereby exciting the light-emitting molecules to eventually generate visible light. The light-emitting mode of the OLED display panel may be divided into top emission and bottom emission, wherein the top emission has an advantage of a high aperture ratio. In view of the problem that the lifetime of the OLED display panel is generally short at present, a high aperture ratio may alleviate the display degradation due to the problem of short lifetime. Accordingly, the top emission OLED display panel is receiving more and more attention. FIG. 1 illustrates a partial cross-sectional view of a top emission organic light-emitting display panel 10 m the related art. As shown in FIG. 1, the top emission organic light-emitting display panel 10 may include a substrate 11, a driving circuit 12 disposed on the substrate 11, and a light-emitting device 13. The driving circuit 12 may include a plurality of thin film transistors 120, each of which may include an active layer 1201 (which includes a channel region, source / drain regions on both sides of the channel region), a gate insulating layer 1202, a gate 1203, and a source / drain electrode 1204 electrically connected to the source / drain region of the active layer 1201. The anode 131 is electrically connected to the source / drain electrode 1204 of the thin film transistor 120 of the plurality of thin film transistors 120 that functions as a driving transistor. The light-emitting device 13 may include an anode 131, a light-emitting functional layer 132, and a cathode 133. The light-emitting functional layer 133 may include, for example, an electron transport layer, an electron injection layer, a light-emitting layer, a hole transport layer, and a hole injection layer. With continued reference to FIG. 1, the top emission organic light-emitting display panel 10 may further include a pixel defining layer 14 which includes a plurality of openings, the plurality of openings being disposed in one-to-one correspondence with the plurality of light-emitting devices. The top emission organic light-emitting display device 10 may further include a buffer layer 15 on the substrate 11, an interlayer dielectric layer 16 on a side of the buffer layer 15 away from the substrate 11, a first insulating layer (also referred to as a passivation layer) 17 on a side of the interlayer dielectric layer 16 away from the substrate 11, and a second insulating layer (also referred to as a planarization layer) 18 on a side of the first insulating layer 17 away from the substrate 11. As shown m FIG. 1, in the top emission organic light-emitting display panel 10, an electrode located on the light-emitting functional layer 132 is generally a cathode 133. The light emitted from the light-emitting functional layer 132 passes through the cathode 133, and thus the cathode 133 may affect the transmittance of the light to some extent. In order to improve the transmittance of light, the cathode 133 is generally made of a transparent conductive material having a high resistance or a thickness of the cathode 133 is made sufficiently thin, which results in a relatively large sheet resistance of the cathode 133. The large sheet resistance of the cathode 133 causes the voltage drop at different positions to be inconsistent, which finally affects the current of the OLED display panel, and thus the display uniformity. The larger the size of the OLED display panel, the more obvious this phenomenon is. In order to solve the problem of the large sheet resistance of the cathode of the OLED display panel, in the related art, one or more auxiliary electrodes are disposed in a non-pixel region of the display panel (e.g., a region outside a limited display region of the display panel or a spaced region between pixels). The auxiliary electrode is typically made of a high resistance material. The cathode is electrically connected to the auxiliary electrode through an auxiliary electrode hole to reduce the sheet resistance of the cathode. Among the techniques of forming the auxiliary electrode, one technique may be to form an auxiliary electrode structure by an anodic double etching process. FIG. 2 shows a schematic diagram of an auxiliary electrode structure 21 of a display panel 20 in the related art. As shown in FIG. 2, the auxiliary electrode structure 21 of the display panel 20 may include a first conductive layer 211, a second conductive layer 212, and a third conductive layer 213. Here, the first conductive layer 211 is made of the same material layer as the anode of the display panel, and the material of the third conductive layer 213 is the same as that of the anode. As an example, the first conductive layer 211 and the third conductive layer 213 are made of an Indium Tin Oxide (ITO) material, and the second conductive layer 212 is made of an alloy material, for example, an AL Mo alloy material. However, the top layer of the auxiliary electrode structure 21 is the ITO material which is easily peeled off, thereby causing short circuit and poor dark spots. In some embodiments of the present disclosure, a display panel having an auxiliary electrode structure is provided, where the auxiliary electrode structure is capable of reducing the sheet resistance of the cathode while reducing poor dark spots caused by the breakage of anode material due to using an anode double etching process to form the auxiliary electrode structure. The display panel includes a substrate, an auxiliary electrode structure on a side of the substrate, a first insulating layer on a side of the auxiliary electrode structure away from the substrate, and a first electrode. The auxiliary electrode structure includes a conductive base and an auxiliary electrode on the conductive base, wherein the auxiliary electrode has an auxiliary electrode hole that at least partially exposes the conductive base. The first insulating layer has a first through-hole, an orthographic proj ection of the first through-hole on the substrate being within an orthographic projection of the auxiliary electrode hole on the substrate, and a width of the first through-hole is smaller than a width of the auxiliary electrode hole. The first electrode contacts the auxiliary electrode and the conductive base passing through the first through-hole and the auxiliary electrode hole. The display panel provided by the embodiment of the disclosure has the auxiliary electrode structure which is capable of reducing the resistance of the cathode and avoiding poor dark spots caused by the breakage of the anode material in the case of using the anode material as the auxiliary electrode. Therefore, maintenance cost may be saved, and the quality of product may be improved. In addition, the auxiliary electrode structure is provided with a conductive base and the cathode is electrically connected to the conductive base. When the cathode is formed by a sputtering process, even if the cathode is discontinuous at the auxiliary electrode structure, the cathode may be connected via the conductive base, and thus the risk of anode breakage due to the discontinuity of the cathode at the auxiliary electrode structure may be prevented. The display panels provided by embodiments of the present disclosure are described in detail below in conjunction with the accompanying drawings. FIG. 3 shows a schematic cross-sectional view of a display panel 30 in one or more embodiments of the present disclosure. As shown in FIG. 3, the display panel 30 may include a substrate 31, an auxiliary electrode structure 39 on a side of the substrate 31, a first insulating layer 37 on a side of the auxiliary electrode structure 39 away from the substrate 31, and a first electrode 333. The auxiliary electrode structure 39 may include a conductive base 391 and an auxiliary electrode 392 on the conductive base 391, the auxiliary electrode 392 having an auxiliary electrode hole 3920 that at least partially exposes the conductive base 391. The first insulating layer 37 covers the auxiliary electrode 392 and has a first through-hole 371 at least partially exposing the auxiliary electrode hole 3920, an orthogonal projection of the first through-hole 371 on the substrate 31 is within an orthogonal projection of the auxiliary electrode hole 3920 on the substrate 31, and a width of the first through-hole 371 is smaller than a width of the auxiliary electrode hole 3920. The first electrode 333 contacts the auxiliary electrode 392 and the conductive base 391 passing through the first through-hole 371 and the auxiliary electrode hole 3920. In some embodiments of the present disclosure, the substrate 31 may include a semiconductor material such as monocrystalline or polycrystalline silicon. In an alternative embodiment, the substrate 31 may be made of other hard or soft materials such as glass, plastic, etc. In some embodiments of the present disclosure, the first insulating layer 37 may be a passivation layer, which may be a single-layer or multi-layer structure made of an inorganic material such as SiNx or SiOx. In some embodiments of the present disclosure, the first electrode 333 may be made of a transparent conductive material such as ITO, IZO, IGZO, or Zno. In an alternative embodiment, the first electrode 333 may be made of a metal material, for example, any one selected from silver (Ag), titanium (Ti), aluminum (Al), and molybdenum (Mo), or an alloy thereof. In the case where the first electrode 333 is made of a metal material, a thickness of the first electrode 333 is thin enough to have sufficient light transmittance. With continued reference to FIG. 3, in some embodiments of the present disclosure, the display panel 30 may further include a plurality of thin film transistors 320. Each thin film transistor 320 may include an active layer 3201, a gate insulating layer 3202 on the active layer 3201, and a gate electrode 3203 on the gate insulating layer 3202. The active layer 3201 may be made of silicon, amorphous silicon, polysilicon, or low temperature polysilicon. The active layer 3201 may include a channel region, source / drain regions doped with N-type or P-type dopants at both sides of the channel region. Each thin film transistor 320 may further include a source / drain electrode 3204 electrically connected to the source / drain region. The active layer 3201 may also be made of a semiconductor oxide, for example, the semiconductor oxide may include indium gallium zinc oxide (InGaZnO), indium tin zinc oxide (InSnZnO), indium zinc oxide (InZnO), or tin zinc oxide (SnZnO). The gate electrode 3203 and the source / drain electrode 3204 may be made of a metal conductive material, such as, molybdenum (Mo), tungsten (W), aluminum (Al), or copper (Cu). In some embodiments of the present disclosure, the auxiliary electrode 392 may be made of the same material layer as the source / drain electrode 3204 of the thin film transistor 320. This may avoid the problem of short circuit or poor dark spots caused by using the anode material to form the auxiliary electrode. With continued reference to FIG. 3, the display panel 30 may further include a buffer layer 35 on the substrate 31, and the plurality of thin film transistors 320 and the auxiliary electrode structure 39 may be located on a side of the buffer layer 35 away from the substrate 31. In some embodiments of the present disclosure, the buffer layer 35 may serve to prevent impurities or moisture from entering the inside of the display panel 30 through the substrate. The buffer layer 35 may be made of an inorganic insulating material such as SiNx or SiOx. The display panel 30 may further include an interlayer dielectric layer 36 between the buffer layer 35 and the first insulating layer 37. The interlayer dielectric layer 36 covers the active layer 3201 and the gate electrode 3203 of the thin film transistor 320. The interlayer dielectric layer 36 has a first contact hole 362. The source / drain electrode 3204 of the thin film transistor 320 is electrically connected to the source / drain region of the active layer 3201 through the first contact hole 362 of the interlayer dielectric layer 36. With continued reference to FIG. 3, the conductive base 391 may be located on a side of the buffer layer 35 away from the substrate 31. In some embodiments, the conductive base 391 may be made of the same material layer as the active layer 3201. As described above, the active layer 3201 and the conductive base 391 may be made of a semiconductor oxide. In some embodiments of the present disclosure, the interlayer dielectric layer 36 may have a second through-hole 361 at least partially exposing the conductive base 391, and the auxiliary electrode 392 is located in the second through-hole 361. In an alternative embodiment, the auxiliary electrode 392 may have a thickness greater than that of the second through-hole 361. That is, in the case of the orientation shown in FIG. 3, a height of a top of the auxiliary electrode 392 is higher than the thickness of the second through-hole 361. It is noted that, in the embodiments of the present disclosure, the parameter "thickness" refers to a dimension of a component or element (e.g., the auxiliary electrode 392) in a direction perpendicular to the substrate. With continued reference to FIG. 3, the display panel 30 may further include a plurality of second electrodes 331 on a side of the first insulating layer 37 away from the substrate 31. Each of the plurality of second electrodes 331 is electrically connected to the source / drain electrode 3204 through a contact hole in a layer between the second electrode 331 and the source / drain electrode 3204. Which of the source and drain electrodes the second electrode 331 is electrically connected to depends on the doping type of the active region 3201 of the thin film transistor 320. In an embodiment of the present disclosure, particularly in a top emission organic lightemitting display panel, the second electrode 331 may be made of a metal material having a high reflection coefficient, for example, silver (Ag), to reflect upward the light that is downwardly emitted. The organic light-emitting device of the top emission organic light-emitting display panel has improved lifetime and efficiency. In addition, in order to prevent the metal material from being oxidized by the external environment, an oxidation-resistant transparent conductive material such as ITO, IZO, IGZO, or Zno may be formed on an upper layer and / or a lower layer of the first electrode 331, thereby forming the first electrode 331 with a sandwich structure. In some embodiments of the present disclosure, the first electrode 333 may be a cathode, and the second electrode 331 may be an anode. With continued reference to FIG. 3, the display panel 30 may further include a light-emitting functional layer 332 between the first electrode 333 and the plurality of second electrodes 331. In an embodiment of the present disclosure, the first electrode 333, the light-emitting functional layer 332, and the plurality of second electrodes 331 form a plurality of light-emitting devices 33, and one of the second electrodes 331 together with portions of the light-emitting functional layer 332 and the first electrode 333 corresponding thereto may constitute one light-emitting device 33. It is note that in some embodiments of the present disclosure, a component / layer A being between a component / layer B and a component / layer C includes the case where the component / layer B and the component / layer C are spaced apart only by the component / layer A, in which case only the component / layer A is between the component / layer B and the component / layer C, and the component B and the component / layer C are not in contact; the case where only portions of the component / layer B and the component / layer C are spaced apart by the component / layer A, in which case the component / layer B and the component / layer C are allowed to have a portion in direct contact with each other; and the case where an additional component / layer is located between the component / layer B and the component / layer C, in addition to the component / layer A. As an example, in an embodiment shown in FIG. 4, the light-emitting functional layer 332 may be considered as being located between the first electrode 333 and the plurality of second electrodes 331, although only portions of the first electrode 333 and the plurality of second electrodes 331 is directly spaced apart by the light-emitting functional layer 332 and the remaining portions are spaced apart by other non-conductive layer (e.g., a pixel defining layer). In some embodiments of the present disclosure, as shown in FIG. 3, the light-emitting functional layer 332 may include a first portion 3321 located in the auxiliary electrode hole 3920 and a second portion 3322 located outside the auxiliary electrode hole 3920. The first portion 3321 of the light-emitting functional layer 332 and the second portion 3322 of the light-emitting functional layer 332 are not connected in the vicinity of the auxiliary electrode structure 39. In an exemplary embodiment, the light-emitting functional layer 332 may be formed by an evaporation process. Since a size of the first through-hole 371 of the first insulating layer 37 is smaller than a size of the auxiliary electrode hole 3920, the first insulating layer 37, the auxiliary electrode 392, and the conductive base 391 form a depression toward the auxiliary electrode 392. A vertical evaporation is generally used when forming the light-emitting functional layer 332 by evaporation, so it is difficult to perform a process of evaporating a material of the light-emitting functional layer 332 into the depression by vapor deposition. Therefore, in an embodiment of the present disclosure, evaporating the light-emitting functional layer 332 to be discontinuous at the auxiliary electrode structure 39may reduce the process difficulty. Meanwhile, since no pixel is disposed at the auxiliary electrode 392, the discontinuous light-emitting functional layer 332 does not affect the pixel light emission of the display panel 30. In some embodiments of the present disclosure, the first electrode 333 may include a third portion 3331 on the conductive base 391 and a fourth portion 3332 covering the second portion 3322 of the light-emitting functional layer 332, the third portion 3331 of the first electrode 333 being not connected to the fourth portion 3332 of the first electrode 333. In an exemplary embodiment, the first electrode 333 may be formed by a sputtering process. Although the sputtering process can sputter the first electrode material obliquely such that a small amount of the sputtered material can be sputtered into the depression toward the auxiliary electrode 392, it is likewise difficult to form the first electrode 333 to be continuous in the process. In an embodiment of the present disclosure, the contact of the first electrode 333 with the auxiliary electrode 392 and the conductive base 391 allows the first electrode 333 to be discontinuous in the auxiliary electrode hole 3920, thereby greatly reducing the difficulty of the process while ensuring the quality of the product. With continued reference to FIG. 3, the display panel 30 may further include a second insulating layer 38 between the plurality of second electrodes 333 and the first insulating layer 37. The second insulating layer 38 may have a third through-hole 381 exposing the first through-hole 371. An orthogonal projection of the first through-hole 371 on the substrate 31 is within an orthogonal projection of the third through-hole 381 on the substrate 31, and a width of the third through-hole 381 is greater than a width of the first through-hole 371 to expose a portion of the first insulating layer 37. In some embodiments of the present disclosure, the second insulating layer 38 may be a planarization layer for eliminating a step in a region where the light-emitting device 33 is located. The planarization layer may be made of a material selected from any one of poly imide, photo acryl, and benzocyclobutene. The display panel 30 may further include a pixel-defining layer 34 on a side of the plurality of second electrodes 331 away from the substrate 31. The pixel-defining layer 34 may have a plurality of openings 342 exposing the plurality of second electrodes 331 and a fourth through-hole 341 exposing the third through-hole 381. An orthogonal projection of the third through-hole 381 on the substrate 31 is within an orthogonal projection of the fourth through-hole 341 on the substrate, and a width of the fourth through-hole 341 is greater than a width of the third through-hole 381 to expose a portion of the second insulating layer 38. As shown in FIG. 3, the first portion 3321 of the light-emitting functional layer 332 may be located on the conductive base 391, and the second portion 3322 of the light-emitting functional layer 332 is conformally and continuously located on accessible surfaces of the pixel-defining layer 34, portions of the plurality of second electrodes 331 exposed by the plurality of openings 342, a portion of the second insulating layer 38 exposed by the fourth through-hole 341, and a portion of the first insulating layer 37 exposed by the third through-hole 381, which may reduce process difficulty. In an alternative embodiment, the second portion 3322 of the light-emitting functional layer 332 does not extend into the first through-hole 371. In some embodiments, the third portion 3331 of the first electrode 333 is located on a side of the first portion 3321 of the light-emitting functional layer 332 away from the conductive base 391, and the fourth portion 3332 of the first electrode 333 may be conformally and continuously located on the second portion 3322 of the light-emitting functional layer 332, a sidewall of the first through-hole 371, and a sidewall of the auxiliary electrode hole 3920, which may also reduce process difficulty. With continued reference to FIG. 3, in embodiments of the present disclosure, the display panel 30 may further include a shielding layer 310 located between the substrate 31 and the buffer layer 35. An orthogonal projection of the active layer 3201 on the substrate 31 may be within an orthogonal projection of the shielding layer 310 on the substrate 31 to enable the shielding layer 310 to block light from being incident on the active layer 3201 and reduce parasitic capacitance generated between the thin film transistor 320 and a plurality of lines. The material of the shielding layer 310 may be selected from any of silver (Ag), nickel (Ni), gold (Au), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), and rubidium (Nd), or an alloy thereof. The shielding layer 310 may be electrically connected to the source / drain electrode 3204 through a contact hole. FIG. 4 shows a schematic cross-sectional view of another display panel 40 in one or more embodiments of the present disclosure. The 4-display panel 40 illustrated in FIG. 4 shares some similarities with the display panel 30 illustrated in FIG. 3, and the description provided with respect to FIG. 3 applies as appropriate to the display panel 40 illustrated in FIG. 4. In the following description, only the differences of the another display panel 40 from the display panel 30 in the embodiment shown in FIG. 3 is explained, and the detailed explanation of the embodiment shown in FIG. 3 may be referred to for the difference from the display panel 30 in the embodiment shown in FIG. 3. In the display device 40 shown in FIG. 4, the conductive base 491 of the auxiliary electrode structure 49 may be located on a side of the interlayer dielectric layer 36 away from the substrate 31. In this embodiment, the interlayer dielectric layer 36 does not have a second through-hole. In this embodiment, a maximum thickness of the first insulating layer 37 is equal to a sum of a thickness of the conductive base 491, a depth of the auxiliary electrode hole 4920 (or a thickness of the auxiliary electrode 492), and a depth of the first through-hole 371. In some embodiments, the conductive base may be made of a metal oxide material, such as ITO, IZO, IGZO, or Zno. It will be appreciated that in embodiments where the conductive base is located on an interlayer dielectric layer, the conductive base may also be made of other materials, such as metals or alloys. In some other embodiments of the present disclosure, a display device is further provided, which may include the display panel according to one or more embodiments of the present disclosure, such as at least one display panel of one or more embodiments disclosed in detail above. Thus, for alternative embodiments of the display panel, reference may be made to embodiments of the display device. FIG. 5 schematically illustrates a display device 500 according to one or more embodiments of the present disclosure. As shown in FIG. 5, the display device 50 may include the display panel 30, 40 and a circuit structure 51 that optionally supplies a driving signal or a scanning signal to the display panel 30, 40. In still other embodiments of the present disclosure, a method for manufacturing a display panel is further provided. Optionally, the method may manufacture at least one display panel according to the present disclosure, such as at least one display panel according to one or more embodiments disclosed in more detail above and / or below. Thus, for alternative embodiments of the method, reference may be made to embodiments of the display panel. The method includes the following steps, which may be performed in a given order or in a different order. Furthermore, additional method steps not listed may be provided. Furthermore, two or more or even all method steps may be performed at least partially simultaneously. Furthermore, the method steps may be performed repeatedly two times or even more than two times. FIG. 6 schematically illustrates a flowchart of a method for manufacturing a display panel according to one or more embodiments of the present disclosure. As shown in FIG. 6, the method for manufacturing a display panel may include the following steps S602-S608. At step S602, a substrate is provided. At step S604, an auxiliary electrode structure 39 is formed on the substrate 31, the auxiliary electrode structure 39 including a conductive base 391 and an auxiliary electrode 392 on the conductive base 391. The auxiliary electrode 392 has an auxiliary electrode hole 3920 at least partially exposing the conductive base 391. At step S606, a first insulating layer 37 is formed, the first insulating layer 37 covering the auxiliary electrode 39 and having a first through-hole 371 at least partially exposing the auxiliary electrode hole 3920. An orthogonal projection of the first through-hole 371 on the substrate 31 is within an orthogonal projection of the auxiliary electrode hole 3920 on the substrate 31, and a width of the first through-hole 371 is smaller than a width of the auxiliary electrode hole 3920. At step S608, a first electrode 333 is formed, which is electrically connected to the auxiliary electrode 392 and the conductive base 391 passing through the first through-hole 371 and the auxiliary electrode hole 3920. In one or more embodiments of the present disclosure, the method may further include forming a plurality of thin film transistors 320 on the substrate 31. The auxiliary electrode 392 and the source / drain electrodes 3204 of the thin film transistor 320 are made of the same material layer. In one or more embodiments of the present disclosure, the first insulating layer 37 has a second contact hole 372 exposing the source / drain electrode. The method may further include: forming a second insulating layer 38 on a side of the first insulating layer 37 away from the substrate 31, the second insulating layer 38 having a third contact hole 382 exposing the second contact hole 372 of the first insulating layer 37; and forming a plurality of second electrodes 331 on a side of the second insulating layer 38 away from the substrate 31, wherein the plurality of second electrodes 331 are electrically connected to the source / drain electrodes 2304 through the second contact hole 371 of the first insulating layer 37 and the third contact hole 382 of the second insulating layer 38, respectively. In an exemplary embodiment of the present disclosure, the second contact hole 372 of the first insulating layer 37 and the first through-hole 371 may be formed in two different etching steps, respectively. In an alternative embodiment, the second contact hole 372 may be formed before the first through-hole 371, and the first through-hole 371 is formed after the third through-hole 381 and the fourth through-hole 341. In an example embodiment of the present disclosure, the auxiliary electrode hole 3920 may be formed by a wet etching process. In a further exemplary embodiment, the first insulating layer 37 may be used as a photoresist for forming the auxiliary electrode hole 3920 by a wet etching process. In a further exemplary embodiment, the light-emitting material layer 332 may be formed by an evaporation process, and the first electrode 333 may be formed by a sputtering process. Process and steps of a method for manufacturing a display panel provided by an embodiment of the present disclosure are described in detail below with reference to FIGS. 7, 8, and 9A to 9H. FIG. 7 illustrates a detailed flowchart of a method for manufacturing a display panel in one or more embodiments of the present disclosure, FIG. 8 illustrates a flowchart of manufacturing a thin film transistor and a transition structure for an auxiliary electrode structure in one or more embodiments of the present disclosure, and FIGS. 9A to 9H illustrate schematic diagrams of an intermediate process using the method for manufacturing a display panel in one or more embodiments of the present disclosure. As shown in FIG. 7 and FIGS. 8A to 9H, the method for manufacturing a display panel may include steps S8002 to S8026. These method steps in particular allow to produce for example the display panel in the embodiment shown in FIG. 3. In step S8002, a substrate 31 is provided. As described above, the substrate 31 may include a semiconductor material such as monocrystalline or polycrystalline silicon. In an alternative embodiment, the substrate 31 may be made of other hard or soft materials such as glass, plastic, etc. In step S8004, a shielding layer 310 is formed on the substrate 31. In this step, a shielding material layer may be formed first on the surface of the substrate 31 and then etched to form the shielding layer. The shielding layer 310 may be made of a metal or alloy material. In step S8006, a buffer layer 35 is formed on a side of the shielding layer 310 away from the substrate 31 (as shown in FIG. 9A). The buffer layer 35 may be made of an inorganic insulating material such as SiNx or SiOx. Optionally, the buffer layer 35 may be further patterned, for example by etching, to form a contact hole to the shielding layer 310. The contact hole communicates with the first contact hole 362 subsequently formed in the interlayer dielectric layer 36 so that a source / drain electrode of the thin film transistor 320 is connected to the shielding layer 310. In an alternative embodiment, the contact hole in the buffer layer 35 may also be formed along with the first contact hole 362 in the interlayer dielectric layer 36 after the interlayer dielectric material layer is formed, as described below. In step S8008, a plurality of thin film transistors 320 and a transition structure for the auxiliary electrode structure are formed on the buffer layer 35, the transition structure including a conductive base 391 and an auxiliary electrode intermediate structure 3921 (as shown in FIG. 9B). In this embodiment, the conductive base 391 and the active layer 3201 of the thin film transistor 320 are made of the same material layer, and the auxiliary electrode intermediate structure 3921 and the source / drain electrode 3204 of the thin film transistor 320 are made of the same material layer. It is noted that as used herein, "transitional structure / layer" and "intermediate structure / layer" generally refer to the product of the intermediate steps that are underwent in forming certain functional layer or component. As shown in FIG. 9, this step S8008 may include the following sub-steps S2-S8. In sub-step S2, an active layer 3201 and a conductive base 391 are formed on the buffer layer 35. In this step, an active layer material layer may be formed on the buffer layer 35 first, and then the active layer 3201 and the conductive base 391 may be formed, for example, by etching the active layer material layer. The active layer 3201 and the conductive base 391 may be formed in one etching using the same mask. The active layer 3201 may be made of silicon, amorphous silicon, polysilicon, or low temperature polysilicon. The active layer 3201 may also be made of a semiconductor oxide, for example, the semiconductor oxide may include indium gallium zinc oxide (InGaZnO), indium tin zinc oxide (InSnZnO), indium zinc oxide (InZnO), or tin zinc oxide (SnZnO). In sub-step S4, a gate insulating layer 3202 and a gate electrode 3203 are formed on a side of the active layer 3201 away from the substrate 31. The gate electrode 3203 may be made of a metal conductive material, for example, molybdenum (Mo), tungsten (W), aluminum (Al), or copper (Cu). In sub-step S6, an interlayer dielectric layer 36 is formed on the buffer layer 35 away from the substrate 31 to cover the conductive base 391, the active layer 3204 and the gate electrode 3203. In this step, an interlayer dielectric material layer covering the conductive base 391, the active layer 3201 and the gate electrode 3203 may be first formed and then patterned, thereby forming a second through-hole 361 at least partially exposing the conductive base 391 and a first contact hole 362 at least partially exposing the source / drain region of the active layer 3201. In embodiments of the present disclosure, the interlayer dielectric layer 36 may be patterned, for example, by an etching process. In this sub-step, a contact hole passing through the interlayer dielectric layer 36 and the buffer layer 35 may further be formed to connect the source / drain electrode 3404 to the shielding layer 310. In sub-step S8, a source / drain electrode 3204 and an auxiliary electrode intermediate structure 3921 are formed on a side of the interlayer dielectric layer 36 away from the substrate 31. In this step, a source / drain electrode material layer, which fills the first contact hole and the second through-hole, may be formed on the side of the interlayer dielectric layer away from the substrate, and then be etched, thereby forming the source / drain electrode 3204 and the auxiliary electrode intermediate structure 3921. The auxiliary electrode intermediate structure 3921 is located in the second through-hole 371 and has a thickness in a direction perpendicular to the substrate 31 that is greater than the total thickness of the interlayer dielectric layer 36 and the conductive base 391. A lateral dimension of the portion of the auxiliary electrode intermediate structure 3921 higher than the second through-hole 361 may be larger than an opening dimension of the second through-hole 361. In some embodiments, the source / drain electrode material layer may include one or more of molybdenum (Mo), tungsten (W), aluminum (Al), or copper (Cu). In step S8010, a first insulating material layer 370 is formed on accessible surfaces of the interlayer dielectric layer 36, the auxiliary electrode intermediate structure 3921 and the source / drain electrode 3204 (as shown in FIG. 9C). The first insulating material layer may be made of an inorganic material such as SiNx or SiOx. In step S8012, a second insulating layer 38 is formed on the first insulating material layer, the second insulating layer 38 having a third contact hole 382 and a third through-hole 381 at least partially exposing the first insulating material layer (as shown in fig. 9D). In this step, a second insulating material layer may be first formed on the first insulating material layer and then patterned by, for example, an etching process, thereby forming the second insulating layer 38 having the third through-hole 381 and the third contact hole 382. The second insulating layer 38 may be made of an inorganic material such as SiNx or SiOx. In step S8014, a transition layer 3701 for the first insulating layer 37 is formed which has a second contact hole 372 at least partially exposing at least one of the source / drain electrodes (as shown in FIG. 9D) In this step, the first insulating material layer may be patterned for the first time by an etching process to form a transition layer for the first insulating layer having the second contact hole 372. The second contact hole 372 communicates with the third contact hole 382. In an alternative embodiment, the second contact hole 372 and the first contact hole 382 may be formed simultaneously. In step S8016, a plurality of second electrodes 331 are formed on the second insulating layer 38, each of the second electrodes 331 being electrically connected to one of the source / drain electrodes 2304 through the third contact hole 382 and the second contact hole 372 (as shown in FIG. 9E). The second electrode 331 may be made of a metal material having a high reflection coefficient, for example, silver (Ag). In order to prevent the metal material from being oxidized by the external environment, an oxidation-resistant transparent conductive material may be formed on an upper layer and / or a lower layer of the second electrode 331. In step S8018, a pixel-defining layer 34 is formed on the plurality of second electrodes 331 (as shown in FIG. 9E). The pixel-defining layer 34 has a plurality of openings 342 exposing the plurality of second electrodes 331 and a fourth through-hole 341 exposing the third through-hole 381, an orthogonal projection of the third through-hole 381 on the substrate 31 is within an orthogonal projection of the fourth through-hole 341 on the substrate 31, and a width of the fourth through-hole 341 is greater than a width of the third through-hole 381 to expose a portion of the second insulating layer 38. In step S8020, a final patterned first insulating layer 37 having the first through-hole 371 and the second contact hole 372 is formed (as shown in FIG. 9E). In this step, the transition layer for the first insulating layer may be secondarily patterned by the second etching to form the first through-hole 371 of the first insulating layer 37 at least partially exposing the auxiliary electrode intermediate structure 3921 at a position of the transition layer for the first insulating layer corresponding to the auxiliary electrode intermediate structure 3921. An orthographic projection of the first through-hole 371 on the substrate 31 is within an orthographic projection of the third through-hole 381 on the substrate 31, and a width of the third through-hole 381 is greater than a width of the first through-hole 371 to expose a portion of the first insulating layer 37. In step S8022, a final auxiliary electrode structure 39 is formed (as shown in FIG. 9F). In this step, the auxiliary electrode intermediate structure 3921 may be patterned to form the auxiliary electrode hole 3920 of the auxiliary electrode 392, thereby forming the final auxiliary electrode structure 3 9. a width of the auxiliary electrode hole 3 920 is greater than a width of the first through-hole 371 of the first insulating layer 37, so that the first insulating layer 37, the auxiliary electrode 392, and the conductive base 391 form a depression toward the auxiliary electrode 392. In this step, the auxiliary electrode hole 3920 of the auxiliary electrode 392 may be formed by directly using the first insulating layer 37 as a photoresist to wet-etch the auxiliary electrode intermediate structure 3921. In an alternative embodiment, the auxiliary electrode hole 3920 of the auxiliary electrode 392 may be formed by using an additional mask to wet-etch the auxiliary electrode intermediate structure 3921. In step S8024, a light-emitting functional layer 332 is formed (as shown in FIG. 9G). In one or more embodiments, the light-emitting functional layer 332 may be formed by an evaporation process. As shown in FIG. 3, since the first through-hole 371 of the first insulating layer 37 is smaller than the third through-hole 381 of the second insulating layer 38 and the auxiliary electrode hole 3920, the first insulating layer 37 has a protrusion protruding toward the center direction of the first through-hole 371 with respect to the second insulating layer 38 and the auxiliary electrode 392. When the material of the light-emitting functional layer is evaporated, the protrusion of the first insulating layer 37 may cut off the light-emitting functional layer 332 in the vicinity of the auxiliary electrode hole 3920, so that the light-emitting functional layer 332 includes a first portion 3321 located in the auxiliary electrode hole 3920 and a second portion 3322 located outside the auxiliary electrode hole 3920, the first portion 3321 and the second portion 3322 being not connected. Since no pixel is provided at the position of the auxiliary electrode 392, light emission of the pixel of the display panel is not affected even if the first portion 3321 and the second portion 3322 of the light-emitting functional layer 332 are not connected. Therefore, when the material of the light-emitting functional layer 332 is evaporated, vertical evaporation is possible without oblique evaporation, and thus process difficulty may be reduced. In one or more embodiments, the first portion 3321 of the light-emitting functional layer 332 may be positioned on the conductive base 391, and the second portion 3322 of the light-emitting functional layer 332 may be conformally and continuously positioned on accessible surfaces of the pixel-defining layer 34, the portions of the plurality of second electrodes 331 exposed by the plurality of openings 342, a portion of the second insulating layer 38 exposed by the fourth through-hole 341, and a portion of the first insulating layer 37 exposed by the third through-hole 381. Due to the shielding of the protrusion of the first insulating layer 37, the first portion 3321 of the light-emitting functional layer 332 is not connected to the auxiliary electrode 392, and the second portion 3322 of the light-emitting functional layer 332 extends only to an upper surface of the portion of the first insulating layer 37 exposed by the third through-hole 381. In step S8026, a first electrode 333 is formed on the light-emitting functional layer 332 (as shown in FIG. 9H). In one or more embodiments, the first electrode 333 may be formed by a sputtering process. As shown in FIG. 3, in one or more embodiments of the present disclosure, the first electrode 333 may include a third portion 3331 on the conductive base 391 and a fourth portion 3332 covering the second portion 3322 of the light-emitting functional layer 332, and the third portion 3331 and the fourth portion 3332 may not be connected. In a specific embodiment, the fourth portion 3332 of the first electrode 333 is conformally and continuously located on the second portion 3322 of the light-emitting functional layer 332, a sidewall of the first through-hole 371, and a sidewall of the auxiliary electrode 392, and is connected to the conductive base 391. When the electrode material is evaporated by the sputtering process, the sputtered material may be sprayed at a certain divergence angle, and therefore, even if it is shielded by the protrusion of the first insulating layer 37, a portion of the electrode material may be sprayed onto the sidewall of the auxiliary electrode 392 below the protrusion of the first insulating layer 37. However, it is generally relatively difficult to achieve continuity of the first electrode 333 in the auxiliary electrode hole 3920 and good contact with the auxiliary electrode. Therefore, when forming the first electrode 333, the first electrode 333 may be allowed to be discontinuous in the auxiliary electrode hole 3920, and it only need to ensure that the first electrode 333 is in good contact with the auxiliary electrode 392 and the conductive base 3921. In this way, the overall resistivity of the first electrode 333 may be reduced by the auxiliary electrode 392, and the breakage of the first electrode 333 may be compensated by the conductive base 3921, so that good performance of the first electrode 333 may be ensured. FIG. 10 illustrates a formation sequence of major film layers and corresponding hole structures of the display panel shown in FIG. 3; FIG. 11A to 1 IE illustrate connection relationships among the major film layers of the display panel shown in FIG. 3, the film layers having the connection relationships being arranged m the formation order of the respective film layers and / or the respective hole structures. Only the conductive film layers of the display panel and the film layers having hole structure which includes the through-holes (e.g., first to fourth through-holes) and the contact holes (first to fourth contact holes) are shown in FIGS. 10 and 11A to HE. The process sequence in FIGS. 10 and 11 A-1 IE is from top to bottom in the direction indicated by the arrows. As shown in FIGS. 10 and 3, the shielding layer 310, the active layer 3201, the gate electrode 3203, the source / drain electrode 3204, the second electrode (the anode) 331, and the first electrode (the cathode) 333 are all conductive layers. The buffer layer, the interlayer dielectric layer, the first insulating layer, the second insulating layer and the pixel-defining layer are all the layers with hole structures. Specifically, the second through-hole 361 and the first contact hole in the interlayer dielectric layer 36 are simultaneously formed, the third through-hole 381 and the third contact hole 382 in the second insulating layer 37 are simultaneously formed, and the second contact hole 372 and the first through-hole 371 of the first insulating layer 37 are formed by two different process steps. As shown in FIGS. HA to HE and FIG. 3, the second electrode 331 is connected to the source / drain electrode 3204 through the third contact hole 382 in the second insulating layer 38 and the second contact hole 372 formed by the first etching process in the first insulating layer 37 (FIG. 11 A); the source / drain electrode 3204 is connected to the shielding layer 310 through the first contact hole 362 in the interlayer dielectric layer 36 and the fourth contact hole 352 in the buffer layer 35 (FIG. 11B); the source / drain electrode 3204 is connected to the active layer 3201 through the first contact hole 362 in the interlayer dielectric layer 36 (FIG. 11C); the auxiliary electrode 392 is connected to the conductive base 391 through the second through-hole 361 in the interlayer dielectric layer 36 (FIG. 1 ID); the first electrode 333 is connected to a conductive base 391 through the fourth through-hole 341 in the pixel-defining layer 34, the third through-hole 381 in the second insulating layer 38, the first through-hole 371 in the first insulating layer 37 formed by the secondary etching process, and the second through-hole 361 in the interlayer dielectric layer (FIG. HE). The display panel manufactured by the method in one or more embodiments above has the auxiliary electrode structure that is surrounded by the first insulating layer, the second insulating layer and the pixel-defining layer, and thus has no risk of fracture or collapse during the washing process, ensuring stable and reliable connection between the first electrode and the auxiliary electrode structure. The method of manufacturing the display panel shown in FIG. 3 is described in detail above with reference to FIG. 7, FIG. 8 and FIGS. 9A to 9F. For the method of manufacturing the display panel shown in FIG. 4, since the display device illustrated in FIG. 4 shares some similarities with the display device illustrated in FIG. 3, the description for the method of manufacturing provided above with respect to the display panel in FIG. 3 applies as appropriate to the display panel in FIG. 4. As already described above, in the display panel shown in FIG. 4, the conductive base is located on the side of the interlayer dielectric layer away from the substrate, instead of being located in the same layer as the active layer of the display panel as shown in fig. 3, which results in that the process of manufacturing some film layers, such as the interlayer dielectric layer and the conductive base of the auxiliary electrode structure, is not exactly the same as the flowchart shown in FIG. 7. The flowchart shown in FIG. 7 may be appropriately adjusted according to actual needs, and details are not described herein again. The foregoing description of the embodiment has been provided for purpose of illustration and description. It is not intended to be exhaustive or to limit the application. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the application, and all such modifications are included within the scope of the application.

Claims

1. A display panel, comprising:a substrate;an auxiliary electrode structure on a side of the substrate, the auxiliary electrode structure comprising:a conductive base, andan auxiliary electrode on the conductive base, the auxiliary electrode having an auxiliary electrode hole at least partially exposing the conductive base;a first insulating layer covering the auxiliary electrode and having a first through-hole at least partially exposing the auxiliary electrode hole, an orthogonal projection of the first through-hole on the substrate being withm an orthogonal projection of the auxiliary electrode hole on the substrate, and a width of the first through-hole being smaller than a width of the auxiliary electrode hole; anda first electrode which contacts the auxiliary electrode and the conductive base passing through the first through-hole and the auxiliary electrode hole.

2. The display panel of claim 1, further comprising a plurality of thin film transistors, wherein the auxiliary electrode and a source / drain electrode of the thin film transistor are made of a same material layer.

3. The display panel of claim 2, further comprising:a buffer layer on the substrate, wherein the plurality of thin film transistors are located on a side of the buffer layer away from the substrate; andan interlayer dielectric layer between the buffer layer and the first insulating layer,wherein the interlayer dielectric layer covers active layers and gates of the plurality of thin film transistors, and wherein the source / drain electrode is electrically connected to a source / drain region of the active layer through a first contact hole in the interlayer dielectric layer.

4. The display panel of claim 3, wherein the conductive base is on a side of the buffer layer away from the substrate.

5. The display panel of claim 4, wherein the conductive base and the active layer are made of a same material layer.

6. The display panel of claim 5, wherein the conductive base and the active layer comprise a semiconductor oxide.

7. The display panel of claim 5, wherein the interlayer dielectric layer has a second through-hole at least partially exposing the conductive base, the auxiliary electrode is located in the second through-hole, and a thickness of the auxiliary electrode is greater than a thickness of the second through-hole.

8. The display panel of claim 3, wherein the conductive base is on a side of the interlayer dielectric layer away from the substrate.

9. The display panel of claim 8, wherein the conductive base comprises a metal oxide.

10. The display panel of any of claims 2 to 9, further comprising:a plurality of second electrodes on a side of the first insulating layer away from the substrate, each of the plurality of second electrodes being electrically connected to the source / drain electrode through a contact hole; anda light-emitting functional layer between the first electrode and the plurality of second electrodes, the light-emitting functional layer comprising a first portion located in the auxiliary electrode hole and a second portion located outside the auxiliary electrode hole, wherein the first portion and the second portion are not connected,wherein the first electrode comprises a third portion located on the conductive base and a fourth portion covering the second portion of the light-emitting functional layer, and wherein the third portion and the fourth portion are not connected.

11. The display panel of claim 10, further comprising:a second insulating layer between the first insulating layer and the plurality of second electrodes, the second insulating layer having a third through-hole exposing the first through-hole, an orthographic projection of the first through-hole on the substrate being within an orthographic projection of the third through-hole on the substrate, and a width of the third through-hole being greater than a width of the first through-hole to expose a portion of the first insulating layer; anda pixel-defining layer between the plurality of second electrodes and the light-emitting functional layer, the pixel-defining layer having a plurality of openings exposing the plurality of second electrodes and a fourth through-hole exposing the third through-hole, an orthographic projection of the third through-hole on the substrate being within an orthographic projection of the fourth through-hole on the substrate, and a width of the fourth through-hole being greater than a width of the third through-hole to expose a portion of the second insulating layer.

12. The display panel of claim 11, wherein the first portion of the light-emitting functional layer is located on the conductive base, and the second portion of the light-emitting functional layer is conformally and continuously located on accessible surfaces of the pixel-defining layer,portions of the plurality of second electrodes exposed by the plurality of openings, a portion of the second insulating layer exposed by the fourth through-hole, and a portion of the first insulating layer exposed by the third through-hole.

13. The display panel of claim 11, wherein the second portion of the light-emitting functional layer does not extend into the first through-hole.

14. The display panel of any of claims 11 to 13, wherein the fourth portion of the first electrode is conformally and continuously located on the second portion of the light-emitting functional layer, on a sidewall of the first through hole, and on a sidewall of the auxiliary electrode.

15. A display device comprising the display panel of any of claims 1 to 14.

16. A method for manufacturing the display panel of any of claims 1 to 14, comprising:providing a substrate;forming an auxiliary electrode structure on the substrate, the auxiliary electrode structure comprising:a conductive base, andan auxiliary electrode on the conductive base, the auxiliary electrode having an auxiliary electrode hole at least partially exposing the conductive base;forming a first insulating layer covering the auxiliary electrode and having a first through-hole at least partially exposing the auxiliary electrode hole, an orthographic projection of the first through-hole on the substrate being within an orthographic projection of the auxiliary electrode hole on the substrate, and a width of the first through-hole being smaller than a width of the auxiliary electrode hole; andforming a first electrode which contacts the auxiliary electrode and the conductive base passing through the first through hole and the auxiliary electrode hole.

17. The method of claim 16, further comprising:forming a plurality of thin film transistors on the substrate, wherein the auxiliary electrode and a source / drain electrode of the thin film transistor are made of a same material layer.

18. The method of claim 17, wherein the conductive base and an active layer of the thin film transistor are made of a same material layer.

19. The method of claim 17, wherein the first insulating layer has a second contact hole exposing the source / drain electrode, the method further comprising:forming a second insulating layer on a side of the first insulating layer away from the substrate, the second insulating layer having a third through-hole exposing the first through-hole and a third contact hole exposing the second contact hole of the first insulating layer;forming a plurality of second electrodes on a side of the second insulating layer away from the substrate, wherein the plurality of second electrodes are electrically connected to the source electrodes through the second contact hole of the first insulating layer and the third contact hole of the second insulating layer, respectively; andforming a pixel-defining layer on a side of the plurality of second electrodes away from the substrate, wherein the pixel-defining layer has a plurality of openings exposing the plurality of second electrodes and a fourth through-hole exposing the third through-hole.

20. The method of claim 19, wherein the conductive base and the second electrode are made of a same material.

21. The method of claim 19, wherein the second contact hole and the first through-hole of the first insulating layer are formed in two different etching steps, respectively.

22. The method of claim 21, wherein the second contact hole is formed before the first through-hole, and wherein the first through-hole is formed after the third and fourth through-holes are formed.

23. The method of any of claims 16 to 22, wherein the auxiliary electrode hole is formed by a wet etching process.

24. The method of claim 23, wherein the first insulating layer is used as a photoresist for forming the auxiliary electrode hole by the wet etching process.

25. The method of any of claims 16 to 22, wherein a layer of light-emitting material is formed by an evaporation process and the first electrode is formed by a sputtering process.

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