Power semiconductor module

Abstract

A power semiconductor module 1000 comprises: a substrate comprising a patterned 10 electrically conductive layer on an electrically insulating layer; a plurality of power terminals comprising a DC pos

Description

Technical Field The present disclosure relates to a power semiconductor module and a method of assembling the same. More particularly, but not exclusively, the present disclosure relates to a power semiconductor module which provides an improved separation of its driver / control circuit from its high power circuit and an improved cooling performance. Background Power semiconductor modules (used interchangeably with “power modules”) have been considered as one of the most delicate components in electric control systems of electric vehicles (EVs) and hybrid electric vehicles (HEVs). For such applications, there has been an increasing demand for power semiconductor modules with increased power density, improved electrical performance and thermal performance, high reliability, and reduced costs. In particular, an electric control system for EV / HEV applications typically comprises three and more power converters which are constructed based upon power semiconductor modules. There is generally a limited space to accommodate the power semiconductor modules and their associated connections in the electric control system of an EV / HEV. Packaged discrete power semiconductor devices, such as TO-247, TO-Leadless (TOLL), D2PAK and STPAK packages with silicon (Si) or silicon carbide (SiC) transistors, are widely commercially available and have been demonstrated to provide more flexible and lower cost rapid solutions over the power modules constructed with bare power semiconductor chips. Therefore, packaged discrete power semiconductor devices are attractive as switching devices for rapid construction of low cost power semiconductor assemblies (or modules) for varying voltage, such as, converting direct current (DC) to three-phase alternating currents (ACs) or converting single-phase or three-phase ACs to DC in the on-board charger (OBC) or electric control systems of HEVs and EVs. However, in the known power semiconductor modules constructed with the surface mount devices (SMDs) such as TOLL and D2PAK packages, all the power and driver / control terminals of each SMD are bonded to the conductive tracks of the same power board, and additional connectors are used to connect the driver / control terminals from the power board to a driver / control printed circuit board (PCB). During operation, the high power current and the low power driver / control signals of the SMDs would be passing on the same plane of the power board leading to undesirable interference with each other. Further, the additional connectors are somewhat delicate, and the use of the additional connectors would increase materials and processing costs which are disadvantageous for highly competitive HEV and EV applications. In other known power semiconductor modules constructed with the discrete devices such as TO-247 and STPAK packages, the power terminals of different discrete devices are interconnected with either power PCBs with thick and wide copper tracks or thick and wide copper busbars. Those power PCBs and copper busbars are often arranged away from the heat sink, thereby resulting in poor thermal performance. To reduce the temperature rise due to electro-thermal generation under higher current, thicker copper tracks or a larger number of copper track layers in the power PCBs or thicker and wider copper busbars are commonly used. For example, in a known power semiconductor module with the rated current of 180 to 250A for STPAK SiC MOSFET packages, one piece approximately of 83 mm x 19 mm x i mm copper busbar and one piece approximately of 37 mm x 19 mm x 1 mm copper busbar are used to connect a pair of STPAK SiC MOSFET packages to the DC power supply and the AC output, respectively. This has the disadvantage of increasing the costs and weight as well as reducing the power density of the power modules. The known power semiconductor modules constructed with discrete devices are disclosed in the following documents: a) “Modular approach to power electronics, introducing the low voltage drives scalable power demonstration board”, Available from: https: / / www.infineon.com / cms / en / product / gated-document / modular-approach-to-power-electronics-5546d462696dbf120169babb2b6a4c27 / ; b) EP 4131759 A1, Highly integrated MOSFET half-bridge power module for power converters; c) US 10,778,118 B2, Inverter module having multiple half-bridge modules for a power converter of an electric vehicle; d) Tesla Model 3 SiC power module disassembly and analysis, available from: https: / / www.dongchedi.com / article / 6760239375897870855. It is an object of the present disclosure, among others, to provide an improved power semiconductor module, which solves at least some of the problems associated with known power modules, whether identified herein or otherwise. Summary According to a first aspect of the present disclosure, there is provided a power semiconductor module comprising: a substrate comprising an electrically insulating layer and a patterned electrically conductive layer arranged on a surface of the electrically insulating layer; a plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal; a half-bridge structure comprising a high-side device and a low-side device connected between the DC positive terminal and the DC negative terminal, wherein the AC terminal is connected between the high-side device and the low-side device; and a housing comprising an electrically insulating material, wherein the high-side device and the low-side device are at least partially enclosed by the housing; wherein: each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device which is mounted on the patterned electrically conductive layer, wherein each packaged discrete power semiconductor device comprises a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device, and the at least one control terminal extends away from the substrate and protrude from the housing; the plurality of power terminals are directly bonded to the patterned electrically conductive layer; and the patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure. It would be understood that the high-side terminal and the low-side terminal are power terminals of the packaged discrete power semiconductor device. The nature of the high-side terminal and the low-side terminal depends upon the type of the packaged discrete power semiconductor device. In the event that the packaged discrete power semiconductor device is IGBT-based, the high-side terminal is the collector of the IGBT while the low-side terminal is the emitter of the IGBT. In the event that the packaged discrete power semiconductor device is MOSFET-based, the high-side terminal is the drain of the MOSFET while the low-side terminal is the source of the MOSFET. By the expression “extends away”, it is meant that the control terminal itself is not attached to the substrate (in particular the patterned electrically conductive layer), and that a free end (i.e., a far end distal to a housing of the packaged discrete power semiconductor devices) of the control terminal points away from the substrate. This may be achieved by suitably bending the free end of the control terminal to be along a direction which extends away from the substrate. It would be understood that the control terminal per se is spaced apart (hence electrically insulated) from the patterned electrically conductive layer, although the control terminal may be electrically coupled to the patterned electrically conductive layer through an internal wiring / structure of the packaged discrete power semiconductor device. By using packaged discrete power semiconductor devices to form the high-side device and the low-side device, the development of the power semiconductor module can be quicker and more flexible with reduced costs. By using the conductive tracks of the patterned electrically conductive layer to form the power circuit connections of the half-bridge structure, the power current of the half-bridge structure flows in the patterned electrically conductive layer. With the at least one control terminal extending away from the substrate and protruding from the housing, control signal(s) applied to or received from the at least one control terminal are separated from the power current, and does not share or cross the plane where the power current flows. Therefore, the power semiconductor module achieves an improved separation of the driver / control circuit from the power circuit, and accordingly an improved electrically performance. Further, the at least one control terminal can be directly connected to an external control circuit board where the control signal(s) flow, without requiring any delicate connectors involving addition material and processing cost. Further, by employing the conductive tracks on the substrate to form the power circuit connections of the half-bridge structure, heat generated in the power circuit connections can effectively dissipate through the substrate. Accordingly, the consumption of material to form the conductive tracks of the substrate can be remarkably reduced while achieving satisfactory thermal performance. Directly bonding the power terminals of the half-bridge structure to the conductive tracks of the substrate allows heat generated at the power terminals to be easily dissipated through the substrate and a heat sink coupled to the substrate, thereby improving the thermal performance of the power semiconductor module. It would be understood that the plurality of power terminals protrude from the housing. Each packaged discrete power semiconductor device may comprise a metal base and a plurality of leads, and the metal base may be directly bonded to the patterned electrically conductive layer. The metal base may also be referred to as a metal tab or an electrically conductive base. By directly bonding the metal base to the patterned electrically conductive layer, heat generated by the packaged discrete power semiconductor devices can be easily dissipated through the substrate which is typically closely in contact with a heat sink. This advantageously reduces the thermal resistance from junction to heat sink, and improves the cooling performance of the power semiconductor module. The metal base may function as the high-side terminal of the respective packaged discrete power semiconductor device. The plurality of leads may comprise a power lead functioning as the low-side terminal of the respective packaged discrete power semiconductor device and at least one control lead functioning as the at least one control terminal. The power lead may comprise a first section and a second section. The first section may be arranged between a housing of the respective packaged discrete power semiconductor device and the second section, and the second section may extend away from the substrate and protrudes from the housing. The power semiconductor module may further comprise a conductive spacer bonded between the first section and the patterned electrically conductive layer. The first section may be electrically connected to the patterned electrically conductive layer by the conductive spacer. Advantageously, the power lead can be used as both a power terminal and a control terminal of the packaged discrete power semiconductor device. The first section and the second section of the power lead may be integrally formed. With the expression “extends away”, it would be understood that the second section is along a direction which forms a non-zero angle with the substrate and extends away from a surface of the substrate. In the present disclosure, the term “electrically connected” describes a permanent low-ohmic connection between electrically connected elements, for example a direct contact between the concerned elements or a low-ohmic connection via a metal and / or highly doped semiconductor. The second section may extend along a direction that is perpendicular to the surface of the electrically insulating layer. The first section may extend along a direction that is parallel to the surface of the electrically insulating layer. The plurality of spaced-apart conductive tracks may comprise first to third conductive tracks. The metal base of the high-side device may be directly mounted on the first conductive track that is electrically connected to the DC positive terminal. The metal base of the low-side device may be directly bonded to the second conductive track which is electrically connected to the AC terminal and the power lead of the high-side device. The power lead of the low-side device may be electrically connected to the third conductive track that is electrically connected to the DC negative terminal. The DC positive terminal may be directly bonded to the first conductive track. The AC terminal may be directly bonded to the second conductive track. The DC negative terminal may be directly bonded to the third conductive track. The power semiconductor module may further comprise a first conductive spacer bonded between the first section of the power lead of the high-side device and the second conductive track, and a second conductive spacer bonded between the first section of the power lead of the low-side device and the third conductive track. A far end section of the at least one control terminal may extend along a direction that is generally perpendicular to the surface of the electrically insulating layer. The at least one control terminal may comprise a gate terminal for controlling a current flowing between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device. The at least one control terminal may comprise an auxiliary high-side terminal for sensing a voltage at the high-side terminal of the packaged discrete power semiconductor device. It would be understood that the auxiliary high-side terminal is electrically connected to the high-side power terminal (e.g., the metal base) of the packaged discrete power semiconductor device The auxiliary high-side terminal and the second section of the power lead may be for sensing a voltage drop between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device. Depending upon the design of the packaged discrete power semiconductor device, the at least one control terminal may further comprise an auxiliary low-side terminal which is electrically connected to the low-side power terminal (e.g., the power lead) of the packaged discrete power semiconductor device. In that case, the auxiliary high-side terminal and the auxiliary low-side terminal may be used to sense a voltage drop between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device. The packaged discrete power semiconductor device may comprise a gate-controlled power semiconductor chip. The gate-controlled power semiconductor chip may comprise an IGBT or a power MOSFET. The packaged discrete power semiconductor device may be of TO-247 packaging or TO-220 packaging. At least one of the DC positive terminal and the DC negative terminal may comprise a plurality of branches which are separated at a far end of the respective power terminal. The housing may comprise a frame which surrounds a periphery of the halfbridge structure and a lid which is supported by the frame and overlies the half-bridge structure. The at least one control terminal may protrude from the lid of the housing. Each of the frame and the lid may comprise an electrically insulating material. The lid may comprise cylindrical protrusions formed on a surface of the lid which faces away from the half-bridge structure. Each of the cylindrical protrusions may comprise a wall surrounding a through-hole into which the at least one control terminal is inserted. The power semiconductor module may further comprise a plurality of pressure applicators arranged between the lid and the half-bridge structure. At least some of the plurality of pressure applicators may be configured to apply a pressure to the packaged discrete power semiconductor devices. The at least some of the plurality of pressure applicators may be in contact with the packaged discrete power semiconductor devices. At least one of the plurality of pressure applicators may be configured to apply a pressure to at least one of the plurality of power terminals. The at least one of the plurality of pressure applicators may be in contact with the at least one of the plurality of power terminals. The plurality of pressure applicators may be formed integrally with the lid. The plurality of pressure applicators may comprise a plurality of protrusions formed on an inner surface of the lid which faces the half-bridge structure. The plurality of pressure applicators comprises a plurality of compliant components. The term “compliant components” is intended to mean that the components have mechanical compliance (e.g., malleability, pliability, deformability, softness, shearability, compressibility, stretchiness, and / or geometric reactiveness to external forces applied to the exterior of the components). In an example, the components are able to achieve force and motion transmission through elastic body deformation. The compliant components may be made of a mechanically compliant material (e.g., silicone rubber), or alternatively may obtain compliance due to its structure (e.g., disk spring, coil spring, etc.). The term “compliant components” may be used interchangeably with “mechanically compliant components”. The lid may comprise strengthening ribs for increasing stiffness of the lid. The power semiconductor module may further comprise a heat removal body thermally coupled to the electrically insulating layer of the substrate. The term “thermally coupled” includes that one or more intervening element(s) may exist between the thermally coupled elements. The heat removal body may be thermally coupled to the electrically insulating layer of the substrate by a single layer of thermal interface material. The power semiconductor module may further comprise a pressure controller which is configured to control a pressure applied by the lid, through the half-bridge structure and the substrate, to the heat removal body. The pressure controller may comprise at least one screw. The half-bridge structure may be a first half-bridge structure, and the power semiconductor module may further comprise a second half-bridge structure and a third half-bridge structure. The first to third half-bridge structures may be laterally spaced from one another along the surface of the electrically insulating layer. The first to third half-bridge structures may be thermally coupled to the same heat removal body. According to a second aspect of the present disclosure, there is provided an assembly comprising: the power semiconductor module of the first aspect; and a control circuit board to which the at least one control terminal is attached, wherein the control circuit board comprises control circuitry for controlling an operation of the halfbridge structure by using the at least one control terminal. It would be understood that the control circuit board is not enclosed by the housing, and overlies the substrate and the half-bridge structure. In other words, the half-bridge structure may be arranged between the substrate and the control circuit board. The control circuit board may comprise through holes which selectively form electrical connections to the control circuitry, and the control terminals of the packaged discrete power semiconductor devices may be attached to the control circuit board by inserting into the through holes. The control circuit board may extend along a plane that is parallel to the surface of the electrically insulating layer. The assembly may further comprise a DC-link circuit board to which the DC positive terminal and the DC negative terminal are attached, wherein the DC-link circuit board comprises at least one DC-link capacitor which is electrically connected between the DC positive power terminal and the DC negative power terminal. The DC positive terminal and the DC negative terminal may protrude from the same side of the housing of the power semiconductor module. The DC-link circuit board may comprise apertures which selectively form electrical connections to the at least one DC-link capacitor, and the DC positive power terminal and the DC negative power terminal may be attached to the DC-link circuit board by inserting the plurality of branches into the respective apertures. According to a third aspect of the present disclosure, there is provided a method of assembling a power semiconductor module, wherein the method comprises: mounting a high-side device and a low-side device of a half-bridge structure on a patterned electrically conductive layer of a substrate, wherein the substrate comprises an electrically insulating layer and the patterned electrically conductive layer is arranged on a surface of the electrically insulating layer, and wherein each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device comprising a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device; directly bonding a plurality of power terminals to the patterned electrically conductive layer of the substrate, wherein the plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal, and wherein the patterned electrically conductive layer comprises a plurality of spacedapart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure; and covering the high-side device, the low-side device and at least a part of the plurality of power terminals by a housing, wherein the housing comprises an electrically insulating material, wherein the at least one control terminal of the packaged discrete power semiconductor device extends away from the substrate and protrude from the housing. Where appropriate any of the features described above in relation to any aspect of the present disclosure may be applied to any other aspect of the disclosure. It would also be understood that the terms “first”, “second” etc. are simply used in the present disclosure to label the relevant elements for the ease of description, and do not imply any limitations to the sequence or locations of the relevant elements. Brief Description of the Drawings In order that the disclosure may be more fully understood, a number of embodiments of the disclosure will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 schematically illustrates a topology of a three-phase power module which are constructed with two discrete IGBT devices in parallel for each switch, according to an embodiment of the present disclosure; Figure 2 schematically illustrates a top perspective view of a discrete IGBT device used in the power module of Figure 1; Figure 3 schematically illustrates a top perspective view of the discrete IGBT device of Figure 2, with its pins being bent by 90°; Figure 4 schematically illustrates a bottom perspective view of the discrete IGBT device of Figure 3; Figure 5 schematically illustrates a top perspective view of an insulated metal substrate used in the power module of Figure 1; Figure 6 schematically illustrates a bottom perspective view of the insulated metal substrate of Figure 5; Figure 7 schematically illustrates a top perspective view of all the joints and small conductive spacers which are placed on the insulated metal substrate of Figure 5; Figure 8 schematically illustrates a top perspective view of a half-bridge structure included within the power module of Figure 1; Figure 9 schematically illustrates a top perspective view of a plastic frame used within the power module of Figure 1, with the plastic frame including three separate pieces; Figure 10 schematically illustrates a top perspective view of the three-phase power module of Figure 1, with the three half-bridge structures installed in the plastic frame of Figure 9 where the three separate pieces are joined together; Figure 11 schematically illustrates a top plan view of the three half-bridge structures of Figure 10; Figure 12 schematically illustrates a top perspective view of a heat sink used within the power module of Figure 1; Figure 13 schematically illustrates a top perspective view of three pads of thermal interface material which are placed on the heat sink of Figure 12; Figure 14 schematically illustrates a top perspective view of the three halfbridge structures of Figure 10 which are further placed on the heat sink of Figure 13; Figure 15 schematically illustrates a top perspective view of a plastic lid used within the power module of Figure 1; Figure 16 schematically illustrates a bottom perspective view of the plastic lid of Figure 15; Figure 17 schematically illustrates a top perspective view of the three halfbridge structures of Figure 14 which are further covered by the plastic lid of Figure 15; Figure 18 schematically illustrates a top perspective view of the three halfbridge structures of Figure 17 which are further fixed to the heat sink with screws; Figure 19 schematically illustrates a top perspective view of the three-phase power module of Figure 1 after injecting / potting encapsulant; Figure 20 schematically illustrates a top perspective view of the three-phase power module of Figure 19, with the plastic lid and the screws being invisible; Figure 21 schematically illustrates a top perspective view of the three-phase power module of Figure 19 with DC power terminals being bent by 90°; Figure 22 schematically illustrates a top perspective view of the three-phase power module of Figure 21 while being connected to a DC-link PCB and a driver / control PCB; Figure 23 schematically illustrates a front side view of the three-phase power module, the DC-link PCB and the driver / control PCB of Figure 22; Figure 24 shows processing steps of a method for assembling a power semiconductor module according to an embodiment of the present disclosure. In the figures, like parts are denoted by like reference numerals. It will be appreciated that the drawings are for illustration purposes only and are not drawn to scale. Detailed Description of the Preferred Embodiments The present disclosure will be described in detail with reference to an exemplary three-phase IGBT-based power module as shown in the drawings. Figure 1 shows the topology of the three-phase IGBT-based power module which includes three half-bridge structures. Each half-bridge structure is constructed with a high-side switch and a low-side switch, and each switch is formed by two discrete IGBT devices connected in parallel. This exemplary module is integrated with twelve discrete IGBT devices in total where each discrete device is packaged with one IGBT chip, 11, I2, ... or 112, in anti-parallel with one fast recovery diode (FRD) chip, D1, D2, ... or D12. This exemplary module has nine power terminals, P1, P2, P3, N1, N2, N3, AC1, AC2 and AC3, and thirty-six driver / control signal terminals, G1 to G12, E1 to E12 and C1 to C12 from the twelve discrete IGBT devices. In Figure 1, the IGBT chips may be replaced by Si MOSFET chips or SiC MOSFET chips, and the FRD chips may be replaced by SiC Schottky diode chips. If the body diode of each SiC MOSFET chip is employed as the freewheeling diode, the diode chips, D1, D1, ... and D12, may be omitted. For achieving different power levels, each switch in a half-bridge structure may be formed by one discrete power semiconductor device alone or more than two discrete power semiconductor devices connected in parallel. The physical structures implementing the topology of the exemplary power module of Figure 1 are shown in Figures 2 to 21. Figure 2 is a perspective view of the top of one discrete IGBT device T1 with the TO-247 packaging. The discrete IGBT device T1 is packaged with one IGBT chip 11 and one FRD chip D1 (Figure 1). Figures 3 and 4 are respectively a top perspective view and a bottom perspective view of the discrete IGBT device T1 with the three terminals being bent by 90°. In the discrete IGBT device T1, the emitter of the IGBT chip 11 is internally connected to the anode of FRD chip D1, and the collector of the IGBT chip 11 is internally connected to the cathode of the FRD chip D1, as shown in Figure 1. The IGBT device T1 has a housing 5 with a copper base 4 (which may also be referred to as a metal tab or a metal base) and leads 1 to 3 which are exposed to an exterior of the housing 5. The copper base 4 is formed at a bottom, main, surface of the housing 5 while the leads 1 to 3 extend from a side surface of the housing 5. The leads 1 to 3 are respectively the emitter, collector and gate terminals of the IGBT chip 11. The copper base 4 is thermally and electrically connected to the collector of the IGBT chip 11 and the cathode of the FRD chip D1. Therefore, it may be said that the discrete IGBT device T1 is without internal insulation. The housing 5 may comprise moulded epoxy compound and provides electrical insulation and mechanical support to the chips 11, D1, the leads 1 to 3 and the copper base 4. It would be understood that apart from the discrete IGBT device T1, further discrete IGBT devices T2 to T12 are required to assemble the power module of Figure 1. Each discrete IGBT device Ti is packaged with one IGBT chip li and one FRD chip Di, with i = 2, 3...12, and has a similar structure to the discrete IGBT device T1 as described above. It would also be understood that the leads 1 to 3 of each discrete IGBT device corresponds to Ej, Cj and Gj, with j=1, 2...12, of Figure 1. The IGBT chip in the packaged discrete device may be replaced by a Si MOSFET chip or a SiC MOSFET chip, and the FRD chip may be replaced by SiC Schottky diode chip or be omitted. In addition, the packaged discrete device may have a different type of packaging, such as, the TO-220 packaging. In Figures 3 and 4, the leads 1 to 3 are bent such that the far ends (i.e., the free ends distal to the housing 5) of the leads 1 to 3 point away from a plane along which the copper base 4 extends. More specifically, the far-end sections of the leads 1 to 3 form an angle of approximately 90° with respect to the copper base 4. Figures 5 and 6 are respectively a top perspective view and a bottom perspective view a substrate 10 for use to support some of the packaged discrete devices T1 to T12. In this example, the substrate 10 is an insulated metal substrate (IMS). With reference to Figures 5 and 6, the IMS 10 includes an insulating layer 100, a patterned conductive layer with spaced-apart conductive tracks 101 to 104 formed on a top surface of the insulating layer 100, and a conductive layer 11 (“base metal”) formed on a bottom surface of the insulating layer 100. There are also six near semicircular cutouts 111 to 116 formed in the periphery of the IMS 10. The insulating layer 100 may be 0.05 to 0.25 mm thick resin compound, or other organic-based materials with high electrically insulating strength and high thermal conductivity. The conductive tracks 101 to 104 may have a thickness of 0.05 to 0.5 mm. For example, the conductive tracks 101 to 104 may be 0.1 to 0.2 mm thick pure copper, pure aluminium, copper alloy, aluminium alloy, or other pure metals or alloys with similar thermal, electrical and thermo-mechanical properties. The base metal 11 may be 0.05 mm to several millimeter thick and may be made of a similar metal or alloy to the conductive tracks 101 to 104. Preferably, the base metal 11 is made of pure aluminium or aluminium alloy with light weight and low cost. The IMS 10 may be replaced by other standard / conventional metallized ceramic substrate (MCS), such as direct bonded copper (DBC), direct bonded aluminium (DBA) or active brazed metal (ABM) substrate. The insulating layer 100 may be 0.2 to 1 mm thick alumina (AI2O3), aluminium nitride (AIN) or silicon nitride (SisN^ ceramic tile. The conductive tracks 101 to 104 and the base metal 11 on both sides of the insulating layer 100 may be 0.1 to 1 mm thick pure copper, pure aluminium, copper-molybdenum alloy, copper-tungsten alloy, or other pure metals or alloys with similar thermal, electrical and thermo-mechanical properties. Figure 7 is a perspective view of the top of all the joints and small conductive spacers which are placed on the IMS 10. As shown in Figure 7, four small conductive spacers 21 to 24 are bonded to the IMS 10. In particular, the conductive spacers 21, 22 are bonded to the conductive track 101, and the conductive spacer 23 is bonded to the conductive track 103 while the conductive spacer 24 is bonded to the conductive track 104. Each of the conductive spacers 21 to 24 is typically 3 mm x 2 mm x 2 mm in size. The conductive spacers 21 to 24 may be made of pure copper, pure aluminium, copper-molybdenum alloy, copper-tungsten alloy, or other pure metals or alloys, or metal-matrix composite such as copper-graphite composite and aluminium-carbon fibre composite, or other materials with similar thermal, electrical and thermo-mechanical properties. Joints 301 to 304 and 321 to 330 are formed on the conductive tracks as shown in Figure 7. Joints 311 to 318 are formed at the top and bottom sides of the conductive spacers 21 to 24. Each of the joints is typically 0.02 to 0.1 mm in thickness and may be formed using lead-free solder alloys, such as tin-silver, tin-copper, tin-silver-copper, tin-antimony, bismuth-silver solder alloys. Alternatively, the joints may be formed with sintering technologies, such as silver sintering and copper sintering technologies. It should be noted that all the joints may be formed with the same solder alloy or several solder alloys with different melting points, or combined sintering technology and solder alloys. The lead-free solder joints are preferred for low cost applications where the junction temperatures of the semiconductor chips are in general lower than 150 °C. The sintered silver or copper joints are preferred for high temperature and high reliability applications where the junction temperatures of the semiconductor chips may be higher than 150 °C. Figure 8 is a perspective view of the top of one half-bridge structure 1000, where four discrete IGBT devices T1 to T4 and three power terminals 26 to 28 are bonded on the IMS 10. The leads 1 to 3 of the discrete IGBT devices T1 to T4 are bent upwards away from the IMS 10. In particular, the copper bases 4 of the two devices T1 and T2 are directly bonded to the conductive track 102 using the two joints 301 and 302. In the present disclosure, “directly bonded” means that no other material or structure apart from a small amount of bonding material (e.g., soldering or sintering material such as the joints 301, 302) exist between the directly bonded components. The near end (i.e., an end proximal to the housing 5) of the emitter terminal 1 of the device T1 is bonded on the conductive track 101 with the conductive spacer 21 and two joints 311 and 315 below and above the conductive spacer 21. The near end of the emitter terminal 1 of the device T2 is bonded on the conductive track 101 with the conductive spacer 22 and two joints 312 and 316 below and above the conductive spacer 22. The copper bases 4 of the other two devices T3 and T4 are directly bonded to the conductive track 101 using the two joints 303 and 304. The near end of the emitter terminal 1 of the device T3 is bonded on the conductive track 103, with the conductive spacer 23 and the two joints 313 and 317 below and above the conductive spacer 23. The near end of the emitter terminal 1 of the device T4 is bonded on the conductive track 104, with the conductive spacer 24 and the two joints 314 and 318 below and above the conductive spacer 24. It should be noted that the total thickness of one conductive spacer (e.g., the spacer 21) plus two layers of joints (e.g., 311 and 315) below and above the conductive spacer should be equal to or very close to the difference in the heights between the bottom surface of the near end of the emitter terminal 1 and the bottom surface of the copper base 4 of the discrete IGBT device. Each of the emitter terminals 1 of the discrete IGBT devices T1 to T4 may be considered as including a first section (i.e., the near-end section) which extends generally parallel to the IMS 10 and a second section (i.e., the far-end or free-end section) which extends generally perpendicular to the IMS 10. This arrangement allows the emitter terminal 1 to function as a power terminal as well as a control terminal. The first and second sections are integrally formed as a lead of the discrete IGBT device. Similarly, each of the gate terminals 2 and the control terminals 3 may also be considered as including the first section and the second section. The power terminal 26 is directly bonded to the conductive track 102 with the two small joints 321 and 322. The power terminal 27 is directly bonded to the two conductive tracks 103, and 104 with the four small joints 323 to 326. The power terminal 28 is directly bonded to the conductive track 101 with the four small joints 327 to 330. The power terminal 26 is the DC+ power terminal (labelled as P1 in Figure 1) of the half-bridge structure 1000. The power terminal 27 is the DC- power terminal (labelled as N1 in Figure 1) of the half-bridge structure 1000. The power terminal 28 is the AC power terminal (labelled as AC1 in Figure 1) of the half-bridge structure 1000. Both the power terminals 26 and 27 are cut into three branches at their far ends (i.e., the free ends distal to the IMS 10) to provide good compliance for external connection. Shallow cutouts 260 and 270 may be added on the power terminals 26 and 27 so that the far ends of both terminals can readily be bent after they are installed in a plastic frame (which is described below with reference to Figures 9 and 10). The power terminal 28 comprises a circular hole 280 at its far end to facilitate external connection with a screw. However, the circular hole 280 may be omitted. All the power terminals 26 to 28 may be made of materials similar to those of the conductive spacers 21 to 24 with high thermal conductivity and high electrical conductivity. In the half-bridge module 1000 shown in Figure 8, the conducting path from the DC+ to AC is formed by: terminal 26 -> joints 321 and 322 -> conductive track 102 -> joints 301 and 302 -> copper bases 4s of T1 and T2 -> internal interconnects of T1 and T2 -> IGBT chips 11 and I2 in T1 and T2 -> internal interconnects of T1 and T2 -> near ends of emitter terminals 1s of T1 and T2 joints 315 and 316 » small conductive spacers 21 and 22 -> joints 311 and 312 conductive track 101 -> joints 327 to 330 -> terminal 28. The conductive path from the AC to DC+ is formed by: terminal 28 joints 327 to 330 -> conductive track 101 -> joints 311 and 312 -> small conductive spacers 21 and 22 -> joints 315 and 316» near ends of emitter terminals 1s of T1 and T2 internal interconnects of T1 and T2 -> FRD chips D1 and D2 -> internal interconnects of T1 and T2 -> copper bases 4s of T1 and T2 -> joints 301 and 302 conductive track 102 -> joints 321 and 322 -> terminal 26. The conducting path from the AC to DC- is formed by: terminal 28 -> joints 327 to 330 -> conductive track 101^- joints 303 and 304 -> copper bases 4s of T3 and T4 -> internal interconnects of T3 and T4 -> IGBT chips I3 and I4 in T3 and T4 -> internal interconnects of T3 and T4 near ends of emitter terminals 1s of T3 and T4> joints 317 and 318 -> small conductive spacers 23 and 24 -> joints 313 and 314 conductive tracks 103 and 104 -> joints 323 to 326 -> terminal 27. The conductive path from the DC- to AC is formed by: terminal 27 -> joints 323 to 326 -> conductive tracks 103 and 104 joints 313 and 314 -> small conductive spacers 23 and 24 >joints 317 and 318 -> near ends of emitter terminals 1s of T3 and T4 -> internal interconnects of T3 and T4 -> FRD chips D3 and D4 in T3 and T4 internal interconnects of T3 and T4 -> copper bases 4s of T3 and T4 joints 303 and 304 -> conductive track 101 joints 327 to 330 -> terminal 28. With reference to Figures 9 to 20, the three-phase power module implementing the topology of Figure 1 may be formed by installing three half-bridge structures in a plastic frame, mounting the plastic frame with the half-bridge structures on a heat sink, covering with a plastic lid, fixing with screws and applying encapsulant. Each of the three half bridge structures may be formed in a way similar to the half bridge module 1000 of Figure 8, but the second and third half bridge structures are re-labeled as 2000 and 3000 as shown in Figure 11. The four discrete IGBT devices included within the half-bridge structure 2000 are re-labeled as T5 to T8, and the four discrete IGBT devices in the half-bridge structure 3000 are re-labeled as T9 to T12. In agreement with the terminals shown in Figure 1, the terminals 26s to 28s in the three half-bridge structures are re-labeled as P1, N1 and AC1, P2, N2 and AC2, and P3, N3 and AC3, and the terminals 1s, 2s, and 3s of the twelve discrete IGBT devices are re-labeled as E1, C1 and G1, to E12, C12 and G12. As shown in Figure 9, the plastic frame includes three separate pieces 41 to 43. They may be made of plastic materials which are widely available for power semiconductor packaging applications, such as thermoset allyls, thermoset epoxy and thermoplastic polyester with sufficiently high mechanical strength and high and stable dielectric strength. The pieces 41 to 43 may be manufactured by using molding, casting or other suitable plastic forming and manufacturing processes. Figures 10 and 11 are respectively a top perspective view and a top plan view of the three half-bridge structures 1000, 2000 and 3000 when they are installed in the plastic frame. To install the three half-bridge structures in the plastic frame, the power terminals AC1 to AC3 engage with the piece 41 while the power terminals P1, N1, P2, N2, P3 and N3 engage with the piece 42. The pieces 41 and 42 are then moved towards each other until they form a close contact with each other. Subsequently, the piece 43 is moved downwards to anchor the two small protrusions 411s of piece 41 and the two small protrusions 421s of piece 42 with the two open holes 431s of the piece 43. Once the three half-bridge structures are installed in the plastic frame, the three flatforms 413s of the piece 41 provides mechanical support to the three power terminals AC1 to AC3, and the three flatforms 423s of the piece 42 provides mechanics support to the power terminals P1 to P3. Similarly, the three flatforms 424s of the piece 42 provides mechanics support to the power terminals N1 to N3. The three cutouts 432s of piece 43 may provide passages between the different regions contained by the plastic frame when injecting or potting the encapsulant 80 as shown in Figures 19 and 20. By allowing the plastic frame to have separated pieces 41 to 43 before the assembly of the power module, the power terminals P1 to P3, N1 to N3, AC1 to AC3 may be bonded on the conductive tracks of the insulated substrates 10s before being installed in the plastic frame. This avoids the need of moulding the power terminals into the plastic frame before the bonding process and thus reduces the risk of degradation of the plastic frame during the bonding process. If the substrates 10s used in the three half-bridge structures 1000 to 3000 are replaced with DBC, DBA or ABM substrates, the power terminals P1 to P3, N1 to N3 and AC1 to AC3 may be bonded on the corresponding conductive tracks by ultrasonic welding process (which is typically considered as not suitable for use with IMS). Accordingly, there may be no need to separate the plastic frame into three pieces. Rather, the plastic frame may be of a single-piece structure. All the power terminals AC1 to AC3, P1 to P3 and N1 to N3 may be moulded into the plastic frame, before being bonded on the conductive tracks of the substrates using the ultrasonic welding process. A heat sink 50 is illustrated in Figures 12 and 13. The heat sink 50 is preferably made of pure aluminium or aluminium alloy with light weight and low cost. It may also be made of other pure metal such as pure copper, or alloy such as coppermolybdenum alloy and copper-tungsten alloy, or metal-matrix composite such as copper-graphite composite, aluminium-silicon carbide composite and aluminium-carbon fibre composite, or other materials with high thermal conductivity. It may contain cooling-enhanced features such as pin fins, micro-channels and be manufactured by using casting, machining or other metalworking processes, and welding, brazing or other bonding technologies. The hole 510 on one side of the heat sink 50 may be used as the inlet or outlet of coolant. Depending on the specified structure of cooling channels in the heat sink and the installing space for the heat sink, another hole may be formed at the same side or a different side of the heat sink 50 to be used as the outlet or inlet of coolant. Twelve blind holes, 500s are formed at the top surface 501 of the heat sink 50. The blind holes 500s are machined with internal threads for engaging with screws 71s (Figure 18). The substrates 10s of the three half-bridge structures 1000 to 3000 are thermally coupled to the heat sink 50. Thermal interface materials (TIMs) 61 to 63 are inserted between the base metals 11s of the substrates 10s and the top surface 501 of the heat sink 50. The TIMs 61 to 63 may comprise thermal grease with a thickness of 0.05 to 0.2 mm, graphite sheets with a thickness of 0.2 to 1 mm, or any other suitable TIM sheets, films, or pastes with high thermal conductivity and thermal stability. Alternatively, these TIMs 61 to 63 may be replaced by 0.05 to 0.5 mm thick joints which may be formed using lead-free solder alloys, such as tin-silver, tin-copper, tin-silver-copper, tin-antimony, bismuth-silver solder alloys, or using sintering technologies, such as silver sintering and copper sintering technologies. Figure 14 is a perspective view of the top of the three half-bridge structures when they are installed in the plastic frame and then placed on the heat sink 50. A plastic lid 45 covering the three half-bridge structures 1000 to 3000 is illustrated in Figures 15 and 16. The plastic lid 45 may be made of the same plastic material(s) as that of the plastic frame, such as thermoset allyls, thermoset epoxy and thermoplastic polyester with sufficiently high mechanical strength and high and stable dielectric strength, and may be manufactured by using molding, casting or other suitable plastic forming and manufacturing processes. As shown in Figures 15 and 16, there are twelve protrusions 441s and three protrusions 442s formed on a bottom surface of the plastic lid 45. There are twelve open holes 450s, two open holes 451s, thirty-six open holes 452s, and two open holes 453s which extend through the plastic lid 45. Figure 17 is a perspective view of the top of the three half-bridge structures 1000 to 3000 when they are further covered by the plastic lid 45. To cover the three half-bridge structures with the plastic lid 45, the two cross protrusions 412 and 422 (also shown in Fig.9) formed on the plastic frame pass through the two open holes 451s so as to align the plastic lid 45 with the plastic frame and the three half-bridge structures. The plastic lid 45 is moved downwards until the twelve protrusions 441s (Fig. 16) at its bottom surface are in contact with the top surfaces of the twelve discrete IGBT devices T1 to T12, and until the three protrusions 442s are in contact with the three power terminals AC1 to AC3. Simultaneously, the terminals E1 to E12, C1 to C12 and G1 to G12 of the three half-bridge structures pass through the thirty-six open holes 452s of the plastic lid 45. With reference to Figure 15, the plastic lid 45 includes cylindrical protrusions 462s formed on its top surface. Each of the cylindrical protrusions 462s comprises a cylindrical wall surrounding a through-hole 452 into which a corresponding one of the driver / control terminals E1-E12, C1-C12 and G1-G12 is inserted. The cylindrical wall surrounds the corresponding driver / control terminal, thereby increasing the creepage distances between the adjacent driver / control terminals. Figure 18 is a top perspective view when the three half-bridge structures 1000 to 3000, the plastic lid 45 and the plastic frame are fastened to the heat sink 50 by twelve screws 71. The screws 71 pass through the open holes 450s (Figure 15) of the plastic lid 45, the open holes 410s 420s, 430s and 431s (Figure 9) of the plastic frame and the near semicircular cutouts 111s to 116s (Figure 7) of the substrate 10s. The heads of the twelve screws 71 are contained and constrained by holes 460s (Figure 18) of the plastic lid 45 and their thread ends are tightened in the blind holes 500s of the heat sink 50. The holes 460 are immediately above the open holes 450 and have a larger diameter than the open holes 450. The six near semicircular cutouts 111 to 116 may be omitted. The use of the screws 71 allows the pressure applied by the plastic lid 45, through the half-bridge structures 1000-3000 and the substrates 10s, to the heat sink 50 to be controllable by adjusting a depth of the screws 71 within the blind holes 500s of the heat sink 50. To this sense, the screws 71 may also be referred to as a “pressure controller”. With the pressure applied from the plastic lid 45 to the heat sink 50, the protrusions 441s (Figure 16) under the plastic lid 45 are in contact with the top surfaces of the discrete IGBT devices T1 to T12 and also apply a pressure to the discrete IGBT devices T1 to T12. The pressure applied achieves not only good thermal contacts between the TIMs 61 to 63 and the top surface 501 of the heat sink 50, and between the TIMs 61 to 63 and the base metal layers 11s of the substrate 10s, but also generate additional compressive stresses on the joints 301s to 304s (Figure 7) and hence improve the reliability of the joints 301s to 304s. As described above, the joints 301s to 304s are for bonding / attaching all the discrete IGBT devices T1 to T12 to the substrate 10s. Similarly, the protrusions 442s apply a pressure to the three power terminals AC1 to AC3 when the plastic lid 45 is fastened to the heat sink 50 by the screws 71. The protrusions 441s and 442s may also be referred to as “pressure applicator”. With reference to Figure 17, a rib network 461 is formed on the top surface of the plastic lid 45 to increase the stiffness of the plastic lid 45, thereby improving the transfer of pressure to the protrusions 441s. In addition, to improve the uniformity of pressure distributed among the discrete IGBT devices T1 to T12, the protrusions 441s under the plastic lid 45 may be replaced with compliant components made of mechanically compliant and thermally stable materials. The compliant components may be silicone rubber pads or compliant pads made of other materials with similar mechanical properties and thermal stability, or Belleville washers. After applying the screws 71, silicone gel may be injected or potted as encapsulant 80 to fill the gaps between the substrates 10s, the plastic frame 41 to 43 and the lid 45 so as to provide good insulation between the conductive tracks and the terminals. One of the two through holes 453s (Figure 18) in the plastic lid 45 may be used as inlet for injecting or potting the silicone gel, and the other may be used as outlet for releasing air. Silicone gel may also be potted into all the holes 460s (Figure 18) of the plastic lid 45 over the screws 71 so as to insulate the screws 71 from the power / control terminals. The encapsulant over the screws 71 are labelled as 81s in Figure 19. Figure 19 is a top perspective view of the three-phase power module after injecting / potting encapsulant 80 and 81s. Figure 20 is a top perspective view of the three-phase power module but with the plastic lid 45 and the twelve screws 71s being invisible. It can be seen from Figure 20 that the encapsulant 80 has filled the gaps between the substrates 10s and the lid 45. If the substrates 10s in the three half-bridge structures 1000 to 3000 are replaced by DBC, DBA or ABM substrates, and / or the TIMs 61 to 63 between the substrates 10s and the heat sink 50 are replaced by Pb-free solder joints or sintered Ag or Cu joints, the silicone gel for the encapsulant 80 may be replaced with moulding compound alone or a mixture of moulding compound and silicone gel. The moulding compound may be epoxy, other polymer based materials, or inorganic materials with high insulating strength. The moulding compound may be injected or potted to fill all the gaps or the bottom gaps of 1 to 2 mm in height to provide good insulation and mechanical support to all the discrete IGBT devices and all the power terminals bonded on the substrates 10s. Then if applicable silicone gel may be injected or potted to fill the rest of the gaps above the epoxy compound. If moulding compound is used for the encapsulant 80, the layouts and numbers of all the screws and the relevant holes on the heat sink 50, the plastic frame 41 to 43 and the lid 45 may be suitably modified. This is because moulding compound is stiffer than silicone gel and the use of moulding compound as a part or the whole of the encapsulant 80 improves the mechanical strength of the power module. Figure 21 is a top perspective view of the finally formed three-phase power module. As compared to Figure 19, the DC power terminals P1 to P3 and N1 to N3 of the three-phase power module are bent by 90° and point upwards. Figures 22 and 23 show an assembly in which the three-phase power module is connected to a DC-link PCB 4000 and a driver / control PCB 5000. As shown in Figures 22 and 23, after bending the six power terminals P1 to P3 and N1 to N3 upwards, the far ends of the six terminals may be soldered and connected to the DC-link PCB 4000, on which the Delink capacitors 90s are mounted and electrically connected between each of the DC positive terminals P1 to P3 and respective ones of the DC negative terminals N1 to N3. As described above, the power terminals P1 to P3 and N1 to N3 are cut into several branches at their far ends to provide good compliance for external connection. More specifically, the branches can reduce the thermo-mechanical stress and strain development in the joints (e.g., 321 to 326 of Figure 7) which bond these terminals to the conductive tracks of the substrates 10s, after connecting these terminals to the DC-link PCB 4000. Furthermore, the branched far ends of these power terminals can directly be soldered and connected to the conductive tracks of the DC-link PCB 4000, without the need of any additional delicate connector. For example, the DC-link PCB 4000 may comprise apertures which selectively form electrical connections to the DC-link capacitors 90s, and the branched far ends of the power terminals P1 to P3 and N1 to N3 may be inserted into the apertures so as to connect to the DC-link capacitors 90s. The driver / control PCB 5000 overlies the three-phase power module and extends along a plane which is generally parallel to the substrates 10s and / or the heat sink 50. The two cross protrusions 412 and 422 (Figure 9) formed on the plastic frame may also be used to align the driver / control PCB 5000 with the three-phase power module. The cylindrical protrusions 463s, 464s and 465s (Figure 15) formed on the plastic lid 45 may be used to support the driver / control PCB 5000 and to fix the driver / control PCB 5000 to the three-phase power module. The thirty-six control terminals (E1, C1 and G1 to E12, C12 and G12), which protrude from the plastic lid 45, may be soldered and connected to corresponding through holes formed in the driver / control PCB 5000. While it is not shown in Figures 22 and 23, it would be understood that the driver / control PCB 5000 includes control circuitry mounted thereon. The control circuitry controls an operation of the three-phase power module by using the thirty-six control terminals. More specifically, the control terminals E1 to E12 and G1 to G12 may be used for controlling the power current flowing between the collector and emitter terminals of the discrete IGBT devices T1 to T12 (i.e., switching on and off the discrete IGBT devices T1 to T12). The control terminals C1 to C12 and E1 to E12 may be used in automotive applications for monitoring voltage drops across the collector and emitter terminals of the discrete IGBT devices T1 to T12. The monitored voltage drops may be used for safety management. The half-bridge structures 1000 to 3000 are positioned between the substrates 10s and the driver / control PCB 5000. As described above, the power circuit of the halfbridge structures 1000 to 3000 is interconnected through conductive spacers 21 to 24 and the conductive tracks of the substrates 10s which are closely in contact with the heat sink 50. The driver / control terminals E1 to E12, G1 to G12 and C1 to C12 of the half-bridge structures 1000 to 3000 are connected to the conductive tracks of the driver / control PCB 5000 which are separated from the conductive tracks of the substrates 10s. The driver / control signals flow in the conductive tracks of the driver / control PCB 5000, and thus are separated from the power currents flowing in the conductive tracks of the substrates 10s. The driver / control signals does neither share nor cross any plane where the power currents flow. Therefore, the three-phase power module according to the present disclosure has separated the driver / control circuit from the power circuit as much as possible. Further, the plastic lid 45 is placed between the driver / control PCB 5000 and the substrates 10s, and further enhances the insulation and / or separation between the power circuit and the driver / control circuit. In some prior power modules or assemblies, the high power current and low power driver / control signals of the power devices flow on the same plane of a substrate, or the driver / control signals flow cross the plane where the high power current flows. The three-phase power module therefore has an improved separation of the driver / control circuit from the power circuit as compared to those prior power modules. In the three-phase power module of the present disclosure, the packaged discrete power devices T1 to T12 are directly bonded to the conductive tracks of the insulated substrates 10s (e.g., by either Pb-free solder joints or sintered Ag or Cu joints). The insulated substrates 10s are then pressed against the heat sink 50 (by the screws 71 and the lid 45) with only one layer of TIM 61 to 63 in-between. In some prior power modules, packaged discrete power devices without internal insulation are pressed against a heat sink with one layer of insulating ceramic and two layers of TIM placed between the packaged discrete power devices and the heat sink. In another prior power module, packaged discrete power devices are mounted in a two-layer PCB which is then pressure-mounted on a heat sink with a flat thermal pad which provides the insulation and has the limited ability to transfer and remove the heat. As compared to those prior power modules, the three-phase power module of the present disclosure has a reduced thermal resistance from junction to heat sink. This is because in general the TIM especially thermal grease has the lowest thermal conductivity among all the materials used to construct the power modules. Therefore, the presence of a single layer of TIM 61 to 63 is beneficial for minimizing the thermal resistance from junction to heat sink. Alternatively, the insulated substrates 10s may be directly bonded to a surface the heat sink with Pb-free solder joints or sintered Ag or Cu joints, and the thermal resistance from junction to heat sink can be reduced even further. In the three-phase power module of the present disclosure, the copper base 4 (i.e., the collector terminal) of each packaged discrete IGBT device is directly bonded to a conductive track of the substrate 10 with one solder joint or sintered joint. Further, the emitter terminal 1 of each packaged discrete IGBT device is attached to another conductive track of the substrate 10 through one small conductive spacer and two solder joints or sintered joints below and above the small conductive spacer. All other connections to form the power circuit of the half bridge structure are provided by the patterned conductive tracks of the substrate 10. The heat generated on the conductive tracks of the substrate 10 can be effectively removed by the heat sink 50. Therefore, the three-phase power module of the present disclosure has an improved cooling performance. In some prior power modules, the power terminals of different discrete devices are interconnected with either power PCBs by thick and wide copper tracks or thick and wide copper busbars, while the power PCBs and copper busbars are arranged away from a heat sink. As compared to those power modules, the consumption of copper to form the patterned conductive tracks of the substrate 10 can be remarkably reduced while achieving the same thermal performance. In some other prior power modules, all the power and driver / control terminals of the packaged discrete power devices are bonded on the same insulated substrate, and additional connectors are used to connect the driver / control terminals of the power devices to conductive tracks of a driver / control PCB. As compared to those power modules, the power module of the present disclosure has eliminated the use of those additional connectors and thus can be made with reduced costs. The above detailed description of the physical structure and method to construct the three-phase power module may readily be extended to one-phase, two-phase and more than three-phase half-bridge structures or the power semiconductor modules with other topologies. In addition, the power module of the present disclosure may be implemented with the following alternatives while still achieving part or all the benefits: One alternative may be the replacement of the screws 71 plus the plastic lid 45 with clips to apply the pressure on the packaged discrete power devices which are attached on the insulated substrates. In this case, the clips may require additional space to be fixed and hence the insulated substrates may be somewhat enlarged in order to accommodate the same number of packaged discrete power devices. The second alternative may be the replacement of the liquid-based heat sink 50 with an air-based heat sink, although the use of air-based heat sink may cause the thermal resistance from junction to ambient to be somewhat increased. The third alternative may be the replacement of the insulated substrates 10s with conventional PCBs. However, the use of conventional PCBs may cause the thermal resistance of the power devices from junction to heat sink to be increased because the insulating layer FR4 used in the conventional PCBs are thicker and has thermal conductivity much lower than the insulating layers in the IMS and / or the ceramic layers in the DBA, DBC and AMB substrates. Further, the packaged discrete power devices T1 to T12 may include a gatecontrol chip (e.g., IGBT) only, without any diode. In that case, packaged discrete power diodes would be required to implement the half-bridge structure. The use of packaged discrete power diodes may cause the patterned conductive layer of the substrates 10s to be more complicated and / or cause the substrates 10s to have a greater size, and the skilled person would suitably modify the patterned conductive layer so as to form the half-bridge structure. Further still, the packaged discrete power devices T1 to T12 may include an extra auxiliary emitter terminal, and thus have four leads in total (as compared to three leads shown in Figures 2 to 4). The auxiliary emitter terminal may be bent upwards to protrude from the lid 45 so as to connect to the driver / control PCB 5000. The emitter terminal 1 may function as a power terminal only. Thus, it would not be necessary to bend a far end of the existing emitter terminal 1 upwards as shown in Figure 8. Further, the conductive spacers 21 to 24 may be omitted. This is because the emitter terminal 1 is only required to connect to a corresponding conductive track of the substrate and this connection may be achieved by bending the far end of the existing emitter terminal 1 toward the substrate 10 without requiring any spacer. Figure 24 schematically illustrates processing steps of a method for assembling a power semiconductor module (e.g., the power module shown in Figure 21). At step S1, a high-side device (e.g., the discrete IGBT devices T1, T2) and a low-side device (e.g., the discrete IGBT T3, T4) of a half-bridge structure (e.g., the half bridge structure 1000) are mounted on a patterned electrically conductive layer of a substrate (e.g., the substrate 10). The substrate comprises an electrically insulating layer (e.g., the insulating layer 100) and the patterned electrically conductive layer is arranged on a surface of the electrically insulating layer. Each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device comprising a high-side terminal (e.g., the metal base 4), a low-side terminal (e.g., the emitter terminal 1) and at least one control terminal (e.g., the control terminals 2 and 3) for controlling an operation of the packaged discrete power semiconductor device. At step S2, a plurality of power terminals (e.g., the power terminals 26 to 28 or P1, N1, AC1) are directly bonded to the patterned electrically conductive layer of the substrate. The plurality of power terminals comprises a DC positive terminal (e.g., the power terminal 26 or P1), a DC negative terminal (e.g., the power terminal 27 or N1) and an AC terminal (e.g., the power terminal 28 or AC1). The patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks (e.g., the conductive tracks 101 to 104) which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure. At step S3, the high-side device, the low-side device and at least a part of the plurality of power terminals are covered by a housing (e.g., the plastic frame 41 to 43 and the plastic lid 45). The housing comprises an electrically insulating material. The at least one control terminal of the packaged discrete power semiconductor device extends away from the substrate and protrude from the housing. It would be appreciated that steps S1 to S3 may take place in a sequence different from the sequence of description. For example, step S2 may take place before or simultaneously with step S1. The terms “having”, “containing”, “including”, “comprising” and the like are open and the terms indicate the presence of stated structures, elements or features but not preclude the presence of additional elements or features. The articles “a”, “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise. The skilled person will understand that in the preceding description and appended claims, positional terms such as ‘top’, ‘bottom’, ‘upwards’, ‘downwards’ and ‘side’ etc. are made with reference to conceptual illustrations of a power semiconductor module, such as that shown in the appended drawings. These terms are used for ease of reference but are not intended to be of limiting nature. These terms are therefore to be understood as referring to a power semiconductor module when in an orientation as shown in the accompanying drawings. Although the disclosure has been described in terms of preferred embodiments as set forth above, it should be understood that these embodiments are illustrative only 5 and that the claims are not limited to those embodiments. Those skilled in the art will be able to make modifications and alternatives in view of the disclosure which are contemplated as falling within the scope of the appended claims. Each feature disclosed or illustrated in the present specification may be incorporated in the disclosure, whether alone or in any appropriate combination with any other feature 10 disclosed or illustrated herein.

Claims

1. A power semiconductor module comprising:a substrate comprising an electrically insulating layer and a patterned electrically conductive layer arranged on a surface of the electrically insulating layer;a plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal;a half-bridge structure comprising a high-side device and a low-side device connected between the DC positive terminal and the DC negative terminal, wherein the AC terminal is connected between the high-side device and the low-side device; anda housing comprising an electrically insulating material, wherein the high-side device and the low-side device are at least partially enclosed by the housing;wherein:each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device which is mounted on the patterned electrically conductive layer, wherein each packaged discrete power semiconductor device comprises a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device, and the at least one control terminal extends away from the substrate and protrude from the housing;the plurality of power terminals are directly bonded to the patterned electrically conductive layer; andthe patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure.

2. The power semiconductor module of claim 1, wherein each packaged discrete power semiconductor device comprises a metal base and a plurality of leads, and the metal base is directly bonded to the patterned electrically conductive layer.

3. The power semiconductor module of claim 2, wherein:the metal base functions as the high-side terminal of the respective packaged discrete power semiconductor device.

4. The power semiconductor module of claim 2 or 3, wherein the plurality of leads comprises a power lead functioning as the low-side terminal of the respective packaged discrete power semiconductor device and at least one control lead functioning as the at least one control terminal.

5. The power semiconductor module of claim 4, wherein:the power lead comprises a first section and a second section;the first section is arranged between a housing of the respective packaged discrete power semiconductor device and the second section, and the second section extends away from the substrate and protrudes from the housing;the power semiconductor module further comprises a conductive spacer bonded between the first section and the patterned electrically conductive layer, and the first section is electrically connected to the patterned electrically conductive layer by the conductive spacer.

6. The power semiconductor module of claim 5, wherein the second section extends along a direction that is perpendicular to the surface of the electrically insulating layer.

7. The power semiconductor module of any preceding claim as dependent from claims 2 and 3, wherein:the plurality of spaced-apart conductive tracks comprises first to third conductive tracks;the metal base of the high-side device is directly mounted on the first conductive track which is electrically connected to the DC positive terminal;the metal base of the low-side device is directly bonded to the second conductive track which is electrically connected to the AC terminal and the power lead of the high-side device; andthe power lead of the low-side device is electrically connected to the third conductive track which is electrically connected to the DC negative terminal.

8. The power semiconductor module of claim 7, wherein the DC positive terminal is directly bonded to the first conductive track, the AC terminal is directly bonded to the second conductive track, and the DC negative terminal is directly bonded to the third conductive track.

9. The power semiconductor module of claim 7 or 8 as dependent from claim 5, further comprising: a first conductive spacer bonded between the first section of the power lead of the high-side device and the second conductive track, and a second conductive spacer bonded between the first section of the power lead of the low-side device and the third conductive track.

10. The power semiconductor module of any preceding claim, wherein a far end section of the at least one control terminal extends along a direction that is generally perpendicular to the surface of the electrically insulating layer.

11. The power semiconductor module of any preceding claim, wherein the at least one control terminal comprises a gate terminal for controlling a current flowing between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device.

12. The power semiconductor module of any preceding claim, wherein the at least one control terminal comprises an auxiliary high-side terminal for sensing a voltage at the high-side terminal of the packaged discrete power semiconductor device.

13. The power semiconductor module of claim 12 as dependent from claim 5, wherein the auxiliary high-side terminal and the second section of the power lead are for sensing a voltage drop between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device.

14. The power semiconductor module of any preceding claim, wherein the packaged discrete power semiconductor device comprises a gate-controlled power semiconductor chip.

15. The power semiconductor module of any preceding claim, wherein the packaged discrete power semiconductor device is of TO-247 packaging or TO-220 packaging.

16. The power semiconductor module of any preceding claim, wherein at least one of the DC positive terminal and the DC negative terminal comprises a plurality of branches which are separated at a far end of the respective power terminal.

17. The power semiconductor module of any preceding claim, wherein the housing comprises a frame which surrounds a periphery of the half-bridge structure and a lid which is supported by the frame and overlies the half-bridge structure.

18. The power semiconductor module of claim 17, further comprising a plurality of pressure applicators arranged between the lid and the half-bridge structure, wherein at least some of the plurality of pressure applicators are configured to apply a pressure to the packaged discrete power semiconductor devices.

19. The power semiconductor module of claim 18, wherein at least one of the plurality of pressure applicators is configured to apply a pressure to at least one of the plurality of power terminals.

20. The power semiconductor module of any preceding claim, further comprising: a heat removal body thermally coupled to the electrically insulating layer of the substrate.

21. The power semiconductor module of claim 20 as dependent from claim 17, further comprising: a pressure controller which is configured to control a pressure applied by the lid, through the half-bridge structure and the substrate, to the heat removal body.

22. The power semiconductor module of any preceding claim, wherein the halfbridge structure is a first half-bridge structure, and the power semiconductor module further comprises a second half-bridge structure and a third half-bridge structure.

23. An assembly, comprising:the power semiconductor module of any preceding claim; anda control circuit board to which the at least one control terminal is attached, wherein the control circuit board comprises control circuitry for controlling an operation of the half-bridge structure by using the at least one control terminal.

24. The assembly of claim 23, further comprising: a DC-link circuit board to which the DC positive terminal and the DC negative terminal are attached, wherein the DC-link circuit board comprises at least one DC-link capacitor which is electrically connected between the DC positive power terminal and the DC negative power terminal.

25. A method of assembling a power semiconductor module, comprising:mounting a high-side device and a low-side device of a half-bridge structure on a patterned electrically conductive layer of a substrate, wherein the substrate comprises an electrically insulating layer and the patterned electrically conductive layer is arranged on a surface of the electrically insulating layer, and wherein each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device comprising a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device;directly bonding a plurality of power terminals to the patterned electrically conductive layer of the substrate, wherein the plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal, and wherein the patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure; andcovering the high-side device, the low-side device and at least a part of the plurality of power terminals by a housing, wherein the housing comprises an electrically insulating material, wherein the at least one control terminal of the packaged discrete power semiconductor device extends away from the substrate and protrude from the housing.AMENDMENTS TO THE CLAIMS HAVE BEEN FILED AS FOLLOWS:33CLAIMS:03 03 251. A power semiconductor module comprising:a substrate comprising an electrically insulating layer and a patterned electrically conductive layer arranged on a surface of the electrically insulating layer;a plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal;a half-bridge structure comprising a high-side device and a low-side device connected between the DC positive terminal and the DC negative terminal, wherein the AC terminal is connected between the high-side device and the low-side device; anda housing comprising an electrically insulating material, wherein the high-side device and the low-side device are at least partially enclosed by the housing;wherein:each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device which is mounted on the patterned electrically conductive layer, wherein each packaged discrete power semiconductor device comprises a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device, and the at least one control terminal extends away from the substrate and protrude from the housing;the plurality of power terminals are directly bonded to the patterned electrically conductive layer;the patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure;each packaged discrete power semiconductor device comprises a metal base and a plurality of leads, the metal base is directly bonded to the patterned electrically conductive layer, and the plurality of leads comprises a power lead functioning as the low-side terminal of the respective packaged discrete power semiconductor device and at least one control lead functioning as the at least one control terminal; andthe power lead comprises a first section and a second section; the first section is arranged between a housing of the respective packaged discrete power semiconductor device and the second section, and the second section extends away from the substrate and protrudes from the housing; and the power semiconductor03 03 25module further comprises a conductive spacer bonded between the first section and the patterned electrically conductive layer, and the first section is electrically connected to the patterned electrically conductive layer by the conductive spacer.5 2. The power semiconductor module of claim 1, wherein:the metal base functions as the high-side terminal of the respective packaged discrete power semiconductor device.

3. The power semiconductor module of claim 1 or 2, wherein the second section 10 extends along a direction that is perpendicular to the surface of the electrically insulating layer.

4. The power semiconductor module of any preceding claim as dependent from claim 2, wherein:15 the plurality of spaced-apart conductive tracks comprises first to thirdconductive tracks;the metal base of the high-side device is directly mounted on the first conductive track which is electrically connected to the DC positive terminal;the metal base of the low-side device is directly bonded to the second20 conductive track which is electrically connected to the AC terminal and the power lead of the high-side device; andthe power lead of the low-side device is electrically connected to the third conductive track which is electrically connected to the DC negative terminal.25 5. The power semiconductor module of claim 4, wherein the DC positive terminalis directly bonded to the first conductive track, the AC terminal is directly bonded to the second conductive track, and the DC negative terminal is directly bonded to the third conductive track.30 6. The power semiconductor module of claim 4 or 5, further comprising: a firstconductive spacer bonded between the first section of the power lead of the high-side device and the second conductive track, and a second conductive spacer bonded between the first section of the power lead of the low-side device and the third conductive track.3503 03 257. The power semiconductor module of any preceding claim, wherein a far end section of the at least one control terminal extends along a direction that is generally perpendicular to the surface of the electrically insulating layer.5 8. The power semiconductor module of any preceding claim, wherein the at leastone control terminal comprises a gate terminal for controlling a current flowing between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device.10 9. The power semiconductor module of any preceding claim, wherein the at leastone control terminal comprises an auxiliary high-side terminal for sensing a voltage at the high-side terminal of the packaged discrete power semiconductor device.

10. The power semiconductor module of claim 9, wherein the auxiliary high-side 15 terminal and the second section of the power lead are for sensing a voltage drop between the high-side terminal and the low-side terminal of the packaged discrete power semiconductor device.

11. The power semiconductor module of any preceding claim, wherein the 20 packaged discrete power semiconductor device comprises a gate-controlled power semiconductor chip.

12. The power semiconductor module of any preceding claim, wherein the packaged discrete power semiconductor device is of TO-247 packaging or TO-220 25 packaging.

13. The power semiconductor module of any preceding claim, wherein at least one of the DC positive terminal and the DC negative terminal comprises a plurality of branches which are separated at a far end of the respective power terminal.3014. The power semiconductor module of any preceding claim, wherein the housing comprises a frame which surrounds a periphery of the half-bridge structure and a lid which is supported by the frame and overlies the half-bridge structure.03 03 2515. The power semiconductor module of claim 14, further comprising a plurality of pressure applicators arranged between the lid and the half-bridge structure, wherein at least some of the plurality of pressure applicators are configured to apply a pressure to the packaged discrete power semiconductor devices.

516. The power semiconductor module of claim 15, wherein at least one of the plurality of pressure applicators is configured to apply a pressure to at least one of the plurality of power terminals.10 17. The power semiconductor module of any preceding claim, further comprising: aheat removal body thermally coupled to the electrically insulating layer of the substrate.

18. The power semiconductor module of claim 17 as dependent from claim 14, further comprising: a pressure controller which is configured to control a pressure 15 applied by the lid, through the half-bridge structure and the substrate, to the heat removal body.

19. The power semiconductor module of any preceding claim, wherein the halfbridge structure is a first half-bridge structure, and the power semiconductor module 20 further comprises a second half-bridge structure and a third half-bridge structure.

20. An assembly, comprising:the power semiconductor module of any preceding claim; anda control circuit board to which the at least one control terminal is attached, 25 wherein the control circuit board comprises control circuitry for controlling an operation of the half-bridge structure by using the at least one control terminal.

21. The assembly of claim 20, further comprising: a DC-link circuit board to which the DC positive terminal and the DC negative terminal are attached, wherein the DC-30 link circuit board comprises at least one DC-link capacitor which is electrically connected between the DC positive power terminal and the DC negative power terminal.

22. A method of assembling a power semiconductor module, comprising:03 03 25mounting a high-side device and a low-side device of a half-bridge structure on a patterned electrically conductive layer of a substrate, wherein the substrate comprises an electrically insulating layer and the patterned electrically conductive layer is arranged on a surface of the electrically insulating layer, and wherein each of the high-side device and the low-side device comprises a packaged discrete power semiconductor device comprising a high-side terminal, a low-side terminal and at least one control terminal for controlling an operation of the packaged discrete power semiconductor device;directly bonding a plurality of power terminals to the patterned electrically conductive layer of the substrate, wherein the plurality of power terminals comprising a DC positive terminal, a DC negative terminal and an AC terminal, and wherein the patterned electrically conductive layer comprises a plurality of spaced-apart conductive tracks which provide electrical connections amongst the high-side and low-side terminals of the packaged discrete power semiconductor devices and the plurality of power terminals, thereby forming the half-bridge structure; andcovering the high-side device, the low-side device and at least a part of the plurality of power terminals by a housing, wherein the housing comprises an electrically insulating material, wherein the at least one control terminal of the packaged discrete power semiconductor device extends away from the substrate and protrude from the housing; wherein:each packaged discrete power semiconductor device comprises a metal base and a plurality of leads, the metal base is directly bonded to the patterned electrically conductive layer, and the plurality of leads comprises a power lead functioning as the low-side terminal of the respective packaged discrete power semiconductor device and at least one control lead functioning as the at least one control terminal; andthe power lead comprises a first section and a second section; the first section is arranged between a housing of the respective packaged discrete power semiconductor device and the second section, and the second section extends away from the substrate and protrudes from the housing; and the power semiconductor module further comprises a conductive spacer bonded between the first section and the patterned electrically conductive layer, and the first section is electrically connected to the patterned electrically conductive layer by the conductive spacer.

Images