Semiconductor structures

Abstract

A semiconductor structure 100 (e.g., a microLED grown epitaxially using MOCVD or MBE) comprising substrate 110 further comprising a group IV element such as Ge, nucleation layer 102 over the substrate

Description

Technical field The present application relates to a semiconductor structure. The present application also relates to a semiconductor device, an electronic device and a method for forming a semiconductor structure. Background Light emitting diodes (LEDs) have found use in many applications. Their improved attributes over incandescent light sources in areas such as efficiency, size and brightness have contributed to their widespread use. Increasingly, there is a desire to shrink the size of LEDs even further and form a new class of LEDs known as MicroLEDs. MicroLEDs typically comprise a diameter of 100 pm or less. However, in some examples, microLEDs can comprise a diameter of 10 pm or less. There is great interest in microLEDs because their smaller size, compared to conventional LEDs, leads to a greater number of emitters per pixel with increased brightness, contrast, colour gamut and efficiency. These attributes are particularly desirable for display systems in smaller battery-powered electronic devices including smartwatches or other wearable technology, as well as virtual reality (VR) or augmented reality (AR) headsets. Conceptually, microLEDs displays are formed in a similar manner to conventional LED displays. Initially, semiconductor layers, typically lll-V semiconductor layers, are epitaxially formed on a substrate to form a semiconductor wafer. The semiconductor layers include an active region, which dictates the emission wavelength. The semiconductor layers are then patterned and etched to form the microLED structure and contacts. The semiconductor wafer thus comprises many individual microLEDs arranged on the wafer. The wafer is subsequently bonded to driving circuitry, commonly formed using Si components. The driving circuitry can control induvial microLEDs to light up to thereby control the display. Although microLEDs can be fabricated in a similar manner to conventional LEDs, their smaller size leads to greater fabrication challenges, which are yet to be resolved. Summary It is an object of the disclosure to obviate or eliminate at least some of the abovedescribed disadvantages associated with existing techniques. According to a first aspect there is provided a semiconductor structure comprising: a substrate; a nucleation layer over the substrate; a buffer layer comprising P over the nucleation layer; and one or more semiconductor layers over the buffer layer. In some examples, the buffer layer comprises a disordered crystal structure. In some examples, an atomic order parameter is given by the equation q = VAEo / 471 meV; and wherein the buffer layer comprises q <0.4. In some examples, the buffer layer comprises a first set of 11 l-V semiconductor elements. In some examples, the nucleation layer comprises the first set of 11l-V semiconductor elements. In some examples, the buffer layer comprises InGaP. In some examples, the substrate comprises a group IV element. In some examples, the group IV element comprises Ge. In some examples, the one or more semiconductor layers comprise a lll-V semiconductor comprising a group III element comprising one or more of Al, In or Ga and a group V element comprising P. In some examples, the one or more semiconductor layers comprise an active layer. In some examples, the active layer comprises a quantum well. In some examples, the quantum well comprises InGaP. In some examples, the active layer is configured to emit light comprising a peak wavelength between 610-670 nm. In some examples, the one or more semiconductor layers comprise: a first cladding layer; the active layer over the first cladding layer; and a second cladding layer over the active layer. In some examples, the nucleation layer is lattice matched with the substrate. According to a second aspect there is provided a semiconductor device comprising the semiconductor structure according to the first aspect. According to a third aspect there is provided an electronic device comprising the semiconductor device according to the second aspect. According to a fourth aspect there is provided a method of forming a semiconductor structure comprising: forming a nucleation layer over a substrate; forming a buffer layer comprising P over the nucleation layer; and forming one or more semiconductor layers over the buffer layer. In some examples, the method comprises forming the buffer layer at a growth rate of 1.2 pm / hr or less. In some examples, the method comprises forming the buffer layer at a V / l 11 ratio greater than 230. In some examples, the method comprises forming the buffer layer at a temperature of less than 670 °C. In some examples, the method comprises forming the nucleation layer at a first pressure and forming the buffer layer at a second pressure; wherein the first pressure is greater than the second pressure. In some examples, the method comprises flowing Ga and P containing gases at a surface of the buffer layer. In some examples, the method comprises the buffer layer comprises a disordered crystal structure. In some examples, an atomic order parameter is given by the equation q = VAEo / 471 meV; and wherein the buffer layer comprises q <0.4. In some examples, the buffer layer comprises InGaP. In some examples, the substrate comprises a group IV element. Brief description of the drawings For a better understanding of the techniques, and to show how it may be put into effect, reference will now be made, by way of example, to the accompanying drawings, in which: Figure 1 is an example of a semiconductor structure; Figure 2 is an example of a semiconductor structure; Figures 3a and 3b are examples of haze results; Figure 4 is an example of a flowchart of a method for forming a semiconductor structure. Detailed Description Epitaxy or epitaxial means crystalline growth of material, usually via high temperature deposition. Epitaxy can be effected in a molecular beam epitaxy (MBE) tool in which layers are grown on a heated substrate in an ultra-high vacuum environment. Elemental sources are heated in a furnace and directed towards the substrate without carrier gases. The elemental constituents react at the substrate surface to create a deposited layer. Each layer is allowed to reach its lowest energy state before the next layer is grown so that bonds are formed between the layers. Epitaxy can also be performed in a metalorganic vapour phase epitaxy (MOVPE) tool, also known as a metal-organic chemical vapour deposition (MOCVD) tool. Compound metal-organic and hydride sources are flowed over a heated surface using a carrier gas, typically hydrogen. Epitaxial deposition occurs at much higher pressure than in an MBE tool. The compound constituents are cracked in the gas phase and then reacted at the surface to grow layers of desired composition. Deposition means the depositing of a layer on another layer or substrate. It encompasses epitaxy, chemical vapour deposition (CVD), powder bed deposition and other known techniques to deposit material in a layer. A compound material comprising one or more materials from group III of the periodic table with one or more materials from group V is known as a lll-V material. The compounds have a 1:1 combination of group III and group V regardless of the number of elements from each group. Subscripts in chemical symbols of compounds refer to the proportion of that element within that group. Thus Alo.25Gao.75As means the group III part comprises 25% Al, and thus 75% Ga, whilst the group V part comprises 100% As. Crystalline means a material or layer with a single crystal orientation. In epitaxial growth or deposition subsequent layers with the same or similar lattice constant follow the registry of the previous crystalline layer and therefore grow with the same crystal orientation. In-plane is used herein to mean parallel to the surface of the substrate; out-of-plane is used to mean perpendicular to the surface of the substrate. Substrate means a planar wafer on which subsequent layers may be deposited or grown. A substrate may be formed of a single element or a compound material, and may be doped or undoped. For example, common substrates include silicon (Si), gallium arsenide (GaAs), silicon germanium (SiGe), silicon germanium tin (SiGeSn), indium phosphide (InP), and gallium antimonide (GaSb). A substrate may be on-axis, that is where the growth surface aligns with a crystal plane. For example it has <100 crystal orientation. References herein to a substrate in a given orientation also encompass a substrate which is miscut by up to 10° towards another crystallographic direction, for example a (100) substrate miscut towards the (111) plane. Vertical or out of plane means in the growth direction; lateral or in-plane means parallel to the substrate surface and perpendicular to the growth direction. Doping means that a layer or material contains a small impurity concentration of another element (dopant) which donates (donor) or extracts (acceptor) charge carriers from the parent material and therefore alters the conductivity. Charge carriers may be electrons or holes. A doped material with extra electrons is called n-type whilst a doped material with extra holes (fewer electrons) is called p-type. A layer may be monolithic, that is comprising bulk material throughout. Alternatively it may be porous for some or all of its thickness. A porous layer includes air or vacuum pores, with the porosity defined as the proportion of the area which is occupied by the pores rather than the bulk material. The porosity can vary through the thickness of the layer. For example, the layer may be porous in one or more sublayer. The layer may include an upper portion which is porous with a lower portion that is non-porous. Alternatively the layer may include one or more discrete, non-continuous portions (domains) that are porous with the remainder being non-porous (with bulk material properties). The portions may be non-continuous within the plane of a sublayer and / or through the thickness of the layer (horizontally and / or vertically in the sense of the growth direction). The portions may be distributed in a regular array or irregular pattern across the layer, and / or through it. The porosity may be constant or variable within the porous regions. Where the porosity is variable it may be linearly varied through the thickness, or may be varied according to a different function such as quadratic, logarithmic or a step function. A porous layer means that pores have been formed through bulk material so that voids are intentionally introduced. Porosity is expressed in percentages which refers to the volume of bulk material which has been removed so 25% porosity means that the 25% of the equivalent volume of bulk material is voided. Where a device is described it should be understood that it will typically be formed on a circular substrate wafer of 4” (100mm), 6” (150mm), 8” (200mm), 12” (300mm) or greater diameter. After growth, deposition, bonding and other fabrication steps the devices are separated by dicing the wafer and layers into devices (chips) of appropriate dimensions. Typically tens, hundreds or thousands of devices are cut from a single wafer. Throughout the present disclosure corresponding elements in the Figures are labelled with corresponding reference numerals. Figure 1 illustrates an example of a semiconductor structure 100 for forming a microLED. The semiconductor structure 100 includes a substrate 110. The substrate 110 may comprise a growth substrate to enable the epitaxial formation of semiconductor layers thereon. Semiconductor structure 100 further comprises a first cladding layer 120, an active region 130, a second cladding layer 140 and a cap layer 150 stacked on the substrate 100. In some examples, the first cladding layer 120, the active region 130, the second cladding layer 140 and the cap layer 150 may comprise a microLED layer stack for forming a microLED. In some examples, the microLED layer stack may thus comprise device layers for a microLED. In some examples, the microLED stack may be epitaxially grown on the substrate 110, such as by MOCVD or MBE. The active region 130 may comprise one or more light emitting layers comprising structures such as quantum wells, quantum dots, or a combination thereof. The active region 130 may further comprise one or more barrier layers separating the light emitting layers. The cladding layers 120, 140 are disposed either side of the active region 130. The cladding layers 120, 140 are configured to form a p-n junction either side of the active region 130, such that carriers can recombine in the active region 130 for light emission. The cladding layers 120, 140 may be oppositely doped. For example, the first cladding layer 120 may be doped n-type and the second cladding layer 140 may be doped p-type. In other examples, the first cladding layer 120 may be p-type and the second cladding layer 140 may be n-type. Semiconductor structure 100 further comprises cap layer 150. Cap layer 150 is highly doped in order to form an ohmic contact with contacts fabricated on the cap layer 150. In some examples the semiconductor structure 100 may further comprise one or more mirrors. For example, the semiconductor structure 100 may comprise a first mirror situated between the cladding layer 120 and the substrate 110 to reflect light and increase the microLED brightness. In some examples, the semiconductor structure may comprise a second mirror situated between the cladding layer 140 and the cap layer 150. The first and second mirrors may thus form a resonant cavity, which may be used for forming a resonant cavity microLED. In such examples, the mirror may be formed of semiconductor material such as those for forming a distributed Bragg reflector (DBR). In some examples, contacts may be fabricated on to the semiconductor structure 100 to form the microLED. For example, a first contact may be applied to the substrate 110 and a second contact may be applied to the cap layer 150. The contacts inject carriers into the active region 130, where they recombine to result in the emission of light from the microLED. Semiconductor structure 100 further comprises a nucleation layer 102 and buffer layer 104. The nucleation layer 102 and buffer layer 104 may be configured to enable the formation of semiconductor layers on the substrate 110. For example, it may not be possible to form the first cladding layer 120 directly on substrate 110 due to lattice mismatch differences between the substrate 110 and first cladding layer 120. The nucleation layer 102 and buffer layer 104 may thus act as transition layers to enable the formation of the microLED stack 101 on the substrate 110. For example, the nucleation layer 102 may cover and mitigate the defects at the surface of the substrate 110. In some examples, the buffer layer 104 may be used to engineer the lattice constant or crystal structure to result in the improved formation of the microLED stack 101 thereon. In one example, the microLED stack 101 may comprise lll-P semiconductor materials. The lll-P material system is attractive for microLED applications because it can form a microLED capable of emitting red light, which is more challenging in other 11 l-V material systems, such as lll-N materials. Additionally, it is increasingly desirable to form a microLED stack on group IV substrates, such as, Ge. Group IV substrates are widely available in larger diameters of 8 or 12 inches enabling a greater number of microLEDs to be fabricated from a wafer formed on the larger substrates. To form lll-P materials on a group IV substrate 110, such as Ge, it is common to first grow a InGaP nucleation layer 102 on the substrate 110 and a InGaAs buffer layer 104 on the InGaP nucleation layer 102. The InGaAs buffer layer 104 can be formed with a disordered crystal structure. The disordered crystal structure of the InGaAs buffer layer 104 affects the formation of the microLED stack and, in particular, helps increase the bandgap of quantum structures, such as quantum wells, formed in the active layer 130. The increased bandgap of, for example, InGaP quantum wells in the active layer 130 can enable the active layer 130 to emit light in a desirable part of the red-part of the visible spectrum. For example, some microLED applications desire red-emission over the wavelength range spanning 610-670 nm, preferably 620-630 nm. However, in some examples, it can be challenging to achieve light emission with a wavelength of less than 670 nm using InGaP quantum wells with an ordered crystal structure. The crystal structure of the InGaP quantum wells is therefore disordered to achieve emission over the range of 610-670 nm. The disordered crystal structure of the InGaP quantum wells is set by the disordered crystal structure of the InGaAs buffer layer 104. In some microLED fabrication applications, however, an InGaAs buffer layer 104 is undesirable. As is considered an environmental contaminant. The use of As-containing materials can therefore be undesirable. Examples according to present disclosure provide a semiconductor structure for microLED fabrication, which includes a buffer that is As-free. In some examples, the buffer layer may comprise a lll-P semiconductor material, such as, InGaP. P is not considered an environmental contaminant. Furthermore, examples according to the present disclosure may provide a buffer layer that is As-free and comprises a disordered crystal structure. In some examples, the disordered crystal structure of the buffer layer may enable the formation of disordered quantum wells thereon configured to emit light in a desirable part of the visible spectrum, for example, 610-670 nm, preferably 620-630 nm. Figure 2 is an example of semiconductor structure 200. Semiconductor structure 200 comprises corresponding features to semiconductor structure 100. Semiconductor structure 200 comprises buffer layer 204, which comprises P. In some examples, buffer layer 204 may comprise InGaP. Buffer layer 204 may not comprise elements that are considered environmentally toxic and, in particular, does not comprise As. In some examples, the buffer layer 204 comprises a disordered crystal structure. As described above, it is desirable to introduce disorder into a lll-P material system for forming red-emitting microLEDs. The buffer layer 204 may thus be formed under growth conditions to result in a disordered crystal structure, as will be described in more detail below. The paper A. Zakaria, C. M. Fetzer, M. S. Goorsky; “Influence of the degree of order of InGaP on its hardness determined using nanoindentation”. J. Appl. Phys. 1 October 2010; 108 (7): 074908, provides a technique to determine disordering in the InGaP material system. An atomic order parameter may be given by: q = <AE0 / 471 meV (1) Where q is an atomic order parameter and AEo is the bandgap energy difference between the material with an ordered and disordered crystal structure. AEo may thus be given by: AEo = E0disordered - E0ordered (2) Where Eodisordered is the bandgap of the material possessing a disordered crystal structure and EoorderBd is the bandgap of the material possessing an ordered crystal structure. The bandgap energy difference AE0 can additionally be given by: AC — ^calculated r? measured / o\ AEo “ EhRXRD "hPL W Where E^|R|ted is the calculated bandgap based on the composition of a layer determined from high resolution x-ray diffraction (HRXRD) and Ep”Leasured is the ordered bandgap of the layer measured from photoluminescence (PL). In some examples, a buffer layer 204 according to examples of the present disclosure may comprise an atomic order parameter q of 0.4 or less. A smaller atomic order value q is indicative of a material with a more disordered crystal structure. In some examples, the atomic order parameter q may comprise a value of 0.3 or less. In some examples, atomic order parameter q may comprise a value of 0.25 or less. In some examples, the emission wavelength of a quantum well may be a function of the atomic order parameter and quantum well thickness. Achieving shorter wavelength emission with an ordered quantum well structure with a high atomic order parameter involves the use of thin quantum wells (<3 nm). However, forming thin quantum wells is challenging as at thin thicknesses the quality of the quantum well can degrade. In some examples, the buffer layer 204 may therefore enable the formation of the quantum wells with a highly disordered crystal structure which can result in quantum wells that can emit at a shorter wavelength with a thicker thickness, compared to a corresponding quantum well composition and thickness with an ordered crystal structure. For example, a quantum well comprising lno.51Gao.49P and a thickness of 4 nm with a disordered crystal structure may be configured to emit light in the red part of the visible spectrum between about 610-670 nm, preferably 620-630 nm. Whereas, a quantum well comprising lno.51Gao.49P and a thickness of 4 nm with an ordered crystal structure may be configured to emit light comprising a wavelength of greater than 670 nm. The crystal structure of the buffer layer 204 may therefore determine the crystal structure of the semiconductor layers formed thereon. Therefore, a disordered buffer layer 204 may thus result in the formation of a disordered quantum well in the active region 130 configured to emit light a desirable part of the visible spectrum. In some examples, the quantum well(s) of the active region 130 may be formed with an atomic order parameter q with a value of 0.4 or less. In some examples, the quantum well(s) of the active region 130 may be formed with an atomic order parameter q with a value of 0.3 or less. In some examples, the quantum well(s) of the active region 130 may be formed with an atomic order parameter q with a value of 0.25 or less. Said quantum well(s) may thus emit light at a shorter wavelength and may be formed with high quality. The microLED epitaxial stack 101 may thus be formed on the buffer layer 204. The microLED stack 101 may thus comprise 11 l-P semiconductor materials comprising group III elements comprising one or more of Al, In or Ga in varying compositions. In particular, the active region 130 may comprise quantum wells comprising an InGaP composition configured to emit light in the red part of the visible spectrum. In some examples, the quantum well comprises a thickness of about 4 nm. In some examples, the active region may thus be configured to emit light with a peak wavelength between 610-670 nm preferably 620-630 nm. As described above, in some examples, nucleation layer 102 may comprise InGaP. In particular, an InGaP nucleation layer 102 may be formed lattice matched to a Ge substrate 110. In some examples, a InGaP buffer layer 204 may thus be formed over the InGaP nucleation layer 102. The nucleation layer 102 and buffer layer 204 may thus comprise a corresponding set of 11 l-V semiconductor elements. However, the buffer layer 204 may not be lattice matched to the nucleation layer 102 and may be compressively strained relative to the nucleation layer 102. In some examples, the substrate 110 comprises Ge. The Ge substrate 110 may comprise a miscut of 10° or less. As will be described in more detail below, examples according to the present disclosure may thus enable the formation of a disordered buffer layer 204 on a substrate with a lower degree of miscut of, for example, 10° or less. There now follows a discussion of a fabrication technique for forming the buffer layer 204. In some examples, the buffer layer 204 may be formed using an epitaxial technique, such as MOCVD or MBE. In some examples, the microLED stack 101 may thus be epitaxially formed on the buffer layer 204 using for example, MOCVD or MBE. As described above, in some examples, the buffer layer 204 may comprise InGaP. As further described above, it is desirable to form the buffer layer 204 with a disordered crystal structure. It is possible to epitaxially form a InGaP layer with a disordered crystal structure by growing the InGaP material at high temperatures. For example, a disordered InGaP layer may be formed using MOCVD techniques at a temperature of greater than 670 °C. However, forming InGaP at high temperatures leads to a layer with poor morphology and compositional uniformity. A smooth and uniform buffer layer 204 is desired because this improves the epitaxial formation of the microLED stack 101. Another option to increase disordering in an epitaxially formed semiconductor layer, is to form the semiconductor layer on a substrate with a high miscut. However, when Ge is used as the substrate material, limitations of the Ge substrate fabrication process mean that it is impractical to obtain a Ge substrate with a high miscut of more than 10°. In some examples, buffer layer 204 may thus be formed with a disordered crystal structure on a substrate with a low degree of miscut, which additionally comprises a smooth morphology and compositional uniformity. In some examples, the buffer layer 204 may thus be formed with a low growth rate. In some examples, the buffer layer 204 may be formed with a growth rate of 1.2 pm / hr or less. The low growth rate may enable the buffer layer 204 to form with a smooth morphology and high degree of compositional uniformity, whilst achieving a disordered crystal structure. In some examples, the low growth rate for the buffer layer 204 may be achieved by controlling the growth temperature and V / l 11 ratio. In some examples, the buffer layer 204 may be formed using a low temperature. In some examples, the buffer layer 204 may be epitaxially formed using MOCVD techniques with a temperature of between 610-650 °C, for example, 630 °C. In some examples, the buffer layer 204 may be formed with a high V / l 11 ratio. For example, the buffer layer 204 may be formed with a V / l 11 ratio of between 230-300, for example 300. In some examples, the nucleation layer 102 may be formed at a first pressure and the buffer layer 204 may be formed at a second pressure, less than the first pressure. In one example, the nucleation layer 102 may be formed at a pressure of about 300 mbar and the buffer layer 204 may be formed at a pressure of about 100 mbar. In some examples, the greater pressure for the formation of the nucleation layer 102 may reduce the formation of anti-phase domains in the nucleation layer 102. In some examples, following the formation of the InGaP buffer layer 204, Ga and P containing gases may be flowed at the upper surface of the buffer layer 204. The Ga and P containing gases may help clean the buffer layer 204 surface to improve the formation of the microLED stack 101, thereon. In particular, the Ga and P containing gases may remove excess In present at the upper surface of the buffer layer 204. Furthermore, flowing the Ga and P gases may help remove In built up on surfaces of the epitaxial reactor used to form the InGaP buffer layer 204. Figures 3a-b are examples of haze measurements. Haze measurements provide a measure of surface morphology, as one skilled in the art would readily understand. Figure 3a illustrates a first haze measurement 300a performed on a InGaP buffer layer grown at a temperature of 720 °C. As illustrated, the layer is rough and comprises many defects, with a defect count of 69.0 cm2. Figure 3b illustrates a second haze measurement 300b performed on a InGaP buffer layer of a semiconductor structure according to examples of the present disclosure formed at a temperature of 650 °C. As illustrated, the surface roughness of the InGaP buffer layer is greatly improved compared to the first haze measurement 300a, formed with conventional examples. The haze measurement has a defect count of 4.55 cm-2. The haze measurement 300b is therefore significantly improved compared to haze measurement 300a. Examples according to the present disclosure can thus form a disordered InGaP buffer layer with a smooth and uniform surface. Figure 4 is an example of a flowchart of a method 400 for forming a semiconductor structure. The method 400 comprises, in a first step 410, forming a nucleation layer over a substrate. In some examples, the nucleation layer may be formed directly on a surface of the substrate. The method 400 further comprises, in a second step 420, forming a buffer layer comprising P over the nucleation layer. In some examples, the buffer layer may be formed directly on a surface of the nucleation layer. The method 400 further comprises, in a third step 430, forming one or more semiconductor layers over the buffer layer. The present disclosure further provides a semiconductor device comprising a semiconductor structure according to examples of the present disclosure. In some examples the semiconductor device may comprise a photonic semiconductor device. In some examples the photonic semiconductor device may comprise one of: a light emitting diode (LED) or a microLED (pLED). The present disclosure further provides an electronic device comprising a semiconductor device according to examples of the present disclosure. In some examples the electronic device may comprise an electronic device for user operation. In some examples the electronic device may comprise a communication device such as a mobile telephone, smartphone or similar. In some examples the electronic device may comprise handheld computing device, such as a tablet or similar. In some examples the electronic device may comprise a visual display device, such as a television, a monitor or similar. In some examples the electronic device may comprise a wearable device, such as a smartwatch, smart glasses, or similar. In some examples the electronic device may comprise a gaming device such as a games console, or similar. In some examples the electronic device may comprise a comprise a headset such as a virtual reality (VR) headset, an augmented reality (AR) headset, a mixed reality headset, or similar. In some examples the electronic device may comprise an appliance such as a household appliance, for example a refrigerator or a washing machine, or similar. It should be noted that the above-mentioned embodiments illustrate rather than limit the 5 idea, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the claims. Any reference signs in the claims shall 10 not be construed so as to limit their scope.

Claims

1. A semiconductor structure comprising:a substrate;a nucleation layer over the substrate;a buffer layer comprising P over the nucleation layer; and one or more semiconductor layers over the buffer layer.

2. The semiconductor structure according to claim 1 wherein the buffer layer comprises a disordered crystal structure.

3. The semiconductor structure according to claim 2 wherein an atomic order parameter is given by the equation q = ^AE0 / 471 meV; and wherein the buffer layer comprises q <0.4.

4. The semiconductor structure according to any preceding claim wherein the buffer layer comprises a first set of 111-V semiconductor elements.

5. The semiconductor structure according to claim 4 wherein the nucleation layer comprises the first set of 11 l-V semiconductor elements.

6. The semiconductor structure according to any preceding claim wherein the buffer layer comprises InGaP.

7. The semiconductor structure according to any preceding claim wherein the substrate comprises a group IV element.

8. The semiconductor structure according to claim 7 wherein the group IV element comprises Ge.

9. The semiconductor structure according to any preceding claim wherein the one or more semiconductor layers comprise a 11 l-V semiconductor comprising a group III element comprising one or more of Al, In or Ga and a group V element comprising P.

10. The semiconductor structure according to any preceding claim wherein the one or more semiconductor layers comprise an active layer.

11. The semiconductor structure according to claim 10 wherein the active layer is configured to emit light comprising a peak wavelength between 610-670 nm.

12. The semiconductor structure according to claim 10 or 11 wherein the one or more semiconductor layers comprise:a first cladding layer;the active layer over the first cladding layer; and a second cladding layer over the active layer.

13. The semiconductor structure according to any preceding claim wherein the nucleation layer is lattice matched with the substrate.

14. A semiconductor device comprising the semiconductor structure according to any preceding claim.

15. An electronic device comprising the semiconductor device according to claim 14.

16. A method of forming a semiconductor structure comprising:forming a nucleation layer over a substrate;forming a buffer layer comprising P over the nucleation layer; and forming one or more semiconductor layers over the buffer layer.

17. The method according to claim 16 comprising forming the buffer layer at a growth rate of 1.2 pm / hr or less.

18. The method according to claim 16 or 17 comprising forming the buffer layer at a V / l 11 ratio greater than 230.

19. The method according to any of claims 16-18 comprising forming the buffer layer at a temperature of less than 670 °C.

20. The method according to any of claims 16-19 comprising forming the nucleation layer at a first pressure and forming the buffer layer at a second pressure; wherein the first pressure is greater than the second pressure.

21. The method according to any of claims 16-20 further comprising flowing Ga and P containing gases at a surface of the buffer layer.

22. The method according to any of claims 16-21 wherein the buffer layer comprises a disordered crystal structure.5 23. The semiconductor structure according to claim 22 wherein an atomic orderparameter is given by the equation q = ^AEo / 471 meV; and wherein the buffer layer comprises q <0.4.

24. The method according to any of claims 16-23 wherein the buffer layer comprises10 InGaP.

25. The method according to any of claims 16-24 wherein the substrate comprises a group IV element.15AMENDMENTS TO THE CLAIMS HAVE BEEN FILED AS FOLLOWS:28 08 2519CLAIMS1. A semiconductor structure (100) comprising:a Ge substrate (110);a nucleation layer (102) over the substrate (110);a buffer layer (104) comprising P over the nucleation layer (102); and one or more semiconductor layers (101) over the buffer layer (104); wherein the buffer layer (104) comprises a disordered crystal structure.

2. The semiconductor structure (100) according to claim 1 wherein an atomic order parameter is given by the equation q = > / aEo / 471 meV; and wherein the buffer layer (104) comprises q <0.4.

3. The semiconductor structure (100) according to any preceding claim wherein the buffer layer (104) comprises a first set of 11 l-V semiconductor elements.

4. The semiconductor structure (100) according to claim 3 wherein the nucleation layer (102) comprises the first set of 11 l-V semiconductor elements.

5. The semiconductor structure (100) according to any preceding claim wherein the buffer layer (104) comprises InGaP.

6. The semiconductor structure (100) according to any preceding claim wherein the one or more semiconductor layers (101) comprise a lll-V semiconductor comprising a group III element comprising one or more of Al, In or Ga and a group V element comprising P.

7. The semiconductor structure (100) according to any preceding claim wherein the one or more semiconductor layers (101) comprise an active layer (130).

8. The semiconductor structure (100) according to claim 7 wherein the active layer (130) is configured to emit light comprising a peak wavelength between 610-670 nm.

9. The semiconductor structure (100) according to claim 7 or 8 wherein the one or more semiconductor layers (101) comprise:a first cladding layer (120);the active layer (130) over the first cladding layer (120); and28 08 25a second cladding layer (140) over the active layer (130).

10. The semiconductor structure (100) according to any preceding claim wherein the nucleation layer (102) is lattice matched with the substrate (110).

511. A semiconductor device comprising the semiconductor structure (100) according to any preceding claim.

12. An electronic device comprising the semiconductor device according to claim 11. 1013. A method (400) of forming a semiconductor structure (100) comprising:forming (410) a nucleation layer (102) over a Ge substrate (110);forming (420) a buffer layer (104) comprising P over the nucleation layer (102); and15 forming (430) one or more semiconductor layers (101) over the buffer layer(104);wherein the buffer layer (104) comprises a disordered crystal structure.

14. The method (400) according to claim 13 comprising forming the buffer layer (104) 20 at a growth rate of 1.2 pm / hr or less.

15. The method (400) according to claim 13 or 14 comprising forming the buffer layer (104) at a V / l 11 ratio greater than 230.25 16. The method (400) according to any of claims 13-15 comprising forming the bufferlayer (104) at a temperature of less than 670 °C.

17. The method (400) according to any of claims 13-16 comprising forming the nucleation layer (102) at a first pressure and forming the buffer layer (104) at a 30 second pressure; wherein the first pressure is greater than the second pressure.

18. The method (400) according to any of claims 13-17 further comprising flowing Ga and P containing gases at a surface of the buffer layer (104).35 19. The method (400) according to claim 13 wherein an atomic order parameter isgiven by the equation q = ^AEo / 471 meV; andwherein the buffer layer (104) comprises q <0.4.

20. The method (400) according to any of claims 13-19 wherein the buffer layer (104) comprises InGaP.5LDCM00 CM

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