Lateral recess measurement in semiconductor specimen

Abstract

To provide a lateral recess measurement in a semiconductor specimen.SOLUTION: There is provided a system and method of measuring a lateral recess in a semiconductor specimen, comprising: obtaining a first image acquired by collecting SEs emitted from the surface of the specimen, and a second image acquired by collecting BSEs scattered from an interior region of the specimen between the surface and a target second layer, the specimen being scanned using an electron beam with a landing energy selected to penetrate to a depth corresponding to the target second layer; generating a first GL waveform based on the first image and a second GL waveform based on the second image; estimating a first width of a first layer based on the first GL waveform, and a second width with respect to at least the target second layer based on a second GL; and measuring a lateral recess based on the first width and the second width.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The subject matter of the present disclosure generally relates to the field of testing semiconductor samples, and more specifically, to critical dimension (CD) measurements related to lateral recesses in a sample.

Background Art

[0002] Current requirements for high density and performance related to the very large scale integration of manufactured devices require sub-micron features, improved speed of transistors and circuits, and improved reliability. As semiconductor processes advance, pattern dimensions such as line width and other types of critical dimensions are continuously reduced. Such requirements necessitate the formation of device features with high accuracy and uniformity, and as a result, careful monitoring of the manufacturing process including the automatic testing of devices while the devices are still in the form of semiconductor wafers.

[0003] Testing can be performed by using non-destructive testing tools during or after production of the sample to be tested. Testing generally involves directing light or electrons onto the wafer and detecting light or electrons from the wafer to generate a specific output (e.g., an image, a signal, etc.) related to the sample. Various non-destructive testing tools include, by way of non-limiting example, a scanning electron microscope, an atomic force microscope, an optical inspection tool, and the like.

[0004] The testing process can include a plurality of test steps. During the production process, for example, the test steps can be executed multiple times after the production or processing of a specific layer. Additionally or alternatively, each test step can be repeated multiple times, for example, for different wafer locations or for the same wafer location with different test settings.

[0005] Testing processes are used at various steps in semiconductor manufacturing to detect and classify defects in samples, as well as to perform measurement-related operations. The effectiveness of testing can be improved by automating processes such as defect detection, automated defect classification (ADC), automated defect review (ADR), and automated measurement-related operations. [Overview of the project]

[0006] According to a particular aspect of the subject matter of this disclosure, a computerized system is provided for measuring lateral recesses in a semiconductor sample, wherein the semiconductor sample comprises a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with respect to each other, the second layers being at least partially etched so as to form lateral recesses between each given second layer and two adjacent first layers, and the system comprises an electron beam tool with an incident energy (landing) specifically selected to penetrate to a predefined depth corresponding to the target second layer of the sample. The electron beam tool is configured to scan a semiconductor sample using an electron beam having energy () and acquire a first image by collecting secondary electrons (SE) emitted from the surface of the sample, and a second image by collecting backscattered electrons (BSE) scattered from an internal region of the sample between the surface and a second layer of the target, wherein the first image provides information about the surface profile of the sample and the second image provides information about the internal structure of the internal region; and the processing and memory circuit (PMC) is configured to operably connect to the electron beam tool and generate a first GL waveform that provides information about the gray level (GL) intensity distribution of the first image and a second GL waveform that provides information about the GL intensity distribution of the second image, estimate a first width of one or more first layers based on the first GL waveform and a second width with respect to at least a second layer of the target based on the second GL waveform, and measure side recesses with respect to the second layer of the target based on the first and second widths.

[0007] In addition to the features described above, a system according to this aspect of the subject matter of the present disclosure may include one or more of the following features (i) through (x) in any desired combination or rearrangement that is technically possible. (i) The semiconductor sample includes a gate-all-around (GAA) device. The first layer is made of silicon, and the second layer is made of silicon-germanium. (ii) The second layer of the target is the upper second layer of one or more second layers, and the side recess to be measured is an upper layer side recess formed between the upper second layer and the adjacent first layer. (iii) The second layer of the target is a subsequent second layer following the upper second layer, and the lateral recess to be measured is the average lateral recess of the upper layer lateral recess formed between the upper second layer and its adjacent first layer and the subsequent lateral recess formed between the subsequent second layer and its adjacent first layer. (iv) The PMC is further configured to measure the average lateral recess with respect to a subsequent second layer following the upper second layer, and to derive the lateral recess of the subsequent layer based on the average lateral recess and the upper layer lateral recess. (v) SE is collected by an array of SE detectors, and BSE is collected by at least one BSE detector. (vi) The incident energy required to penetrate to a predefined depth corresponding to the second layer of the target is specifically selected based on a comparison between the number of BSEs for a reference sample without lateral recesses and the number of BSEs for the semiconductor sample of interest. (vii) Estimating a first width includes estimating a first topo point of a first GL waveform by calculating a derivative along a first GL waveform, applying a predefined derivative threshold to the first GL waveform to generate a first topo-point, and measuring a first width between the first topo-points. (viii) Estimating the second width includes estimating the second topo point of the second GL waveform by applying a predefined GL threshold to the second GL waveform to generate a second topo point and measuring the second width between the second topo points. (ix) The PMC is further configured to calibrate the measured side recesses against reference measurement data obtained from the TEM. (x) Calibration is based on a previously derived correlation between corresponding measurement data from the electron beam tool and reference measurement data obtained from the TEM.

[0008] In other aspects of the subject matter of this disclosure, a method is provided for measuring lateral recesses in a semiconductor sample, wherein the semiconductor sample comprises a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with respect to each other, the second layers being at least partially etched so as to form lateral recesses between each given second layer and two adjacent first layers, the method being performed by a processing and memory circuit (PMC) to obtain a first image obtained by collecting secondary electrons (SE) emitted from the surface of the sample and a second image obtained by collecting backscattered electrons (BSE) scattered from the internal region of the sample between the surface and the target second layer. The method involves scanning a semiconductor sample using an electron beam with an incident energy specifically selected to penetrate to a predefined depth corresponding to a second layer of a target, obtaining a first image which provides information about the surface profile of the sample, and a second image which provides information about the internal structure of the internal region; generating a first GL waveform which provides information about the gray level (GL) intensity distribution of the first image and a second GL waveform which provides information about the GL intensity distribution of the second image; estimating a first width of the first layer based on the first GL waveform and a second width at least with respect to the second layer of the target based on the second GL; and measuring side recesses with respect to the second layer of the target based on the first and second widths.

[0009] This aspect of the subject matter of the present disclosure may include, with respect to the system, one or more of the features (i) through (x) listed above in any desired combination or rearrangement that is technically possible, with necessary modifications.

[0010] According to other aspects of the subject matter of this disclosure, a non-temporary computer-readable medium is provided which, when executed by a computer, causes the computer to perform a method for measuring side recesses in a semiconductor sample, wherein the semiconductor sample comprises a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with respect to each other, the second layers being at least partially etched so as to form side recesses between each given second layer and two adjacent first layers, and the method comprises a first image obtained by collecting secondary electrons (SE) emitted from the surface of the sample and a second image obtained by collecting backscattered electrons (BSE) scattered from the internal region of the sample between the surface and the target second layer. The method involves obtaining a second image obtained, wherein a semiconductor sample is scanned using an electron beam with incident energy specifically selected to penetrate to a predefined depth corresponding to a second layer of a target, the first image providing information about the surface profile of the sample, and the second image providing information about the internal structure of the internal region; generating a first GL waveform providing information about the gray level (GL) intensity distribution of the first image and a second GL waveform providing information about the GL intensity distribution of the second image; estimating a first width of the first layer based on the first GL waveform and a second width at least with respect to the second layer of the target based on the second GL; and measuring side recesses with respect to the second layer of the target based on the first and second widths.

[0011] This aspect of the subject matter of the present disclosure may include, with respect to the system, one or more of the features (i) through (x) listed above in any desired combination or rearrangement that is technically possible, with necessary modifications.

[0012] To understand this disclosure and to recognize how it can be put into practice, embodiments will now be described with reference to the accompanying drawings, merely as non-limiting examples. [Brief explanation of the drawing]

[0013] [Figure 1] This is a generalized block diagram of a test system according to a particular embodiment of the subject matter of this disclosure. [Figure 2A] This is a generalized flowchart for measuring a side recess in a semiconductor sample according to a specific embodiment of the subject matter of this disclosure. [Figure 2B] This is a generalized flowchart showing how to obtain a first image and a second image according to a specific embodiment of the subject matter of this disclosure. [Figure 3] This is a generalized flowchart for measuring layer-by-layer lateral recess and / or mean lateral recess according to a particular embodiment of the subject matter of the present disclosure. [Figure 4] This is a schematic diagram of a GAA structure according to a specific embodiment of the subject matter of this disclosure. [Figure 5] This figure shows examples of first and second images of a GAA structure according to a particular embodiment of the subject matter of this disclosure. [Figure 6] This figure shows examples of a first GL waveform and a second GL waveform according to a particular embodiment of the subject matter of this disclosure. [Figure 7] This figure shows an illustrative graph of the correlation between the difference in the number of BSEs received from a reference sample to a sample of interest and the level of incident energy used, according to a particular embodiment of the subject matter of this disclosure. [Modes for carrying out the invention]

[0014] In the following detailed description, numerous specific details are included to provide a complete understanding of the Disclosure. However, it will be understood by those skilled in the art that the subject matter of the Disclosure can be practiced without these specific details. In other cases, well-known methods, procedures, components, and circuits are not described in detail so as not to obscure the subject matter of the Disclosure.

[0015] Unless otherwise specified, as will be apparent from the following discussion, discussions throughout this specification using terms such as “measure,” “scan,” “acquire,” “generate,” “estimate,” “derive,” “select,” “calculate,” “apply,” and “calibrate” refer to computer operations and / or processes that process and / or transform data into other data, and that such data is represented as physical quantities such as electrons, and / or represents physical objects. The term “computer” should be interpreted broadly to include, in non-limiting examples, any kind of hardware-based electronic device with data processing capabilities, including the test systems, measurement systems, and parts thereof disclosed in this application.

[0016] As used herein, the term "test" should be broadly construed to include any kind of measurement-related operation, as well as operations related to the detection and / or classification of defects in samples during production. Tests are performed by using non-destructive test tools during or after the production of the samples to be tested. By way of non-limiting example, the test process can include one or more of the following operations performed on a sample or a part thereof using the same or different test tools, namely, in-operation scanning (single or multiple scans), sampling, review, measurement, classification, and / or other operations. Similarly, tests can be performed prior to the production of the samples to be tested, for example, including generating test strategies and / or other setup operations. It should be noted that, unless otherwise specified, the term "test" or its derivatives used herein are not limited with respect to the resolution or size of the inspection area. Various non-destructive test tools include, by way of non-limiting example, scanning electron microscopes, atomic force microscopes, optical inspection tools, and the like.

[0017] As used herein, the term "measurement" should be broadly construed to include any kind of measurement of the properties and characteristics of a sample performed using test and / or measurement tools during or after the production of the sample to be inspected. By way of non-limiting example, the measurement process can include, for example, generating a measurement strategy and / or performing in-operation measurements by means of scanning (single or multiple scans), review, measurement, and / or other operations performed on a sample or a part thereof using the same or different tools. Measurement results such as measured images are analyzed, for example, by using image processing techniques. It should be noted that, unless otherwise specified, the term "measurement" or its derivatives used herein are not limited with respect to the measurement technique, measurement resolution, or the size of the inspection area.

[0018] As used herein, the terms “non-transitory memory” and “non-transitory storage medium” should be broadly construed to include any volatile or non-volatile computer memory suitable for the subject matter of this disclosure.

[0019] As used herein, the term “sample” should be broadly construed to include any type of wafer, mask, and other structures, combinations and / or portions thereof used to produce semiconductor integrated circuits, magnetic heads, flat panel displays, and other semiconductor manufacturing products.

[0020] As used herein, the term “defect” should be broadly construed to include any type of abnormal or undesirable feature formed on or within a sample.

[0021] It is recognized that, unless otherwise specified, particular features of the subject matter of this disclosure described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, various features of the subject matter of this disclosure described in the context of a single embodiment may also be provided separately or in any suitable sub-combination. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the methods and apparatuses.

[0022] With this in mind, turn attention to FIG. 1, which shows a functional block diagram of a test system according to a particular embodiment of the subject matter of this disclosure.

[0023] The test system 100 shown in Figure 1 can be used for testing semiconductor samples (e.g., wafers and / or parts thereof) as part of a sample manufacturing process. As stated above, the tests referred to herein can be interpreted to encompass any type of measurement-related operation, as well as operations related to the detection and / or classification of defects in the sample during manufacturing. According to a particular embodiment of the subject matter of this disclosure, the illustrated test system 100 includes a computer-based system 101 that can automatically perform one or more measurement operations on images obtained during sample manufacturing. System 101 is also called a measurement system, which is a subsystem of the test system 100. Specifically, according to a particular embodiment, the measurement operation may include limit dimension (CD) measurement with respect to a lateral recess formed in the semiconductor sample.

[0024] System 101 can be operably connected to one or more test tools 120 configured to scan a semiconductor sample and capture an image of the semiconductor sample for testing the sample. In some embodiments, at least one of the test tools 120 may have a measurement function and be configured to perform measurement operations on the captured image. Such a test tool is also called a measurement tool.

[0025] As used herein, the term “measurement operation” should be broadly interpreted to encompass any measurement operation procedure used to extract measurement information relating to one or more structural elements of a semiconductor sample. For example, the measurement information to be extracted may include one or more of the following: dimensions (e.g., line width, line spacing, contact diameter, element size, edge roughness, gray level statistics, etc.), element shape, distance within or between elements, relevant angles, overlay information relating to elements corresponding to different design levels, etc. In some embodiments, the measurement operation may include, for example, a measurement operation such as CD measurement performed on a particular structure of the sample.

[0026] As used herein, the term “test tool” should be interpreted broadly to include any tool that can be used in test-related processes, including, but not limited to, imaging, scanning (in a single scan or multiple scans), sampling, review, measurement, classification, and / or other processes performed with respect to a sample or part thereof.

[0027] For example, a sample can be examined with one or more low-resolution testing tools (e.g., an optical inspection system, a low-resolution SEM, etc.). The resulting data providing information about the low-resolution image of the sample (referred to as low-resolution image data) can be sent to system 101 (directly or via one or more intermediate systems). Alternatively or additionally, the sample can be examined with a high-resolution tool (e.g., a scanning electron microscope (SEM), an atomic force microscope (AFM), or a transmission electron microscope (TEM)). The resulting data providing information about the high-resolution image of the sample (referred to as high-resolution image data) can be sent to system 101 (directly or via one or more intermediate systems).

[0028] Without limiting the scope of this disclosure, it should also be noted that the test tool 120 can be implemented as various types of test equipment, such as optical imaging devices and electron beam devices. In some cases, the same test tool can provide both low-resolution and high-resolution image data.

[0029] According to certain embodiments, one of the test tools is an electron beam tool, such as a scanning electron microscope (SEM). An SEM is a type of electron microscope that creates an image of a sample by scanning it with a focused beam of electrons. The electrons interact with the atoms of the sample, producing various signals that contain information about the surface topology and / or composition of the sample. The position of the beam, combined with the intensity of the detected signals, creates an image. SEMs can accurately measure feature areas during the production of semiconductor wafers. As an example, the SEM tool may be a limiting dimension scanning electron microscope (CD-SEM) used to measure the limiting dimensions of structural feature areas in an image.

[0030] System 101 includes a processor and memory circuit (PMC) 102 operably connected to a hardware-based I / O interface 126. The PMC 102 is configured to perform the operations necessary to operate the system, as further detailed with reference to Figures 2A, 2B, and 3, and includes a processor (not shown individually) and memory (not shown individually). The processor of the PMC 102 can be configured to execute several functional modules according to computer-readable instructions implemented in non-temporary computer-readable memory contained within the PMC. Such functional modules are hereafter referred to as being contained within the PMC.

[0031] As described above, in some embodiments, system 101 can be configured to measure lateral recesses in a semiconductor sample. Side recesses, also called cavity recesses, refer to recesses formed from the sides of a semiconductor sample. Specifically, in some embodiments, a semiconductor sample may include a stack of two types of layers, where one or more first layers of a first type and one or more second layers of a second type are deposited alternately to form a superlattice layer stack. The two types of layers can be made from different materials. During the manufacturing process, it may be necessary to selectively recess only one type of material from the superlattice layer stack. For example, the second layers can be at least partially etched to form lateral recesses between each of a given second layer and two first layers adjacent to a given second layer. In some cases, measuring lateral recesses (e.g., width of lateral recesses, also called cavity depth), given as one of the geometric parameters that strongly influence the final device performance, is of particular interest to the sample manufacturer. It can further provide an indicator of etching progress and facilitate fine-tuning and control of the manufacturing process.

[0032] Because this recess is etched from the side of the sample, it is hidden and embedded in the stack and therefore cannot be seen from top-down images typically taken by the test tool. Current process control relies on either expensive, slow, and destructive cross-sectional electron microscopy, such as the use of measurement tools like TEM, or optical inspection techniques such as optical limiting dimension (OCD) light wave scattering measurements, which rely on specific light spectra and perform indirect and less accurate measurements.

[0033] A semiconductor sample that may include the layer stack structure described above may be either a logic device or a memory device. For example, the sample may be a logic device such as a gate-all-around field-effect transistor (GAAFET), also referred to herein as a gate-all-around (GAA) device or transistor. Another example is a memory device such as 3D NAND (NOT-AND), which is a type of non-volatile flash memory in which memory cells are stacked vertically in multiple layers. A further example is a memory device such as 3D storage-class memory (3D SCM).

[0034] For illustrative and illustrative purposes, specific embodiments of the subject matter of this disclosure described herein are described in relation to GAA devices. This is not intended in any way to limit the disclosure. It is recognized that the proposed methods and systems can be applied to the measurement of lateral recesses in other semiconductor specimens having structures similar to those described above.

[0035] GAA devices are field-effect transistors in which the gate material surrounds the channel region on all sides, such as nanosheet (NS) transistors, forksheet (FS) transistors, and complementary field-effect (CFET) transistors. Figure 4 shows a schematic diagram of a GAA structure according to a particular embodiment of the subject matter of this disclosure.

[0036] The GAA structure 410 includes a stack of two types of layers, namely, a plurality of first layers 402 (i.e., silicon layers) and a plurality of second layers 404 (i.e., silicon-germanium layers, also called SiGe layers) formed on a semiconductor substrate 406. The stack structure includes a periodic arrangement in which silicon layers are deposited on silicon-germanium layers, forming a superlattice layer stack. Multiple such stack structures can be formed on a wafer spaced apart from each other, such as the two exemplary GAA structures 400 and 410 formed on the substrate 406 shown in Figure 4. After the layers have grown completely, specific chemicals are used to selectively etch the silicon-germanium but not the silicon. The sides of the plurality of silicon-germanium layers are etched to remove at least a portion of these layers. The etching process can be incremental, until finally only the silicon layers remain suspended as bridges between the source and drain.

[0037] During the etching process, side recesses are formed between each given second layer and two first layers adjacent to the given second layer. For example, a side recess or cavity recess 408 is formed between a second silicon-germanium layer and its adjacent silicon layer. As described above, in some cases it is particularly important to measure the width of the side recesses (e.g., the width of the side recesses, also called cavity depths 412), which strongly affect the final device performance. For illustrative purposes, GAA structures 400 and 410 are shown with side recesses of different widths to illustrate what happens to the GAA device at different etching points during the etching process.

[0038] According to certain embodiments, a novel method is proposed for measuring lateral recesses in the aforementioned semiconductor samples using the see-through capability of an electron beam tool with a relatively high incident voltage energy. The proposed measurement method is non-destructive and provides direct measurement with improved accuracy and throughput (TpT).

[0039] In some embodiments, the test tool 120 may be an electron beam tool (e.g., a scanning electron microscope) configured to scan a semiconductor sample using an electron beam with an incident energy specifically selected to penetrate to a predefined depth corresponding to a second target layer of the sample. The electron beam tool is further configured to acquire a first image by collecting secondary electrons (SE) emitted from the surface of the sample and a second image by collecting backscattered electrons (BSE) scattered from the internal region of the sample between the surface and the second target layer. The first image provides information about the surface profile of the sample, and the second image provides information about the internal structure of the internal region.

[0040] The functional modules included in the PMC102 may include an image processing module 104 and a measurement module 106. The PMC102 can be configured to obtain a first image and a second image acquired by an electron beam tool via an I / O interface 126. The image processing module 104 can be configured to generate a first GL waveform that provides information on the gray level (GL) intensity distribution of the first image and a second GL waveform that provides information on the GL intensity distribution of the second image. The measurement module 106 can be configured to estimate a first width of one or more first layers based on the first GL waveform and to estimate a second width with respect to at least a second layer of the target based on the second GL waveform. The measurement module 106 can be further configured to measure side recesses with respect to the second layer of the target based on the first and second widths.

[0041] The operation of systems 100, 101, PMC102, and their functional modules will be described in further detail with reference to Figures 2A, 2B, and 3.

[0042] According to a particular embodiment, system 101 may include a storage unit 122. The storage unit 122 may be configured to store data necessary for operating systems 100 and 101, such as data related to the input and output of systems 100 and 101, as well as intermediate processing results generated by system 101. For example, the storage unit 122 may be configured to store images (e.g., a first image and a second image) and / or derivatives thereof produced by the test tool 120. The images can then be retrieved from the storage unit 122 and provided to the PMC 102 for further processing.

[0043] In some embodiments, the system 101 may optionally include a computer-based graphical user interface (GUI) 124 configured to allow user-specified inputs related to the system 101. For example, the user may be presented with a visual representation of the sample, including an image of the sample and / or its corresponding waveform (e.g., by a display forming part of the GUI 124). The user may be provided with options to define specific operating parameters via the GUI. In some cases, the user may also view the operating results and / or further test results, such as measurements of lateral recesses, on the GUI.

[0044] As described above, system 101 is configured to receive images of the sample via the I / O interface 126. The images may include image data (and / or derivatives thereof) produced by the test tool 120, and / or image data stored in the storage unit 122 or one or more data repositories. In some cases, the image data may refer to images captured by the test tool during the production process, and / or pre-processed images derived from captured images, such as those obtained by various pre-processing steps. It should be noted that in some cases, the images may include relevant numerical data (e.g., metadata, handcrafted attributes, etc.). It should be further noted that specific image data may include data related to the layer in question, and / or data related to one or more additional layers of the sample.

[0045] System 101 is further configured to process the received image and send the results (e.g., CD measurements of the image) to the storage unit 122 and / or the test tool 120 via the / IO interface 126.

[0046] In some embodiments, in addition to the test tool 120, the test system 100 may include one or more test modules usable for testing semiconductor samples, such as a defect detection module and / or an automated defect review module (ADR), and / or an automated defect classification module (ADC), and / or a measurement-related module, and / or other test modules. One or more test modules may be implemented as standalone computers, and their functions (or at least some of them) may be integrated into the test tool 120. In some embodiments, measurements obtained from the system 101 may be used by the test tool 120 and / or one or more test modules (or some of them) for further testing of the sample.

[0047] Those skilled in the art will readily recognize that the teachings of the subject matter of this disclosure are not constrained to the system shown in Figure 1, and equivalent and / or modified functions may be integrated or separated in other ways and implemented in any suitable combination of software, firmware and / or hardware.

[0048] It should be noted that the test system shown in Figure 1 can be implemented in a distributed computing environment, and the functional modules included in PMC102 can be distributed across several local and / or remote devices and linked by a communication network. In other embodiments, it should be further noted that at least some of the test tools 120, storage unit 122, and / or GUI 124 may be outside the test system 100 and may communicate with system 101 via the I / O interface 126. System 101 may be implemented as a standalone computer that can be used with the test tools. Alternatively, each function of system 101 may be integrated, at least partially, into one or more test tools 120, thereby facilitating and enhancing the functionality of the test tools 120 in test-related processes.

[0049] Next, referring to Figure 2A, a generalized flowchart is shown illustrating the measurement of a side recess in a semiconductor sample according to a specific embodiment of the subject matter of this disclosure.

[0050] As described above, side recesses are measured for semiconductor samples having a specific type of structure. For example, a sample may include a stack of one or more first layers of a first type and one or more second layers of a second type. The first and second layers are deposited alternately with respect to each other. The second layers are at least partially etched during the manufacturing process, thereby forming side recesses between each given second layer and two adjacent first layers.

[0051] This type of sample can be either a logic device such as a GAA device, or a memory device such as 3D NAND or 3D SCM. An example of such a specially structured sample is a GAA device, schematically shown in Figure 4 as described above.

[0052] First and second images of the sample can be obtained (e.g., from the test tool 120 or from the storage unit 122 via the I / O interface 126 by the PMC 102) (202). The first and second images can be acquired with an electron beam tool such as a SEM. For example, the SEM tool used herein may be a limit dimension scanning electron microscope (CD-SEM) configured to measure the limit dimensions of structural elements / features of the sample based on the captured images. According to a particular embodiment, the sample can be scanned using an electron beam with an incident energy specifically selected to penetrate to a predefined depth corresponding to a second target layer of the sample (e.g., by the electron beam tool 120) (210), as shown in Figure 2B, which shows a generalized flowchart of acquiring the first and second images according to a particular embodiment of the subject matter of this disclosure.

[0053] In a scanning electron microscope (SEM), different types of signals are generated when an electron beam strikes a sample. Secondary electrons (SEs) originate from the surface or near the surface of the sample. Secondary electrons (SEs) are the result of inelastic interactions between the primary electron beam and the sample and have lower energies than backscattered electrons. Specifically, SEs are created when incident electrons excite electrons in the sample, losing some of their energy in the process. The excited electrons move toward the surface of the sample and, if they still have enough energy, escape from the surface as secondary electrons. Because the depth at which detected SEs are produced is shallow, detected SEs are ideal for testing the topography of a sample's surface.

[0054] Alternatively, backscattered electrons (BSEs) are reflected back after the elastic interaction between the beam and the sample. This type of electron arises from a broad region within the interaction volume. This type of electron is the result of elastic collisions between electrons and atoms, which result in changes in the electron's orbit. Specifically, when an electron beam strikes a sample, some of the electrons are elastically deflected (without energy loss) from their original path by the atoms of the sample. These essentially elastically scattered primary electrons (high-energy electrons) that bounce back from the sample are called BSEs.

[0055] As explained, BSE originates from deeper regions of the sample, while SE originates from the surface region. Therefore, BSE and SE convey different types of information. For example, BSE images are highly sensitive to differences in atomic number and can therefore convey information about the internal structure and / or composition of the sample (i.e., this is called the see-through function of BSE, which allows us to investigate the sample at depths when sufficient incident energy is given), while SE images can provide more detailed surface information.

[0056] According to certain embodiments of the subject matter of this disclosure, the first image described above can be obtained by collecting secondary electrons (SE) emitted from the surface of a sample (e.g., by an array of SE detectors of the electron beam tool 120) (212). Note that the surface of the sample can refer to the outer surface of the sample exposed facing the electron beam, or a surface region of the sample that can extend from the outer surface to a depth near the surface. Thus the first image is also referred to herein as the SE image. The second image described above can be obtained by collecting backscattered electrons (BSE) scattered from the internal region of the sample between the surface and a second layer of the target (e.g., by at least one BSE detector of the electron beam tool 120). Thus the second image is also referred to herein as the BSE image. Thus the first image can provide information about the surface profile of the sample (e.g., surface topography), and the second image can provide information about the internal structure (and / or composition) of the internal region of the sample.

[0057] As shown in Figure 4, the sample may include a number of first layers and a number of second layers deposited alternately with each other. For example, the GAA structure 410 includes three first layers 402 (i.e., silicon layers) and three second layers 404 (i.e., silicon-germanium layers), and thus three lateral recesses are formed on each side of the structure, each lateral recess corresponding to the respective cavity formed between each second layer and the two adjacent first layers. For example, the illustrated lateral recess 408 is the second of the three lateral recesses, which is formed between the intermediate second layer (i.e., the second silicon-germanium layer) and the upper and bottom first layers adjacent to the intermediate second layer.

[0058] According to certain embodiments, lateral recesses with respect to a second layer of the target can be measured by using an electron beam with an incident energy specifically selected to penetrate to a predefined depth corresponding to the second layer of the target. Specifically, as will be described in more detail below, the currently proposed method can be used to measure the average recess of a sample (i.e., the average recess of a number of lateral recesses contained in the sample), and / or lateral recesses for specific layers (e.g., lateral recesses associated with a particular second layer of a target, such as the upper second layer or the intermediate second layer).

[0059] For example, to measure a specific lateral recess associated with the upper second layer 404, the incident energy of the electron beam can be specifically selected to penetrate to a predefined depth 414 corresponding to the upper second layer 404 (or nearby). For instance, the incident energy is selected to penetrate to a depth corresponding to the bottom (or nearby) of the second layer of the target (e.g., the upper second layer in the current example), as shown in Figure 4. In such a case, the lateral recess being measured is a layer-by-layer lateral recess, i.e., an upper layer lateral recess associated with the upper second layer.

[0060] As another example, to measure the average lateral recess with respect to an intermediate second layer, the incident energy of the electron beam can be specifically selected to penetrate to a predefined depth 416 corresponding to the intermediate second layer (or near it). In such a case, the lateral recess measured is the average lateral recess averaged between the upper layer lateral recess and the intermediate layer lateral recess. Similarly, if the incident energy of the electron beam is set to penetrate to a predefined depth 418 corresponding to the bottom second layer, the lateral recess measured is the average lateral recess averaged between the three lateral recesses per layer: the upper layer lateral recess, the intermediate layer lateral recess, and the bottom layer lateral recess.

[0061] In some embodiments, as described above, the incident energy of the electron beam is first set to a penetration depth suitable for measuring the upper layer lateral recess, and once the measurement is complete, the incident energy of the electron beam can be reset to a penetration depth suitable for measuring the average lateral recess between the upper layer lateral recess and the intermediate layer lateral recess. Then, as will be described in more detail with reference to Figure 3, the intermediate layer lateral recess can be derived based on the two measurements.

[0062] In some embodiments, a reference sample having a similar structure to the sample but without any recesses in the second layer can be simulated and used as a reference to select the level of incident energy required to penetrate to a specific intended depth corresponding to the second layer of the target of the sample to be tested. A sample of the subject having lateral recesses in a particular second layer can also be simulated. According to certain embodiments, the incident energy required to penetrate to a predefined depth corresponding to the second layer of the target can be specifically selected based on a comparison between the number of BSEs for the reference sample (without lateral recesses) and the number of BSEs for the sample of the subject (with lateral recesses in a particular layer).

[0063] Figure 7 shows an illustrative graph of the correlation between the difference in the number of BSEs received from a reference sample to a sample of interest and the level of incident energy used, according to a particular embodiment of the subject matter of this disclosure.

[0064] Graphs can be obtained by simulating a reference GAA device having a similar structure to the GAA described with reference to Figure 4 (e.g., having a superlattice stack), but without lateral recesses formed in the second layer (SiGe layer), and a target GAA having lateral recesses in the first, second, and third SiGe layers, respectively. Simulations can be performed using different incident energies to simulate scanning of the reference GAA and the target GAA, respectively, and the number of BSEs received from both simulated scans can be calculated and compared. The graph in Figure 7 shows the difference (Y axis) in the number of BSEs received from both scans for different levels of incident energy used for scanning (X axis) for various second layers of the sample. For example, the plot for layer 1 points to the difference (Y axis) in the number of BSEs received from scanning the reference GAA and scanning the target GAA having lateral recesses in the first (i.e., top) SiGe layer, for different levels of incident energy used for scanning (X axis). The Layer 2 plot shows the difference in the number of BSEs received from scanning the reference GAA and scanning the target GAA with side recesses in the second SiGe layer, for different levels of incident energy used for scanning (X-axis) (Y-axis). The Layer 3 plot shows the difference in the number of BSEs received from scanning the reference GAA and scanning the target GAA with side recesses in the third SiGe layer, for different levels of incident energy used for scanning (X-axis) (Y-axis).

[0065] As shown in the figure, when the incident energy is very low (e.g., less than 2 keV), the difference in BSE received from the two scans is close to zero. This means that the incident energy is not high enough for electrons to penetrate either of the second layers with depressions, and therefore there is no difference in the number of BSEs received from the two scans. As the incident energy increases, electrons begin to reach the upper second layer of the sample (e.g., the upper SiGe layer), and a difference in the number of BSEs received from the two scans (scanning of the reference GAA and scanning of the target GAA with depressions in the upper SiGe layer) is expected. This indicates that the upper second layer of the target GAA has lateral depressions compared to the reference GAA which does not have depressions in this layer (e.g., because of the depressions, there is less material to interact with electrons and contribute to electron scattering, so fewer electrons are received from the target GAA).

[0066] Therefore, in the plot for layer 1, the difference in the number of BSEs received from the two scans continues to increase as the incident energy increases from approximately 2 keV to 3.5 keV, which indicates that electrons with incident energies in this range are penetrating to the upper SiGe layer but have not yet reached the second and third SiGe layers (as shown in the figure, the plots for layers 2 and 3 remain near 0 in this energy range). An electron beam with incident energies selected in approximately this range can be used to measure the layer-by-layer depressions in the upper SiGe layer.

[0067] As the incident energy continues to increase (e.g., from approximately 3.5 keV to 4.0 keV), electrons can reach the second SiGe layer, and the difference in the number of BSEs received from the two scans in the layer 2 plot (the scan of the reference GAA and the scan of the target GAA where the second SiGe layer has depressions) continues to increase as shown in the figure. Electron beams with incident energies selected within approximately this range can be used to measure the mean depressions in the upper and second SiGe layers.

[0068] As the incident energy increases between 4.0 keV and 6.0 keV, electrons can reach the third SiGe layer, and the difference in the number of BSEs received from two scans in the layer 3 plot (scanning of the reference GAA and scanning of the target GAA with depressions in the third SiGe layer) begins to increase as shown in the figure. Electron beams with incident energies selected within approximately this range can be used to measure the mean depressions in the upper, second, and third SiGe layers. At relatively high incident energies (approximately 20 keV, not shown in Figure 7), the sensitivity of electrons to the three different layers is almost the same, indicating that the BSE signal is sensitive only to the mean depressions across the three layers. Such relatively high levels of incident energy can be used when measuring the mean depressions in a GAA device.

[0069] Continuing the explanation of Figure 2A, after the first and second images are obtained (as described above with reference to block 202 and Figure 2B), a first GL waveform that provides information on the gray level (GL) intensity distribution of the first image and a second GL waveform that provides information on the GL intensity distribution of the second image can be generated (for example, by the image processing module 104 in Figure 1) (204).

[0070] The first width of one or more first layers can be estimated based on a first GL waveform (e.g., by the measurement module 106 in Figure 1) (206). The second width of at least the second layer of the target can be estimated based on a second GL waveform (206). The side recess of the second layer of the target can be measured based on the first and second widths (e.g., by the measurement module 106 in Figure 1) (208).

[0071] Next, referring to Figure 5, examples of first and second images of a GAA structure according to a particular embodiment of the subject matter of this disclosure are shown.

[0072] As shown in the figure, image 502 is an exemplary first image (i.e., SE image) obtained by collecting SE emitted from the surface of the sample, and image 504 is an exemplary second image (i.e., BSE image) obtained by collecting BSE scattered from the internal region of the sample between the surface and the second layer of the target. The first image provides information about the surface profile (e.g., surface topography) of the sample. As shown in the figure, image 502 presents SE image representations of four GAA structures. For each GAA structure, the gray level intensity changes along a direction perpendicular to the longitudinal axis of the GAA structure, which represents the change in the surface profile of the GAA in that direction. For illustrative purposes, the surface profile 420 of GAA 400 is schematically illustrated in Figure 4. As shown in the figure, the surface profile 420 represents the outer surface topography of the first layer (i.e., the silicon layer) exposed to the electron beam during scanning.

[0073] As described above, the second image provides information about the internal structure (and / or composition) of the internal region of the sample between the surface and the second layer of the target. Image 504 presents the BSE image representations of four GAA structures. For each GAA structure, variations in the gray level intensity of the BSE image can reflect hidden lateral recess structures with respect to the rest of the second layer (i.e., the SiGe layer) during the etching process (i.e., the see-through function of the BSE).

[0074] Next, referring to Figure 6, examples of a first GL waveform and a second GL waveform according to a particular embodiment of the subject matter of this disclosure are shown.

[0075] As shown in the figure, a first GL waveform 602 is generated that provides information about the GL intensity distribution of the first image 502 (for example, its specific GAA structure), and a second GL waveform 604 is generated that provides information about the GL intensity distribution of the second image 504 in Figure 5. The first and second GL waveforms are generated along a direction perpendicular to the longitudinal axis of the GAA structure.

[0076] The first width of one or more first layers (e.g., a width 512 as illustrated in the SE image of Figure 5) can be estimated based on a first GL waveform. For example, the estimation of the first width may include estimating a first topo point of the first GL waveform. A topo point refers to a point on a signal waveform (e.g., a GL waveform) that is identified to correspond to a specific location in the geometric structure of the sample. For example, the first topo point may represent an estimated edge / boundary of the first layer (e.g., the outer boundary of the widest silicon layer, or the average boundary of three silicon layers). Specifically, in some embodiments, the first topo point can be estimated by calculating a derivative along the first GL waveform, applying a predefined derivative threshold to the first GL waveform to produce a first topo point, and measuring a first width between the first topo points.

[0077] For example, in the current example in Figure 6, two points corresponding to the derivative threshold of the first waveform 602 are identified as 606 and 608. Topographic points 606 and 608 can represent the estimated edge / boundary of the first layer (i.e., the silicon layer). A first width 610 can be measured between the two points 606 and 608, which represents the estimated width 512 of the first layer of the GAA structure.

[0078] A second width relating to at least the second layer of the target (e.g., a width of 514 as exemplified in the BSE image of Figure 5) can be estimated based on the second GL waveform. As described above, if the second layer of the target is the upper second layer, the estimated second width refers to the width of the second layer of the target. If the second layer of the target is a subsequent second layer following the upper second layer, e.g., an intermediate second layer or a bottom second layer, the estimated second width refers to the average width of the second layers up to the second layer of the target. As an example, estimating the second width may include estimating a second topo point of the second GL waveform. For example, the second topo point may represent an estimated edge / boundary relating at least the second layer of the target. Specifically, in some embodiments, the second topo point can be estimated by applying a predefined GL threshold to the second GL waveform and measuring the second width between the second topo points.

[0079] For example, in the current example in Figure 6, a predefined GL threshold (e.g., 70%) is applied to the second waveform 604, and two topo points 616 and 618 are identified. A second width 620 between the two points 616 and 618 can be measured, which represents an estimated width 514 as illustrated in Figure 5.

[0080] The lateral recess of the second layer of the target can be measured based on the first width 610 and the second width 620 (for example, by subtracting the second width from the first width).

[0081] In some embodiments, the measured lateral recess can be further calibrated against reference measurement data of a reference semiconductor sample obtained from a transmission electron microscope (TEM). Such calibration can improve the accuracy of the measurement. In some cases, the calibration can be performed based on a previously derived correlation between the corresponding measurement data from the electron beam tool and the reference measurement data obtained from the TEM.

[0082] Next, referring to Figure 3, a generalized flowchart is shown illustrating how to measure layer-by-layer lateral recesses and / or average lateral recesses according to a particular embodiment of the subject matter of this disclosure.

[0083] As described above, if the second layer of the target is the upper second layer of one or more second layers, the upper layer side recess formed between the upper second layer and its adjacent first layer can be measured using the method described above with reference to Figure 2A (302). In such cases, the incident energy of the electron beam must be specifically selected to penetrate to a depth corresponding to the upper second layer. In other words, in such cases, the measured side recess derived from Figure 2A refers to the upper layer side recess.

[0084] Once the measurement of block 302 is complete, the incident energy of the electron beam can be readjusted to penetrate to a depth corresponding to the subsequent second layer following the upper second layer (e.g., an intermediate or bottom second layer as illustrated in Figure 4), and the average lateral recess with respect to the subsequent second layer can be measured (304). For example, if the subsequent second layer is an intermediate second layer, the measured lateral recess refers to the average lateral recess averaged between the upper layer lateral recess and the intermediate layer lateral recess. In such a case, the layer-by-layer lateral recess of the subsequent second layer can be derived based on the average lateral recess and the upper layer lateral recess (306).

[0085] According to certain embodiments, the measurement process described above with reference to Figures 2A, 2B, and 3 may be included as part of a test strategy available to the system 101 and / or test tool 120 for testing a sample at runtime, such as performing a measurement operation on the sample (referred to as a measurement strategy in such cases). Therefore, the subject matter of this disclosure further includes systems and methods for generating a test strategy during the strategy setting stage, the strategy including steps such as those described with reference to Figures 2A, 2B, and 3 (and their various embodiments). It should be noted that the term “test strategy” should be interpreted broadly to include any strategy that may be used by a test tool for performing operations related to any type of test as described above.

[0086] It should be noted that the examples shown in this disclosure, such as the illustrated GAA structure, the acquired first and second images, the generated GL waveform, and the specific method for estimating the width and / or topo points as described above, are shown for illustrative purposes only and should not be considered in any way as limiting this disclosure. Other suitable examples / embodiments may be used in addition to or instead of the foregoing.

[0087] While specific embodiments of the measurement process of the present disclosure are described in relation to measuring side recesses in a semiconductor sample having a particular structure, i.e., the sample comprising a stack of two types of layers, i.e., one or more first layers of a first type and one or more second layers of a second type deposited alternately with respect to each other, wherein the second layers are at least partially etched, it should be noted that this is not intended to limit the measurement process of the present disclosure to being applicable only to such structured samples. Alternatively, a sample comprising only one material and therefore not layered may, in some cases, have side recesses formed on its sides, and the measurement process of the present disclosure may similarly be applied to such a sample for the purpose of measuring those side recesses.

[0088] For example, the measurement process in such a case may include obtaining a first image obtained by collecting secondary electrons (SE) emitted from the surface of the sample and a second image obtained by collecting backscattered electrons (BSE) scattered from an internal region of the sample between the surface and the depth of the target (e.g., corresponding to the bottom (or vicinity) of a lateral recess of the sample), wherein the semiconductor sample is scanned using an electron beam with an incident energy specifically selected to penetrate to the target depth, the first image providing information about the surface profile of the sample and the second image providing information about the internal structure of the internal region, generating a first GL waveform that provides information about the gray level (GL) intensity distribution of the first image and a second GL waveform that provides information about the GL intensity distribution of the second image, estimating a first width of the first layer based on the first GL waveform and a second width with respect to at least the second layer of the target based on the second GL, and measuring the lateral recess of the sample based on the first and second widths.

[0089] Among the advantages of the specific embodiments of the measurement process described herein is the provision of direct measurement of lateral recesses formed in the aforementioned semiconductor sample, which is non-destructive and has improved accuracy and throughput (TpT). This is made possible, at least by using the see-through function of the BSE signal in conjunction with the SE signal of an electron beam tool, where the electron beam tool consists of an electron beam with a relatively high voltage incident energy.

[0090] This disclosure should be understood to be limited in its application to the details described herein or shown in the drawings.

[0091] It will also be understood that the system described herein can be implemented, at least in part, on a properly programmed computer. Similarly, this disclosure envisions a computer program readable by a computer for performing the method described herein. This disclosure further envisions a non-temporary computer-readable memory that tangibly embodies a program of computer-executable instructions for performing the method described herein.

[0092] This disclosure is capable of other embodiments and can be practiced and implemented in various ways. Therefore, it should be understood that the language and terminology used herein are for illustrative purposes only and should not be considered limiting. Those skilled in the art will therefore recognize that the concepts upon which this disclosure is based can be readily utilized as a basis for designing other structures, methods, and systems to accomplish some of the objectives of the subject matter of this disclosure.

[0093] Those skilled in the art will readily recognize that various modifications and changes can be applied to the embodiments of the disclosure described above without departing from the scope of the attached claims and the scope of the disclosure as defined by the attached claims. [Explanation of Symbols]

[0094] 100 Test Systems 101 Computer-based systems 102 Processor and memory circuits 104 Image Processing Module 106 Measurement Module 120 Test Tools, Electron Beam Tools 122 storage units 124 Graphical User Interface 126 I / O interfaces 400, 410 GAA structure 402 Layer 1 404 Second Layer 406 Semiconductor substrates 408 Side recess, cavity recess 412 Width of side recess 414, 416, 418 Predefined depth 420 Surface Profile 502 Image 1 504 Second image 512 First width 514 The second width 602 First GL waveform 604 Second GL waveform 606, 608 Topo points 610 First width 616, 618 Topo points 620 Second width

Claims

1. A computerized system for measuring side recesses in a semiconductor sample, wherein the semiconductor sample includes a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with each other, and the second layer is at least partially etched, whereby side recesses are formed between each given second layer and two adjacent first layers thereof, the system comprising: an electron beam tool, scanning the semiconductor sample using an electron beam having an incident energy specifically selected to penetrate to a predefined depth corresponding to a target second layer of the sample, acquiring a first image by collecting secondary electrons (SE) emitted from the surface of the sample, and acquiring a second image by collecting backscattered electrons (BSE) scattered from an internal region of the sample between the surface and the target second layer, the first image providing information on the surface profile of the sample and the second image providing information on the internal structure of the internal region configured as an electron beam tool; a processing and memory circuit (PMC) operably connected to the electron beam tool, generating a first GL waveform providing information on the gray level (GL) intensity distribution of the first image and a second GL waveform providing information on the GL intensity distribution of the second image, estimating a first width of the one or more first layers based on the first GL waveform and a second width related to at least the target second layer based on the second GL waveform, measuring a side recess related to the target second layer based on the first width and the second width configured as a processing and memory circuit (PMC); A computerized system comprising the above.

2. The computerized system according to claim 1, wherein the semiconductor sample includes a gate-all-around (GAA) device, the first layer is made of silicon, and the second layer is made of silicon germanium.

3. The computerized system according to claim 1, wherein the target second layer is the upper second layer of the one or more second layers, and the measured side recess is an upper layer side recess formed between the upper second layer and an adjacent first layer thereof. **Claim 4**: The computerized system according to claim 3, wherein the PMC is further configured to measure an average side recess regarding a subsequent second layer following the second layer of the upper part, and to derive a side recess of the subsequent layer based on the average side recess and the upper layer side recess. **Claim 5**: The computerized system according to claim 1, wherein the second layer of the target is a subsequent second layer following the second layer of the upper part, and the measured side recess is an average side recess of an upper layer side recess formed between the second layer of the upper part and an adjacent first layer thereof, and a subsequent side recess formed between the subsequent second layer and an adjacent first layer thereof. **Claim 6** The computerized system according to claim 1, wherein the SE is collected by an array of SE detectors, and the BSE is collected by at least one BSE detector. **Claim 7** The computerized system according to claim 1, wherein the incident energy for penetrating to the predefined depth corresponding to the second layer of the target is specifically selected based on a comparison between the number of BSEs for a reference sample without side recesses and the number of BSEs for the semiconductor sample. **Claim 8** The computerized system according to claim 1, wherein estimating the first width includes calculating a derivative along the first GL waveform, applying a predefined derivative threshold to the first GL waveform to generate a first top point, and measuring the first width between the first top points to estimate the first top point of the first GL waveform. **Claim 9** The computerized system according to claim 1, wherein estimating the second width includes applying a predefined GL threshold to the second GL waveform to generate a second top point, and measuring the second width between the second top points to estimate the second top point of the second GL waveform. **Claim 10** The computerized system according to claim 1, wherein the PMC is further configured to calibrate the measured side recess with respect to reference measurement data obtained from a transmission electron microscope (TEM). **Claim 11** The computerized system according to claim 10, wherein the calibration is based on a previously derived correlation between corresponding measurement data from the electron beam tool and the reference measurement data obtained from the TEM.

12. A computerized method for measuring side recesses in a semiconductor sample, wherein the semiconductor sample includes a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with each other, and the second layer is at least partially etched, whereby side recesses are formed between each given second layer and two adjacent first layers thereof, the method being executed by a processing and memory circuit (PMC), obtaining a first image acquired by collecting secondary electrons (SE) emitted from the surface of the sample and a second image acquired by collecting backscattered electrons (BSE) scattered from an internal region of the sample between the surface and a target second layer, the semiconductor sample being scanned using an electron beam having an incident energy specifically selected to penetrate to a predefined depth corresponding to the target second layer, the first image providing information on the surface profile of the sample and the second image providing information on the internal structure of the internal region, generating a first GL waveform providing information on the gray level (GL) intensity distribution of the first image and a second GL waveform providing information on the GL intensity distribution of the second image, estimating a first width of the first layer based on the first GL waveform and at least a second width related to the target second layer based on the second GL, measuring side recesses related to the target second layer based on the first width and the second width A computerized method comprising the steps of:

13. The computerized method according to claim 12, wherein the target second layer is an upper second layer among the one or more second layers, and the measured side recesses are upper layer side recesses formed between the upper second layer and an adjacent first layer thereof.

14. The computerized method according to claim 13, further comprising measuring an average side recess related to a subsequent second layer following the upper second layer and deriving side recesses of the subsequent layer based on the average side recess and the upper layer side recess.

15. The second layer of the target is a subsequent second layer following the upper second layer, and the measured side recess is an average side recess of an upper layer side recess formed between the upper second layer and its adjacent first layer and a subsequent side recess formed between the subsequent second layer and its adjacent first layer. The computerized method according to claim 12.

16. The incident energy for penetrating to the predefined depth corresponding to the second layer of the target is specifically selected based on a comparison between the number of BSEs for a reference sample without side recesses and the number of BSEs for the semiconductor sample. The computerized method according to claim 12.

17. Estimating the first width includes calculating a derivative along the first GL waveform, applying a predefined derivative threshold to the first GL waveform to generate a first top point, and estimating the first top point of the first GL waveform by measuring the first width between the first top points. The computerized method according to claim 12.

18. Estimating the second width includes applying a predefined GL threshold to the second GL waveform to generate a second top point, and estimating the second top point of the second GL waveform by measuring the second width between the second top points. The computerized method according to claim 12.

19. The computerized method according to claim 12 further includes calibrating the measured side recess with respect to reference measurement data obtained from a transmission electron microscope (TEM).

20. A non-transitory computer-readable storage medium tangibly embodying a program of instructions that, when executed by a computer, cause the computer to execute a method for measuring side recesses in a semiconductor sample, the semiconductor sample including a stack of one or more first layers of a first type and one or more second layers of a second type deposited alternately with each other, the second layer being at least partially etched, thereby forming side recesses between each given second layer and two adjacent first layers, the method comprising Obtaining a first image acquired by collecting secondary electrons (SE) emitted from the surface of the sample, and a second image acquired by collecting backscattered electrons (BSE) scattered from an internal region of the sample between the surface and a second layer of the target, wherein the semiconductor sample is scanned using an electron beam having an incident energy specifically selected to penetrate to a predefined depth corresponding to the second layer of the target, the first image providing information on the surface profile of the sample, and the second image providing information on the internal structure of the internal region, obtaining, Generating a first GL waveform providing information on the gray level (GL) intensity distribution of the first image, and a second GL waveform providing information on the GL intensity distribution of the second image, Estimating a first width of the first layer based on the first GL waveform and at least a second width related to the second layer of the target based on the second GL, Measuring a side recess related to the second layer of the target based on the first width and the second width A non-transitory computer-readable storage medium including the above.

Images