Radio frequency package containing substrate with coefficient of thermal expansion matched mount pad, and associated manufacturing method

Abstract

To provide a highly reliable RF package with a cost effective manufacturing method.SOLUTION: An RF package 20 includes an HTP substrate 22 of a high thermal performance substrate including a metallic base structure 30 that has a front side facing a first RF power die 46 and a first die attach region on the front side of the base structure. A first coefficient of thermal expansion (CTE) matched mount pad 50 is bonded to the metallic base structure 30 and covers the first die attach region. The first CTE mount pad 50 has a CTE greater than the CTE of the RF power die 46 and less than the CTE of the metallic base structure 30. An electrically-conductive bonding material attaches the RF power die 46 to the first CTE matched mount pad 50. An RF circuit is integrated into the first RF power die 46 and electrically coupled to the metallic base structure 30 through the mount pad 50.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to microelectronics, and more particularly, to radio frequency packages (RF packages) comprising substrates having coefficient of thermal expansion (CTE) matching mount pads, and methods for fabricating such RF packages and substrates.

Background Art

[0002] Microelectronic RF packages comprise radio frequency circuits that may be implemented using one or more RF power dies. Examples of RF packages include power amplifier packages containing RF power dies with transistor-containing ICs mounted thereon for RF signal amplification purposes. Such RF power dies often tend to generate excessive heat when operating at higher power levels or frequencies and when fabricated using, for example, high power density die technologies including layered GaN materials. To dissipate the excessive heat generated during RF package operation, a given RF power die may be mounted using solder or another bonding material to a monolithic metal (e.g., Cu) body such as a metal base flange or metal coin embedded in a PCB. This provides a low thermal resistance path extending from the RF power die to a heat interface accessible from outside the package. When the RF package is mounted to a system-level PCB such as a motherboard, a system-level heat sink (e.g., a metal chassis or fin array) may be placed in thermal communication with the heat interface of the RF package, either by direct contact or by bonding with a thermally conductive material. During RF package operation, the excessive heat generated by the RF power die is extracted from within the RF package, conducted to the system-level heat sink, and ultimately transferred to the ambient environment by convection to maintain the peak temperature of the RF power die within acceptable limits.

Prior Art Documents

Patent Documents

[0003] [Patent Document 1] U.S. Patent No. 7083759 [Overview of the project]

[0004] Abbreviation Abbreviations that appear relatively infrequently in this specification are defined upon their first use, while abbreviations that appear more frequently in this specification are defined as follows:

[0005] CTE - Coefficient of Thermal Expansion Cu-copper GaN - Gallium Nitride IC (Integrated Circuit) MN-aligned network Mo-Molybdenum PA - Power Amplifier PCB - Printed Circuit Board RF (Radio Frequency) One or more embodiments of the present invention are described below with reference to the following drawings. Similar reference numerals indicate similar elements.

[0006] For the sake of simplicity and clarity, descriptions and details of well-known features and technologies may be omitted to avoid unnecessarily obscuring the exemplary and non-limiting embodiments of the invention described below. It is further understood that features or elements appearing in the accompanying drawings do not need to be shown to scale unless specifically indicated. For example, the dimensions of one element or area in the drawings may be exaggerated relative to other elements or areas to improve the understanding of embodiments of the invention.

[0007] Embodiments of this disclosure are shown in the accompanying drawings of the drawings briefly described above. Various modifications to exemplary embodiments can be conceived by those skilled in the art without departing from the scope of the invention as described in the appended claims.

[0008] Wherever it appears herein, the term “metal” refers to a material that is predominantly composed by weight of one or more metals, and potentially contains smaller amounts of any number and type of metallic or nonmetallic components. Similarly, a reference to a layer, structure, or other feature consisting of a specified metal (or more metals) indicates that the layer, structure, or other feature is predominantly composed by weight of the specified metal (or more metals). For example, a reference to a copper (Cu) layer indicates that the specified layer is predominantly composed of Cu by weight, but may contain smaller amounts of metallic or nonmetallic components. Similarly, a reference to a copper-molybdenum (Cu-Mo) material indicates that the material is predominantly composed of a combination of Cu and Mo by weight. Wherever it appears herein, all numerical references to the coefficient of thermal expansion (CTE) of a material or structure indicate a linear CTE and 10 -6 It is expressed in meters / meter per meter per Celsius temperature.

[0009] Wherever it appears in this specification, descriptions indicating that the first layer is "bonded to," "formed on," or "formed on" the second layer (or surface) do not require that the first layer be directly bonded to or in close contact with the second layer (or surface), unless otherwise specified. Therefore, such descriptions do not preclude the possibility that one or more intervening layers may exist between the first layer (or surface) and the second layer (or surface). In general, in this regard, the terms "over" and "on" do not require direct contact between the first layer formed "over" or "on" the second layer (or surface) and the second layer (or surface), unless otherwise indicated by an explicit description to that effect, such as a description indicating that the first layer is formed "directly on" or "in contact with" the second layer (or surface). Furthermore, wherever it appears in this specification, the terms "over" and "on" are not limited to orientation within a larger three-dimensional context. Therefore, the first layer beneath the second layer can be described as "formed on top of" the second layer when the first layer is deposited, grows, or generated on top of the second layer.

[0010] overview As briefly described above, RF package architectures featuring RF power dies mounted to a metal body or structure offer improved thermal performance by more efficiently dissipating excess heat generated during package operation. In one such RF package architecture, each RF power die provided in the RF package is mounted to a monolithic metal body, such as a single piece of Cu or another metal having a nearly homogeneous composition, using solder or another thermally conductive bonding material. This creates a low thermal resistance path extending from the RF power die through the monolithic metal body to the exposed thermal interface along the back surface of the RF package. As used herein, the term “back surface” refers to the main outer surface of the RF package, viewed in the height or thickness direction of the package, closer to the package substrate (e.g., PCB or base flange) than the opposing “upper” surface of the RF package. Examples of such monolithic metal bodies include metal coins or slags, which are composed entirely of Cu (i.e., alloys containing Cu as their main component) and embedded in the electrically routed substrate (e.g., PCB) around which the RF package is constructed. Alternatively, such monolithic metal bodies can take the form of larger metal base flanges that are uniform and lack electrical routing features, derived from a single material (e.g., Cu). This type of metal base flange may generally be incorporated into an air cavity and overmolded (encapsulated) package, functioning as both a heat sink and terminals for the RF package. In yet another example, an RF power die may be mounted to a monolithic metal body in the form of a metal block (hereinafter referred to as a “die mounting pad”), similar to a base flange but provided in the form of a lead frame. The lead frame also comprises other metal parts that are overmolded, separated by singulation, and ultimately form contacts for the RF package when fabricated, for example, as a flat no-lead or land grid array (LGA) package.

[0011] The above RF package architecture (an RF package in which an RF power die is mounted to a monolithic metal body) offers improved heat dissipation capabilities, but comes with limitations. These limitations often arise from a mismatch between the CTE of each RF power die within a given RF package and the CTE of one or more monolithic metal bodies on which the RF power dies are mounted. Such CTE mismatches (referred to herein as "die-substrate CTE mismatches") are significant, and typically of greater concern, for RF packages that feature RF power dies operating at higher power levels, higher frequencies, or fabricated using high-power-density die substrates such as layered GaN substrates. In such cases, a considerable amount of heat can be generated by a given RF power die during package use, and this heat is conductively transferred to the underlying substrate, specifically to the monolithic metal body on which one or more RF power dies are mounted. As a result, a significant thermal expansion mismatch can occur between the RF power die and the monolithic metal body (e.g., Cu coin, base flange, or die mounting pad), and the monolithic metal body may have a CTE approximately three times or more greater than that of the RF power die. If not properly addressed, the mechanical stress factors resulting from such a thermal expansion mismatch can lead to varying degrees of structural degradation over time and across repeated thermal cycles, which can ultimately degrade the overall electrical and thermal performance of the RF package. To provide a specific but non-limiting example, the carrier PA die provided in the Doherty PA architecture, as further described below in conjunction with Figure 6, may be particularly vulnerable to problems arising from die-substrate CTE mismatch if such a die tends to operate in an ON state at higher frequencies than the associated peak transistor die operates.

[0012] To help address the above-mentioned problems arising from CTE mismatch between the die and the substrate, industry efforts have been made to develop and commercially introduce metal-based flanges with reduced CTE while retaining relatively high thermal conductivity, relatively high electrical conductivity, and other desirable properties. This can be achieved by imparting a laminated or multilayer structure to the metal-based flange, rather than the monolithic structure of the kind described above. This type of metal-based flange (hereinafter, “multilayer flange”) typically comprises three or more flange layers bonded in a vertically stacked or laminated relationship. For example, a multilayer flange may comprise multiple layers of a first metallic material (e.g., Cu) having a first CTE, and one or more additional layers of different metallic materials (e.g., Mo or Cu-Mo) having a second CTE lower than the first CTE. The layers of the multilayer flange may be bonded together using, for example, solder, sintered material, or similar bonding material. By incorporating multilayer flanges into a given RF package, the CTE mismatch between the die and the substrate can be reduced to alleviate the mechanical stress factors at the die-substrate interface. This, in turn, can minimize the potential for structural degradation at the die-substrate interface over repeated thermal cycles of the RF package, thereby improving overall package reliability.

[0013] While offering the advantages described above, integrating multilayer flanges into RF packages still comes with certain trade-offs, as they are conventionally designed and manufactured. Integrating a multilayer flange into a given RF package can increase manufacturing costs due to the cumulative volume of expensive material contained within the flange, as well as the greater costs incurred during the manufacturing of the flange itself. Conventional multilayer flanges can also be undesirably susceptible to variations in dimensional properties, such as fluctuations in flange flatness due to warping, during high-temperature processing. When supporting multiple RF power dies and potentially other heat-generating microelectronic components, a given multilayer flange typically provides uniform heat removal at essentially equivalent rates from all supported microelectronic components. As a natural consequence, it is typically impractical or unfeasible to tailor a conventional multilayer flange to provide a lower thermal resistance path from a selected RF power die while providing a somewhat higher thermal resistance path from other microelectronic packages within a given RF package (e.g., other RF power dies). Finally, as a more general limitation, conventional multilayer flanges are often poorly suited, if not impossible, to integration into many common types of RF packages, including RF packages fabricated using electrically routed substrates (e.g., PCBs) and RF packages fabricated using leadframe-based manufacturing approaches (e.g., flat leadless or LGA packages). For these reasons alone, there is a continuing industrial demand for improved RF package substrates that support efficient heat extraction from packaged RF power dies and further minimize die-substrate CTE mismatches, while being suitable for integration into a wide range of RF package types. Ideally, such package substrates would also offer other advantages such as a relatively high level of design flexibility, reduced potential for unwanted changes or variations in dimensional properties (e.g., flatness), and compliance with cost-effective manufacturing processes.

[0014] To meet the above industrial requirements, this document discloses a microelectronic RF package comprising a specific high-thermal-performance substrate on which RF power dies are mounted. As indicated by the description “high-thermal-performance”, the high-thermal-performance (HTP) substrate of this disclosure supports highly efficient heat removal from the packaged RF power dies while reducing CTE mismatch between the RF power dies and the corresponding region of the HTP substrate on which the dies are mounted (hereinafter, the “die mounting region” of the HTP substrate). Embodiments of the HTP substrate comprise a metal-based structure to which one or more CTE-matched mounting pads are bonded by diffusion bonding or by using a thermally conductive bonding material such as solder, brazing, or sintering material. The mounting pads are “CTE-matched” in the sense that a given mounting pad is given a CTE that is smaller than the CTE of the metal-based structure and larger than the CTE of a particular one or more RF power dies mounted to the mounting pad using a thermally conductive (and often conductive) bonding material. In practice, a given CTE-matched mounting pad functions as an intermediate CTE structure or bridge to buffer the die mounting interface from thermal expansion mismatches that may occur with thermal cycling of the RF package when the heat-generating RF power die is directly mounted to the metal base structure. As a result, the overall reliability of the RF package is improved, while the RF package efficiently dissipates excess heat generated by the RF power die contained within the RF package while maintaining optimized thermal performance characteristics. In addition, in embodiments where the HTP substrate functions as a terminal of the RF package, such as when the RF package takes the form of a PA package comprising one or more PA dies having terminals electrically coupled to the metal base structure, the HTP substrate may further provide a low electrical resistance path extending from the PA dies through the CTE-matched mounting pad to the metal base structure.

[0015] The CTE-matched mounting pads incorporated into the HTP substrate function as localized substrate structures that provide the desired CTE-matching functionality, as described above. This not only reduces the HTP substrate's susceptibility to dimensional irregularities of conventional multilayer flanges, such as variations in substrate flatness due to warping, but the HTP substrate may also be designed to provide highly tuned thermal tuning, optimizing heat dissipation from various RF power dies (or other substrate support components) within the RF package, for example, by variations in the volume and / or composition of a given CTE-matched mounting pad. For example, in an implementation where a given RF package takes the form of a Doherty PA package comprising one or more peak PA dies and carrier PA dies, the carrier PA dies (e.g., those with a greater tendency to generate heat) may be mounted on a first CTE-matched mounting pad fabricated to have a larger volume and / or higher thermal conductivity, while the peak PA dies are mounted on a second CTE-matched mounting pad having a smaller volume and / or lower thermal conductivity than the first CTE-matched mounting pad. Alternatively, in such embodiments, the carrier PA die may be mounted on a CTE-matched mounting pad, while the peak PA die is mounted directly to a metal base structure. Yet another possibility is that the carrier PA die and peak PA die may be mounted on a single, more expandable CTE-matched mounting pad, or alternatively, on separate CTE-matched mounting pads having similar, if not substantially identical, volume and thermal conductivity. The HTP substrate embodiment may also provide increased thermal diffusivity, for example, when one or more CTE-matched mounting pads cooperate with the metal base structure to form a low-thermal-resistance inverted T-shaped structure, which is embedded in the dielectric substrate (e.g., PCB) in a coin-like manner and increases in volume as it moves away from a given RF power die toward the thermal interface of the RF package. At the same time, the volume of more expensive material provided in the HTP substrate embodiment can be minimized (for dimensionally equivalent multilayer flanges), reducing the overall material cost associated with incorporating the HTP substrate into a given RF package.

[0016] Due to the structural features described above, embodiments of the HTP substrate offer a high level of design flexibility and are suitable for integration into a wide range of RF package types. As a first example, embodiments of the HTP substrate are well suited for integration into RF packages fabricated using electrically routed substrates such as PCBs. In this case, the metal base structure may take the form of one or more metal base coins embedded within the dielectric substrate body and to which one or more CTE-matched mount pads are bonded, or may encompass such coins. As a second example, embodiments of the HTP substrate may be integrated into RF packages fabricated using leadframe-based manufacturing approaches such as dual flat no-lead (DFN), quad flat no-lead (QFN), and other flat no-lead packages, as well as LGA packages and similar package types. In this case, the metal base structure may take the form of a central metal block of the leadframe (again, referred to herein as the "die attach pad" of the leadframe). As a further example, embodiments of the HTP substrate can be integrated into RF packages including both overmolded RF packages and air cavity RF packages of the type commonly fabricated using metal base flanges. In this case, the metal base structure may take the form of a modified metal base flange having a monolithic or layered structure. In this latter example, one or more CTE-matched mounting pads may be bonded to the upper part (die-facing surface) of the metal base flange, and in certain embodiments, may be at least partially embedded or recessed within the base flange body to provide an HTP substrate that is ultimately incorporated into the RF package.

[0017] Regardless of the specific RF package type into which the HTP substrate is incorporated, embodiments of the HTP substrate are suitable for cost-effective manufacturing processes. For example, embodiments of CTE-matched mount pads may be provided in the form of a first interconnected array having a desired (e.g., grid or strip) spatial layout, where the mount pads are interconnected by narrowed intermediate structures such as spars or tie bars, or physically bonded together. A relatively large number of HTP substrates may then be fabricated in parallel by processing the CTE-matched mount pad arrays (e.g., by bonding them to a corresponding array of metal-based structures), and in some cases, undergo further processing to initiate RF package manufacturing before the separation or singulation of the CTE-matched mount pad arrays. An example of such a large-scale array-based manufacturing approach is described below in conjunction with Figures 7–10. In addition to or instead of this, embodiments of the HTP substrate may have certain properties that facilitate high structural integrity, low thermal resistance sintering, or diffusion bonding at the interface between the metal-based structure and the CTE-matched mount pads, as will be further described below in conjunction with Figures 11 and 12. Prior to this, an exemplary RF package (specifically, a Doherty PA package) comprising an HTP substrate with multiple CTE-matched mounting pads to which various RF power dies are mounted is described in conjunction with Figures 1 to 6. While embodiments of the HTP substrate can be incorporated into a wide range of RF package types comprising one or more RF power dies mounted on a lower substrate used for heat dissipation and possibly electrical interconnection purposes, as described below in conjunction with specific RF package types having particular circuit layouts or structures (i.e., air cavity packages with Doherty PA circuit structures). [Brief explanation of the drawing]

[0018] [Figure 1]Cross-sectional view of an RF package (here, an air cavity PA package) comprising an RF power die and a high thermal performance (HTP) substrate having a CTE-matched mount pad to which the RF power die is attached, shown according to an exemplary embodiment of the present disclosure. [Figure 2] Isometric cross-sectional view of an RF package (here, an air cavity PA package) comprising an RF power die and a high thermal performance (HTP) substrate having a CTE-matched mount pad to which the RF power die is attached, shown according to an exemplary embodiment of the present disclosure. [Figure 3] Isometric view of the RF power die and the HTP substrate provided in the exemplary air cavity PA package shown in FIGS. 1 and 2. [Figure 4] Top view (plan view) of the RF power die and the HTP substrate provided in the exemplary air cavity PA package shown in FIGS. 1 and 2. [Figure 5] Exploded view of the RF power die and the HTP substrate provided in the exemplary air cavity PA package shown in FIGS. 1 and 2. [Figure 6] Simplified schematic diagram of an exemplary Doherty PA circuit structure in which a part thereof can be implemented using the RF power die provided in the exemplary air cavity PA package shown in FIGS. 1 to 5, according to an embodiment of the present disclosure. [Figure 7] Diagram showing, step by step in order, an exemplary manufacturing method for manufacturing the HTP substrate shown in FIGS. 1 to 5 together with some similar or identical HTP substrates, using a large-scale array-based manufacturing approach. [Figure 8] Diagram showing, step by step in order, an exemplary manufacturing method for manufacturing the HTP substrate shown in FIGS. 1 to 5 together with some similar or identical HTP substrates, using a large-scale array-based manufacturing approach. [Figure 9] Diagram showing, step by step in order, an exemplary manufacturing method for manufacturing the HTP substrate shown in FIGS. 1 to 5 together with some similar or identical HTP substrates, using a large-scale array-based manufacturing approach. [Figure 10]Figures 1-5 illustrate a step-by-step exemplary fabrication method for manufacturing the HTP substrates shown in Figures 1-5, along with several similar or identical HTP substrates, using a large-scale array-based manufacturing approach. [Figure 11] A plan view (top view) of an HTP substrate having a CTE-matched mounting pad or inlay having an upper die support surface that is substantially coplanar with the top surface of a metal base structure (provided here as a metal base flange). [Figure 12] A cross-sectional view of an HTP substrate having a CTE-matched mounting pad or inlay having an upper die support surface that is substantially coplanar with the upper surface of a metal base structure (provided here as a metal base flange). [Figure 13] A simplified cross-sectional view of a PA package, as shown according to further exemplary embodiments, comprising an RF power die and an HTP substrate having a dielectric body, a metal base structure in the form of embedded metal coins, and CTE-matched mounting pads bonded to the base structure. [Figure 14] A simplified cross-sectional view of a PA package, as shown in accordance with further exemplary embodiments of the present disclosure, comprising an RF power die and an HTP substrate having a dielectric body, a metal base structure in the form of a lead frame die mounting pad, and a CTE-matched mounting pad bonded to the die mounting pad. [Modes for carrying out the invention]

[0019] General description of an exemplary RF package with an HTP substrate Figures 1 and 2 are cross-sectional and isometric cross-sectional views, respectively, of an exemplary RF package comprising an HTP substrate 22, as shown according to an exemplary embodiment. In the illustrated example, the RF package 20 takes the form of a molded air cavity package. However, in alternative implementations, the RF package 20 may take other forms, such as an overmolded package without a gas-filled cavity (also called a “plastic package” or “encapsulated package”), an air cavity package constructed using a window frame approach, or an RF package with different lead types, such as a no-lead package or a gull-wing package. Moving from top to bottom in Figures 1 and 2, the RF package 20 comprises a lid or cover piece 24, a plurality of outwardly projecting package leads 26, and a lower molded package body 28. The molded package body 28 is formed around the HTP substrate 22, specifically around a flange-like metal base structure 30 provided on the HTP substrate 22. The RF package 20 comprises or contains a central air cavity 32, which is primarily bounded by a cover piece 24, a molded package body 28, and a metal base structure 30 of the HTP substrate 22. Referred to as the "air cavity" by industry standards, the air cavity 32 may contain air, another inert gas, or a gas mixture, and may or may not be partially exhausted or pressurized from the surrounding environment. While the RF package 20 is usefully manufactured to minimize leakage between the air cavity 32 and the surrounding environment, the airtightness of the air cavity 32 varies by embodiment.

[0020] The molded package body 28 can be formed to have a variety of different geometric shapes and structural features. In the illustrated example, specifically, the molded package body 28 is manufactured to include a bottom edge portion or lower peripheral skirt 34, and the terms “bottom,” “bottom,” and similar terms relating to orientation are defined based on proximity to the bottom main surface or back surface 36 of the metal base structure 30, which may be plated or left exposed. The lower peripheral skirt 34 is bonded to the outer periphery of the metal base structure 30 of the HTP substrate 22, centered on the centerline 38 of the RF package 20, and extends around the outer periphery of the metal base structure 30. The bottom main surface or back surface 36 of the metal base structure 30 is provided in the molded package body 28 and is exposed through a lower central opening whose periphery is defined by the lower peripheral skirt 34. By exposing the back surface 36 of the metal base structure 30 from the outside or underside of the RF package 20 in this way, electrical connections to the metal base structure 30 may be made, for example, useful when the HTP substrate 22 functions as a (e.g., ground) terminal of the package 20. Another advantage is that the exposed area of ​​the back surface 36 of the base structure functions as a thermal interface of the RF package 20 to facilitate heat removal from the RF package 20 by conductive heat transfer through the HTP substrate 22, as described in detail below. The aforementioned advantages are generally optimized when at least a large portion, if not the substantial entirety (considered by surface area) of the back surface 36 of the base structure is exposed through the peripheral skirt 34 of the molded package body 28, as illustrated.

[0021] The molded package body 28 further comprises one or more inwardly extending ledges or "lead isolation shelves 40" that penetrate inward toward the package centerline 38 and extend along the upper surface of the metal base structure 30 or the outer periphery of the die-facing surface 42. The lead isolation shelves 40 are located beneath the inner termination portions of the package leads 26, which extend into the package interior of the RF package 20 and are exposed in the air cavity 32 for interconnection (e.g., wire bonding) with microelectronic components (e.g., RF power dies 46, 48 described below) provided within the RF package 20. The lead isolation shelves 40 effectively function as an intervening dielectric layer and, viewed vertically through the RF package 20 along the package or device centerline 38, are located between the respective undersides of the package leads 26 and the front or upper surface 42 of the metal base structure 30 (Figure 1). Thus, the lead isolation shelves 40 provide lead flange electrical insulation while further assisting in the mechanical bonding of the package leads 26 to the HTP substrate 22. Finally, the lead isolation shelf 40 may surround the peripheral surface of the internal lead end 44, while leaving the upper surface of the internal lead end 44 exposed from inside the package for subsequent electrical interconnection.

[0022] The RF package 20 may comprise any number and type of microelectronic components, including one or more RF power dies, and optionally additional IC dies having other circuits such as bias circuits, harmonic terminations, and impedance matching networks. In the illustrated example, the RF package 20 comprises a first RF power die 46 (shown in Figures 1 to 5) and a second RF power die 48 (shown in Figures 3 to 5). The RF power dies 46, 48 are mounted on CTE-matched mounting pads 50, 52 provided on the HTP substrate 22 using one or more bodies or layers 54, 56 made of conductive bonding material such as sintered material, solder material, or conductive die mounting material. Multiple bond pads 58 located on the front of the RF power die 46, addressing the first RF power die 46 and exclusively shown in Figure 1, can be electrically interconnected with the exposed interior 44 of the package leads 26, for example, using multiple wire bond arrays 62. In alternative implementations, a different interconnection approach may be used to electrically interconnect the bond pad 58 of the RF power die 46 with the corresponding package terminals. The first lead 26(a) protrudes from the first side of the RF package 20 and functions as an input lead electrically coupled to the input (e.g., gate) terminal of the RF power die 46. The second lead 26(b), on the other hand, protrudes from the second side, i.e., the opposite side, of the package 20 and functions as an output lead electrically coupled to the output (e.g., drain) terminal of the RF power die 46. In certain examples, the HTP substrate 22 may function as the ground terminal of the RF package 20. Thus, the HTP substrate 22 may be electrically coupled to the source terminal of the RF power die 46. Specifically, the HTP substrate 22 may be electrically coupled to the source region of one or more peaks or carrier transistors formed on the RF power die 46. In embodiments, the RF power die 46 is electrically coupled to the HTP substrate 22 via a back metal layer 60 (Figure 1). The back metal layer 60 may be a plated metal layer or multilayer system formed on the back surface of the RF power die 46.

[0023] Referring here to Figures 3-5 in conjunction with Figures 1 and 2, the RF package 20 is manufactured for integration into a Doherty PA circuit structure in a particular embodiment, an example of such a Doherty PA circuit described below in conjunction with Figure 6. In such an embodiment, the RF power die 46 may function as a carrier PA die carrying an integrated carrier transistor power amplifier IC electrically coupled between package leads 26(a),(b). By comparison, the RF power die 48 may function as a peak PA die carrying a peak transistor IC electrically coupled between an additional set of package leads (not shown) that are similar to or substantially identical to leads 26(a),26(b) shown in Figures 1 and 2. Thus, similar to the above, the RF power die 48 may have an input (e.g., gate) terminal coupled to a second input lead of the RF package 20, an output (e.g., drain) terminal coupled to a second output lead of the RF package 20, and a source terminal coupled to the HTP substrate 22 (which in this example functions as the ground terminal of the RF package 20). Various additional components (e.g., additional dies and / or surface mount devices (SMDs)) may be incorporated into the RF package 20 to provide other functions such as impedance matching on the input and / or output sides of the packaged RF power dies 46, 48. After the RF power dies 46, 48 (and any other circuit elements) are placed inside the RF package 20 and interconnected with the corresponding package leads, the cover piece 24 is positioned on the molded package body 28 and bonded to the upper periphery 64 of the package body 28 to seal the air cavity 32. In particular, the lower periphery of the cover piece 24 may be bonded to the upper periphery 64 of the molded package body 28 by a ring of bonding material 66 to provide a substantially airtight seal around the periphery of the interface between the cover and the body. Furthermore, in further implementations, the RF package 20 may take other forms, such as a fully enclosed package without an air cavity and cover piece.

[0024] The HTP substrate 22 can be fabricated to have any practical number of CTE-matched mounting pads. In the example in Figure 1, the CTE-matched mounting pads project upward from the upper surface 42 of the metal base structure 30, forming raised pedestal-like support features. In embodiments, the HTP substrate 22 may be fabricated to have a single CTE-matched mounting pad to which one or more RF power dies (e.g., RF power dies 46, 48) and optionally other heat-generating microelectronic components are mounted using a suitable thermally conductive bonding material. In other examples, the HTP substrate 22 may have three or more mounting pads. Each of the three or more mounting pads supports a different semiconductor die, e.g., an RF power die included in a single-stage or multi-stage amplifier section, a die with an impedance matching network, a die with a bias circuit, or a die with another type of integrated circuit that is usefully incorporated into the RF package 20. In the illustrated example, as most clearly shown in Figures 3 to 5, the HTP substrate 22 comprises two CTE-matched mounting pads 50, 52 bonded to the die-up surface 42 of the metal base structure 30. In a particular example, the CTE-matched mounting pads 50, 52 may be bonded to the metal base structure 30 using one or more layers of thermally conductive bonding material 70, 71, as shown in Figure 5. In this case, the thermally conductive bonding material 70, 71 may consist of solder material, sintering material, brazing material, or other bonding material having relatively high thermal conductivity. In another embodiment, the CTE-matched mounting pads 50, 52 are diffusion-bonded to the metal base structure 30. In this case, the conductive bonding material layers 70, 71 may be omitted from the HTP substrate 22. The CTE-matched mounting pads 50 and 52 are each formed and positioned to cover the die mounting area of ​​the metal base structure 30, that is, the area of ​​the base structure 30 directly beneath the RF power dies 46 and 48 when viewed along an axis that extends perpendicularly to the front or top surface 42 of the base structure 30 (parallel to the center line 38).In the illustrated example, the CTE-matched mounting pads 50, 52 are specifically spaced along the longitudinal direction of the RF package 20, corresponding to an axis extending perpendicular to the centerline of the HTP substrate 22, for example, the X-axis in the coordinate legend 68 (Figures 1 and 4). However, in further embodiments, the specific dimensions, shape, and spatial orientation of the CTE-matched mounting pads 50, 52 may be modified to best suit a particular RF package design or circuit layout.

[0025] Continuing to refer to Figures 1 to 5, the CTE-matched mounting pads 50 and 52 each consist of one or more thermally conductive materials. Wherever it appears herein, the term “thermally conductive” is defined as a material having a thermal conductivity (watts / meter Kelvin) greater than 10 at 25 degrees Celsius. The CTE-matched mounting pads 50 and 52 are also manufactured to have a CTE greater than that of the respective supported RF power dies and less than that of the metal base structure 30. Thus, in the illustrated example, the CTE-matched mounting pad 50 is manufactured or selected to have a CTE greater than that of the RF power die 46 and less than that of the metal base structure 30. Similarly, the CTE-matched mounting pad 52 is given a CTE greater than that of the RF power die 48 but less than that of the metal base structure 30. In many cases, the CTE of the mounting pads is closer to that of the base structure 30 than to that of the respective RF power dies 46 and 48. Thus, the CTE of the RF power dies 46 and 48 varies between embodiments depending, for example, on the die technology used to manufacture the dies 46 and 48, such as whether the RF power dies 46 and 48 are fabricated using bulk silicon, a layered GaN substrate (e.g., a gallium nitride / silicon carbide (GaN / SiC) substrate), or another semiconductor-containing material. Furthermore, if different die technologies are used to manufacture the dies 46 and 48, the RF power dies 46 and 48 may have different CTEs. Generally, the RF power dies 46 and 48 often have a CTE less than 6.5 each, and in many cases, they may have a CTE in the range of about 3 to about 5 each. In comparison, in embodiments, the CTE of the metal base structure 30 may be more than twice the CTE of the die, depending on one or more materials from which the base structure 30 is fabricated. For example, in an embodiment in which the metal base structure 30 is predominantly composed of Cu by weight, the metal base structure 30 may have a CTE in the range of about 16 to about 17, while the CTE of the die may be less than 6.5, and possibly less than 5. In other examples, the metal base structure 30 may be made from multiple material layers (including one or more Mo-containing layers) and may have a cumulative CTE smaller than the range described above, as will be further described below.

[0026] To further describe the CTE of the mounting pads, in many cases, CTE-matched mounting pads 50, 52 have similar or identical compositions and therefore share substantially equivalent CTEs. In other implementations, the CTE-matched mounting pads 50, 52 may have different configurations or various compositions selected to give the mounting pads 50, 52 different CTEs tailored to the properties of one or more microelectronic components supported by the mounting pads (e.g., the CTE of the supported RF power die, or the tendency of the RF power die to generate a large amount of excess heat). Each of the CTE-matched mounting pads 50, 52 may be a monolithic structure made of a single (e.g., homogeneous or composite) material having a target CTE and other desirable properties such as relatively high thermal conductivity and electrical conductivity. In this case, the CTE-matched mounting pads 50, 52 may be monolithic or single block-like structures made of composite or metallic materials (e.g., Mo or Mo-Cu alloy) having a CTE within the desired range, relatively high thermal conductivity, and often even relatively high electrical conductivity. Alternatively, as shown in Figures 1 to 5, the CTE-matched mount pad 50 may be manufactured as a layered or laminated structure capable of comprising any practical number of mount pad layers 72, 74, 76, 78 (as identified in Figure 2). For example, in the latter case, each of the layers 72, 74, 76, 78 may consist of a metallic material and, when configured in this manner, may be referred to herein as a “metallic layer.” A given metallic layer may consist entirely of essentially pure metals (i.e., metals with a purity of more than 99.9% by weight), such as essentially Cu, Mo, silver (Ag), gold (Au), aluminum (Al), or nickel (Ni). In other examples, a particular “metallic layer” may consist of an alloy or composite material containing one or more metals (e.g., Cu and / or Mo) as its main component, in addition to potentially smaller amounts of other metallic or nonmetallic components.In the embodiment, each of the CTE-matched mounting pads 50, 52 may have a lower thermal conductivity than the metal base structure 30, and the acceptable trade-off achieved when manufacturing the mounting pads 50, 52 is that they have a reduced CTE while also having a slightly to moderately reduced thermal (and possibly electrical) conductivity compared to the base structure 30 or a conventional metal base flange.

[0027] In various implementations, one or more CTE-matched mount pads (e.g., mount pads 50, 52) provided on the HTP substrate 22 may comprise three to five mount pad layers, but a given CTE mount pad may have as few as two layers or more than five layers. Specifically, in the illustrated example, the CTE-matched mount pads 50, 52 each comprise four mount pad layers 72, 74, 76, 78. These mount pad layers are bonded together in a stacked or laminated relationship. In this case, the upper mount pad layer 72 may be made of a material having a higher thermal conductivity and CTE than one or more of the lower mount pad layers 74, 76, 78. For example, in a particular embodiment, the upper mount pad layer 72 may be made of essentially pure Cu, or alternatively, a Cu-based alloy or composite material having a Cu content higher than the Cu content of one or more of the mount pad layers 74, 76, 78. In one embodiment, the upper mount pad layer 72 and the intermediate mount pad layer 76 are each made of a Cu-based alloy or composite material having a first Cu content, while the intermediate mount pad layer 74 and the lower mount pad layer 78 are made of dissimilar alloys or composite materials that contain no Cu or less Cu by weight. Furthermore, the mount pad layers 74 and 78 may be made of a Mo-based material such as essentially pure Mo (having a CTE of about 5 or more) or a Cu-Mo composite or alloy having a Cu content lower than that of the mount pad layers 72 and 76. Thus, the thermal conductivity of the mount pad layers 74 and 78 may be slightly lower than that of the mount pad layers 72 and 76 (although still objectively higher), while the CTE of each of the metal layers 74 and 78 is smaller than that of the mount pad layers 72 and 76 in order to reduce the effective cumulative CTE of the mount pads 50 and 52.

[0028] If made of a metallic material, the main surfaces of the mounting pad layers 72, 74, 76, 78 may be plated, coated, or left exposed. In an alternative embodiment, the CTE-matched mounting pads 50, 52 may have a multilayer composition or consist of different material regions, one or more layers (or regions) of which are made of a material having a thermal conductivity exceeding that of essentially pure copper (e.g., 386 watts per meter Kelvin (W / m·K)), such as diamond polycarbonate material, composite material (e.g., diamond-metal composite materials such as diamond Au, diamond Ag, and diamond Cu), pyrolytic graphite, and materials containing allotropes of carbon such as graphene and carbon nanotube-filled materials. Alternatively, as described above, the CTE-matched mount pads 50, 52 may have a monolithic or non-layered composition in further implementations and may consist of either a metallic material or other material referred to herein, each having relatively high thermal conductivity and relatively high electrical conductivity when the RF power dies 46, 48 are electrically coupled to the metal base structure 30. Furthermore, when manufactured as a composite material block, selected surfaces of the CTE-matched mount pads 50, 52 may be coated or plated (e.g., by an Ag-containing plating layer or multilayer system) along the mount pad base structure interface or bond line described below to provide a high-integrity metallurgical bond.

[0029] The specific method by which the mount pad layers 72, 74, 76, 78 are bonded in a stacked or vertically overlapping relationship may differ between embodiments. In certain cases, the mount pad layers 72, 74, 76, 78 may be bonded together with the bonding layer 70 using a thermally conductive bonding material such as solder, brazing, or sintered material of the types described below. In other examples, the mount pad layers 72, 74, 76, 78 are bonded by diffusion bonding. In such examples, the mount pad layers 72, 74, 76, 78 may first be provided as relatively large sheets of material. These sheets are bonded as a laminated structure and subsequently subjected to material removal or forming processes (e.g., laser cutting, sawing, stamping, etc.) to separate the laminated sheets into a plurality of mount pads having the desired dimensions and topology. Given different compositions, the CTE-matched mount pads 50, 52 may be cleaved or fabricated in this manner from different sheets or panels. In contrast, when manufactured to have the same composition or structure, the CTE-aligned mount pads 50, 52 may be cut or cleaved from a common sheet of the laminated metal layer, whereas the panel is trimmed to leave smaller connecting segments of material (e.g., tie bars described below) that physically interconnect the CTE-aligned mount pads 50, 52 as a relatively large array of bond pads arranged in a desired spatial layout or array such as a grid or strip layout.

[0030] The above manufacturing approach can streamline manufacturing in large-scale manufacturing processes by enabling the positioning and bonding of a large number of CTE-matched mount pads to a corresponding number of base structures (potentially also provided as interconnected arrays). In this case, such connecting segments or tie bars may be integrated into the HTP substrate 22 and extend laterally, i.e., outward from the mount pads 50, 52 in the XY plane of the coordinate legend 68. For example, as shown in Figures 3 to 5, an intermediate tie bar 88 may extend between the CTE-matched mount pads 50, 52 to physically interconnect adjacent mount pads 50, 52. Meanwhile, a peripheral tie bar 90 further extends laterally outward from the mount pads 50, 52 to initially interconnect the CTE-matched mount pads 50, 52 with a larger mount pad array, as described below in conjunction with Figures 7 and 9. In addition, peripheral tie bars 92 (Figures 3 and 5) may similarly extend from the metal base structure 30 to initially interconnect the base structure 30 with a larger array of metal base structures that will be processed during the fabrication of the HTP substrate and RF package. If tie bars 90,92 are provided, they may be formed integrally with the CTE-matched mount pads 50,52 by, for example, cutting, stamping, or forming the tie bars 90,92 and mount pads 50,52 from a larger sheet or block of material, as will be further described below in conjunction with Figures 7 to 10.

[0031] In at least some implementations, the CTE-matched mounting pads 50, 52 may be at least partially embedded in or fitted into the metal base structure 30. For example, as most clearly shown in Figure 5, the metal base structure 30 may be manufactured to include open recesses or socket-like cavities 80, 82 that accommodate the mounting pads 50, 52. Depending on the cavity depth and geometric complexity, the open cavities 80, 82 may be formed partially or in between using shaping or forming techniques such as stamping. In addition to or instead of this, the open cavities 80, 82 may be formed using material removal processes such as computer numerical control (CNC) machining or electrical discharge machining (EDM) tools that cut the open cavities 80, 82 into the upper surface 42 of the metal base structure 30. The open cavities 80, 82 may be given a planar shape substantially matching the planar shape of the CTE-matched mounting pads 50, 52 and planar dimensions substantially equal to, but slightly larger than, the planar dimensions (e.g., length and width) of the mounting pads 50, 52. In certain embodiments, a peripheral gap may be provided between the sidewalls of the open cavities 80, 82 and the sidewalls of the CTE-matched mounting pads 50, 52 to accommodate additional bonding material or overflow of bonding material.

[0032] As shown in Figures 1 to 5, the depth of each of the open cavities 80, 82 may be less than the thickness of the mounting pads 50, 52 when measured in the thickness direction of the package (along the Z-axis of the coordinate legend 68). As a result, the mounting pads 50, 52 may project upward from the top or front surface 42 of the metal base structure 30, forming a raised pedestal-like feature on which the RF power dies 46, 48 are mounted or attached. In other examples, the depth of each of the open cavities 80, 82 may be substantially equal to (or possibly greater than) the thickness of the mounting pads 50, 52, such that the upper mounting pad surface is substantially coplanar with (or slightly recessed below) the top surface 42 of the base structure 30. Furthermore, in embodiments in which the mounting pads 50, 52 are fitted into the base structure 30 and interconnected by tie bars 88, 90, a plurality of elongated recesses, trenches, or open channels 84, 86 may be further formed in the base structure 30. As best shown in Figure 5, the channel 86 extends between the open cavities 80, 82 and may accommodate or position the intermediate tie bar 88 when the mounting pad structure (CTE-aligned mounting pads 50, 52 and tie bars 88, 90) is positioned relative to the metal base structure 30. In comparison, the peripheral tie bar 90 may be partially or entirely housed within a peripheral channel 84 formed on the front surface 42 of the base structure 30. The tie bar 90 extends above the base structure tie bar 92 and is substantially parallel to the base structure tie bar 92. The tie bars 90, 92 may further extend to the opposite side walls 94, 96 of the molded package body 28, which are formed after package overmolding and singulation, as described below in conjunction with Figures 7 to 10.

[0033] The CTE-matched mounting pads 50, 52 can be bonded or joined to the metal base structure 30 by any method that allows for low thermal resistance conduction of heat across the interface between the mounting pads and the base structure. In this regard, in embodiments, the CTE-matched mounting pads 50, 52 may be bonded to the metal base structure 30 by diffusion. In such cases, the CTE-matched mounting pads 50, 52 and the metal base structure 30 may be subjected to convergent pressure for a sufficient time to form the desired diffusion bonding at the interface between the mounting pads and the base structure, at a high temperature such as close to or above 800°C. In other examples, as shown in Figure 5, thermally conductive bonding materials 70, 71 may be applied to the interface between the CTE-matched mounting pads 50, 52 and the metal base structure 30 to create a bonding joint, an interface between the mounting pads and the base structure. Examples of suitable bonding materials 70, 71 include solder, thermally conductive die mounting materials, brazing materials, and sintering materials. With respect to sintered materials, in particular, such sintered bonding layers may be predominant by weight from one or more sintered metals, which may potentially contain any combination of Ag, Cu, and Au. Often, sintered bonding layers may contain non-trace amounts of Ag, if Ag is not the dominant component by weight. For example, in at least some implementations, sintered bonding layers may be formulated to contain no organic materials and consist essentially of sintered Ag (i.e., containing 99% or more sintered Ag by weight). In other embodiments, sintered bonding layers may consist essentially of sintered Ag and one or more organic materials, such as epoxy, added to improve the adaptability of the die bond layer, as further described below in conjunction with Figures 7 and 8. In yet another embodiment, when fabricating the HTP substrate 22, combinations of the above bonding types and / or, optionally, mechanical capture of the mount pads 50, 52 to the base structure 30 (e.g., using shrink-fitting techniques) may be utilized.

[0034] The planar shape, dimensions, and spatial arrangement of the CTE-matched mounting pads 50, 52 vary between embodiments of the HTP substrate 22, and more broadly, the RF package 20. Thus, the CTE-matched mounting pads 50, 52 are generally shaped and dimensional such that the upper surface of the mounting pads 50, 52 (facing away from the metal base structure 30) has a cumulative surface area smaller than the surface area of ​​the upper surface 42 of the metal base structure 30, and larger than the surface area of ​​the die mounting areas 98, 100 (identified in Figures 1 to 5) that are covered by the RF power dies 46, 48 when mounted on the mounting pads 50, 52, respectively. In other words, each CTE-matched mounting pad 50, 52 is dimensional such that its planar dimensions (e.g., length and width) are larger than the length and width of the respective footprints of the RF power dies 46, 48. In some embodiments, the maximum thickness of the metal base structure 30 (identified by arrow 102 in Figure 1), when measured in the package thickness direction corresponding to the Y-axis of the coordinate legend 68, may exceed the maximum thickness of each CTE-aligned mounting pad 50, 52 (identified by arrow 104 in Figure 2), but may not in other embodiments. In some embodiments, the metal base structure 30 may further have a maximum thickness in the range of approximately 10 to approximately 65 mils (approximately 0.254 mm to approximately 1.65 mm), and possibly approximately 15 to approximately 30 mils (approximately 0.381 mm to approximately 0.762 mm), when measured in the package thickness direction (corresponding to the Z-axis of the coordinate legend 68). In comparison, the CTE-matched mounting pads 50, 52 may each have a maximum or average thickness in the range of approximately 2 mil to approximately 60 mil (approximately 0.0508 mm to approximately 1.524 mm), and in some embodiments, they may have a maximum or average thickness in the range of approximately 20 mil to approximately 25 mil (approximately 0.508 mm to approximately 0.635 mm). For example, in a single mounting produced in which the CTE-matched mounting pads 50, 52 each comprise two or more Cu layers with one or more Mo layers interspersed (i.e., arranged alternately stacked or in a layered relationship), the thickness of the mounting pads may be in the range of approximately 2 mil to approximately 60 mil (approximately 0.0508 mm to approximately 1.524 mm).In other implementations, the thicknesses of the metal base structure 30 and the CTE-matched mounting pads 50, 52 may be greater or smaller than the ranges described above. As shown in Figures 1 to 5, when a multilayer structure is present, the thicknesses of the layers 72, 74, 76, 78 (Figure 2) provided in the CTE-matched mounting pads 50, 52 are often substantially equal or uniform. However, in further implementations, the interlayer thickness of the CTE-matched mounting pads 50, 52 can be varied, for example, to optimize the properties of the mounting pads 50, 52 or to reduce the material cost of the mounting pads 50, 52.

[0035] By forming the CTE-matched mounting pads 50, 52 to have reduced planar dimensions (length and width) compared to the planar dimensions (length and width) of the metal base flange 30, it is possible to minimize the volume of more expensive material within the HTP substrate 22 while achieving the desired reduction of CTE mismatch at the die-substrate interface between the HTP substrate 22 and the RF power dies 46, 48. At the same time, the metal base flange 30 can maintain relatively high rigidity due to the greater thickness of the metal base flange 30 in the peripheral region of the base flange 30 not covered by the mounting pads 50, 52 when measured in the height direction of the package (which also corresponds to the Z-axis in the coordinate legend 68). As a result, the metal base flange 30 can be more resistant to unwanted dimensional changes, such as variations in flatness due to warping during high-temperature processing, compared to multilayer flanges of substantially equivalent dimensions. As a further advantage, the HTP substrate 22 provides manufacturers with a relatively high level of design flexibility by allowing variations in the positioning, structure, and size of the CTE-matched mounting pads 50, 52, for example, to best suit a particular package layout or to provide heat dissipation performance tailored to the unique cooling needs of different RF power dies and potentially other packaged microelectronic components. As a result, in embodiments, the HTP substrate 22 can be easily designed or structurally adapted to provide increased heat dissipation from one or more target RF power dies within the RF package 20, or increased CTE to match it, as will be further described below.

[0036] Through the dimensional adjustment of the CTE-matched mounting pads 50, 52, the mounting pads 50, 52 can be shaped and dimensionally determined to support RF power dies and other microelectronic components of various sizes, and / or each to support any practical number of microelectronic components. Similarly, through such dimensional adjustment to fine-tune the volume of each mounting pad, the rate at which the CTE-matched mounting pads 50, 52 transfer excess heat from the supported device (e.g., RF power dies 46, 48) can be varied. Thus, they can be optimized to provide a greater or lesser degree of heat removal or heat diffusion to a particular microelectronic device (e.g., a particular type of RF power die) to optimize its function. As a non-limiting example, consider embodiments in which the RF power dies 46, 48 take the form of carrier and peak PA dies incorporated into a Doherty PA circuit structure. In this case, the RF power die 46 (here taking the form of a carrier PA die with a carrier transistor IC mounted on it) may tend to generate more excess heat during package operation compared to the RF power die 48 (here taking the form of a peak PA die with a peak transistor IC mounted on it), and the RF power die 48 may remain in a non-conducting OFF state for a longer period of time. Therefore, the CTE-matched mounting pad 50 (supporting the RF power die 46) may be dimensioned to have a volume exceeding that of the CTE-matched mounting pad 52 by giving the mounting pad 50 a planar dimension that is larger than the planar dimensions (e.g., width and / or length) of the mounting pad 52. For example, as is most commonly seen in Figure 4, the CTE-matched mounting pad 50 may be given both a length (measured along the X-axis of the coordinate legend 68) and a width (measured along the Y-axis of the coordinate legend 68) that exceed the length and width of the mounting pad 52. An additional description of the Doherty circuit structure in which the RF package 20 may be incorporated is provided herein together with Figure 6.

[0037] Figure 6 is a simplified schematic diagram of a Doherty PA circuit 106 that may be partially implemented in embodiments of this disclosure using RF power dies provided in the exemplary RF package 20 shown in Figures 1 to 5. In particular, the transistor amplifier sections 108, 110 of the Doherty PA circuit 106 may be provided using RF power dies 46, 48 provided within the RF package 20, and the remaining circuit structure is manufactured using the RF package 20 and a motherboard or other system-level PCB on which other packages or devices are mounted. In further embodiments, the RF package 20 may be manufactured to encompass or contain a larger proportion of the Doherty PA circuit 106, comprising any combination of the power dividers, impedance matching networks, phase delay elements, coupler nodes, and other circuit elements of the type commonly used in PA circuit design, as described below. With regard to the input and output impedance matching networks described below, in particular, such matching networks can be implemented on any number of IC dies, these IC dies may be incorporated into an RF package 20 and each may be mounted on a CTE matching mount pad similar to the CTE matching mount pads 50, 52 described above in conjunction with Figures 1 to 5, multiple dies may be mounted on a single CTE matching mount pad 50, 52 with appropriate dimensional changes relative to one or more mount pads supporting the dies, or specific IC dies, such as IC dies carrying impedance matching networks or bias circuits, may be directly mounted to the metal base structure 30 according to the heat dissipation needs of each individual die.

[0038] In the example in Figure 6, the Doherty PA circuit 106 comprises an input node 109, an output node 111, and a power divider 112 (or splitter) electrically coupled between nodes 109 and 111. The Doherty PA circuit 106 also comprises a primary or carrier amplifier signal path (represented by arrow 114), an auxiliary or peak signal amplification path (represented by arrow 116), and a coupling node 118 where the signal amplification paths 114 and 116 converge. The load 120 is electrically coupled to the coupling node 118 (for example, through an impedance converter not shown) to receive the amplified RF signal from the Doherty PA circuit 106. The power divider 112 is configured to divide the power of the input RF signal received at the input node 109 into a carrier portion and a peak portion, hereafter referred to as the "carrier input signal" and the "peak input signal." The carrier input signal is supplied to the carrier amplification path 114 via the power divider output 122, while the peak input signal is supplied to the peak amplification path 116 via the power divider output 124. When the carrier amplifier section 108 and the peak amplifier section 110 operate in full-power mode, simultaneously supplying current to the load 120, the power divider 112 distributes the input signal power between the signal amplification paths 114 and 116. When the circuit 106 is given a symmetric Doherty PA configuration, the power divider 112 may distribute the power almost equally so that approximately half of the input signal power is supplied to each signal amplification path 114, 116. In other examples, such as when the circuit 106 is given an asymmetric Doherty PA configuration, the power divider 112 may distribute the power unevenly between the signal amplification paths 114, 116. Essentially, the power divider 112 then divides the input RF signal supplied at the input node 109, and the divided signal portions are amplified separately along the carrier (main) amplification path 114 and the peak (auxiliary) amplification path 116.

[0039] Each carrier amplifier section 108 and peak amplifier section 110 comprises one or more power transistor ICs for amplifying the RF signal conducted through the amplifier sections 108 and 110. Each power transistor IC is fabricated on a semiconductor die (e.g., RF power dies 46, 48 shown in Figures 1 to 5) and may be single-stage or multi-stage. In embodiments, all amplifier stages (or final amplifier stages) of one or both of the carrier amplifier section 108 and peak amplifier section 110 may be implemented using either silicon-based FETs (e.g., lateral diffusion metal oxide semiconductor FETs or LDMOS FETs) or III-V FETs (e.g., GaN FETs, gallium arsenide (GaAs) FETs, gallium phosphide (GaP) FETs, indium phosphide (InP) FETs, or indium antimonide (InSb) FETs, or other types of III-V transistors). The carrier and peak transistor ICs may be of equal size, for example, when circuit 106 has a symmetric Doherty configuration. Alternatively, the carrier and peak transistor ICs may have non-uniform sizes in the case of different asymmetric Doherty configurations. The term “size” in this context refers to the active periphery or active gate width of the power transistor IC. Specifically, in an asymmetric Doherty configuration, the carrier transistor IC may be several times larger than the peak transistor IC. For example, the carrier transistor IC may be twice the size of the peak transistor IC, such that the carrier transistor IC has approximately twice the current-carrying capability of the peak transistor IC. Similarly, carrier-peak amplifier IC size ratios other than 2:1 may be implemented. In particular, when the sizes of the RF power dies 46, 48 differ from each other, the sizes (e.g., planar dimensions) of the CTE matching mount pads 50, 52 may also differ by design to better accommodate the die size mismatch or difference, if so desired.

[0040] The preceding paragraphs primarily focus on an exemplary implementation of the Doherty PA circuit 106 implemented using an FET-based amplifier section, but alternative embodiments can be implemented using other transistor technologies, including, but are not limited to, bipolar transistors. Thus, in embodiments of the Doherty PA circuit 106, any and all amplifier stages can be implemented using any suitable transistor technology, including FETs, bipolar transistors, and combinations thereof. Regardless of the specific transistor technology used, the carrier amplifier section 108 of the Doherty PA circuit 106 is generally biased to operate in class AB mode, while the peak amplifier section 110 is biased to operate in class C mode. At low power levels (for example, when the power of the input signal at node 109 is less than the operating threshold level of the amplifier section 110), the Doherty PA circuit 106 operates in low-power mode or back-off mode. In low-power mode, the carrier amplifier section 108 is typically the only amplifier supplying current to the load 120. However, when the power of the input signal exceeds the threshold level of the peak amplifier section 110, the Doherty PA circuit 106 transitions to operation in a high-power mode in which the carrier amplifier section 108 and the peak amplifier section 110 simultaneously supply current to the load 120. In this regard, the peak amplifier section 110 provides active load modulation at the coupling node 118, enabling a continuous and substantially linear increase in the current of the carrier amplifier 108.

[0041] In embodiments of the Doherty PA circuit 106, impedance matching networks 130,132 (input MNm, output MNm) may be implemented at the input and output of the carrier amplifier section 108. Similarly, impedance matching networks 134,136 (input MnP, output MnP) may be implemented at the input and output of the peak amplifier section 110. In each case, the matching networks 130,132,134,136 may function to gradually increase the circuit impedance toward the load impedance and source impedance. In some implementations, the impedance matching networks 130,132,134,136 may be partially or entirely implemented inside the RF package 20. In such embodiments, the impedance matching networks 130, 132, 134, 136 may be bonded to additional CTE matching mount pads provided in alternative embodiments of the HTP substrate 22, to a smaller number of relatively large CTE matching mount pads, or, in some cases, directly bonded to the top surface 42 of the metal base structure 30 when there is a need for relatively moderate heat dissipation for the RF power dies 46, 48 and amplifier sections 108, 110, and may be mounted on multiple IC dies. In other examples, the impedance matching networks 130, 132, 134, 136 may be mounted entirely or partially outside the RF package 20, such as on the PCB on which the RF package 20 is mounted.

[0042] In the example shown in Figure 6, the Doherty PA circuit 106 has a standard load network configuration. Therefore, the input circuit is configured such that, for example at the operating center frequency of the Doherty PA circuit 106, the input signal supplied to the peak amplification section 110 is delayed by 90 degrees relative to the input signal supplied to the carrier amplification section 108. A phase delay element 138 may be incorporated into the Doherty PA circuit 106 to provide a phase delay of approximately 90 degrees to the peak input signal, ensuring that the carrier and peak input RF signals arrive at the amplifier sections 108, 110 with a phase shift of approximately 90 degrees. For example, the phase delay element 138 may include a quarter-wavelength transmission line with an electrical length of approximately 90 degrees or another suitable type of delay element. To compensate for the 90-degree phase delay difference between the carrier amplification path 114 and the peak amplification path 116 at the inputs of the amplifier sections 108, 110, and thereby ensure that the amplified signal arrives in phase at the coupling node 118, the output circuit section is configured to impose a phase delay of approximately 90 degrees on the signal between the output of the carrier amplifier 108 and the coupling node 118. This may be achieved by providing an additional delay element 140, which may or may not be provided in the Doherty PA circuit 106 itself.

[0043] The Doherty PA circuit 106 has a standard load network configuration in the illustrated embodiment, but other load network configurations are possible in alternative implementations. For example, in an alternative implementation, the Doherty PA circuit 106 may instead have an alternative (or "inverting") load network configuration. In this case, the input circuit portion may be configured such that the input signal supplied to the carrier amplifier section 108 is delayed by approximately 90 degrees relative to the input signal supplied to the peak amplifier section 110 at the center frequency of operation of the Doherty PA circuit 106. Correspondingly, the output circuit portion may be configured to impart a phase delay of approximately 90 degrees to the signal between the output of the peak amplifier section 110 and the coupling node 118. In various implementations, the power amplifier sections 108 and 110 may each have a single-stage or multi-stage power transistor die bonded to the HTP substrate 22. Furthermore, as described above, some of the power amplifier sections 108 and 110, as well as some of the impedance matching networks 130, 132, 134, and 136, may be implemented in the form of the Doherty PA circuit 106. The input and output matching networks 130, 132, 134, 136, or parts thereof, may be implemented as additional components within the circuits integrated in the RF power dies 46, 48. One or both of the power amplifier sections 108, 110 may be implemented using multiple parallel amplification paths (rather than a single amplification path) in more complex embodiments. For example, in the exemplary asymmetric Doherty configuration, the carrier amplifier section 108 may be implemented with two (or more) parallel amplification paths, while the peak amplifier section 110 may be implemented with three (or some other) parallel amplification paths. Furthermore, in the case of an N-way Doherty amplifier (N>2), the Doherty PA circuit 106 may comprise multiple peak amplifiers of different configurations or levels.

[0044] Thus, a Doherty PA circuit has been described in which embodiments of the RF package 20 (Figures 1-5) can be usefully integrated, for example, when the RF power dies 46, 48 take the form of carrier and peak PA dies carrying transistor-containing ICs used for RF signal amplification purposes. In other implementations, the RF package 20 may be incorporated into other types of circuits, which may or may not be used for RF signal amplification purposes. Generally, the foregoing description is provided only as a non-limiting example of applications in which the RF package 20 comprises RF power dies with varying heat dissipation needs, such as the RF power die 46 when functioning as a carrier PA die in a Doherty PA circuit, such as the one described later in relation to Figure 6, and the CTE-matched mounting pads 50, 52 of the HTP substrate 22 are given potentially varying sizes and / or structures to increase heat dissipation from a given RF power die with a greater tendency to generate excess heat, and / or reduce CTE mismatch with that RF power die. Nevertheless, embodiments of the RF package 20 are not limited to use in any particular application or situation, nor are embodiments of the HTP substrate 22 limited to integration into a specific type of RF package. Rather, in alternative embodiments, the RF package 20 and the HTP substrate 22 can differ from the examples described above. For example, in a further implementation, the HTP substrate 22 may have a single CTE-matched mounting pad having increased planar dimensions (relative to the metal base structure 30) on which multiple RF power dies are mounted. The HTP substrate 22 may have another type of metal base structure, such as a PCB embedded slag or coin to which the CTE-matched bond pad is bonded, and / or the HTP substrate 22 may be integrated into an RF package fabricated using an electrically routed substrate or leadframe-based approach. Additional descriptions relating to this are provided below in conjunction with Figures 11-14. However, firstly, an example in which the HTP substrate 22 may be fabricated in parallel with multiple similar HTP substrates using a large array-based manufacturing process is described in conjunction with Figures 7-10.

[0045] Exemplary processes for manufacturing HTP substrates and associated RF packages Next, referring to Figures 7-9, two examples of the HTP substrate 22 are shown at various stages of manufacturing. Referring first to Figure 7, the HTP substrate 22 is shown in an incomplete state of manufacturing, identified by reference number "22`", where the prime symbol (`) is affixed to the reference number when indicating a structural element in an incomplete or partially manufactured state. In the illustrated embodiment, the HTP substrate 22` is manufactured using an array-based manufacturing approach. In particular, the HTP substrate 22` (and the RF package 20` described later, manufactured using the HTP substrate 22`) is manufactured using an array of interconnected HTP substrates 22` having a linear or strip layout. In this regard, the manufacturing process begins by purchasing, independently manufacturing, or acquiring elongated strips or linear arrays 142 of interconnected metal base structures 30`. The prime symbol used here indicates that the base structures 30` are physically interconnected and currently exist in a pre-singulated form. In other examples, the base structure array 142 (and the mount pad array 146 described later) may have different layouts or spatial distributions, such as interconnected grids arranged in multiple horizontally extending rows and columns. For clarity, only a limited area of ​​the base structure array 142 is shown in Figures 7–9, and it should be noted that the base structure array 142 (and the CTE-matched mount pad array 146) may be considerably longer than the illustrated area and may encompass several dozen, if not hundreds, of other components included in the base structure 30`, CTE-matched mount pads 50`, 52`, and RF package 20`, respectively.

[0046] The metal base structures 30` are interconnected by tie bars 92. The tie bars 92 project from the base structures 30` in opposite longitudinal directions. Between adjacent pairs of base structures 30`, the tie bars 92 include sacrificial connection regions 144 (one of which is shown in Figure 7). The sacrificial connection regions 144 are removed during the singulation of the HTP substrate 22`, and, if manufactured by processing the HTP substrate 22`, are removed during the singulation of the RF package 20` while remaining in an interconnected, pre-singulated form. As described above, the metal base structures 30` may be manufactured as monolithic or multilayer structures, and may be first manufactured in panel or sheet form and then machined or processed to manufacture the base structure array 142. Open cavities 80, 82 and interconnecting channels 84, 86 (hereinafter collectively referred to as "recessed features 80, 82, 84, 86") may be cut into or formed in the respective upper surfaces 42 of the metal base structure 30`. The recessed features 80, 82, 84, 86 may assist in positioning or physically guiding the CTE-aligned mount pad array 146 onto the base structure array 142. In addition, in embodiments, the recessed features 80, 82, 84, 86 may be lever-acting reservoirs or retaining regions from which volumes of fluid bonding material can be extruded and processed to form bonding layers 70, 71. The bonding layers 70, 71 bond corresponding pairs of CTE-aligned mount pads 50`, 52` to the base structure 30`. An example of such bonding material deposited into recessed features 80, 82, 84, 86 in liquid or dry (e.g., powder) is shown in Figure 8 and identified by reference numbers 70`, 71`. In various implementations, the bonding material 70`, 71` may be a sintering precursor material, brazing material, or solder material, which is subsequently processed to convert the bonding material 70`, 71` into bonding layers 70, 71 after the CTE-matched mounting pads 50`, 52` are positioned in contact with the bonding material 70`, 71` relative to the base structure 30`.In other examples, pairs of CTE-matched mount pads 50`, 52` may be joined to the corresponding base structure 30` included in the base structure array 142 by a different method, such as diffusion bonding. In this case, the bonding materials 70`, 71` may be omitted. An additional description of a diffusion bonding process suitable for joining CTE-matched mount pads to a lower metal base structure is provided below in conjunction with Figures 11 and 12.

[0047] As previously shown, the bond layers 70, 71 may be formed as sintered bodies or joints in embodiments. In this case, the bonding materials 70`, 71` may be supplied as sintered precursor materials. In such embodiments, the bonding materials 70`, 71` are conveniently applied using either a wet state or a dry state (e.g., film) application technique. For example, in one approach, the sintered precursor material may be applied (e.g., by spraying or dipping) to the underside of a base structure array 142 (shown in Figure 9). The base structure array 142 is then positioned to insert CTE-matched mounting pads 50, 52 into corresponding open cavities 80, 82 provided in each of the metal base structures 30`. In other examples, as commonly shown in Figure 8, such sintered precursor material is first deposited into the cavities 70`, 71` in a wet state using a suitable deposition technique such as a micro-needle extrusion technique. When a wet state application technique is used, the fluid or wet state coating precursor material is first obtained, for example, by independent manufacturing or purchase from a third-party supplier. The selected sintered precursor material may be formulated to contain metal particles, a liquid carrier, a dispersant, and other components. The metal particles contained in the sintered precursor material may have any shape. The average size of the metal particles varies with the particle shape and processing parameters. As a specific but non-limiting example, in one embodiment, the sintered precursor material may contain one or more of Ag, Au, or Cu nanoparticles. In addition to the metal particles, the wet-state coating precursor material may contain other raw materials (e.g., solvents and / or surfactants) to impart wet curing, adjust the viscosity of the precursor material, prevent premature aggregation of metal particles, or serve other purposes. In embodiments, the wet-state coating precursor material contains metal particles in combination with a binder (e.g., epoxy), a dispersant, and a thinner or liquid carrier. The volume of solvent or liquid carrier contained in the coating precursor material can be adjusted to match the viscosity of the precursor material to the selected wet-state imparting technique.After applying the wet coating material, a drying process can be performed to remove excess liquid from the metal particle-containing sintering precursor material, if desired.

[0048] Next, the strip or linear array 146 of interconnected CTE-aligned mount pads 50`, 52` is shaped and dimensional for a tight fit with the base structure array 142 and positioned on the base structure array 142 as shown in Figure 9. In particular, the mount pad array 146 seats on the base structure array 142 so that the CTE-aligned mount pads 50`, 52` are inserted into their corresponding open cavities 80, 82 and into contact with the bonding material 70`, 71`. The bond pad array 146 is pressed toward the base structure array 142 using appropriate fasteners or mechanisms (e.g., a hydraulic press or rollers) to ensure that the CTE-aligned mount pads 50`, 52` are fully seated in the cavities 80, 82. Peripheral tie bars 90 extending outward from adjacent pairs of mount pads 50`, 52` are joined by a sacrificial connector area 148. The sacrificial connector region 148 of the mount pad array 146 overlaps perpendicularly with the sacrificial connector region 144 of the base structure array 142 and is removed along with the connector region 144 when the HTP substrate 22` is singulated. After positioning the mount pad array 146 on the base structure array 142, high temperature, high pressure, or a combination thereof may be applied to convert the bonding materials 70`, 71` into bond layers 70, 71, thereby mechanically, thermally, and electrically bonding the mount pad pairs 50`, 52` to the corresponding base substrate 30`.

[0049] In a given embodiment, a specific method for processing the bonding material 70`,71` to produce bond layers 70,71 depends at least in part on the composition of the bonding material. If the bonding material 70`,71` consists of solder, the bonding material 70`,71` may be reflowed by applying sufficient heat to form bond layers 70,71 (here, solder joints) that bond the CTE-matched mount pads 50`,52` to the metal base structure 30`. Similarly, if it consists of brazing material, the arrays 142,146 may be exposed to high temperatures to convert the bonding material 70`,71` into bond layers 70,71 by a heating schedule selected based on the brazing material used. For example, if a Cu-Ag brazing material is used, higher temperature sintering may be performed at a maximum temperature close to or exceeding 780°C. In other examples, lower temperature brazing systems may be used, such as brazing systems containing Au, tin, germanium, etc. Finally, when the bonding materials 70`,71` consist of a sintered precursor material, curing may be carried out by low-temperature heating (with or without high pressure) to convert the sintered precursor material into a sintered bond layer, forming metallurgical bonds at various interfaces between the CTE-matched mount pads 50`,52` and the underlying base structure 30`. The resulting bonding layers 70,71 may be formed from sintered metal particles and may be predominantly by weight of one or more metallic components. When formed from such sintered material, the bond layer may be predominantly by weight of Cu, Ag, Au, or a mixture thereof. In such cases, the sintered bond layer may or may not contain organic materials such as epoxy added for reinforcing purposes.

[0050] After the mounting of the CTE-matched mounting pads 50`, 52` onto the metal base structure 30`, the processing steps specifically for fabricating the HTP substrate 22` are nearly complete. In one example, the HTP substrate 22` may be singulated at this seam, by removing the sacrificial connection area 148 from the mounting pad array 146 and the vertically overlapping connection area 144 from the base structure array 142, thereby separating the HTP substrate 22 into singulated (individual or separate) units. Appropriate singulation processes include water jetting, laser cutting, and sawing using a dicing saw. In other examples, additional processing steps may be performed to initiate, and possibly complete or nearly complete, RF package fabrication before singulation of the array containing the physically connected HTP substrates 22`. This can be understood by referring to Figure 10, which further illustrates the initial stages of RF package fabrication performed using the newly manufactured HTP substrates 22`, provided in array form before singulation of the HTP substrates. As described above, the RF power dies 46 and 48 may be mounted to appropriate CTE-matched mounting pads 50` and 52` using selected thermally conductive and conductive bonding materials such as solder material, sintered material, or die mounting material containing metal particles.

[0051] After mounting the RF power dies, the fabrication of the RF package 20` may be continued by additional processing steps such as overmolding (e.g., by transfer molding), wire bonding, and lidping. Any or all of these steps may be performed before the singulation of arrays 142,146 for processing efficiency, or one or more of the fabrication steps used to complete the fabrication of the RF package 20` step may, in other examples, be performed after the singulation of arrays 142,146. In embodiments in which overmolding is performed before the separation of arrays 142,146, singulation is conveniently achieved by orienting a dicing saw through a saw lane encompassing the sacrificial regions 144,148, and any overmolding material present within the saw lane, thereby separating the RF package 20` into singulated units or individual units. Singulation may result in the formation of package sidewalls to which the tie bars 90,92 extend and terminate. In particular, for each singulated unit, the tie bars 90 may extend in opposite directions from the CTE-matched mounting pads 50, 52 so as to terminate at the package sidewall, and each tie bar 90 is given a singulation termination that may be substantially coplanar or flush with the corresponding package sidewall. Similarly, the tie bars 92 extend from the metal base structure 30 and the tie bars 90 beneath it, to the package sidewall generated by the singulation, and terminate at that package sidewall. Following the singulation of the array, any necessary additional processing steps and test procedures may be performed to produce a complete RF package similar to or identical to the RF package 20 described above in conjunction with Figures 1 to 5.

[0052] Example of adding an HTP substrate to an RF package Thus, the above describes an RF package comprising an HTP substrate, which includes a CTE-matched mounting pad to minimize CTE mismatch between the metal base structure and the RF power die, and, optionally, other packaged microelectronic components that may be prone to generating excessive heat during package operation. In the exemplary embodiments described above, the metal base structure takes the form of a metal base flange, while the RF package is fabricated as a covered air cavity package. The above also discloses exemplary manufacturing processes that are generally usefully used to fabricate such HTP substrates and RF packages by utilizing efficient, large-scale array-based manufacturing approaches. Notwithstanding the above examples, the HTP substrate may take other forms and may be incorporated into various other RF package types in further implementations. In addition, embodiments of the HTP substrate may be fabricated using various other manufacturing processes, including a process that forms a diffusion bond between the CTE-matched mounting pad and the underlying metal base structure provided within a given implementation of the HTP substrate. Further details relating to this are provided here in conjunction with Figures 11 and 12, and examples of alternative types of RF packages in which alternative embodiments of the HTP substrate are advantageously incorporated are described below in conjunction with Figures 13 and 14.

[0053] Moving on to Figures 11 and 12, an HTP substrate 150 is shown, comprising a metal base structure 152 into which a single relatively long CTE-aligned mount pad 154 is embedded as an inlay feature. Here, the HTP substrate 150 is given a relatively simple structure to enable cost-effective manufacturing of multiple HTP substrates, for example, by processing the material for larger panels or strips. In this regard, the CTE-aligned mount pad 154 is given a longitudinally elongated rectangular planar shape with a substantially consistent width (measured along the Y-axis of the coordinate legend 170) and a substantially constant thickness (measured along the Z-axis of the coordinate legend 170). The CTE-aligned mount pad 154 is mounted or inserted into a longitudinal channel formed in the top or front surface 162 of the base structure 152, extending over the length of the metal base structure 152. The longitudinal channel formed in the base structure 162 similarly extends over the length of the base structure 152 and has a depth and width approximately equal to the corresponding dimensions (length and height or thickness) of the mount pad 154. In this structure, the upper die support surface 160 of the CTE-matched mount pad 154 is substantially coplanar with the upper surface 162 of the metal base structure 152; however, in other implementations, the upper surface of the mount pad 154 may extend slightly above or be slightly recessed below the front surface 162 of the base structure 152. As shown by dashed lines in Figure 11, two die mounting areas 156, 158 are further provided on the die support surface of the CTE-matched mount pad 154, and when the HTP substrate 150 is assembled into a larger RF package, suitable microelectronic components (e.g., RF power dies similar to the RF power dies 46, 48 shown in Figures 1 to 10) are attached to these areas using a thermally conductive and possibly conductive bonding material such as solder or sintered material.

[0054] The metal base structure 152 may have a monolithic structure, a multilayer structure, or another structure that makes the base structure 152 suitable for functioning as a thermally conductive heat sink, and optionally have an electrically active structure or terminal of the RF package into which the HTP substrate 150 is ultimately incorporated. The CTE-matched mounting pad 154, which may also be elongated, may have a monolithic or multilayer structure and is given a CTE smaller than the CTE of the base structure 152 and larger than the respective CTEs of the RF power dies that will later be mounted in regions 156, 158 of the HTP substrate 150 in a manner similar to that described above. In certain embodiments, as described above in conjunction with the CTE-matched mounting pads 50, 52 of the RF package 20 (Figures 1 to 10), the metal base structure 152 may take the form of a monolithic or multilayer structure containing a larger weight percent of Cu (and may be predominantly composed of Cu by weight), while the CTE-matched mounting pad 154 is formed as a monolithic strip made of a material such as a Mo alloy or Cu-Mo alloy having a lower Cu content by weight (potentially little or no Cu content) and a higher Mo content than the base structure 152. In yet another example, the CTE-matched mounting pad 154 may be made of a different thermally conductive material having a smaller CTE than the metal base structure 152, or the mounting pad 154 may be given a multilayer structure similar to or identical to that described above in conjunction with the CTE-matched mounting pads 50, 52 provided on the HTP substrate 22 as described above in conjunction with Figures 1 to 5. In some embodiments, the CTE-matched mounting pad 154 may be bonded to the metal base structure 152 using a sintered material, brazing material, solder, or another thermally conductive bonding material, as described above. In other examples, the CTE-matched mounting pad 154 may be bonded to the metal base structure 152 by diffusion bonding, as described immediately below.

[0055] In embodiments in which the CTE-matched mount pad 154 is diffusion-bonded to the metal base structure 152, it is again noted that the upper surface 160 of the CTE-matched mount pad 154 may be substantially coplanar with the upper surface 162 of the metal base structure 152, and the formation of the diffusion bond at the interface between the mount pad and the base structure is carried out in the case of the HTP substrate 150. The CTE substrate 150 may be processed, typically in combination with very high temperatures, using a hydraulic press, a system of rollers 168 (Figure 12), or a similar equipment configuration used to apply sufficient convergent pressure to bias the CTE-matched mount pad 154 toward the metal base structure 152, in order to generate the desired diffusion bond at the appropriate structural interface. At least in part, the elongated rectangular shape of the channels formed on the front surface 162 of the metal base structure 152 makes it possible to easily form multiple longitudinally aligned channels in a corresponding number of metal base structures. These metal base structures are initially joined or physically interconnected by end-to-end relationships as a larger structure, for example, as elongated base structure strips extending along the X-axis of the coordinate legend 170 shown in the lower right corner of Figures 11 and 12. In one manufacturing approach, the elongated channels may be formed into multiple base structures 152 by generating a single continuous cut along the length of an elongated rectangular strip or preform, such as a metal extrusion (e.g., using a suitable CNC or EDM tool), and then singulated into individual base structures 152. Alternatively, when the base structures are initially formed as a linear array by extrusion having an approach cross-sectional shape, the channels into which the mount pads 154 are inserted may be formed as integral features with the base structures. In yet another example, stamping techniques may be used. Regardless of the specific manufacturing approach used, it is then possible to simultaneously manufacture a relatively large number of integrally bonded HTP substrates by placing or setting second elongated strips (mount pad strips, as herein) into channels extending longitudinally along the base structure strips and bonding them in place.Next, the obtained HTP substrate may be singulated at a suitable manufacturing seam, and if desired, further processing may be performed to initiate RF package manufacturing, as described above in conjunction with Figure 10.

[0056] Referring next to Figure 13, a further exemplary RF package 172 is shown as a simplified schematic diagram, which also comprises two RF power dies 174, 176 supported by a lower HTP substrate 178. Specifically, the RF power dies 174, 176 are mounted on CTE-matched mounting pads 180, 182 provided on the HTP substrate 178, utilizing two conductive and thermally conductive bonding layers 185, 187, respectively. On the opposite side of the RF power dies 174, 176, the CTE-matched mounting pads 180, 182 are bonded to a metal base structure 184, 186 having a lower surface that is substantially coplanar with the bottom side of the RF package 172. In contrast to the embodiments described above in conjunction with Figures 1 to 12, the CTE-matched mounting pads 180, 182 and metal base structures 184, 186 of the HTP substrate 178 are embedded in a dielectric encapsulant 188, such as glob-top epoxy or molded thermoplastic material, similar to embedded coins. In the shown example, the dielectric body 188 has an inner or upper die-facing surface or front surface 194 that is substantially coplanar with the upper surfaces of the respective mounting pads 180, 182. In other embodiments, the mounting pad upper surface may be recessed slightly below the upper surface of the dielectric body 188 in other mountings, or it may extend upward beyond the upper surface of the dielectric body 188. The CTE-matched mounting pads 180, 182 may have a non-layered (monolithic) structure, or instead, the mounting pads 180, 182 may be given a layered structure as shown. In the latter case, for example, each of the CTE-matched mounting pads 180, 182 may have at least a first Cu layer bonded to one or more Mo or Cu-Mo layers, for example, each of the mounting pads 180, 182 may have an intermediate Mo or Cu-Mo layer bonded between two Cu layers. In such embodiments, the Mo or Cu-Mo layer (or more layers) provided in each mounting pad 180, 182 may contain a smaller percentage by weight of Cu and a larger percentage by weight of Mo than one or more Cu layers (at least in some examples, the Mo may be substantially absent).

[0057] Similar to the CTE-matched mounting pads 180 and 182, the metal base structures 184 and 186 are provided with a non-layered or layered structure, and the CTE-matched mounting pads 180 and 182 each have a smaller CTE than the metal base structures 184 and 186 and a larger CTE than the RF power dies 174 and 176. In one embodiment, the metal base structures 184 and 186 each take the form of a metal (e.g., Cu) coin or block, but in other examples, the base structures 184 and 186 may be manufactured from a composite or layered material having relatively high thermal and electrical conductivity. In contrast, the CTE-matched mounting pads 180 and 182 each may be provided with a layered structure in the shown embodiment. In this case, each of the CTE-matched mounting pads 180, 182 may comprise one or more layers or sets of layers having a first Mo content and a first Cu content, and a second layer or set of layers having a second Mo content less by weight than the first Mo content and a second Cu content greater than the first Cu content. In other implementations, the metal base structures 184, 186 may be given a layered structure as described above. On the other hand, the CTE-matched mounting pads 180, 182 may have a monolithic structure or a non-layered structure. Furthermore, in some cases, each of the CTE-matched mounting pads 180, 182 may be manufactured to have a plated metal surface or coating (e.g., an Ag-containing surface finish formed by electroplating) that facilitates the formation of a high-integrity, low-electrical-resistance bond at the interface between the mounting pads 180, 182 and the metal base structures 184, 186.

[0058] Continuing to refer to Figure 13, the dielectric body 188 of the HTP substrate 178 may, in alternative embodiments, take the form of a coreless substrate or a machinable dielectric (e.g., ceramic) block. In other examples, the dielectric body 188 is a single-layer or multilayer PCB further comprising conductive routing features such as metal (e.g., Cu) traces, plated or filled vias, and grounding surfaces. For example, in this regard, the dielectric body 188 may be a multilayer PCB having routing features such as vias and metal (e.g., Cu) traces within an intermediate region 190 located between the CTE-matched mounting pads 180, 182 and between the metal base structures 184, 186. Such a layout may increase the wiring or circuit density of the RF package 172 and enable a reduction in the size of the RF package 172. The RF package 172 may also comprise other features such as an overmolded body 192 that encapsulates the dies 174, 176 and is bonded to the upper die support surface 194 of the HTP substrate 178. A back metal layer 196 may be further formed on the back surface 198 of the HTP substrate 178. When formed, the back metal layer 196 may be a continuous metal layer (e.g., a ground surface) or a patterned metal layer. For example, in one embodiment, the back metal layer 196 may be a ground surface. The ground surface is plated or deposited on the back surface of the PA package 172, as shown, and formed in contact with the metal base structures 184, 186. In such an example, the RF power dies 174, 176 may each have terminals (e.g., source terminals) electrically coupled to the back metal layer 196 through bonding material layers 185, 187, through CTE-matched mounting pads 180, 182, and through the metal base structures 184, 186, so that the back metal layer 196 functions as both a conductive (e.g., ground) terminal and a thermal interface of the RF package 172.

[0059] As described above, the HTP substrate 178 allows excess heat generated by the RF power dies 174,176 to dissipate away from the dies 174,176 through the CTE-matched mounting pads 180,182 and the metal base structures 184,186 to the back metal layer 196 exposed from the outside of the RF package 172. When installed in a larger system or assembly, as described above, the back metal layer 196 may function as a thermal interface positioned to thermally communicate with a system-level heat sink such as an air-cooled metal chassis or fin array. In addition, the combination of the CTE-matched mounting pads 180,182 and the corresponding metal base structures 184,186 cooperate to form an inverted T-shaped structure with low thermal resistance. This structure increases in volume away from the RF power dies 174,176 and toward the back metal layer 196, and therefore toward the lower main or back surface of the RF package 172. This provides increased heat dissipation capabilities to further improve heat removal from the RF power dies 174,176. At the same time, the volume of more expensive material contained within the HTP substrate 178 can be reduced to minimize the overall material cost associated with the integration of the HTP substrate 178 into the RF package 172, for example, compared to a multilayer flange of comparable dimensions. During manufacturing, the CTE-matched mount pads 180,182 may be manufactured first and bonded to the metal base structures 184,186 using an independent fabrication process. More specifically, in one possible approach, relatively large sheets or panels (embodying multiple examples of the CTE-matched mount pads 180,182 and multiple examples of the metal base structures 184,186) may be joined and singulated using a process similar to the process described above to obtain a T-shaped unit. The T-shaped unit is then integrated into a PCB (or similar substrate) using a process similar to the process currently used to form a PCB with embedded coins. In other embodiments, different manufacturing techniques may be used to manufacture the HTP substrate 178 and the RF package 172.

[0060] Finally, referring to Figure 14, a further exemplary embodiment of the RF package 200 is shown in a simplified cross-sectional view, comprising two RF power dies 202, 204 bonded to a lower HTP substrate 206. Similar to the HTP substrates 22 (Figures 1-10) and 178 (Figure 13), the HTP substrate 206 comprises two CTE-matched mounting pads 208, 210, to which the RF power dies 202, 204 are mounted using bond layers 212, 214. As previously described, the bond layers 212, 214 consist of conductive and thermally conductive materials such as solder, sintered material, or die mounting material containing metal particles. On the opposite side of the RF power dies 202, 204, the CTE-matched mounting pads 208, 210 are bonded to the upper main surface or die-facing front surface 216 of one or more lower metal base structures 218, and the mounting pads 208, 210 project upward from the front surface 216 as raised pedestal-like features. In this particular example, the metal base structure 218 takes the form of a non-routed metal block or “die mounting pad” provided in the form of a lead frame, and the metal base structure 218 will be more specifically referred to as the “die mounting pad 218” below. In addition to the die mounting pad 218, the lead frames 218, 220 further comprise embedded terminals or contact pads 220 spaced apart in rows extending adjacent to the peripheral sidewalls of the die mounting pad 218. The overmolded body 224 is formed around the packaged components (here, RF power dies 202, 204), interconnection features (e.g., wire bonds, not shown), and the top and peripheral surfaces of the die mounting pads 218. Thus, the RF package 200 may take the form of a flat, leadless package, such as a QFN or DFN package, in the example shown. The lead frames 218, 220, and therefore the die mounting pads 218 and contact pads 220, may, in embodiments, be made of a metallic material such as Cu.In comparison, the CTE-matched mounting pads 180,182 may be a layered or laminated structure consisting of alternating metal layers (e.g., alternating Cu and Cu-Mo layers), as shown, giving the mounting pads 180,182 a CTE smaller than that of the die mounting pad 218 and larger than the respective CTEs of the RF power dies 174,176. In other examples, the CTE-matched mounting pads 180,182 may be a non-layered structure consisting of a suitable metallic or composite material (e.g., Mo or Cu-Mo alloy), or another conductive and thermally conductive material having a CTE within a desired range.

[0061] The lower surface 226 of the die mounting pad 218 may be exposed through the bottom or lower main surface of the RF package 200 and may be substantially coplanar with that surface. Thus, the lower surface 226 of the die mounting pad 218 may function as a thermal interface of the RF package 200 and may be positioned to thermally communicate with a system-level heatsink when the RF package 200 is installed in a larger electronics system or assembly. Excess heat generated by the RF power dies 202,204 may, as a result, be extracted from the inside of the RF package 200 and conducted through the HTP substrate 206 (and more specifically, through the CTE-matched mounting pads 208,210 and the metal base structure 218) to a system-level heatsink for transfer to the ambient environment. Furthermore, the combination of the CTE-matched mounting pads 208,210 and the die mounting pad 218 (generally referred to as the "metal base structure") further functions as a dual top coin, effectively providing increased heat dissipation capabilities. This may further improve the overall thermal performance or heat dissipation capability of the RF package 200. Such improved heat dissipation capabilities may be particularly beneficial when one or both of the RF power dies 202, 204 are prone to generating excessive heat during the operation of the RF package 200, for example, due to operation at higher frequencies or power levels, and / or the fabrication of the RF power dies 202, 204 using a layered GaN (e.g., GaN / SiC) die substrate or another die technology with relatively high power density. At the same time, the exposed lower surface 226 of the die mounting pad 218 may function as a (e.g., ground) terminal of the RF package 200, and the HTP substrate 206 provides a low electrical resistance connection to the terminals (e.g., source terminals) of the RF power dies 202, 204 when it takes the form of a PA die on which FETs used for RF signal amplification purposes are mounted, as described above.

[0062] conclusion The above describes RF packages featuring a unique high thermal performance (HTP) substrate. Embodiments of the HTP substrate include one or more CTE-matched mounting pads, which are fabricated by diffusion bonding or using an appropriate bonding material to minimize CTE mismatch between the RF power die (and optionally other heat-generating components) mounted to the mounting pad and the underlying metal base structure to which the mounting pad is bonded. In doing so, the CTE-matched mounting pad minimizes thermally driven mechanical stress factors at the die-substrate interface, reducing the potential for structural degradation at these critical interfaces and improving the reliability of the RF package over time. Embodiments of the HTP substrate are further suitable for integration into a wide range of RF package types, providing not only efficient heat removal from the packaged RF die but also generating a low electrical resistance path from the RF power die to the metal base structure, which, for example, in embodiments, functions as a terminal of the RF package, such as a ground terminal of the RF package, or provides an electrical connection to a back-surface ground plane. In some examples, CTE-matched mounting pads may be designed (e.g., by changes in dimensions or composition) to provide individualized thermal dissipation characteristics optimized for specific RF power die types, such as increased thermal dissipation capability in the case of carrier PA dies provided in Doherty PA circuits. A further advantage is that embodiments of HTP substrates may contain only reduced amounts of expensive materials, resisting dimensional changes such as flatness deviations resulting from warping observed in some multilayer flanges, with little to no degradation to the substrate thermal performance. Finally, embodiments of HTP substrates can be cost-effectively fabricated and integrated into RF packages, for example, when array-based manufacturing techniques are used to produce a relatively large number of HTP substrates, and possibly RF packages, in parallel.

[0063] Embodiments of the RF package include an HTP substrate with a metal base structure. The metal base structure has a front surface facing a first RF power die and a first die mounting area on the front surface of the metal base structure. The die mounting area represents the surface area of ​​the metal base structure below the die footprint when viewed downward on the HTP substrate. A first CTE-matched mounting pad is bonded to the metal base structure and covers the first die mounting area. The first CTE mounting pad has a CTE larger than that of the RF power die and smaller than that of the metal base structure. A conductive bonding material mounts the RF power die to the first CTE-matched mounting pad, while the RF circuitry integrated into the first RF power die is electrically coupled to the metal base structure through the first CTE-matched mounting pad. In certain examples, the first CTE-matched mounting pad protrudes upward from the front surface of the metal base structure, forming a raised pedestal-like feature on which the first RF power die is mounted. In addition to or instead of this, the metal base structure may include an open cavity into which the first CTE-matched mounting pad is inserted, such that the first CTE-matched mounting pad is at least partially embedded within the metal base structure. In yet another example, the first CTE-matched mounting pad has a die support surface that is substantially coplanar with the external terminal surface on the front of the metal base structure.

[0064] A method for fabricating an RF package comprising an HTP substrate having a CTE-matched mounting pad is also disclosed. In the implementation, the method comprises (i) acquiring a first RF power die having a die CTE; (ii) mounting the first RF power die to a first CTE-matched mounting pad provided on the HTP substrate, wherein the first CTE-matched mounting pad is bonded to a metal base structure having a base structure CTE that is larger than the die CTE and smaller than the base structure CTE; and (iii) an electrical coupling step, along with the mounting of the first RF power die, electrically coupling a PA circuit formed on the first RF power die to the metal base structure through the first CTE-matched mounting pad. In a particular implementation in which the RF circuit comprises or takes the form of an FET having a source terminal, the electrical coupling step involves electrically coupling the source terminal of the FET to the metal base structure through the first CTE-matched mounting pad. In other implementations in which the first RF power die takes the form of a peak RF power die, the method further comprises (i) a carrier RF power die mounting step of mounting the carrier RF power die to a second CTE matching mount pad provided on the HTP substrate, and (ii) a step of electrically coupling the RF circuit formed on the carrier RF power die to a metal base structure through the second CTE matching mount pad, along with the mounting of the carrier RF power die.

[0065] While one or more exemplary embodiments have been presented in the detailed description above, it is recognized that many variations exist. These exemplary embodiments are merely examples and are not intended to limit the scope, availability, or configuration of the invention in any way. Rather, the detailed description above provides a convenient roadmap for implementing exemplary embodiments of the invention. It is understood that various modifications can be made to the function and configuration of the elements described in the exemplary embodiments without departing from the scope of the invention as set forth in the appended claims.

Claims

1. 1. A radio frequency package (RF package), comprising: a first RF power die having a die coefficient of thermal expansion (CTE); A high thermal performance substrate, a metal base structure having a base structure CTE, a front surface facing the first RF power die, and a first die attach area on the front surface of the metal base structure; a high thermal performance substrate comprising: a first CTE-matched mount pad bonded to the metal base structure and covering the first die attach area, the first CTE-matched mount pad having a mount pad CTE greater than the die CTE and less than the base structure CTE; a conductive bonding material attaching the first RF power die to the first CTE-matched mount pad; an RF circuit integrated onto the first RF power die and electrically coupled to the metal base structure through the first CTE-matched mount pad.

2. 10. The RF package of claim 1, wherein the first CTE-matched mounting pad projects upwardly from the front surface of the metal base structure to form a raised pedestal-like feature on which the first RF power die is mounted.

3. 2. The RF package of claim 1, wherein the metal base structure comprises an open cavity into which the first CTE-matched mounting pad is inserted such that the first CTE-matched mounting pad is at least partially embedded in the metal base structure.

4. The RF package of claim 1 , wherein the first CTE-matched mounting pad has a die support surface that is substantially coplanar with the front external termination surface of the metal base structure.

5. 10. The RF package of claim 1, wherein the first CTE-matched mounting pad comprises a greater weight percent of molybdenum and a lesser weight percent of copper than the metal base structure comprises.

6. The first CTE-matched mounting pad comprises: a first mounting pad layer; 2. The RF package of claim 1, wherein a second mounting pad layer bonded to the first mounting pad layer contains less copper by weight than the first mounting pad layer and more molybdenum by weight than the first mounting pad layer.

7. the first CTE-matched mount pad further comprises a third mount pad layer containing more copper by weight than the second mount pad layer and less molybdenum by weight than the second mount pad layer; The RF package of claim 6 , wherein the second mounting pad layer is between the first mounting pad layer and the second mounting pad layer.

8. 10. The RF package of claim 1, wherein the RF circuit comprises a field effect transistor (FET) having a source terminal electrically coupled to the metal base structure through the first CTE-matched mount pad.

9. the high thermal performance substrate further comprises a second CTE-matched mounting pad bonded to the metal base structure and covering a second die attach area on the metal base structure; The RF package comprises: a second RF power die attached to the second CTE-matched mounting pad; 10. The RF package of claim 1, further comprising: an additional RF circuit formed on the second RF power die and electrically coupled to the metal base structure through the second CTE-matched mount pad.

10. 10. The RF package of claim 9, wherein the first RF power die and the second RF power die comprise a peak RF power die and a carrier RF power die, respectively.

11. the first CTE-matched mounting pad has a first volume; The RF package of claim 10 , wherein the second CTE-matched mounting pad has a second volume greater than the first volume.

12. The RF package of claim 1 , further comprising a diffusion bond formed between the first CTE-matched mounting pad and the metal base structure.

13. the high thermal performance substrate further comprising a dielectric body in which the metal base structure and the first CTE-matched mounting pad are embedded; 10. The RF package of claim 1, wherein the metal base structure and the first CTE-matched mounting pad combine to form an inverted T-shaped structure that increases in volume away from the first RF power die.

14. a molded package body encapsulating the first RF power die and at least partially surrounding the high thermal performance substrate; The RF package of claim 1 , wherein the metal base structure has a back surface opposite the front surface and substantially coplanar with a back surface of the molded package body.

15. The RF package of claim 1 , wherein the high thermal performance substrate further comprises a perimeter tie bar extending from the first CTE-matched mounting pad to a peripheral sidewall of the high thermal performance substrate.

16. a second CTE-matched mounting pad; an intermediate tie bar extending from the first CTE-matched mounting pad to the second CTE-matched mounting pad; The RF package of claim 15 , wherein the intermediate tie bar is integrally formed with the first CTE-matched mounting pad and the second CTE-matched mounting pad.

17. 1. A method for making a radio frequency package (RF package), comprising: obtaining a first RF power die having a die coefficient of thermal expansion (CTE); attaching the first RF power die to a first CTE-matched mount pad provided on a high thermal performance substrate, the first CTE-matched mount pad being bonded to a metal base structure having a base structure CTE, the first CTE-matched mount pad having a mount pad CTE greater than the die CTE and less than the base structure CTE; a carrier RF power die attachment step of attaching a carrier RF power die to a second CTE-matched mounting pad provided on the high thermal performance substrate; and an electrical coupling step, in conjunction with the first RF power die attaching step and the carrier RF power die attaching step, of electrically coupling a power amplifier circuit (PA circuit) formed on the first RF power die to the metal base structure through the first CTE-matched mount pads and electrically coupling an RF circuit formed on the carrier RF power die to the metal base structure through the second CTE-matched mount pads.

18. the PA circuit comprises a field effect transistor (FET) having a source terminal; 20. The method of claim 17, wherein the electrically coupling step comprises electrically coupling the source terminal of the FET to the metal base structure through the first CTE-matched mounting pad.

19. selecting the first CTE-matched mounting pad; a first mounting pad layer; 18. The method of claim 17, further comprising selecting the first CTE-matched mount pad to have a layered structure comprising: a second mount pad layer bonded to the first mount pad layer, the second mount pad layer containing less copper by weight than the first mount pad layer and more molybdenum by weight than the first mount pad layer.

Images