Spin transfer torque and magnetic resistance memory element for spin locus torque random access memory

Abstract

To provide a magnetic resistance random access memory (MRAM) cell and a MRAM array, using a tetragonal system semimetal whistler compound.SOLUTION: A NRAM cell contains a template layer 1203. The template layer contains a binary alloy having an alternative layer lattice structure. In addition, the NRAM cell contains a semimetal whistler layer 1205 containing a semimetal whistler material having a tetragonal system lattice structure. The semimetal whistler layer is positioned at an outer side of the template layer, and includes the number of whistler inner surface lattices different from the number of inner surface lattices of a cubic shape of the semimetal whistler material. A tunnel barrier 1209 is positioned at an outer side of the semimetal whistler layer, and a magnetic layer 1211 is positioned at the outer side of the tunnel barrier.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present invention relates generally to electrical, electronic and computer technologies, and more particularly to magnetoresistive random access memory (MRAM). [Background technology]

[0002] Currently, MRAM is a three-layer device that uses magnetic tunnel junctions (MTJs). These typically include a reference layer magnet, a tunnel barrier, and a storage or free magnetic layer. The magnetic layers can be ferromagnetic or ferrimagnetic. A current is passed through the device and the resistance is measured. The resistance varies depending on the magnetic orientation of the two magnetic layers, and the relative resistance change is called Tunnel MagnetoResistance (TMR), which is related to the spin polarization (i.e., higher spin polarization means higher TMR). High spin polarization, and therefore high TMR, is preferred (higher TMR means higher ON / OFF ratio). Low switching currents are also preferred. In a parallel arrangement, the magnetic layers have their magnetizations aligned with each other, and in this state the resistance is usually lower compared to the antiparallel arrangement. In an antiparallel arrangement, the magnetic layers have their magnetizations misaligned with each other, and in this state the resistance is usually higher compared to the parallel arrangement. The magnetic state of the MTJ is changed by passing a current through it. Since the current transfers spin angular momentum, exceeding a threshold current switches the direction of the moment of the memory layer. Such MRAM devices are called STT-MRAM because they switch using spin transfer torque (STT). The magnitude of the required switching current is less when the magnetization of the electrodes is oriented perpendicular to the layer.

[0003] Current devices use alloys of cobalt, iron, and boron in the magnetic layers, and such layers are ferromagnetic. Heusler compounds have a face-centered cubic (FCC) crystal structure and 2A magnetic intermetallic compound having the composition YZ (full-Heuslers or simply "Heuslers"), where X and Y are transition metals and Z is in the p-block (or main group) of the periodic table. A half Heusler has the composition XYZ. References herein to Heusler or Heuslers without the term "half" are intended to refer to full-Heuslers. Heusler compounds have four interpenetrating FCC sublattice. Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a technique for using a tetragonal half metallic Heusler compound in an MRAM or the like. [Means for solving the problem]

[0005] In one aspect, each exemplary magnetoresistive random access memory cell includes a template layer including a binary alloy having an alternating layer lattice structure; a half metallic Heusler layer including a half metallic Heusler material having a tetragonal lattice structure, the half metallic Heusler layer being located outside the template layer and having a Heusler in-plane lattice constant different from an in-plane lattice constant in cubic form of the half metallic Heusler material; a tunnel barrier layer outside the half metallic Heusler layer; and a magnetic layer outside the tunnel barrier.

[0006] In yet another aspect, a magnetoresistive random access memory array of such magnetoresistive random access memory cells includes a plurality of bit lines and a plurality of complementary bit lines forming a plurality of bit line-complementary bit line pairs, a plurality of word lines intersecting the plurality of bit line pairs at a plurality of cell locations, and a respective plurality of magnetoresistive random access memory cells located at each of the respective plurality of cell locations, each magnetoresistive random access memory cell electrically connected to a corresponding bit line and selectively interconnected to a corresponding complementary bit line under the control of a corresponding one of the word lines.

[0007] In yet another aspect, a method of operating such an array includes providing an array, applying signals to word lines such that a first subset of cells store logic 1s and a second subset of cells store logic 0s; and reading the stored logic 1s and 0s via the bit lines and complementary bit lines.

[0008] In a further aspect, a method of forming a magnetoresistive random access memory cell includes providing a template layer comprising a binary alloy having an alternating layer lattice structure and having an in-plane lattice constant of the template layer; epitaxially growing a half-metallic Heusler layer on the template layer, the half-metallic Heusler layer comprising a half-metallic Heusler material, the half-metallic Heusler layer grown on the template layer, the Heusler material having a tetragonal lattice structure and a Heusler in-plane lattice constant different from the in-plane lattice constant of a cubic shape of the half-metallic Heusler material and substantially matching the in-plane lattice constant of the template layer; forming a tunnel barrier outer of the half-metallic Heusler layer; and forming a magnetic layer outer of the tunnel barrier.

[0009] In yet another aspect, a hardware description language (HDL) design structure is encoded in a machine-readable data storage medium, the HDL design structure including elements that, when processed by a computer-aided design system as described, generate a machine-executable representation of the magnetoresistive random access memory cells and / or arrays.

[0010] As used herein, "facilitating" an action includes performing an action, making an action easier, helping to perform an action, or having an action performed. Thus, by way of example and not limitation, instructions performed at a step can facilitate an action performed by semiconductor processing equipment by sending appropriate data or instructions to cause or assist in the action being performed. When an actor facilitates an action in addition to performing the action, the action may be performed by some entity or combination of entities.

[0011] The techniques disclosed herein can provide substantial advantageous technical effects. Some embodiments may not have such potential advantages, and such potential advantages are not necessarily required in all embodiments. By way of example and not by way of limitation, one or more embodiments can provide one or more of the following: • MRAM devices whose cells exhibit high spin polarization (using semi-metals whose spin polarization is 1) and therefore high TMR and high ON / OFF ratio. • MRAM devices in which the cells exhibit low magnetization and hence low switching current. • MRAM devices in which the magnetic layer of the cell exhibits volume perpendicular magnetic anisotropy (PMA) and can be scaled to small dimensions using tetragonal half-metallic Heusler compounds (where the tetragonal crystal structure contributes to the PMA). • A fabrication technique that uses an underlayer (e.g., CoAl) to allow epitaxial growth of tetragonal semimetallic Heusler compounds.

[0012] These and other features and advantages will become apparent from the following detailed description of illustrative embodiments, which is to be read in connection with the accompanying drawings. [Brief description of the drawings]

[0013] The following drawings are presented by way of example only, and not by way of limitation, and like reference numbers (when used) indicate corresponding elements throughout the several drawings. [Figure 1] The Heusler compounds used in the embodiments of the present invention are shown below. [Diagram 2] 4 illustrates the growth of a Heusler compound on a template layer according to an embodiment of the present invention. [Diagram 3] 1 shows a table of half-metallic Heusler compounds that can be used in tetragonal form in MRAM according to an embodiment of the present invention. [Figure 4] 1 shows and compares cubic and tetragonal forms of half-metallic Heusler compounds, each of which may be used in the tetragonal form in MRAM, according to an embodiment of the present invention. [Diagram 5] 1 shows and compares cubic and tetragonal forms of half-metallic Heusler compounds, each of which may be used in the tetragonal form in MRAM, according to an embodiment of the present invention. [Figure 6] 1 shows and compares cubic and tetragonal forms of half-metallic Heusler compounds, each of which may be used in the tetragonal form in MRAM, according to an embodiment of the present invention. [Figure 7a] 1 illustrates the dependence of Mn2FeSb properties, as used in one or more embodiments, on the in-plane lattice constant. [Figure 7b] 1 illustrates the dependence of Mn2FeSb properties, as used in one or more embodiments, on the in-plane lattice constant. [Figure 7c] 1 illustrates the dependence of Mn2FeSb properties used in one or more embodiments on the in-plane lattice constant. [Figure 7d] 1 illustrates the dependence of Mn2FeSb properties used in one or more embodiments on the in-plane lattice constant. [Figure 7e] 1 illustrates the dependence of Mn2FeSb properties used in one or more embodiments on the in-plane lattice constant. [Figure 7f] 1 illustrates the dependence of Mn2FeSb properties used in one or more embodiments on the in-plane lattice constant. [Figure 8] According to an embodiment of the present invention, a half-metallic Heusler compound with an optimal in-plane lattice constant for high perpendicular magnetic anisotropy (PMA) is presented. [Figure 9]1A-1C provide non-limiting examples of chemical templating layers useful in one or more embodiments. [Figure 10] 1 illustrates a first exemplary MRAM cell according to an embodiment of the present invention. [Figure 11] 4 illustrates a second exemplary MRAM cell, in accordance with an embodiment of the present invention. [Figure 12] 1 illustrates an array of MRAM cells, according to an embodiment of the present invention. [Figure 13] 1 shows a flow diagram of a manufacturing method according to an embodiment of the present invention. [Figure 14] 1 illustrates a computer system that may be useful for implementing one or more aspects and / or elements of the present invention. [Figure 15] 1 is a flow diagram of a design process used in semiconductor design, manufacturing, and / or testing.

[0014] It should be understood that elements in the figures are illustrated for simplicity and clarity, and that common but well-understood elements that may be useful or necessary in a commercially feasible embodiment may not be shown in order to less obscure the view of the illustrated embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] The principles of the invention described herein are in the context of exemplary embodiments, and various modifications to the illustrated embodiments within the scope of the claims will be apparent to those skilled in the art from the teachings herein. That is, no limitations are intended or should be inferred with respect to the embodiments shown and described herein.

[0016] Tetragonal Heusler compounds have been found to be important in MRAM applications. Current MRAM devices use magnetic tunnel junctions (MTJs) as the storage element. A simple MTJ is a three-layer structure that includes two magnetic layers separated by a tunnel barrier layer. Current MTJs using cobalt iron boron (Co / Fe / B) can provide magnetic layers with magnetization perpendicular to the film surface (i.e., exhibiting a favorable perpendicular magnetic anisotropy (PMA)). The perpendicular magnetic anisotropy (PMA) of a Co-Fe-B layer arises from the interface between such a layer and the tunnel barrier and / or underlayer on which the Co-Fe-B layer is deposited. These layers must therefore be thin enough so that the interface PMA arises from the magnetic volume and overcomes the magnetic erase energy, which increases in proportion to the magnetic volume of the Co-Fe-B layer. However, high moment requires high switching current. One or more embodiments advantageously provide a PMA, but with a lower moment and correspondingly reduced switching current, compared to prior art devices.

[0017] It is preferable for magnetic materials to have volume PMA rather than surface (interface) PMA because this allows devices to be scaled to smaller sizes (typically smaller diameters). As device size decreases, the thermal stability of the device decreases. However, for elements with volume anisotropy, the advantage is that the thickness can be increased to compensate for the loss in thermal stability. The switching current is expressed as the product (M s VH k ), where M s is the saturation magnetization, V is the volume, H k is an anisotropic field. Low moments (i.e. low M s ) Heusler compounds are H k The increase in M s Therefore, a lower switching current is required as long as it does not overwhelm the

[0018] Therefore, for MRAM applications, it is preferred that all magnetic elements have moments perpendicular to the layer itself (i.e. magnetization perpendicular to the film plane - PMA occurring in the crystal structure). Low magnetization and low switching currents are preferred. The inventors have found that one way to achieve PMA is through the use of Heusler compounds. Normally Heusler compounds tend to be cubic, so that the thin film is grown with the magnetic moment in the plane of the layer. For MTJs for MRAM applications, it is highly preferred that the magnetic moments of the magnetic layers are perpendicular to the layer. One way to make the moment of the Heusler compound perpendicular is to use Mn 3 The first step is to select a small subset of Heusler compounds that are essentially tetragonal, such as Z (where Z=Ga, Ge, Sn, or Sb). Another way to induce PMA from Heusler layers is to modify the compound from cubic to tetragonal. Instead of having all three unit cell axes be the same length, if one of the axes is a little longer (or shorter), the magnetization can become perpendicular because the crystal symmetry is broken. It is worth noting with respect to Figs. 4 and 5 that the parameter c' described elsewhere in this specification is appropriate because the unit cells of the Heusler materials described elsewhere in this specification are not simple crystals with only a single element (the simple relationship c=a for a cube does not apply to cells with multiple elements). In the tetragonal case, one of the axes is longer (or shorter) than in the cubic case.

[0019] FIG. 1 shows an embodiment of a tetragonal Heusler compound exhibiting bulk PMA.

[0020] Volumetric PMA is preferred because surface (interface) PMA is difficult to scale to small cells, and our calculations indicate that volumetric PMA can be advantageously scaled to smaller sizes. 3We focus on Ge ferrimagnetic Heusler compounds and consider the magnetic moments of various atoms. As explained elsewhere in this document, in the tetragonal case the Z (vertical) axis is "stretched" compared to the cubic case (alternative approaches could reduce it). Due to the bulk concentration, the magnetization tends to be perpendicular to the film (i.e. along the z axis). If the Heusler layer is grown with the z axis perpendicular to the (xy) plane with a suitable template layer, it will have a moment perpendicular to the (xy) plane of the film.

[0021] Half-metallic (HM) magnetic materials have a Fermi energy E F Since the material has a band gap at , the DOS (spin 1,E F ) = 0, and in the other spin channels, the normal metallic DOS (spin 2,E F )>0 (DOS=density of states). Theoretically, such materials would offer infinite TMR if used as electrodes in MRAM devices. Unfortunately, all known half-metallic Heusler compounds are cubic with zero volume anisotropy (by symmetry) and are therefore unsuitable for practical STT-MRAM devices. Using a suitable template layer, the Heusler compounds can be deformed in the in-plane direction, which can induce tetragonality in the Heusler compounds. Tetragonality implies the presence of PMA and suggests suitability for use in vertical MTJs. It would be highly favorable if the half-metallicity of the Heusler compounds could be made robust against in-plane deformation, as such vertical MTJs could have high TMR.

[0022] Also, with regard to semi-metallicity, all materials have up and down spins. If there is a band gap in one of the spin channels, only one spin will move when a current flows at the Fermi level. Semi-metals are very useful for achieving high TMR. One or more embodiments make the cubic compound tetragonal by epitaxy. The material is deposited on a template layer (in a non-limiting example, a chemical template layer) that forces the in-plane lattice constant to be different from the out-of-plane lattice constant. This results in tetragonality. One or more embodiments ensure that the semi-metallicity (i.e., having a band gap in one of the spin channels) is still maintained. It has been found that there are many Heusler compounds that are semi-metallic. There are about 3,000 Heusler compounds. Less than 100 are semi-metallic. Only a few of these can be made tetragonal while still maintaining the semi-metallic properties, such that they have perpendicular magnetic anisotropy, i.e., the magnetization is perpendicular to the film. These few are likely to be advantageously used in MRAM and have high TMR.

[0023] A suitable aspect of one or more embodiments is the variation of the in-plane lattice constant of known semi-metallic cubic Heusler compounds by using different template layers. Such Heusler compounds are thus tetragonal with non-zero volume anisotropy. The template layer can be, for example, a non-magnetic binary compound (e.g., CoAl with in-plane lattice constant a=4.03 Å). The semi-metallic magnetic Heusler compounds can be, for example, known ternary compounds (e.g., CoAl with a=3.98 Å). 2 MnSi). Co 2MnSi is deformed when epitaxially grown on the CoAl layer. If the change in the in-plane lattice constant is not large (e.g., within 5% from the equilibrium cubic lattice constant), calculations suggest that the semi-metallicity may remain intact for at least some Heusler compounds. Therefore, using DFT (density-functional theory) calculations, tetragonal Heusler compounds were determined that still have semi-metallic volume anisotropy that is not zero. In this regard, the semi-metallic Heusler compounds themselves are also well known. However, all semi-metallic Heusler compounds known so far have exhibited a cubic crystal lattice structure and did not exhibit PMA. The inventors have found that semi-metallic Heusler compounds with a tetragonal crystal lattice structure can be grown on a template layer to obtain PMA. The inventors have found that growth on a template layer "squeezes" or "stretches" the lattice constant in one direction to obtain the desired tetragonal crystal lattice structure (e.g., "stretches" in z while "squeezing" in x and y) while maintaining the semimetallic properties. High TMR is predicted for such compounds based on calculations with the template layer used as a base for epitaxial growth.

[0024] One or more embodiments favor tetragonal semimetallic Heusler compounds with non-zero anisotropy by using an underlayer (e.g., CoAl) with a different in-plane lattice constant (compared to the cubic geometry) to obtain a volume anisotropy that is opposite to the interface anisotropy. One or more embodiments use a Heusler semimetallic compound. In one or more embodiments, the Heusler semimetallic compound can be, for example, a nonmagnetic metal (e.g., CoAl) or a magnetic metal (e.g., cubic Co, which is also a semimetallic Heusler). 2 In one embodiment, the Heusler semimetal compound is grown on a semiconductor barrier (e.g., MgO) so that the tetragonal semimetallic Heusler becomes the bottom electrode of the MRAM cell. In another embodiment, the Heusler semimetal compound is grown on a semiconductor barrier (e.g., MgO) so that the tetragonal semimetallic Heusler becomes the top electrode of the MRAM cell. See FIG. 3. The parameter a_cub is the in-plane cubic lattice constant (here a_cub) that applies to a cube-shaped semimetal.cub If this a_cub value can be altered, for example, to + / - 0.3 Å or + / - 10%, and the compound still maintains semi-metallicity, then the compound is considered to exhibit strong semi-metallicity and can be grown with a template layer to achieve tetragonal crystallinity without losing semi-metallicity.

[0025] Semimetals are notable for being materials that act as conductors for electrons of one spin orientation, but as insulators or semiconductors for electrons of the opposite orientation. Known semimetals are ferromagnetic (or ferrimagnetic). In semimetals, the valence band for one spin orientation is partially filled, while there is a gap in the density of states for the other spin orientation. This results in conductive behavior only for electrons of the first spin orientation. In some semimetals, the majority of the spin channels are conductive, while in other semimetals, only a minority of the channels are conductive.

[0026] We have demonstrated that 13 half-metallic Heuslers (Mn 2 CoAl, Mn 2 CoAs, Mn 2 CoGe, Mn 2 CoSi, Mn 2 CuSi, Mn 2 FeSb, Co 2 CrAl, Co 2 CrGe, Co 2 CrSi, Co 2 MnGe, Co 2 MnSb, Co 2 MnSi, Fe 2 MnSi) was confirmed.

[0027] Referring again to FIG. 1, aspects of the chemical template layer will now be considered. 3 Heusler compounds such as Ge contain alternating layers of Mn-Mn and Mn-Ge atoms. In FIG. 1, atoms with shading 301 indicate Ge atoms (main group) and atoms with shading 303 indicate X 2The X-position Mn atoms of YZ (tetrahedrally coordinated by Z) are shown, and the atoms with shading 305 are X 2 3 shows element Mn atoms at Y-positions in YZ (octahedrally coordinated by Z). Mn is a transition metal and Ge is a main group of the periodic table. One of the alternating layers contains only transition metal atoms 303, while the other layer contains main group element atoms 301 along with transition metal atoms 305. Thus, a seed layer containing a single element that is lattice matched to the in-plane lattice constant will not promote the growth of aligned Heusler compounds at low temperatures, such as room temperature. An ideal seed layer would contain a binary compound of a transition element and a main group element. This ideal seed layer would also have an alternating layer structure containing these two elements. In one layer, there is only a transition metal. In the other layer, there is only a main group metal (X 2 (The "Z" in YZ is also a main group metal.) This binary compound has a CsCl-like (cesium chloride-like) structure (where each cesium ion is coordinated by eight chloride ions). Exemplary template layers include CoAl, CoGa, etc.

[0028] Now referring to FIG. 2, one or more embodiments use a CsCl-type chemical template layer (CTL) 401 (CoAl is an example of a good CsCl-type CTL) to further promote the growth of aligned Heusler compounds at ultra-thin thicknesses and even at room temperature. "E" corresponds to Al, for example, and "A" corresponds to Co, for example. In FIG. 2, view 421 is a schematic diagram and view 423 is a transmission electron microscope (TEM) image. Mn 3 Ge, or Mn 3 Sn, or Mn 3A Heusler compound such as Sb(403) is epitaxially grown on top of the CoAl layer 401. The in-plane lattice constant of the ultra-thin (<~25 Å) Heusler compound is similar to the CoAl CTL. By choosing an appropriate CTL, the Heusler can be distorted to other degrees. It has been found that ternary Heusler compounds can also be aligned with the CTL. As shown, Mn (generally X) is grown on Al and Ge (generally Z) is grown on Co. Note the atomic step 405. Since the Heusler material can be distorted, it adopts the in-plane lattice constant of the template material. One or more embodiments impose the lattice constant of the template layer on the Heusler layer. Note that in view 423, CoAl(401) includes Al layer 409 and Co layer 411, and MnSb includes MnMn layer 413 and MnSb layer 415. Note the MgO tunnel barrier 407. The three most prominent tetragonal compounds are Mn 3 Ge, Mn 3 Sn, and Mn 3 Sb and Mn 3 Sb is easily visible in the TEM image 423 due to the large difference in Z between Mn and Sb.

[0029] We investigated 90 cubic Heusler compounds that are claimed in the literature to be (theoretically) half-metallic (HM). Using DFT / GGA (Generalized Gradient Approximation) and DFT / LDA (Local Density Approximation) methods for calculations, we found that some of these compounds are indeed HM, some are not HM but have large spin polarization, and some are not HM but have relatively small spin polarization. In particular, among the 90 compounds studied, we focused on 30 compounds with spin polarization > 99%, 22 compounds with spin polarization = 100% (true semimetal), and 17 compounds that maintain the semimetal state, as shown in Figure 3, where the in-plane lattice constant a is the cubic lattice constant a cub The regular ("reg") full Heusler alloys have a change of 0.16 Å near X 2It is worth noting that while the Mn alloys have the YZ crystal structure, the inverted ("inv") Heusler alloys have the (XY)XZ crystal structure. This is displayed in the second column of Figure 3 (the first column lists related compounds). Whether a compound is inverted or ordered does not change whether it is ferromagnetic or ferrimagnetic. 2 or Mn 3 The compounds tend to be ferrimagnetic, but Co 2 The compounds tend to be ferromagnetic. The third column lists the a_cub parameters defined above. The fourth column gives the total moment m_tot. The fifth column gives the parameter Δ1sym of maj, which indicates the presence or absence of Δ1 symmetric state in the conducting spin channel at Fermi energy at the Γ point of the 2D surface Brillouin zone. In MTJs with MgO tunnel barrier, Δ1 symmetric electrons at the Γ point are known to have the highest conductivity. In Heusler / MgO / Fe MTJs, Heusler with Δ1 symmetry (indicated by "Yes" in the fifth column) further enhances the TMR. Therefore, columns 2 to 5 give the relevant data for the cubic structure.

[0030] See columns 7 through 13 for the optimum lattice constant a and associated data in the range of semimetals that produce the largest Kv. Kmc is the magnetocrystalline anisotropy, Ksh is the shape anisotropy, Kv=Kmc-Ksh. Kv denotes the PMA and must be >0 for materials with PMA. The parameters c', m_tot, and SP are defined elsewhere herein.

[0031] Referring to columns 16-18, which show data suitable for the range of a where SP>0.99, the parameters a_min and a_max in this context are spin polarization (SP)>0.99 and the range is a_max-a_min. Referring to columns 20-22, which show data suitable for the range of a where SP=1, the parameters a_min and a_max in this context are SP=1 and the range is again a_max-a_min.

[0032] The present inventors havecub When a changes by 0.30 Å near the 2 FeSb, Mn 2 CoAl, Mn 2 CoGe, Mn 2 CoSi, Mn 2 CuSi, Co 2 CrAl, Co 2 CrSi, Co 2 MnSb, and Co 2 Nine compounds of MnSi were identified (all of these compounds are highlighted in column 1). 2 MnAl is highlighted by its narrow but strong PMA. These compounds are cub It has a very stable semi-metallic character that is difficult to destroy by lattice constant changes (in each direction) of up to 4% near the surface. Calculations show that the most promising candidate for the electrodes of MRAM devices has 100% spin polarization and anisotropy constant Kv=1.15 MJ / m at a=4.03 Å. 3 Mn 2 It will be appreciated that Kv greater than 0 is appropriate, and the higher the value, the better. Thus, the table shows that when SP=1, a=4.03Å and >0.2MJ / m 3 In one or more embodiments, the spin polarization SP=1. In column 18, the table highlights all widths that are at least 0.2 Å.

[0033] In addition to the MgO barrier, the calculation results also showed that some of the HM compounds confirmed above (Mn 2 FeSb) crosses the Fermi energy at this spin channel, where the Γ-Z line (k || = 0 line of the Brillouin zone), the enhanced transmission in the conductive spin channel due to the presence of a Δ1 symmetric band along the

[0034] Reference is now made to Figures 4, 5, and 6. Figure 4 shows the structure of a cubic Mn 2 Figure 5 shows the tetragonal Mn 2 FeSb. Mn 2FeSb is a tetragonal semimetallic Heusler with low moments and a large anisotropy constant. Figure 6 compares the DOS for the cubic and tetragonal morphologies.

[0035] When a decreases from 4.23 Å ​​to 4.03 Å, E F It can be seen that the majority of states bands move to higher energies while the minority bands remain in the minority band gap. Also, a phase transition occurs near a = 4.09 Å, causing the magnetic moment to increase by 3.0μ. B From 1.0μ B (See Figures 7a, 7b, 7c, 7d, 7e and 7f.) In Figure 4, the cubic Mn 2 FeSb, a cub = 4.23 Å, when c' = c / (2a) = 0.707, the total moment is -1.0μ at Mn atom 601. B , Mn atom 603 +2.8μ B , and +1.2μ at Fe atom 605 B Including 3.0μ B In Figure 5, tetragonal Mn 2 FeSb, a cub = 4.03 Å, c' = c / (2a) = 0.858, the total moment is -2.5μ at Mn atom 601. B , Mn atom 603 +2.8μ B , and +0.7μ at Fe atom 605 B Including 1.0μ B Also in Figures 4 and 5, attention is directed to the Sb atom 604. Figure 6 shows the EE in electron volts for the cubic and tetragonal cases. F The DOS of states per electron volt is shown for

[0036] Figures 7a, 7b, 7c, 7d, 7e and 7f show the relationship between the in-plane lattice constant a and the Mn 2 The dependence of the FeSb properties is shown. For in-plane lattice constants less than 4.09 Å, the Mn 2Note that FeSb undergoes a phase transformation to a low moment tetragonal system. In particular, view 901 shows the spin polarization and c', view 903 shows the moment, view 905 shows c', view 907 shows the DOS for both spin channels at states per Ry, and view 909 shows the total energy E in electron volts. tot and view 911 shows the single crystal anisotropy constant Kmc in millielectron volts.

[0037] Continuing with reference to Figures 4-7, the lattice constant a is along the x-axis and the lattice constant c is along the z-axis. Define the dimensionless parameter c' = c / (2a). For a cube, c' = 1 / (Sqrt(2)) = 0.707; if c' > 0.707 or c' < 0.707, the crystal structure is no longer cubic. In the tetragonal form shown in Figure 5, a is the same in both the x and y directions, but is smaller than a for the cubic shape (Figure 4), so the parameter c for the tetragonal case is larger than for the cubic case.

[0038] As mentioned above, the tetragonal case can be produced by growth on a suitable template layer. To review, in the template concept, a template layer is grown and other layers (e.g. Heusler compounds) are grown on top of it. Template essentially means that the layer grown from the template layer will grow to the lattice constant a of the underlayer / seed layer. Similar to Poisson's ratio, changing a also changes c, so that as a is reduced, c increases (and conversely, as a increases, c is reduced). The lattice constant a of the Heusler layer is proportional to the lattice constant a of the template layer (a TL ), the template layer is rotated 45° to accommodate the lattice match of the Heusler layer. TL 'Sqrt(2)*a TL4. c increases as a decreases from 4.23 Å ​​for the cubic form in FIG. 4 to 4.03 Å for the tetragonal form in FIG. 5. The material tries to maintain the unit cell volume. Referring again to FIG. 2, CoAl is a layered structure. In the Heusler compound 403, all the Mn layers contain only transition metals and therefore prefer to grow with the Al of the template layer, but also have main group elements and prefer to grow with Co, thus obtaining ordering in the material 403. Atomic steps 405 are intrinsic to the template layer 401 but do not disturb the ordering of the Heusler material 403.

[0039] FIG. 8 shows a half-metallic Heusler compound having an optimal in-plane lattice constant for a high PMA according to an embodiment of the present invention. 2 FeSb, Co 2 CrAl, Mn 2 MnAl, Mn 2 CoSi, Mn 2 CuSi, Co 2 CrGe, Mn 2 CoGe, Mn 2 CoAl, Co 2 TiSi, and Mn 2 CoSb has a strong PMA (meaningfully Kv>0) and is a semimetal (SP is 1). 2 MnAl (i.e., Mn 3 Al) should provide a significant TMR enhancement, according to calculations. 3 It can be used as a polarization enhancing layer with non-semimetallic PMA Heusler compounds such as Ge. The in-plane lattice constant a can be varied by choosing an appropriate CTL. The columns show the in-plane lattice constants a, c', total moment, anisotropy constant, and spin polarization for each compound.

[0040] Figure 9 shows candidate CTL materials. The in-plane lattice constants a TL can be adjusted over a wide range of values. TLThe " value can also be further adjusted by the strain induced in the underlying seed layer and / or compositional changes at the nominal 1:1 value. In one or more embodiments, different lattice constants can be "mixed and matched." For example, in connection with "mixing and matching," the lattice constant of CoAl is 2.86 Å and the lattice constant of RuAl is 2.95 Å. In principle, when a Heusler compound is grown on RuAl, it will stretch differently than if it were grown on CoAl because it will attempt to conform to the RuAl lattice constant. That is, the degree of tetragonal stretching will vary depending on what substrate the tetragonal Heusler material is grown on.

[0041] FIG. 10 illustrates an embodiment having a half-metallic Heusler compound as the preservation layer 1205 .

[0042] A seed layer 1203, typically including a CTL, is located on a substrate 1201. The substrate 1201 is typically silicon with CMOS circuitry such as transistors and access lines that allow for individual device selection. In addition to the novel cells described herein, conventional transistors, access lines, peripheral circuitry, etc. can be used (see description of FIG. 12 below). The CTL or even a multi-layer CTL can be grown on a suitable surface, such as directly on top of the substrate, or more commonly, a seed layer deposited on the substrate, if possible. Non-limiting examples of seed layers include tantalum, tantalum-ruthenium, chromium, manganese, manganese nitride, etc. A half-metallic Heusler layer 1205 is located on the CTL and can be formed, for example, by epitaxial growth on the CTL. A polarization enhancing layer 1207 is optionally located outside layer 1205, and if present, layer 1207 can include a thin layer of a magnetic material, such as, for example, cobalt. A tunnel barrier 1209 is located outside the layer 1207 (if present) or outside the layer 1205 otherwise, and the barrier 1209 may be made of, for example, MgO, MgAl 2 O 4etc. The magnetic layer 1211 may include conventional cobalt, iron, nickel, or alloys, or may include Heusler or half-Heusler materials. If present, a synthetic antiferromagnet (SAF) layer 1213 is located outside of the layer 1211. Typically, the synthetic antiferromagnet (SAF) layer includes a Co / Pt multilayer (not shown) magnetically coupled to a base magnetic layer to achieve the required performance. A thin layer (not shown) of Ta, or Ir, or Ru (on the order of a few angstroms) may typically be interposed between the magnetic layer and the SAF layer. A cap layer 1215 is located outside of the layer 1213 (if present) or otherwise outside of the layer 1211. The cap layer may include Mo, W, Ta, Pt, Ru, or combinations thereof. In FIG. 10, double arrow 1221 indicates a storage layer whose magnetization can be changed, and single arrow 1223 indicates a reference layer whose magnetization is constant / fixed.

[0043] FIG. 11 shows an embodiment using a half-metallic Heusler compound as the reference layer.

[0044] A seed layer 1303, typically comprising a CTL, is located on the substrate 1301. A half-metallic Heusler layer 1305 is located on the CTL and can be formed, for example, by epitaxial growth on the CTL. A polarization enhancing layer 1307 is optionally located on the outside of the layer 1305. A tunnel barrier 1309 is located on the outside of the layer 1307 (if present) and otherwise on the outside of the layer 1305. The magnetic layer 1311 can include conventional cobalt, iron, nickel, or alloys, and can also include Heusler or half-Heusler materials. A cap layer 1313 is located on the outside of the layer 1311. In FIG. 11, double arrow 1323 indicates a storage layer whose magnetization can be changed, and single arrow 1321 indicates a reference layer whose magnetization is constant / fixed. The material discussion of FIG. 10 is generally applicable to FIG. 11.

[0045] In both Figures 10 and 11, the Heusler layer is typically located on top of the template layer, as epitaxially grown during fabrication.

[0046] Thus, we have identified nine half-metallic Heusler compounds that maintain their half-metallicity even when subjected to substantial in-plane lattice distortions of approximately 4% (the distortions are a cub These compounds vary by 0.30 Åd around Mn 2 FeSb, Mn 2 CoAl, Mn 2 CoGe, Mn 2 CoSi, Mn 2 CuSi, Co 2 CrAl, Co 2 CrSi, Co 2 MnSb, and Co 2 MnSi. These compounds have a very stable semi-metallic character that is not easily destroyed by changes in the lattice constant (in either direction). Experimentally, such transformations can be achieved by epitaxial growth of such compounds on CTLs such as CoAl.

[0047] Calculations show that a promising candidate for the electrodes of MRAM devices has 100% spin polarization and anisotropy constant Kv=1.15MJ / m 3 Mn 2 Indicates that it is FeSb. Mn 2 FeSb has a low moment equivalent to that of Mn3Ge. In addition, along with the MgO barrier, calculations have shown that eight of the nine compounds identified above (Mn 2 CoAl) crosses the Fermi energy at this spin channel, and the Γ-Z line (k || The conductive spin channel exhibits enhanced transmission due to the presence of a Δ1 symmetric band along the Δ = 0 line of the Brillouin zone.

[0048] Calculations suggest that a promising candidate polarization enhancing layer for MRAM devices is Mn 2 MnAl(Mn 3 Al), which has 100% spin polarization and a = 4.03 Å with a large anisotropy constant Kv = 0.775 MJ / m 3 (i.e., Mn 3 Al represents PMA. 2MnAl has zero moment and Mn is added to improve the spin polarization of the free layer without increasing the free layer magnetic moment. 3 It can be grown on top of Ge - calculations show that this interfacial layer can sustain low switching currents.

[0049] Thus, one or more embodiments include a device, again including a multi-layer structure (e.g., FIGS. 10 and 11). The multi-layer structure includes a first layer that is non-magnetic at room temperature, including a binary alloy having a CsCl structure with a target in-plane lattice constant (e.g., CTL of 1203, 1303). Also included is a second layer 1205, 1305 having a half-metallic Heusler compound with magnetization substantially perpendicular to the layer. As will be appreciated by those skilled in the art, typically the magnetization is not fixed, but rather the magnetization precesses like a top at non-zero temperatures. This may vary with temperature. In terms of such precession, squareness as used herein refers to the squareness of the time integral / average of the magnetization path. The time integral / average of the magnetization path may be, for example, "exactly" perpendicular, perpendicular to within = / -5%, or perpendicular to within + / -10%.

[0050] In some cases, the semimetallic Heusler compounds contain Mn 2 In some such cases, the half-metallic Heusler layer has a thickness of, for example, less than 5 nm. In some such cases, the binary alloy template layer or chemical template layer may include, for example, FeSb. 1-x E x where A is a transition metal element and E is a main group element. For example, A includes Co, E includes at least aluminum or gallium, and possibly trace amounts of other elements (e.g., Al or Ga, or alloys of Al with Ga, Ge, Sn, or any combination thereof, such as AlSn, AlGe, AlGaGe, AlGaSn, AlGeSn, and AlGaGeSn), and x ranges from 0.42 to 0.55. In some such cases, the tunnel barrier 1209, 1309 is located in contact with the half-metallic Heusler layer, and the tunnel barrier can include, for example, MgO (magnesium aluminum oxide is MgO).1-z Al 2+(2 / 3)z O 4 Magnesium aluminum oxide having the morphology of -0.5 is a suitable alternative to MgO. <z<0.5である)。

[0051] In one or more embodiments, the half-metallic Heusler compound is Mn 2 FeSb, Mn 2 CoAl, Mn 2 CoGe, Mn 2 CoSi, Mn 2 CuSi, Co 2 CrAl, Co 2 CrSi, Co 2 MnSb, and Co 2 MnSi, and the half-metallic Heusler layer has a thickness of, for example, less than 5 nm, and in some such cases, the binary alloy template layer or chemical template layer is selected from the group consisting of A 1-x E x where A is a transition metal element and E is a main group element. For example, A includes Co, E includes at least aluminum or gallium, and possibly trace amounts of other elements, and as noted above, x is in the range of 0.42 to 0.55. In some such cases, the tunnel barrier 1209, 1309 is located in contact with the half-metallic Heusler layer, and the tunnel barrier can include, for example, MgO (magnesium aluminum oxide is a suitable alternative to MgO).

[0052] It should be noted that half-metallic Heusler compounds are represented by stoichiometric formulas, which do not exclude small variations of up to a few percent from the nominal value. The template layer can include any of the materials listed in FIG. 9, but is not limited to these materials.

[0053] Referring now to FIG. 12, an array of MRAM devices 1202 is shown.

[0054] Each cell 1202 (e.g., the embodiment of FIG. 10 or FIG. 11) is coupled to a respective transistor 1204 that controls reading and writing. Word lines 1206 provide data for storage in the cells 1202, and bit lines 1210 and bit line complements 1208 read data from the cells 1202. In this manner, large arrays of memory elements can be implemented on a single chip. Any large number of cells 1202 can be used, within the limitations of the manufacturing process and design specifications.

[0055] Recording data in the cell 1202 involves passing a current through the cell. This current has the effect of switching the magnetization between parallel and anti-parallel states, switching between low and high resistance. This effect can be used to represent 1s and 0s of digital information, so the cell 1202 can be used as a non-volatile memory. Passing a current in one direction through the cell 1202 will cause the magnetization of the free layers 1205, 1311 to be parallel to the magnetization of the reference layers 1211, 1305, while passing a current in the other direction through the cell 1202 will cause the magnetization of the free layers 1205, 1311 to be anti-parallel to the reference layers 1211, 1305. Reading the bit stored in the cell 1202 involves applying a voltage (lower than that used to record information) to the cell 1202 to discover whether the cell offers a high resistance ("1") or a low resistance ("0") to the current.

[0056] The fabrication of semiconductor devices includes various stages of a device patterning process. For example, the fabrication of a semiconductor chip may begin with, for example, multiple computer aided design (CAD) generated device patterns, followed by efforts to replicate such device patterns onto a substrate. The replication process may include the use of various exposure techniques and various subtractive (etching) and / or additive (deposition) material processing processes. For example, in a photolithography process, a layer of photoresist material may first be applied on top of a substrate and then selectively exposed with a predetermined device pattern or patterns. Portions of the photoresist exposed to light or other ionizing radiation (e.g., ultraviolet light, electron beam, x-rays, etc.) may undergo a slight change in solubility in certain solutions. The photoresist may then be developed in a developer to remove the unirradiated (in negative resist) or irradiated (in positive resist) portions of the resist layer to generate a photoresist pattern or photomask. The photoresist pattern or photomask may then be copied or transferred to the substrate beneath the photoresist pattern.

[0057] There are numerous techniques used by those skilled in the art to remove material at various stages in creating semiconductor structures. These processes are collectively referred to herein as "etching." For example, etching includes wet etching, dry etching, chemical oxide removal (COR) etching, ion milling, and reactive ion etching (RIE) techniques, all of which are known techniques for removing selective materials when forming semiconductor structures. Standard Cleaning Solution 1 (SC1) includes a strong base, typically ammonium hydroxide and hydrogen peroxide. SC2 includes a strong acid, such as hydrochloric acid and hydrogen peroxide. Because the techniques and applications of etching are well understood by those skilled in the art, a more detailed description of such processes is not provided herein.

[0058] Although the overall fabrication method, including the epitaxial growth of a half-metallic Heusler material on a template layer, and the structures formed thereby, are novel, certain individual processing steps required to implement the method may utilize conventional semiconductor fabrication techniques and existing semiconductor manufacturing tooling. These techniques and tooling will be readily familiar to those skilled in the relevant arts taught herein. Additionally, one or more of the processing steps and tooling used to fabricate semiconductor devices are described in numerous readily available publications, including, for example, James D. Plummer et al., Silicon VLSI Technology: Fundamentals, Practice, and Modeling 1997, 1999, 1998, 1999, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 1998, 1999, 1999, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 19 ...9, 1990, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 1999, 1999, 1999, 1999, 1999, 1999, 1999, 1999, st Edition, Prentice Hall, 2001 and PH Holloway et al., Handbook of Compound Semiconductors: Growth, Processing, Characterization, and Devices, Cambridge University Press, 2008], both of which are incorporated herein by reference. While certain individual processing steps are described herein, it is emphasized that such steps are merely exemplary and that one of ordinary skill in the art may be familiar with several equally suitable alternatives that may be applicable.

[0059] It should be understood that the various layers and / or regions illustrated in the accompanying figures may not be drawn to scale, and one or more semiconductor layers of a type commonly used in such integrated circuit devices may not be explicitly shown in a given figure for ease of illustration, and this does not imply that the semiconductor layers not explicitly shown are omitted in the actual integrated circuit device.

[0060] In light of the preceding discussion, it will be understood that, in general, an exemplary magnetoresistive random access memory cell includes a template layer (e.g., part of 1203 or 1303) including a binary alloy (e.g., 401) having an alternating layer lattice structure. Also included is a half-metallic Heusler layer 1205, 1305 including a half-metallic Heusler material (e.g., 403) having a tetragonal lattice structure. The half-metallic Heusler layer is located outside the template layer and has a Heusler in-plane lattice constant different from the in-plane lattice constant of the cube shape of the half-metallic Heusler material. See the description of Figures 4 and 5. The cell further includes a tunnel barrier 1209, 1309 outside the half-metallic Heusler layer and a magnetic layer 1211, 1311 outside the tunnel barrier. The magnetic layer can be, for example, a conventional material or a Heusler or half-Heusler material.

[0061] 10, in some cases, the half-metallic Heusler layer 1205 includes a retention layer and the magnetic layer 1211 includes a reference layer, while, in some cases, the half-metallic Heusler layer 1305 includes a reference layer and the magnetic layer 1311 includes a retention layer, with particular reference to FIG.

[0062] The semimetallic Heusler compounds are Mn 2 FeSb, Mn 2 CoAl, Mn 2 CoGe, Mn 2 CoSi, Mn 2 CuSi, Co 2 CrAl, Co 2 CrSi, Co 2 MnSb, and Co 2 In some cases, the thickness of the half-metallic Heusler layer is less than 5 nm. The exemplary material stack of FIG. 10 is Si substrate / 50 Å Ta / 3 Å Co20Fe60B20 / 200 Å Mn3N / 300 Å CoAl / 14 Å Mn 2The exemplary material stack of FIG. 11 can be Si substrate / 50 Å Ta / 3 Å Co20Fe60B20 / 200 Å Mn3N / 300 Å CoAl / 25 Å Mn 2 It can be FeSb / 12ÅMgO / 11ÅCo20Fe60B20 / 100ÅRu.

[0063] In some cases, the half-metallic Heusler compound is Mn 2 FeSb, where again in some cases the thickness of the half-metallic Heusler layer is less than 5 nm.

[0064] In one or more embodiments, the tunnel barriers 1209, 1309 are selected from the group consisting of magnesium oxide and magnesium aluminum oxide.

[0065] In one or more embodiments, the binary alloy of the template layer is represented by the formula A 1-x E x where A is a transition metal element, E is a main group element including at least one of aluminum and gallium, and x is in the range of 0.42 to 0.55.

[0066] In some cases, the alternating layer lattice structure of the template layer includes a cesium chloride structure.

[0067] In some cases, the template layer is non-magnetic at room temperature (ie, 20° C.).

[0068] In one or more embodiments, the template layer has an in-plane lattice constant of the template layer, and the Heusler in-plane lattice constant substantially matches the in-plane lattice constant of the template layer. As used herein, the Heusler in-plane lattice constant "substantially matches" the in-plane lattice constant of the template layer when it matches the in-plane lattice constant of the template layer, or when the in-plane lattice constant of the tetragonal Heusler material moves from the in-plane lattice constant of the cubic Heusler material toward the in-plane lattice constant of the template material. In some cases, the Heusler in-plane lattice constant matches the in-plane lattice constant of the template layer within + / - 10%. In some cases, the Heusler in-plane lattice constant matches the in-plane lattice constant of the template layer within + / - 5%. The half-metallic Heusler material, for example, has a magnetization substantially perpendicular to the half-metallic Heusler layer.

[0069] In another embodiment, referring to FIG. 12, a magnetoresistive random access memory array includes a plurality of bit lines 1210 and a plurality of complementary bit lines 1208 forming a plurality of bit line-complementary bit line pairs. A plurality of word lines 1206 intersect the plurality of bit line pairs at a plurality of cell locations. A plurality of magnetoresistive random access memory cells 1202 are located at each of the plurality of cell locations. Each magnetoresistive random access memory cell 1202 is electrically connected to a corresponding bit line 1210 and selectively interconnected to a corresponding one of the complementary bit lines 1208 under the control of a corresponding one of the word lines 1206 (e.g., each transistor 1204 is field effect turned off or on by a signal from the word line 1206 applied to its gate, which controls reading and writing and controls whether the cell is coupled to the complementary bit line).

[0070] Each of the multiple magnetoresistive random access memory cells includes a template layer including a binary alloy having an alternating layer lattice structure, a half-metallic Heusler layer including a half-metallic Heusler material having a tetragonal lattice structure, the half-metallic Heusler layer being located outside the template layer and having a Heusler in-plane lattice constant different from the in-plane lattice constant of a cube shape of the half-metallic Heusler material, a tunnel barrier outside the half-metallic Heusler layer, and a magnetic layer outside the tunnel barrier, as shown in Figure 10 or 11, all of which are described elsewhere herein. Typically, the capping layer (1215 or 1313) of the devices shown in Figures 10 and 11 is coupled to a bit line 1210, while the layer (1203 or 1303) is coupled to a bit line complement 1208 via an access FET.

[0071] In yet another aspect, an exemplary method of operation includes providing an array as described above, applying signals to word lines 1206 such that a first subset of cells 1202 stores a logic 1 and a second subset of cells 1202 stores a logic 0, and reading the stored logic 1s and 0s via bit lines 1210 and complementary bit lines 1208.

[0072] In yet another aspect, referring to FIG. 13, an exemplary method of forming a magnetoresistive random access memory cell (such as that of FIG. 10 or 11) includes providing a template layer (e.g., 1203 or part of 1303, see layer 401 of FIG. 2) according to step 1301. The template layer includes a binary alloy having an alternating layer lattice structure and has an in-plane lattice constant of the template layer. An additional step includes epitaxially growing a half-metallic Heusler layer (e.g., 1205 or 1305, see layer 403 of FIG. 2) on the template layer. The half-metallic Heusler layer includes a half-metallic Heusler material. The half-metallic Heusler layer is grown on the template layer, the Heusler material having a tetragonal lattice structure and a Heusler in-plane lattice constant different from the in-plane lattice constant of the cubic shape of the half-metallic Heusler material. The Heusler in-plane lattice constant substantially matches the in-plane lattice constant of the template layer. Additional steps include forming a tunnel barrier (e.g., 1209 or 1309, see layer 407 in FIG. 2) outside the half-metallic Heusler layer, and forming magnetic layers 1211, 1311 outside the tunnel barrier. The method may also include providing and / or forming the other elements shown in FIGS. 10 and 11 using techniques apparent to those skilled in the art with the teachings herein. The cells may be assembled into an array by forming multiple cells simultaneously and interconnecting them with wires, transistors, and peripheral circuitry in a manner apparent to those skilled in the art with the teachings herein.

[0073] Those skilled in the art will recognize that the exemplary structures described above may be distributed in raw form (i.e., a single wafer having multiple unpackaged chips), bare die, packaged form, or integrated as part of intermediate or final products that benefit from tetragonal semi-metallic Heusler compounds, such as in MRAM.

[0074] Integrated circuits according to aspects of the present invention may be used in essentially any application and / or electronic system in which tetragonal semi-metallic Heusler compounds are beneficial, such as MRAM. Given the teachings of the present disclosure content provided herein, one of ordinary skill in the art will be able to contemplate other realizations and applications of the embodiments disclosed herein.

[0075] Some aspects of the present invention or elements thereof may be realized in the form of an apparatus including a memory and at least one processor coupled to the memory and operative to perform exemplary method steps. Figure 14 illustrates a computer system useful in implementing one or more aspects and / or elements of the present invention, referred to herein as a cloud computing node, but also representative of a server, general purpose computer, etc., that may be provided as a cloud or locally. Note that such a computer may control the design and / or manufacture of semiconductors or may use, for example, the memory cells / arrays described herein.

[0076] Cloud computing node 10 includes computer system / server 12 that operates in numerous other general purpose or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, and / or configurations suitable for use with computer system / server 12 include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, distributed cloud computing environments including any of the above systems or devices, and the like.

[0077] The computer system / server 12 may be described in the general context of computer system executable instructions, such as program modules, executed by a computer system. Generally, program modules may include routines, programs, objects, components, logic, data structures, etc. that perform particular tasks or implement particular abstract data types. The computer system / server 12 may be practiced in a distributed cloud computing environment where work is performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be located in both local and remote computer system storage media, including memory storage devices.

[0078] 14, computer system / server 12 of cloud computing node 10 is shown in the form of a general-purpose computing device. Components of computer system / server 12 may include, but are not limited to, one or more processors or processing units 16, a system memory 28, and a bus 18 coupling various system components including system memory 28 to processor 16.

[0079] Bus 18 may represent one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or local bus using a variety of bus architectures, including, by way of example and not limitation, Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MCA) bus, Enhanced ISA (EISA) bus, Video Electronics Standards Association (VESA) local bus, and Peripheral Component Interconnect (PCI) bus.

[0080] Computer system / server 12 typically includes a variety of computer system readable media. Such media may be any available media that is accessible by computer system / server 12 and includes all volatile and nonvolatile media, removable and non-removable media.

[0081] The system memory 28 may include computer system readable media in the form of volatile memory such as random access memory (RAM, 30) and / or cache memory 32. The computer system / server 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 34 may provide a non-removable, non-volatile magnetic medium (not shown, commonly referred to as a "hard drive") for reading and writing. Although not shown in the drawings, a magnetic disk drive may be provided for reading and writing a removable, non-volatile magnetic disk (e.g., a "floppy disk") and an optical disk drive may be provided for reading and writing a removable, non-volatile optical disk, e.g., a CD-ROM, DVD-ROM, or other optical media. In such a case, each may be connected to the bus 18 by one or more data media interfaces. As further shown and described below, the memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of an embodiment of the present invention.

[0082] A program / utility 40 having a set (at least one) of program modules 42 may be stored in memory 28, including, by way of example and not limitation, an operating system, one or more application programs, other program modules, and program data. Each of the operating system, one or more application programs, other program modules, and program data, or some combination thereof, may include implementing a networking environment. The program modules 42 generally perform the functions and / or methodologies of embodiments of the present invention described herein.

[0083] The computer system / server 12 may also communicate with one or more external devices 14, such as a keyboard, a pointing device, a display 24, or the like, one or more devices that allow a user to interact with the computer system / server 12, and / or any device (e.g., a network card, a modem, etc.) that allows the computer system / server 12 to communicate with one or more other computing devices. Such communication may occur via an input / output (I / O) interface 22. Still, the computer system / server 12 may communicate with one or more networks, such as a local area network (LAN), a general wide area network (WAN), and / or a public network (e.g., the Internet), via a network adapter 20. As shown, the network adapter 20 communicates with other components of the computer system / server 12 via a bus 18. It should be understood that other hardware and / or software components, not shown in the drawings, may be used with the computer system / server 12. Examples include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data archive storage systems, and the like.

[0084] Thus, one or more embodiments may employ software executed on a general purpose computer or workstation (e.g., for semiconductor design and / or manufacturing). With reference to FIG. 14, such implementations may employ, for example, a processor 16, memory 28, and input / output interface 22 to a display 24, and external devices 14, e.g., keyboard, pointing device, etc. As used herein, the term "processor" is intended to include any processing device, e.g., including a CPU (Central Processing Unit) and / or other forms of processing circuitry. The term "processor" also refers to one or more individual processors. The term "memory" is intended to include memory associated with a processor or CPU, e.g., RAM (Random Access Memory) 30, ROM (Read Only Memory), fixed memory elements (e.g., hard drive 34), removable memory elements (e.g., diskettes), flash memory, etc. As used herein, the phrase "input / output interface" is also intended to contemplate an interface to, for example, one or more mechanisms for inputting data into a processing unit (e.g., a mouse) and one or more mechanisms for providing results associated with a processing device (e.g., a printer). The processor 16, memory 28, and input / output interface 22 may be interconnected via a bus 18, for example, as part of the data processing device 12. For example, suitable interconnections via the bus 18 may also be provided with a network interface 20, such as a network card, that may be provided for interfacing with a computer network, and a media interface, such as a diskette or CD-ROM drive, that may be provided for interfacing with suitable media.

[0085] Thus, computer software containing instructions or code for carrying out the methodologies of the present invention as described herein may be stored in one or more of the associated memory elements (e.g., ROM, fixed or removable memory) and, when ready for use, loaded in part or in whole (e.g., into RAM) and executed by the CPU. Such software may include, but is not limited to, firmware, resident software, microcode, etc.

[0086] A data processing system suitable for storing and / or executing program code includes at least one processor 16 coupled directly or indirectly to memory elements 28 via a system bus 18. The memory elements may include local memory used during the actual implementation of the program code, bulk storage, and a cache memory 32 that provides temporary storage of at least some of the program code to reduce the number of times the code must be retrieved from the bulk storage during implementation.

[0087] Input / output or I / O devices (including but not limited to keyboards, displays, pointing devices, etc.) can be coupled to the system either directly or through intervening I / O controllers.

[0088] Network adapter 20 may also be coupled to the system to allow the data processing system to be coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modems, and Ethernet cards are just a few of the currently available network adapter types.

[0089] As used herein, including in the claims, a "server" includes a physical data processing system that executes a server program (e.g., system 12 shown in FIG. 14). It should be understood that such a physical server may or may not include a display and keyboard.

[0090] Any of the methods described herein may include the additional step of providing a system including individual software modules implemented in a computer readable storage medium, where the modules may include, for example, some or all of the appropriate elements shown in FIG. 15. The method steps may then be performed using the individual software modules and / or sub-modules of the system as described herein executed on one or more hardware processors (16 in FIG. 14), as described above. A computer program product may also include a computer readable storage medium having code adapted to be implemented to perform one or more method steps described herein, including providing a system having individual software modules. In one or more embodiments, the computer readable storage medium embodying the code and / or design structure is non-transitory.

[0091] One example of a user interface that may be used in some cases is hypertext markup language (HTML) code provided, such as by a server, to a browser on a user's computing device. The HTML is parsed by the browser on the user's computing device to generate a graphical user interface (GUI).

[0092] An exemplary design process used in semiconductor design, manufacturing, and / or testing One or more embodiments employ computer-aided semiconductor integrated circuit design simulation, testing, layout, and / or fabrication. In this regard, FIG. 15 illustrates a block diagram of an exemplary design flow 700 used, for example, in semiconductor IC logic design, simulation, testing, layout, and fabrication. The design flow 700 includes processes, machines, and / or mechanisms for processing a design structure or device to generate a logically or functionally equivalent representation of the design structure and / or device, such as may be analyzed using techniques disclosed herein and elsewhere. The design structure processed and / or generated by the design flow 700 may be encoded on a machine-readable storage medium to include data and / or instructions that, when executed or processed on a data processing system, generate a logically, structurally, mechanically, or functionally equivalent representation of a hardware component, circuit, device, or system. Machines include, but are not limited to, any machine used in IC design processes, such as design, fabrication, or simulation of circuits, components, devices, or systems. For example, machines may include: Lithography machines, machines and / or equipment for generating masks (e.g., e-beam writers), computers or equipment for simulating design structures, any apparatus used in the manufacturing or testing process or machines for programming a functionally equivalent representation of a design structure into a medium (e.g., machines for programming programmable gate arrays).

[0093] Design flow 700 may vary depending on the type of representation being designed. For example, a design flow 700 for building an application specific integrated circuit (ASIC) may differ from a design flow 700 for designing a standard component or for instantiating a design into a programmable array, such as a programmable gate array (PGA) or field programmable gate array (FPGA) offered by Altera® Inc. or Xilinx® Inc.

[0094] FIG. 15 illustrates a number of such design structures, including an input design structure 720 that is preferably processed by the design process 710. The design structure 720 may be a logical simulation design structure that is generated and processed by the design process 710 to generate a logically equivalent functional representation of a hardware device. The design structure 720 may additionally or alternatively include data and / or program instructions that, when processed by the design process 710, generate a functional representation of the physical structure of the hardware device. Whether representing functional and / or structural design features, the design structure 720 may be generated using electronic computer-aided design (ECAD), as implemented by a core developer / designer. When encoded, such as in a gate array or storage medium, the design structure 720 may be accessed and processed by one or more hardware and / or software modules in the design process 710 to simulate or functionally represent an electronic component, circuit, electronic, or logic module, device, apparatus, or system. Thus, design structure 720 may include files or other data structures including human and / or machine readable source code, compiled structures, and computer executable code structures that, when processed by a design or simulation data processing system, functionally simulate or otherwise represent a circuit or other level hardware logic design. Such data structures may include Hardware Description Language (HDL) design entities or other data structures conforming to and / or compatible with lower level HDL design languages ​​such as Verilog and VHDL, and / or higher level design languages ​​such as C or C++.

[0095] Design process 710 preferably uses and incorporates hardware and / or software modules to synthesize, transform, or otherwise process design / simulation functional equivalents of components, circuits, devices, or logic structures to generate netlist 780, which may include design structures such as design structure 720. Netlist 780 may include compiled or processed data structures representing lists of wires, individual components, logic gates, control circuits, I / O devices, models, etc., describing connections to other elements and circuits in an integrated circuit design. Netlist 780 may be synthesized using an iterative process in which netlist 780 is resynthesized one or more times depending on the design specifications and parameters of the device. As with the other design structure types described herein, netlist 780 may be recorded on a machine-readable data storage medium or programmed into a programmable gate array. The medium may be a non-volatile storage medium such as a magnetic or optical disk drive, a programmable gate array, a compact flash, or other flash memory. Additionally or alternatively, the medium may be a system or cache memory, a buffer area, or other suitable memory.

[0096] The design process 710 may include hardware and software modules for processing a variety of input data structure types, including netlist 780. Such data structure types may, for example, reside in library elements 730 and include a set of commonly used elements, circuits, and devices, including models, layouts, and code representations, for a given manufacturing technology (e.g., various technology nodes, 32 nm, 45 nm, 90 nm, etc.). The data structure types may further include design specifications 740, characterization data 750, verification data 760, design rules 770, input test patterns, output test results, and test data files 785, which may include other test information. The design process 710 may further include standard mechanical design processes, such as, for example, stress analysis, thermal analysis, machine event simulation, process simulation for operations such as casting, molding, and die pressing. Those skilled in the art of mechanical design may understand the extent of mechanical design tools and applications used in the design process 710 without departing from the scope and spirit of the present invention. Design process 710 may also include modules for performing standard circuit design processes, such as timing analysis, verification, design rule verification, place and route operations, and the like.

[0097] The design process 710 employs and incorporates logic and physical design tools, such as HDL compilers and simulation model building tools, to process the design structure 720 together with some or all of the illustrated supporting data structures along with any additional mechanical designs or data (if applicable) to create a second design structure 790. The design structure 790 resides on a storage medium or programmable gate array in a data format used for data exchange of mechanical devices and structures (e.g., information stored in IGES, DXF, Parasolid XT, JT, DRG, or other format suitable for storing or rendering such mechanical design structures). Like the design structure 720, the design structure 790 preferably includes one or more files, data structures, or other computer-encoded data or instructions that, when resident on a data storage medium and processed by an ECAD system, generate a logically or otherwise functionally equivalent form of one or more IC designs, etc. In one embodiment, the design structure 790 includes a compiled, executable HDL simulation model that functionally simulates the device being analyzed.

[0098] The design structure 790 may also employ data formats used to exchange integrated circuit layout data and / or symbolic data formats (e.g., information stored in GDSII (GDS2), GL1, OASIS, map files, or other suitable formats for storing such design data structures). The design structure 790 may include, for example, symbolic data, map files, test data files, design content files, manufacturing data, layout parameters, wires, metal levels, vias, shapes, routing data through a manufacturing line, and any other data required by a manufacturer or other designer / developer to manufacture a device or structure as described herein (e.g., .lib files). The design structure 790 may then proceed to stage 795 where, for example, the design structure 790 may proceed to tape-out, be released for manufacturing, be released to a mask house, be sent to another design house, or be sent back to the customer.

[0099] The illustrations of the embodiments described herein are intended to provide a general understanding of various embodiments, and are not intended to provide a complete description of all elements and features of devices and systems that can use the circuits and techniques described herein. Many other embodiments will be apparent to those skilled in the art through the teachings herein, and other embodiments may be used and derived therefrom, such that structural and logical substitutions and changes can be made without departing from the scope of the present disclosure. It should also be noted that in some alternative embodiments, some of the steps of the exemplary method may occur out of the order shown in the figures. For example, two steps shown in succession may in fact be performed substantially simultaneously, or certain steps may be performed in the reverse order, depending on the functionality involved. The figures are merely representational and are not drawn to scale. Thus, the specification and drawings should be considered as illustrative and not restrictive.

[0100] The embodiments are referred to herein individually and / or collectively by the term "embodiment" merely for convenience and without any intention to limit the scope of the present application to any single embodiment or inventive concept when, in fact, more than one is illustrated. Thus, although specific embodiments have been illustrated and described herein, it should be understood that arrangements which achieve the same purpose are substituted for the specific embodiment illustrated. That is, the present disclosure is intended to cover any and all adaptations or variations of the various embodiments. Combinations of the above embodiments and other embodiments not specifically described herein will be apparent to those of skill in the art from the teachings herein.

[0101] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural unless the context clearly dictates otherwise. As used herein, the terms "comprise" or "comprising" shall be understood to specify the presence of a referenced feature, step, operation, element, and / or component, or a combination thereof, but not to preclude the presence or addition of one or more other features, steps, operations, elements, and / or components, or a combination thereof. Terms such as "bottom," "top," "above," "over," "under," and "below" are used to indicate the relative location of elements or structures, but not relative heights. When a layer of a structure is described herein as "over" another layer, it will be understood that there may or may not be an intervening intermediate element or layer between the two particular layers. When a layer is described as "directly on" another layer, it indicates that the two layers are in direct contact. As used in this specification and the appended claims, the term "about" means within plus or minus 10%.

[0102] The equivalents of the relevant structures, materials, acts, and all means or step-function elements in the following claims are intended to include all structures, materials, or acts for performing a function in combination with other claimed elements as specifically claimed. The description of the various embodiments has been provided for purposes of illustration and description, but is not limited to or exclusive of the disclosed forms. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the invention. The embodiments have been selected and described to best explain the principles and practical applications and to enable those skilled in the art to understand the various embodiments with various modifications suitable for the particular use intended.

[0103] The Abstract is provided to comply with 37 C.FR § 1.76(b), which requires an abstract that will enable the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing detailed description, it will be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure should not be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the appended claims reflect, claimed subject matter may contain less than all features of a single embodiment. Accordingly, the following claims are hereby incorporated into the detailed description, with each claim standing on its own as separately claimed subject matter.

[0104] Given the teachings provided herein, one skilled in the art can contemplate other implementations and applications of the techniques and disclosed embodiments. Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the exemplary embodiments are not limited to such precise examples, and that various different changes and modifications may be made by those skilled in the art without departing from the scope of the appended claims. [Explanation of symbols]

[0105] 301 Main group element atom 303, 305 transition metal atom 401 CoAl layer 403 Heusler Compound 405 Atomic Stage 421, 423 views 601, 603 Mn atoms 604 Sb atoms 605 Fe atoms

Claims

1. A magnetoresistive random access memory cell, The template layer contains a binary alloy having an alternating layer lattice structure. The aforementioned binary alloy contains a transition element and a main group element, One of the alternating layers contains only transition metal atoms, and the other layer contains only main group element atoms. The aforementioned alternating layer lattice structure includes a cesium chloride structure. Template layer and A semimetallic Heusler layer containing a semimetallic Heusler material having a tetragonal lattice structure, The semimetallic Heusler layer is positioned outside the template layer and has a Heusler in-plane lattice constant different from the in-plane lattice constant of the cubic semimetallic Heusler material. Semimetallic Heusler layer, The tunnel barrier outside the aforementioned semimetallic Heusler layer, The magnetic layer on the outside of the tunnel barrier, A magnetoresistive random access memory cell, including one.

2. The aforementioned semimetallic Heusler layer includes a preservation layer, The magnetic layer includes a reference layer, The magnetoresistive random access memory cell according to claim 1.

3. The aforementioned semimetallic Heusler layer includes a base layer, The magnetic layer includes a storage layer. The magnetoresistive random access memory cell according to claim 1.

4. The half-metallic Heusler material is Mn ２ FeSb, Mn ２ CoAl, Mn ２ CoGe, Mn ２ CoSi, Mn ２ CuSi, Co ２ CrAl, Co ２ CrSi, Co ２ MnSb, and Co ２ selected from the group consisting of MnSi The magnetoresistive random access memory cell according to claim 1.

5. The aforementioned semimetallic Heusler material is Mn ２ FeSb included, The magnetoresistive random access memory cell according to claim 4.

6. The aforementioned semimetallic Heusler layer has a thickness of less than 5 nm. The magnetoresistive random access memory cell according to claim 1.

7. The material of the tunnel barrier is selected from the group consisting of magnesium oxide and aluminum magnesium oxide. The magnetoresistive random access memory cell according to claim 1.

8. The aforementioned binary alloy is A １－ｘ E ｘ It is represented as, A is a transition metal element, E is aluminum or gallium, The range of x is 0.42 to 0.

55. The magnetoresistive random access memory cell according to claim 1.

9. The template layer is nonmagnetic at room temperature. A magnetoresistive random access memory cell according to any one of claims 1 to 8.

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