DC / DC converter, electronic module and electronic apparatus

JP2023177026A5Active Publication Date: 2025-06-05CANON KK
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Patent Information

Application Number
JP2022089697
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-06-01
Publication Date
2025-06-05
Estimated Expiration
2042-06-01

AI Technical Summary

Technical Problem

Existing multiphase DC/DC converters experience increased ripple noise in output voltage when multiple channels operate, particularly during large load currents, due to insufficient cancellation of current phases.

Method used

A DC/DC converter design where channels with different inductance values are controlled to operate in specific phases, such as a first and second channel operating in phase and a third channel operating out of phase, to reduce ripple noise across varying load currents.

Benefits of technology

The proposed design effectively reduces ripple noise in the output voltage regardless of load current magnitude by utilizing inductive cancellation techniques.

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Abstract

To provide a DC / DC converter capable of reducing ripple noise on an output voltage regardless of the magnitude of load current.SOLUTION: A DC / DC converter includes a plurality of channels each of which includes a switching circuit and an inductor, an output line whose one end is connected to other ends of the inductors in the plurality of channels and whose other end is connected to a load, and a controller, the plurality of channels include a first to a third channels, inductors on the first and the second channels have a larger inductance value than the inductor on the third channel, the controller controls a switching circuit so that only the first channel operates if current flowing the load is first current, and controls the switching circuit so that the first and the second channels operate with the same phase and the third channel operates with phase different from the first and the second channels if the current flowing the load is second current larger than the first current.SELECTED DRAWING: Figure 1A
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Description

[Technical Field]

[0001] The present invention relates to a DC / DC converter, an electronic module, and an electronic device. [Background technology]

[0002] Patent Document 1 describes a technology for improving the efficiency of a multiphase DC / DC converter under light load conditions. In the technology described in Patent Document 1, the inductance of the inductor of a single channel is set to a value different from the inductances of the inductors of the other channels so that high efficiency can be obtained under the lightest load conditions in which only a single channel is active. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-226026 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the technique described in Patent Document 1 has a problem in that ripple noise in the output voltage increases when multiple channels of the multiphase DC / DC converter are operating and a large load current flows through the load.

[0005] The present invention has been made in view of the above-mentioned problems, and has as its object to provide a DC / DC converter that can reduce ripple noise in the output voltage regardless of the magnitude of the load current. [Means for solving the problem]

[0006] According to one aspect of the present invention, there is provided an input line to which a DC voltage is supplied, a plurality of channels each including a switching circuit and an inductor, one end of the inductor being connected to the input line via the switching circuit, an output line to which the other end of the inductor of each of the plurality of channels is connected to one end and to a load being connected to the other end, and a controller for controlling the switching circuits of the plurality of channels, wherein the plurality of channels include at least a first channel, a second channel, and a third channel, and the inductors of the first and second channels are larger than the inductor of the third channel. and when a current flowing through the load is a second current greater than the first current, the controller controls the switching circuits of the first to third channels so that the first and second channels operate in phase and the third channel operates out of phase with the first and second channels. [Effects of the Invention]

[0007] According to the present invention, ripple noise in the output voltage can be reduced regardless of the magnitude of the load current. [Brief explanation of the drawings]

[0008] [Figure 1A] 1 is a circuit diagram showing a circuit of a DC / DC converter according to a first embodiment of the present invention. [Figure 1B] 3A to 3C are diagrams illustrating examples of operational waveforms of the DC / DC converter according to the first embodiment of the present invention. [Figure 1C] 3A to 3C are diagrams illustrating examples of operational waveforms of the DC / DC converter according to the first embodiment of the present invention. [Figure 1D] 3A to 3C are diagrams illustrating examples of operational waveforms of the DC / DC converter according to the first embodiment of the present invention. [Figure 2] FIG. 4 is a circuit diagram showing a circuit of a DC / DC converter according to a second embodiment of the present invention. [Figure 3A] FIG. 10 is a circuit diagram showing a circuit of a DC / DC converter according to a comparative example. [Figure 3B] 10A and 10B are diagrams illustrating examples of operational waveforms of a DC / DC converter according to a comparative example. [Figure 3C] 10A and 10B are diagrams illustrating examples of operational waveforms of a DC / DC converter according to a comparative example. [Figure 3D] 10A and 10B are diagrams illustrating examples of operational waveforms of a DC / DC converter according to a comparative example. [Figure 3E] 10A and 10B are diagrams illustrating examples of operational waveforms of a DC / DC converter according to a comparative example. [Figure 3F] 10A and 10B are diagrams illustrating examples of operational waveforms of a DC / DC converter according to a comparative example. [Figure 4A] FIG. 10 is a circuit diagram showing a circuit of a DC / DC converter according to a third embodiment of the present invention. [Figure 4B] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the third embodiment of the present invention. [Figure 4C] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the third embodiment of the present invention. [Figure 4D] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the third embodiment of the present invention. [Figure 4E] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the third embodiment of the present invention. [Figure 4F] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the third embodiment of the present invention. [Figure 5A] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the fourth embodiment of the present invention. [Figure 5B] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the fourth embodiment of the present invention. [Figure 5C] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the fourth embodiment of the present invention. [Figure 5D] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the fourth embodiment of the present invention. [Figure 5E] FIG. 10 is a diagram showing an example of operational waveforms of the DC / DC converter according to the fourth embodiment of the present invention. [Figure 6A] FIG. 10 is a cross-sectional view showing a digital camera, which is an image pickup device as an example of an electronic device according to a fifth embodiment of the present invention. [Figure 6B] FIG. 11 is a perspective view showing a processing module in a digital camera, which is an image pickup device as an example of an electronic device according to a fifth embodiment of the present invention. [Figure 6C] FIG. 11 is a cross-sectional view showing a processing module in a digital camera, which is an image pickup device as an example of an electronic device according to a fifth embodiment of the present invention. [Figure 7A] FIG. 1 is a circuit diagram showing a circuit of a general multiphase DC / DC converter. [Figure 7B] 1 is a circuit diagram showing a circuit of a multiphase DC / DC converter described in Patent Document 1. [Figure 7C] FIG. 1 is a diagram showing the operating waveforms of a general multiphase DC / DC converter when only a single channel is operating. [Figure 7D] FIG. 1 is a diagram showing the operating waveforms of a general multiphase DC / DC converter when only a single channel is operating. [Figure 7E] FIG. 1 is a diagram showing the operating waveforms of a general multiphase DC / DC converter when only a single channel is operating. [Figure 7F] FIG. 1 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when only a single channel is operating. [Figure 7G] FIG. 1 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when only a single channel is operating. [Figure 7H] FIG. 1 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when only a single channel is operating. [Figure 7I]FIG. 1 is a diagram showing operational waveforms of a general multi-phase DC / DC converter when a plurality of channels are operating. [Figure 7J] FIG. 1 is a diagram showing operational waveforms of a general multi-phase DC / DC converter when a plurality of channels are operating. [Figure 7K] FIG. 1 is a diagram showing operational waveforms of a general multi-phase DC / DC converter when a plurality of channels are operating. [Figure 7L] FIG. 10 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when a plurality of channels are operating. [Figure 7M] FIG. 10 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when a plurality of channels are operating. [Figure 7N] FIG. 10 is a diagram showing the operating waveforms of the multiphase DC / DC converter described in Patent Document 1 when a plurality of channels are operating. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Reference technology] Electronic modules installed in electronic devices include a printed wiring board, a semiconductor device mounted on the printed wiring board, and a power supply circuit that supplies power to the semiconductor device. In recent years, the amount of data processed per unit time has increased, resulting in an increase in the amount of current required for semiconductor device operation. Therefore, DC / DC converters, which do not significantly increase loss even with increased current, are used as power supply circuits. While DC / DC converters are highly efficient, ripple noise is superimposed on the output voltage due to switching operations that control the output current and output voltage. Advances in semiconductor technology and increasing demands for lower power consumption have led to a steady decline in the operating voltage of semiconductor devices. As voltages decrease, the allowable noise level set to prevent semiconductor device malfunctions also decreases, so DC / DC converters are required to not only increase efficiency but also reduce ripple noise.

[0010] Among semiconductor devices, central processing units (CPUs), graphics processing units (GPUs), and digital signal processors (DSPs) have operating currents that drop to nearly zero in standby mode, but significantly increase in response to the amount of data processed in operation. In other words, the output current (load current) of a DC / DC converter fluctuates widely, ranging from several milliamps to several amperes. To accommodate this wide dynamic range of load current, multiphase DC / DC converters, such as those described in Patent Document 1, are used, consisting of multiple DC / DC converters connected in parallel. This multiphase DC / DC converter operates only one DC / DC converter when the load, such as a CPU, is in standby mode, and operates all DC / DC converters in full operation mode, thereby responding to fluctuations in the current. Since only one DC / DC converter operates in standby mode, this has the advantage of minimizing switching loss. Additionally, when all DC / DC converters are in full operation mode, the phases of the converters are shifted, canceling out each other's ripple noise, thereby reducing the total ripple noise.

[0011] However, when only a single DC / DC converter is operating, such as when the semiconductor device is in standby mode, this cancellation effect does not occur, resulting in a problem of ripple noise being larger than when the device is in full operation. Patent Document 1 therefore discloses a technology that can reduce ripple noise even when only a single DC / DC converter is operating, such as in standby mode. Specifically, Patent Document 1 sets a large inductance value only for the output inductor component of the DC / DC converter that operates in the semiconductor device's standby mode, thereby reducing the amplitude of the current generated by switching operation and thereby reducing ripple noise.

[0012] As reference techniques, a general multiphase DC / DC converter and the multiphase DC / DC converter described in Patent Document 1 will be described with reference to FIGS. 7A to 7H.

[0013] Fig. 7A is a circuit diagram showing an example of a circuit of a general multiphase DC / DC converter. The example shown in Fig. 7A is a two-phase circuit. As shown in Fig. 7A, DC / DC converter 60A, which is a general multiphase DC / DC converter, has switching circuits 602A and 603A, inductors 604A and 605A, a capacitor 606A, and a controller 608A. DC / DC converter 60A also has an input line 621A and an output line 622A.

[0014] Input line 621A is a wiring to which a DC voltage is supplied from input voltage source 601A. One end of input line 621A is connected to input voltage source 601A. Input voltage source 601A supplies a DC voltage to input line 621A. Input voltage source 601A is not particularly limited, but may be, for example, a power supply that supplies a DC voltage obtained by converting AC power supplied from a commercial power source, or may be a battery. Switching circuits 602A and 603A are connected in parallel to the other end of input line 621A via wiring.

[0015] The switching circuits 602A and 603A are each composed of a CMOS (Complementary Metal Oxide Semiconductor) inverter having a P-type MOS (Metal Oxide Semiconductor) transistor Tr1 and an N-type MOS transistor Tr2. In each of the switching circuits 602A and 603A, the source of the P-type MOS transistor Tr1 is connected to the other end of the input line 621A via wiring. The source of the N-type MOS transistor Tr2 is connected to a reference potential 609A, which is the ground potential, via wiring. The gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 are connected to a controller 608A via wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 602A are connected together and are connected to one end of an inductor 604A via wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 603A are connected together and are connected to one end of an inductor 605A via wiring as an output terminal.

[0016] The controller 608A is a control unit that controls the switching operations of the switching circuits 602A and 603A to switch the switching circuits 602A and 603A on and off. The controller 608A controls the switching operations by controlling the voltages supplied to the gates of the P-type MOS transistors Tr1 and N-type MOS transistors Tr2 of the switching circuits 602A and 603A.

[0017] Inductors 604A and 605A have the same inductance value L. The other end of inductor 604A and the other end of inductor 605A are commonly connected via a wiring and are connected to one end of output line 622A. In FIG. 7A, current 610A indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 604A and one end of output line 622A. Current 611A indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 605A and one end of output line 622A.

[0018] Output line 622A is a wiring that supplies a DC voltage to load 607A such as a semiconductor device. The other end of output line 622A is connected to load 607A. A capacitor 606A is connected via a wiring between output line 622A and reference potential 609A. In FIG. 7A, a current 612A indicated by an arrow represents a current generated in output line 622A before capacitor 606A.

[0019] In DC / DC converter 60A, power supplied from input voltage source 601A to input line 621A is turned on and off by the switching operation of switching circuits 602A and 603A, and sent to downstream inductors 604A and 605A. Furthermore, DC / DC converter 60A smoothes the power sent to inductors 604A and 605A using capacitor 606A, and supplies a desired constant voltage to load 607A. At this time, controller 608A controls the timing of the switching operation of switching circuits 602A and 603A. Here, switching circuit 602A and inductor 604A constitute a structural unit that functions as a single DC / DC converter. Switching circuit 603A and inductor 605A also constitute a structural unit that functions as a single DC / DC converter. Each such structural unit is called a channel. The DC / DC converter 60A has two channels: a first channel consisting of a switching circuit 602A and an inductor 604A, and a second channel consisting of a switching circuit 603A and an inductor 605A. The switching circuits 602A and 603A in each channel operate at the same switching frequency, which is generally several MHz.

[0020] On the other hand, Figure 7B is a circuit diagram showing the circuit of the multiphase DC / DC converter described in Patent Document 1. As shown in Figure 7B, DC / DC converter 60B, which is the multiphase DC / DC converter described in Patent Document 1, has a configuration corresponding to DC / DC converter 60A shown in Figure 7A. In Figure 7B, components corresponding to the components shown in Figure 7A are shown with the letter A changed to B in their reference numerals. DC / DC converter 60B differs from DC / DC converter 60A in that inductor 604B has an inductance value L' that is larger than inductance value L of inductor 605B.

[0021] Next, we will use Figures 7C to 7H to explain the current and voltage waveforms in DC / DC converters 60A and 60B when only one channel is operating, such as when the load semiconductor device is in standby mode. Figures 7C, 7D, and 7E respectively show the waveforms of currents 610A and 611A through inductors 604A and 605A, current 612A before capacitor 606A, and voltage across load 607A in DC / DC converter 60A shown in Figure 7A. Figures 7F, 7G, and 7H respectively show the waveforms of currents 610B and 611B through inductors 604B and 605B, current 612B before capacitor 606B, and voltage across load 607B in DC / DC converter 60B shown in Figure 7B. Cadence Design Systems' circuit simulator PSpice was used to analyze the current and voltage waveforms. The circuit conditions for the waveform analysis were: the voltage of input voltage sources 601A and 601B was 3 V, the inductance values ​​L was 0.1 μH, L′ was 0.2 μH, and the switching frequency was 4 MHz. In the waveform analysis, the first channel was operated as a single channel.

[0022] As can be seen from Figures 7C and 7F, comparing currents 610A and 610B in the first channel, current 610B, which has a larger inductance value, has a smaller amplitude than current 610A. Because only one channel is operating, current 610A becomes current 612A, and current 610B becomes current 612B. In these cases, in DC / DC converter 60A, a ripple voltage including ripple noise is generated in the voltage of load 607A by the product of current 612A and the impedance of capacitor 606A. Similarly, in DC / DC converter 60B, a ripple voltage including ripple noise is generated in the voltage of load 607B by the product of current 612B and the impedance of capacitor 606B. The amplitude of the ripple voltage in DC / DC converter 60B is 16.9 mV as shown in Figure 7H, which is approximately half the ripple voltage amplitude of 33.6 mV shown in Figure 7E.

[0023] Next, we will use Figures 7I to 7N to describe the current and voltage waveforms in DC / DC converters 60A and 60B when multiple channels are operating, such as when the semiconductor device is in full operation. Figures 7I, 7J, and 7K respectively show waveforms of currents 610A and 611A through inductors 604A and 605A, current 612A upstream of capacitor 606A, and voltage across load 607A in DC / DC converter 60A shown in Figure 7A. Figures 7L, 7M, and 7N respectively show waveforms of currents 610B and 611B through inductors 604B and 605B, current 612B upstream of capacitor 606B, and voltage across load 607B in DC / DC converter 60B shown in Figure 7B. The current and voltage waveform analysis was performed under the same conditions as above, except that the first and second channels were operated.

[0024] As can be seen from Figures 7I, 7J, and 7K, in DC / DC converter 60A, which is a typical multiphase DC / DC converter shown in Figure 7A, currents 610A and 611A flow with the same amplitude and a phase difference of 180 degrees. Therefore, currents 610A and 611A cancel each other out, and the amplitude of current 612A, which is a combination of these currents, is kept small, as shown in Figure 7J. As a result, the amplitude of the voltage at load 607A is kept small, as shown in Figure 7K.

[0025] On the other hand, as can be seen from Fig. 7L, in the case of DC / DC converter 60B, which is a multiphase DC / DC converter described in Patent Document 1 shown in Fig. 7B, the amplitudes of currents 610B and 611B are different. As a result, the cancellation effect of currents 610B and 611B is reduced, and the amplitude of current 612B, which is a combination of currents 610B and 611B, is large, as shown in Fig. 7M. As a result, the ripple voltage appearing at load 607B is large, as shown in Fig. 7N.

[0026] As described above, it has been difficult for general multiphase DC / DC converters and the multiphase DC / DC converter described in Patent Document 1 to reduce ripple noise in the output voltage regardless of the magnitude of the load current. In contrast, the DC / DC converters according to first to fourth embodiments of the present invention are capable of reducing ripple noise in the output voltage regardless of the magnitude of the load current. The DC / DC converters according to each embodiment will be described below. Note that the DC / DC converters according to each embodiment are multiphase DC / DC converters.

[0027] [First embodiment] A DC / DC converter 10 according to a first embodiment of the present invention will be described with reference to Figures 1A to 1D. In the description, Figures 7L and 7N, which show current and voltage waveforms in DC / DC converter 60B, which is a multi-phase DC / DC converter described in Patent Document 1 and shown in Figure 7B above, will be used for comparison.

[0028] First, the configuration of a DC / DC converter 10 according to this embodiment will be described with reference to Fig. 1A. Fig. 1A is a circuit diagram showing the circuit of the DC / DC converter 10 according to this embodiment. The DC / DC converter 10 according to this embodiment is a two-phase DC / DC converter.

[0029] 1A, a DC / DC converter 10 according to this embodiment includes switching circuits 102, 103, and 104, inductors 105, 106, and 107, a capacitor 108, and a controller 110. The DC / DC converter 10 also includes an input line 121 and an output line 122.

[0030] Input line 121 is a wiring through which a DC voltage is supplied from input voltage source 101. Input voltage source 101 is connected to one end of input line 121. Input voltage source 101 supplies a DC voltage to input line 121. Input voltage source 101 is not particularly limited, but may be, for example, a power supply that supplies a DC voltage obtained by converting AC power supplied from a commercial power source, or may be a battery. Switching circuits 102, 103, and 104 are connected in parallel to the other end of input line 121 via wiring.

[0031] Each of the switching circuits 102, 103, and 104 is configured with a CMOS inverter having a P-type MOS transistor Tr1 and an N-type MOS transistor Tr2. In each of the switching circuits 102, 103, and 104, the source of the P-type MOS transistor Tr1 is connected to the other end of the input line 121 via a wiring. The source of the N-type MOS transistor Tr2 is connected to a reference potential 111, which is the ground potential, via a wiring. The gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 are connected to a controller 110 via a wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 102 are connected together and are connected to one end of an inductor 105 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 103 are connected together and are connected to one end of an inductor 106 via a wiring as an output terminal. The drain of the P-type MOS transistor Tr1 and the drain of the N-type MOS transistor Tr2 of the switching circuit 104 are commonly connected and are connected as an output terminal to one end of the inductor 107 via a wiring. Note that the switching circuits 102, 103, and 104 are not limited to those configured using CMOS inverters, and other configurations may be used.

[0032] The controller 110 is a control unit that controls the switching operations of the switching circuits 102, 103, and 104 to switch on and off the switching circuits 102, 103, and 104. The controller 110 controls the switching operations by controlling the voltages supplied to the gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuits 102, 103, and 104.

[0033] Inductors 105, 106, and 107 have inductance values ​​L1, L2, and L3, respectively. Here, inductance values ​​L1 and L2 are greater than inductance value L3. Inductance values ​​L1 and L2 may be the same or different. The other ends of inductors 105, 106, and 107 are commonly connected via wiring and connected to one end of output line 122. In FIG. 1A, arrow 112 indicates a current generated in the wiring connecting the other end of inductor 105 and one end of output line 122. Arrow 113 indicates a current generated in the wiring connecting the other end of inductor 106 and one end of output line 122. Arrow 114 indicates a current generated in the wiring connecting the other end of inductor 107 and one end of output line 122.

[0034] The output line 122 is a wiring that supplies a DC voltage to a load 109 such as a semiconductor device. The load 109 is connected to the other end of the output line 122. A capacitor 108 is connected via a wiring between the output line 122 and a reference potential 111. In FIG. 1A, a current 115 indicated by an arrow represents a current generated in the output line 122 before the capacitor 108.

[0035] In DC / DC converter 10, power supplied from input voltage source 101 to input line 121 is turned on and off by the switching operation of switching circuits 102, 103, and 104, and sent to subsequent inductors 105, 106, and 107. Furthermore, DC / DC converter 10 smoothes the power sent to inductors 105, 106, and 107 using capacitor 108, and supplies a desired constant voltage to load 109. At this time, controller 110 controls the timing of the switching operation of switching circuits 102, 103, and 104.

[0036] Switching circuit 102 and inductor 105 constitute a first channel, which is a structural unit that functions as one DC / DC converter. Switching circuit 103 and inductor 106 constitute a second channel, which is a structural unit that functions as one DC / DC converter. Switching circuit 104 and inductor 107 constitute a third channel, which is a structural unit that functions as one DC / DC converter. DC / DC converter 10 has three channels: the first channel, the second channel, and the third channel.

[0037] When the load 109 is in a standby state or other light load state, only the first channel formed by the switching circuit 102 and the inductor 105 operates in the DC / DC converter 10. When the load is light, a first current flows as a load current through the load 109 depending on the state of the load 109. When the load is light, the controller 110 controls the switching circuits 102, 103, and 104 so that only the first channel operates and the second and third channels are stopped.

[0038] On the other hand, when the load 109 is in a heavy load state, which is heavier than when it is light, such as when the load 109 is in a full operating state, all of the first, second, and third channels of the DC / DC converter 10 operate. Under a heavy load, a second current larger than the first current flows through the load 109 as a load current depending on the state of the load 109. Specifically, in this case, the first channel formed by the switching circuit 102 and the inductor 105 and the second channel formed by the switching circuit 103 and the inductor 106 operate in phase. In contrast, the third channel formed by the switching circuit 104 and the inductor 107 operates with a 180-degree phase difference from the first and second channels. Under a heavy load, the controller 110 controls the switching circuits 102, 103, and 104 so that the first and second channels operate in phase and the third channel operates with a 180-degree phase difference from the first and second channels.

[0039] It is preferable that the inductance value L1 of the inductor 105 of the first channel, the inductance value L2 of the inductor 106 of the second channel, and the inductance value L3 of the inductor 107 of the third channel satisfy the following equation (1). L3=(L1×L2) / (L1+L2)...Equation (1)

[0040] When the inductance values ​​L1, L2, and L3 satisfy the formula (1), ripple noise can be reduced more effectively due to the current cancellation effect when a heavy load is applied, as will be described later.

[0041] Next, the currents of various components and the voltage of the load 109 in the DC / DC converter 10 according to this embodiment shown in FIG. 1A will be described with reference to FIGS. 1B, 1C, and 1D. FIGS. 1B, 1C, and 1D show examples of operational waveforms of the DC / DC converter 10 shown in FIG. 1A. FIGS. 1B, 1C, and 1D show waveforms of currents 112, 113, and 114 in the inductors 105, 106, and 107 of each channel, current 115 before the capacitor 108, and voltage of the load 109 in the DC / DC converter 10. The waveforms shown in FIGS. 1B, 1C, and 1D are waveforms under heavy load, such as when the load 109 is in a fully operational state. Here, the current and voltage waveforms were analyzed using PSpice, a circuit simulator from Cadence Design Systems. The circuit conditions for the waveform analysis were as follows: voltage of input voltage source 101 was 3 V, inductance values ​​of inductors 105 and 106 were L1=L2=0.2 μH, inductance value L3 of inductor 107 was 0.1 μH, and switching frequency was 4 MHz.

[0042] In DC / DC converter 10, under heavy load, switching circuits 102 and 103 operate in synchronization, and switching circuit 104 operates with a phase difference of 180 degrees from switching circuits 102 and 103.

[0043] As shown in FIG. 1B, currents 112 and 113 have waveforms with half the amplitude of current 114 and a 180-degree phase difference. In FIG. 1B, currents 112 and 113 overlap. Therefore, the combined current of currents 112 and 113 has the same amplitude as current 114 but a 180-degree phase difference. As a result, due to the cancellation effect of the currents, current 115 has a smaller amplitude than conventional current 612B shown in FIG. 1C due to the cancellation effect of the currents. As a result, this embodiment reduces ripple noise in the voltage of load 109 not only under light load conditions but also under heavy load conditions. While the ripple noise of conventional DC / DC converter 60B shown in FIG. 7N is 28.1 mV, this embodiment reduces the ripple noise to 23.8 mV as shown in FIG. 1D. This embodiment can reduce ripple noise under heavy load conditions without compromising the ripple noise reduction effect under light load conditions compared to the conventional converter.

[0044] In this embodiment, when the load 109 is in a light load state, such as when it is in standby mode, the inductor 105 with a large inductance value keeps the current amplitude small, thereby reducing ripple noise. On the other hand, when the load 109 is in a heavy load state, such as when it is in a full operating state, the first and second channels operate synchronously. As a result, the amplitude of the combined current of the first and second channels becomes close to or equal to the amplitude of the current of the third channel, which operates out of phase with the first and second channels. Therefore, when the load is heavy, ripple noise can be reduced by the current canceling effect. Thus, according to this embodiment, ripple noise in the output voltage can be reduced regardless of the magnitude of the load current. Note that in the waveform analysis described above, the inductances L1 and L2 were set to the same value. However, even if L1 and L2 have different values, ripple noise can be reduced as long as they are both greater than L3. Furthermore, since ripple noise can be reduced under light load conditions when the value of L1 is greater than the value of L2, it is preferable that the value of L1 be greater than the value of L2.

[0045] [Second embodiment] A DC / DC converter 20 according to a second embodiment of the present invention will be described with reference to Fig. 2. Fig. 2 is a circuit diagram showing the circuit of the DC / DC converter 20 according to this embodiment.

[0046] 2, the DC / DC converter 20 according to this embodiment includes switching circuits 202, 203, and 204, inductors 205, 206, 207, 208, and 209, a capacitor 210, and a controller 212. The DC / DC converter 20 also includes an input line 221 and an output line 222.

[0047] Input line 221 is a wiring through which a DC voltage is supplied from input voltage source 201. One end of input line 221 is connected to input voltage source 201. Input voltage source 201 is similar to input voltage source 101. The other end of input line 221 is connected in parallel to switching circuits 202, 203, and 204 via wiring.

[0048] Like the switching circuits 102, 103, and 104, the switching circuits 202, 203, and 204 are each composed of a CMOS inverter. In each of the switching circuits 202, 203, and 204, the source of the P-type MOS transistor Tr1 is connected to the other end of the input line 221 via a wiring. The source of the N-type MOS transistor Tr2 is connected to the reference potential 213, which is the ground potential, via a wiring. The gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 are connected to the controller 212 via a wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 202 are connected in common and are connected to one end of the inductor 205 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 203 are connected in common and are connected to one end of the inductor 207 via a wiring as an output terminal. The drain of the P-type MOS transistor Tr1 and the drain of the N-type MOS transistor Tr2 of the switching circuit 204 are commonly connected and are connected as an output terminal to one end of the inductor 209 via a wiring. Note that the switching circuits 202, 203, and 204 are not limited to those configured using CMOS inverters, and other configurations may be used.

[0049] The controller 212 is a control unit that controls the switching operations of the switching circuits 202, 203, and 204 to switch on and off the switching circuits 202, 203, and 204. The controller 212 controls the switching operations by controlling the voltages supplied to the gates of the P-type MOS transistors Tr1 and N-type MOS transistors Tr2 of the switching circuits 202, 203, and 204.

[0050] Inductors 205, 206, 207, 208, and 209 have the same inductance value L. One end of inductor 206 is connected to the other end of inductor 205. One end of inductor 208 is connected to the other end of inductor 207. The other ends of inductors 206, 208, and 209 are connected together via wiring and are connected to one end of output line 222. In FIG. 2, current 214 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 206 and one end of output line 222. Current 215 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 208 and one end of output line 222. Current 216 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 209 and one end of output line 222.

[0051] The output line 222 is a wiring that supplies a DC voltage to a load 211 such as a semiconductor device. The load 211 is connected to the other end of the output line 222. A capacitor 210 is connected via a wiring between the output line 222 and a reference potential 213. In FIG. 2, a current 217 indicated by an arrow represents a current generated in the output line 222 before the capacitor 210.

[0052] DC / DC converter 20 turns on and off the power supplied from input voltage source 201 to input line 221 through the switching operation of switching circuits 202, 203, and 204, and sends it to subsequent inductors 205, 206, 207, 208, and 209. Furthermore, DC / DC converter 20 smoothes the power sent to inductors 205, 206, 207, 208, and 209 using capacitor 210, and supplies a desired constant voltage to load 211. At this time, controller 212 controls the timing of the switching operation of switching circuits 202, 203, and 204.

[0053] Switching circuit 202 and inductors 205 and 206 constitute a first channel, which is a structural unit that functions as one DC / DC converter. Switching circuit 203 and inductors 207 and 208 constitute a second channel, which is a structural unit that functions as one DC / DC converter. Switching circuit 204 and inductor 209 constitute a third channel, which is a structural unit that functions as one DC / DC converter. DC / DC converter 20 has three channels: the first channel, the second channel, and the third channel.

[0054] In the DC / DC converter 20 according to this embodiment, the inductor 105 in the DC / DC converter 10 according to the first embodiment shown in FIG. 1A is replaced with two inductors 205 and 206, and the inductor 106 is replaced with two inductors 207 and 208. In addition, in this embodiment, the inductors 205, 206, 207, 208, and 209 all have the same inductance value L. For example, if L=0.1 μH, the operating waveforms of the DC / DC converter 20 according to this embodiment will be the same as those shown in FIGS. 1B and 1C. That is, this embodiment can also achieve the same effect of reducing ripple noise as the first embodiment.

[0055] As described above, in this embodiment, the inductors 205 and 206 of the first channel are configured by connecting two inductors identical to the inductor 209 of the third channel in series. Also, the inductors 207 and 208 of the second channel are configured by connecting two inductors identical to the inductor 209 of the third channel in series.

[0056] Furthermore, this embodiment has the advantage that when inductors 205, 206, 207, 208, and 209 are configured with components, they can be configured with the same components. Generally, there are few inductor components with integer multiple values. In this embodiment, by connecting two inductor components with the same inductance value in series to double the value, it becomes easy to accurately match the amplitude of the combined current of the first and second channels with the amplitude of the current of the third channel.

[0057] The inductor of the first channel and the inductor of the second channel are not limited to two inductors identical to the inductor 209 of the third channel, and may be a plurality of inductors connected in series. Even in this case, the effect of reducing ripple noise can be obtained.

[0058] [Third embodiment] Prior to describing a DC / DC converter 40 according to a third embodiment of the present invention, a DC / DC converter 30 according to a comparative embodiment, which is to be compared with the DC / DC converter 40 according to the third embodiment, will be described with reference to Figs. 3A to 3F. Fig. 3A is a circuit diagram showing the circuit of the DC / DC converter 30 according to the comparative embodiment. The DC / DC converter 30 according to the comparative embodiment is a four-channel multiphase DC / DC converter. Figs. 3B to 3F are diagrams showing examples of operating waveforms of the DC / DC converter 30 according to the comparative embodiment.

[0059] 3A, the DC / DC converter 30 according to the comparative example includes switching circuits 302, 303, 304, and 305, inductors 306, 307, 308, and 309, a capacitor 310, and a controller 312. The DC / DC converter 30 also includes an input line 321 and an output line 322.

[0060] Like the switching circuits 102, 103, and 104, the switching circuits 302, 303, 304, and 305 are each composed of a CMOS inverter. In each of the switching circuits 302, 303, 304, and 305, the source of the P-type MOS transistor Tr1 is connected to the other end of the input line 321 via a wiring. The source of the N-type MOS transistor Tr2 is connected to a reference potential 313, which is the ground potential, via a wiring. The gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 are connected to a controller 312 via a wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 302 are connected in common and are connected to one end of an inductor 306 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 303 are connected in common and are connected to one end of an inductor 307 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 304 are connected together and are connected as an output terminal via a wiring to one end of an inductor 308. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 305 are connected together and are connected as an output terminal via a wiring to one end of an inductor 309.

[0061] The controller 312 is a control unit that controls the switching operations of the switching circuits 302, 303, 304, and 305 to switch on and off the switching circuits 302, 303, 304, and 305. The controller 312 controls the switching operations by controlling the voltages supplied to the gates of the P-type MOS transistors Tr1 and N-type MOS transistors Tr2 of the switching circuits 302, 303, 304, and 305.

[0062] Inductor 306 has an inductance value L'. Inductors 307, 308, and 309 each have an inductance value L smaller than inductance value L'. The other end of inductor 306, the other end of inductor 307, the other end of inductor 308, and the other end of inductor 309 are commonly connected via wiring and connected to one end of output line 322. In FIG. 3A, current 314 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 306 to one end of output line 322. Current 315 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 307 to one end of output line 322. Current 316 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 308 to one end of output line 322. Current 317 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 309 to one end of output line 322.

[0063] Output line 322 is a wiring that supplies a DC voltage to load 311 such as a semiconductor device. The other end of output line 322 is connected to load 311. Capacitor 310 is connected via a wiring between output line 322 and reference potential 313. In FIG. 3A, current 318 indicated by an arrow represents a current generated in output line 322 before capacitor 310.

[0064] DC / DC converter 30 turns on and off the power supplied from input voltage source 301 to input line 321 through the switching operations of switching circuits 302, 303, 304, and 305, and sends the power to subsequent inductors 306, 307, 308, and 309. Furthermore, DC / DC converter 30 smoothes the power sent to inductors 306, 307, 308, and 309 using capacitor 310, and supplies a desired constant voltage to load 311. At this time, controller 312 controls the timing of the switching operations of switching circuits 302, 303, 304, and 305.

[0065] Switching circuit 302 and inductor 306 constitute a first channel, which is a building block that functions as one DC / DC converter. Switching circuit 303 and inductor 307 constitute a second channel, which is a building block that functions as one DC / DC converter. Switching circuit 304 and inductor 308 constitute a third channel, which is a building block that functions as one DC / DC converter. Switching circuit 305 and inductor 309 constitute a fourth channel, which is a building block that functions as one DC / DC converter. DC / DC converter 30 has four channels: the first channel, the second channel, the third channel, and the fourth channel.

[0066] When the load 311 is in a light load state, such as when it is in a standby state, only the first channel of the DC / DC converter 30, which is composed of the switching circuit 302 and the inductor 306 having a large inductance value L′, operates. At this time, the other channels are stopped. When the load is light, a first current flows through the load 311 as a load current depending on the state of the load 311. When the load is light, the controller 312 controls the switching circuits 302, 303, 304, and 305 so that only the first channel operates and the second, third, and fourth channels are stopped.

[0067] On the other hand, in the case of a heavy load, such as when the load 311 is in a full operating state, all of the first, second, third, and fourth channels of the DC / DC converter 30 operate. However, at this time, each channel operates with a phase difference of 90 degrees. In the case of a heavy load, a second current larger than the first current flows through the load 311 as a load current depending on the state of the load 311. In the case of a heavy load, the controller 312 controls the switching circuits 302, 303, 304, and 305 so that the first, second, third, and fourth channels operate with a phase difference of 90 degrees.

[0068] Next, the currents at various components and the voltage of load 311 in DC / DC converter 30 according to this comparative example shown in Fig. 3A will be described with reference to Figs. 3B, 3C, 3D, 3E, and 3F. Figs. 3B, 3C, 3D, 3E, and 3F show example operating waveforms of DC / DC converter 30 shown in Fig. 3A. Here, the current and voltage waveforms were analyzed using PSpice, a circuit simulator from Cadence Design Systems. The circuit conditions for the waveform analysis were: voltage of input voltage source 301: 3 V; inductance value L' of inductor 306: 0.2 μH; inductance value L of inductors 307, 308, and 309: 0.1 μH; and switching frequency: 4 MHz.

[0069] Figures 3B and 3C show the waveforms of current 318 and voltage across load 311, respectively, when only the first channel is operating under light load conditions. Figures 3D, 3E, and 3F show the waveforms of currents 314, 315, 316, and 317, current 318, and voltage across load 311, respectively, when all four channels are operating under heavy load conditions.

[0070] As can be seen from Figure 3D, under heavy load, currents 314, 315, 316, and 317 have a phase difference of 90 degrees, but only current 314 through inductor 306, which has a larger inductance value than the other inductors 307, 308, and 309, has a small amplitude. Therefore, as shown in Figure 3E, current 318, which is a composite current obtained by combining currents 314, 315, 316, and 317, has a waveform with little cancellation effect. As a result, as shown in Figure 3F, the ripple noise in the voltage of load 311 was 22.1 mV.

[0071] Next, a DC / DC converter 40 according to a third embodiment of the present invention will be described with reference to Fig. 4A to Fig. 4F. Fig. 4A is a circuit diagram showing the circuit of DC / DC converter 40 according to this embodiment. Fig. 4B to Fig. 4F are diagrams showing examples of operating waveforms of DC / DC converter 40 according to this embodiment.

[0072] 4A, the DC / DC converter 40 according to this embodiment includes switching circuits 402, 403, 404, 405, and 406, inductors 407, 408, 409, 410, and 411, a capacitor 412, and a controller 414. The DC / DC converter 40 also includes an input line 431 and an output line 432.

[0073] Input line 431 is a wiring through which a DC voltage is supplied from input voltage source 401. One end of input line 431 is connected to input voltage source 401. Input voltage source 401 is similar to input voltage source 101. The other end of input line 431 is connected in parallel to switching circuits 402, 403, 404, 405, and 406 via wiring.

[0074] Like the switching circuits 102, 103, and 104, the switching circuits 402, 403, 404, 405, and 406 are each composed of a CMOS inverter. In each of the switching circuits 402, 403, 404, 405, and 406, the source of the P-type MOS transistor Tr1 is connected to the other end of the input line 431 via a wiring. The source of the N-type MOS transistor Tr2 is connected to a reference potential 415, which is the ground potential, via a wiring. The gates of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 are connected to a controller 414 via a wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 402 are connected in common and are connected to one end of an inductor 407 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 403 are connected in common and are connected to one end of an inductor 408 via a wiring as an output terminal. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 404 are connected together and are connected as an output terminal to one end of an inductor 409 via wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 405 are connected together and are connected as an output terminal to one end of an inductor 410 via wiring. The drains of the P-type MOS transistor Tr1 and the N-type MOS transistor Tr2 of the switching circuit 406 are connected together and are connected as an output terminal to one end of an inductor 411 via wiring. Note that the switching circuits 402, 403, 404, 405, and 406 are not limited to those configured using CMOS inverters, and other configurations may be used.

[0075] The controller 414 is a control unit that controls the switching operations of the switching circuits 402, 403, 404, 405, and 406 to switch on and off the switching circuits 402, 403, 404, 405, and 406. The controller 414 controls the switching operations by controlling the voltages supplied to the gates of the P-type MOS transistors Tr1 and N-type MOS transistors Tr2 of the switching circuits 402, 403, 404, 405, and 406.

[0076] Inductor 407 has an inductance value L1. Inductor 408 has an inductance value L2. Inductors 409, 410, and 411 have the same inductance value L3. Inductance value L3 is smaller than inductance values ​​L1 and L2. Inductance values ​​L1 and L2 may be the same or different. The other end of inductor 407, the other end of inductor 408, the other end of inductor 409, the other end of inductor 410, and the other end of inductor 411 are commonly connected via wiring and connected to one end of output line 432. In FIG. 4A, current 416 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 407 and one end of output line 432. Current 417 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 408 and one end of output line 432. Current 418 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 409 and one end of output line 432. Current 419 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 410 and one end of output line 432. Current 420 indicated by an arrow represents a current generated in the wiring connecting the other end of inductor 411 and one end of output line 432.

[0077] Output line 432 is a wiring that supplies a DC voltage to load 413 such as a semiconductor device. The other end of output line 432 is connected to load 413. A capacitor 412 is connected via a wiring between output line 432 and reference potential 415. In FIG. 4A , current 421 indicated by an arrow represents a current generated in output line 432 before capacitor 412.

[0078] DC / DC converter 40 turns on and off the power supplied from input voltage source 401 to input line 431 by the switching operation of switching circuits 402, 403, 404, 405, and 406, and sends it to subsequent inductors 407, 408, 409, 410, and 411. Furthermore, DC / DC converter 40 smoothes the power sent to inductors 407, 408, 409, 410, and 411 by capacitor 412, and supplies a desired constant voltage to load 413. At this time, controller 414 controls the timing of the switching operation of switching circuits 402, 403, 404, 405, and 406.

[0079] The switching circuit 402 and the inductor 407 constitute a first channel, which is a unit that functions as one DC / DC converter. The switching circuit 403 and the inductor 408 constitute a second channel, which is a unit that functions as one DC / DC converter. The switching circuit 404 and the inductor 409 constitute a third channel, which is a unit that functions as one DC / DC converter. The switching circuit 405 and the inductor 410 constitute a fourth channel, which is a unit that functions as one DC / DC converter. The switching circuit 406 and the inductor 411 constitute a fifth channel, which is a unit that functions as one DC / DC converter. The DC / DC converter 40 has five channels: the first channel, the second channel, the third channel, the fourth channel, and the fifth channel.

[0080] When the load 413 is in a standby state or other light load state, only the first channel of the DC / DC converter 40, which is configured with the switching circuit 402 and the inductor 407 having a large inductance value L1, operates. At this time, the other channels are stopped. When the load is light, a first current flows through the load 413 as a load current depending on the state of the load 413. When the load is light, the controller 414 controls the switching circuits 402, 403, 404, 405, and 406 so that only the first channel operates and the second, third, fourth, and fifth channels are stopped.

[0081] On the other hand, under heavy load conditions, such as when the load 413 is fully operational, all of the first, second, third, fourth, and fifth channels of the DC / DC converter 40 operate. However, at this time, the first channel and the second channel, which is composed of the switching circuit 403 and the inductor 408 having a large inductance value L2, operate in phase with each other. Meanwhile, the remaining channels, the third to fifth, operate with phases shifted by 90 degrees from the phases in which the first and second channels operate. Under heavy load conditions, a second current larger than the first current flows through the load 413 as a load current, depending on the state of the load 413. Under heavy load conditions, the controller 414 controls the switching circuits 402 and 403 so that the first and second channels operate in phase with each other. Furthermore, in this case, the controller 414 controls the switching circuits 404, 405, 406 so that the third, fourth, and fifth channels operate 90 degrees out of phase with the phase in which the first and second channels operate.

[0082] It is preferable that the inductance value L1 of the inductor 407 of the first channel, the inductance value L2 of the inductor 408 of the second channel, and the inductance value L3 of the inductors 409, 410, and 411 of the third to fifth channels satisfy the following formula (2). L3=(L1×L2) / (L1+L2)...Equation (2)

[0083] By making the inductance values ​​L1, L2, and L3 satisfy the formula (2), ripple noise can be reduced more effectively under heavy loads due to the current cancellation effect, as will be described later.

[0084] Next, the currents of various components and the voltage of the load 413 in the DC / DC converter 40 according to this embodiment shown in FIG. 4A will be described with reference to FIGS. 4B, 4C, 4D, 4E, and 4F. FIGS. 4B, 4C, 4D, 4E, and 4F show examples of operating waveforms of the DC / DC converter 40 shown in FIG. 4A. Here, the current and voltage waveforms were analyzed using PSpice, a circuit simulator from Cadence Design Systems. The circuit conditions for the waveform analysis were: the voltage of the input voltage source 401 was 3 V; the inductance values ​​L1 and L2 of the inductors 407 and 408 were both 0.2 μH; the inductance value L3 of the inductors 409, 410, and 411 was 0.1 μH; and the switching frequency was 4 MHz.

[0085] Figures 4B and 4C show the waveforms of current 421 and voltage across load 413, respectively, when only the first channel is operating under light load conditions. Figures 4D, 4E, and 4F show the waveforms of currents 416, 417, 418, 419, and 420, current 421, and voltage across load 413, respectively, when all five channels are operating under heavy load conditions.

[0086] When all five channels are operating under heavy load conditions, such as when load 413 is in a fully operational state, currents 416 and 417 have waveforms with half the amplitude of currents 418, 419, and 420, as shown in FIG. 4D. In FIG. 4D, currents 416 and 417 overlap. Therefore, the combined current of currents 416 and 417 has the same amplitude as currents 418, 419, and 420, and the currents cancel each other out, reducing ripple noise. Compared to the ripple noise of 22.1 mV in the DC / DC converter 30 of the comparative example shown in FIG. 3F, the ripple noise of the DC / DC converter 40 of this embodiment is reduced to 13 mV, as shown in FIG. 4F.

[0087] When only the first channel operates under a light load, the amplitude of the ripple noise in the DC / DC converter 40 of this embodiment is 17.1 mV as shown in Fig. 4C. This result is the same as the result shown in Fig. 3C for the DC / DC converter 30 of the comparative example.

[0088] As described above, according to this embodiment, it is possible to reduce ripple noise in the output voltage regardless of the magnitude of the load current.

[0089] In this embodiment, the DC / DC converter 40 has been described as having fourth and fifth channels including inductors 410 and 411 whose inductance value is the same as that of the inductor 409 of the third channel. However, this is not limiting. The DC / DC converter 40 may have N channels (N is an integer greater than or equal to 1), each including an inductor whose inductance value is the same as that of the inductor 409 of the third channel. The configuration of each of the N channels is the same as that of the fourth channel. In this case, the controller 414 controls the switching circuits of the first, second, and third channels and the N channels. As a result, under heavy load, the controller 414 controls the switching circuits of each channel so that the third channel and the N channels operate with a phase shift of 360 / (N+2) degrees from the phase in which the first and second channels operate.

[0090] Also, in this embodiment, as in the second embodiment, the inductor of the first channel and the inductor of the second channel may each be a plurality of inductors identical to the inductor of the third channel connected in series.

[0091] [Fourth embodiment] A DC / DC converter according to a fourth embodiment of the present invention will be described with reference to Figures 5A to 5E, which are diagrams showing operating waveforms of the DC / DC converter according to this embodiment.

[0092] The configuration of the DC / DC converter according to this embodiment is the same as the configuration of the DC / DC converter 40 according to the third embodiment shown in Fig. 4A. In this embodiment, a case where circuit conditions are different from those in the fourth embodiment will be described.

[0093] 5A, 5B, 5C, 5D, and 5E are diagrams showing operational waveforms of DC / DC converter 40 shown in FIG. 4A under the following circuit conditions. Here, the circuit simulator PSpice by Cadence Design Systems was used to analyze the current and voltage waveforms. The circuit conditions for the waveform analysis were: voltage of input voltage source 401 was 3 V; inductance value L1 of inductor 407 was 0.47 μH; inductance value L2 of inductor 408 was 0.13 μH; and inductance value L3 of inductors 409, 410, and 411 was 0.1 μH. The switching frequency was 4 MHz.

[0094] Thus, in this embodiment, the inductor 407 of the first channel has a larger inductance value than the inductor 408 of the second channel.

[0095] 5A and 5B respectively show waveforms of current 421 and voltage of load 413 when only the first channel is operating under light load. In contrast to the third embodiment shown in FIGS. 4B and 4C, in this embodiment, the inductance value L1 of the inductor of the first channel is increased from 0.2 μH to 0.47 μH, which has the effect of reducing the ripple noise amplitude from 17.1 mV to 7.4 mV as shown in FIG. 5B.

[0096] On the other hand, Figures 5C, 5D, and 5E respectively show currents 416, 417, 418, 419, and 420, current 421, and the voltage of load 413 when all five channels are operating under heavy load. As shown in Figure 5C, currents 416 and 417 have the same phase but different amplitudes, but when their amplitudes are added together, they have the same amplitude as currents 418, 419, and 420. Therefore, the combined current of currents 416 and 417 and the other currents 418, 419, and 420 have the same amplitude but a 90-degree phase difference. As a result, due to the cancellation effect of the currents, current 421, which is the combined current of all currents 416, 417, 418, 419, and 420, is reduced as shown in Figure 5D. As a result, compared to the ripple noise amplitude of 13 mV shown in Figure 4F of the third embodiment, in this embodiment, the ripple noise amplitude is approximately the same at 12.4 mV as shown in Figure 5E.

[0097] In this way, in this embodiment, ripple noise under light load conditions can be further reduced compared to the third embodiment.

[0098] In this embodiment, as in the second embodiment, the inductor of the first channel and the inductor of the second channel may each be a plurality of inductors identical to the inductor of the third channel connected in series.

[0099] [Fifth embodiment] An electronic device according to a fifth embodiment of the present invention will be described with reference to Figs. 6A to 6C. Fig. 6A is a cross-sectional view showing a digital camera 500, which is an image capture device as an example of an electronic device according to this embodiment. Figs. 6B and 6C are a perspective view and a cross-sectional view, respectively, showing a processing module 504 included in digital camera 500. In this embodiment, a digital camera 500 will be described, which is an electronic device that includes any of the DC / DC converters 10, 20, and 40 according to the first to fourth embodiments.

[0100] 6A, digital camera 500, which is an imaging device as an example of an electronic device according to this embodiment, is, for example, a digital camera with an interchangeable lens, and has a camera body 501. A lens barrel (lens unit) 502 including a lens is detachably attached to camera body 501. Note that digital camera 500 is not limited to a digital camera with an interchangeable lens, and may be, for example, a digital camera with an integrated lens.

[0101] Camera body 501 has a housing 503, a processing module 504 which is a printed circuit board, and a sensor module 505 which is also a printed circuit board. Processing module 504 and sensor module 505 are disposed inside housing 503. Processing module 504 and sensor module 505 are electrically connected to each other via cable 506. Processing module 504 and sensor module 505 are examples of semiconductor modules which are electronic modules.

[0102] The sensor module 505 has an image sensor 5051, which is an imaging element, and a printed wiring board 5052. The image sensor 5051 is mounted on the printed wiring board 5052. The image sensor 5051 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor. The image sensor 5051 has a function of converting light incident via the lens unit 502 into an electrical signal.

[0103] As shown in FIGS. 6B and 6C , the processing module 504 includes a semiconductor device 5041, which may be an ASIC (Application Specific Integrated Circuit), a power supply circuit 5042, and a printed wiring board 5043. The semiconductor device 5041 and the power supply circuit 5042 are mounted on the printed wiring board 5043. The printed wiring board 5043 may be a rigid board, on which the semiconductor device 5041 and the power supply circuit 5042 are mounted. The semiconductor device 5041 may be a digital signal processor, which acquires an electrical signal from an image sensor 5051, corrects the acquired electrical signal, and generates image data. The power supply circuit 5042 is configured with any of the DC / DC converters 10, 20, and 40 according to the first to fourth embodiments. The power supply circuit 5042 converts a DC voltage supplied from a battery (not shown) to a predetermined voltage value and supplies the converted voltage to the semiconductor device 5041.

[0104] In this embodiment, the electronic device is described as a digital camera 500, but is not limited to this. The electronic device including any of the DC / DC converters 10, 20, and 40 may be any electronic device other than a digital camera.

[0105] The disclosure of this embodiment includes the following configuration. (Configuration 1) an input line to which a DC voltage is supplied; a plurality of channels each including a switching circuit and an inductor, one end of the inductor connected to the input line via the switching circuit; an output line having one end connected to the other end of the inductors of the plurality of channels and having a load connected to the other end; a controller for controlling the switching circuits of the plurality of channels; the plurality of channels includes at least a first channel, a second channel, and a third channel; the inductors of the first and second channels have greater inductance values ​​than the inductor of the third channel; When the current flowing through the load is a first current, the controller controls the switching circuits of the first to third channels so that only the first channel operates and the second and third channels stop; and when the current flowing through the load is a second current greater than the first current, the controller controls the switching circuits of the first to third channels so that the first and second channels operate in phase and the third channel operates out of phase with the first and second channels. (Configuration 2) 2. The DC / DC converter according to configuration 1, wherein, when the current flowing through the load is the second current greater than the first current, the controller controls the switching circuits of the first to third channels so that the third channel operates with a phase difference of 180 degrees with respect to the first and second channels. (Configuration 3) 3. The DC / DC converter according to configuration 1 or 2, wherein an inductance value L1 of the inductor of the first channel, an inductance value L2 of the inductor of the second channel, and an inductance value L3 of the inductor of the third channel satisfy the following equation (1): L3 = (L1 × L2) / (L1 + L2) (1) (Configuration 4) the plurality of channels further includes N channels (N is an integer equal to or greater than 1); 2. The DC / DC converter according to configuration 1, wherein the inductors of the N channels each have the same inductance value as the inductor of the third channel. (Configuration 5) 5. The DC / DC converter according to configuration 4, wherein, when the current flowing through the load is the second current greater than the first current, the controller controls the switching circuits of the first to third channels and the switching circuits of the N channels so that the first and second channels operate in phase and the third channel and the N channels operate out of phase with each other by 360 / (N+2) degrees from the phase in which the first and second channels operate. (Configuration 6) 6. The DC / DC converter according to configuration 4 or 5, wherein an inductance value L1 of the inductor of the first channel, an inductance value L2 of the inductor of the second channel, and an inductance value L3 of the inductor of the third channel satisfy the following equation (2): L3 = (L1 × L2) / (L1 + L2) (2) (Configuration 7) 7. The DC / DC converter according to any one of configurations 1, 2, and 4 to 6, wherein the inductor of the first channel has a larger inductance value than the inductor of the second channel. (Configuration 8) The DC / DC converter according to any one of configurations 1 to 7, wherein the inductors of the first and second channels are each a plurality of inductors identical to the inductor of the third inductor connected in series. (Configuration 9) The components and The DC / DC converter according to any one of configurations 1 to 8 mounted on the member; 1. An electronic module comprising: (Configuration 10) The housing and the electronic module according to configuration 9 disposed inside the housing; An electronic device comprising: [Explanation of symbols]

[0106] 10, 20, 30, 40... DC / DC converter 101, 201, 301, 401, 601A, 601B... Input voltage source 102, 103, 104, 202, 203, 204, 302, 303, 304, 305, 402, 403, 404, 405, 406, 602A, 603A, 602B, 603B... Switching circuit 105, 106, 107, 205, 206, 207, 208, 209, 306, 307, 308, 309, 407, 408, 409, 410, 411, 604A, 605A, 604B, 605B... Inductors 108, 210, 310, 412, 606A, 606B... Capacitors 109, 211, 311, 413, 607A, 607B...Load 110, 212, 312, 414, 608A, 608B Controller 121, 221, 321, 431, 621A, 621B... Input lines 122, 222, 322, 432, 622A, 622B...output line

Claims

1. An input line to which a DC voltage is supplied; a plurality of channels each including a switching circuit and an inductor, one end of the inductor being connected to the input line via the switching circuit; an output line having one end connected to the other end of the inductors of the plurality of channels and a load connected to the other end; a controller for controlling the switching circuits of the plurality of channels; the plurality of channels includes at least a first channel, a second channel, and a third channel; the inductor of the first channel and the inductor of the second channel have a greater inductance value than the inductor of the third channel; When a current flowing through the load is a first current, the controller controls the switching circuits of the first channel, the second channel and the third channel so that only the first channel operates and the second channel and the third channel are stopped; and when the current flowing through the load is a second current greater than the first current, the controller controls the switching circuits of the first channel, the second channel and the third channel so that the first channel and the second channel operate in phase and the third channel operates out of phase with the first channel and the second channel.

2. A DC / DC converter as described in claim 1, characterized in that an inductance value L1 of the inductor of the first channel, an inductance value L2 of the inductor of the second channel, and an inductance value L3 of the inductor of the third channel satisfy the following equation (1). L3=(L1×L2) / (L1+L2)...(1)

3. A DC / DC converter as described in claim 1 or 2, characterized in that the inductor of the first channel has an inductance value larger than or equal to the inductor of the second channel.

4. 3. The DC / DC converter according to claim 1, wherein, when the current flowing through the load is the second current greater than the first current, the controller controls the switching circuits of the first channel, the second channel, and the third channel so that the third channel operates with a phase difference of 180 degrees relative to the first channel and the second channel.

5. the plurality of channels further includes N channels (N is an integer equal to or greater than 1); 3. The DC / DC converter according to claim 1, wherein the inductors of the N channels each have the same inductance value as the inductor of the third channel.

6. 6. The DC / DC converter of claim 5, wherein when the current flowing through the load is the second current greater than the first current, the controller controls the switching circuits of the first channel, the second channel, and the third channel and the switching circuits of the N channels so that the first channel and the second channel operate in phase and the third channel and the N channels operate out of phase with each other by 360 / (N+2) degrees from the phase in which the first channel and the second channel operate.

7. 6. The DC / DC converter according to claim 5, wherein an inductance value L1 of the inductor of the first channel, an inductance value L2 of the inductor of the second channel, and an inductance value L3 of the inductor of the third channel satisfy the following equation (2): L3=(L1×L2) / (L1+L2)...(2)

8. A DC / DC converter as described in claim 6, characterized in that an inductance value L1 of the inductor of the first channel, an inductance value L2 of the inductor of the second channel, and an inductance value L3 of the inductor of the third channel satisfy the following equation (2). L3=(L1×L2) / (L1+L2)...(2)

9. 6. The DC / DC converter of claim 5, wherein the inductor of the first channel has a larger inductance value than the inductor of the second channel.

10. 3. The DC / DC converter according to claim 1, wherein the inductors of the first channel and the second channel are each formed by connecting multiple inductors identical to the inductor of the third channel in series.

11. The DC / DC converter as described in claim 1 or 2, characterized in that the switching circuit is composed of a CMOS inverter.

12. The material, The DC / DC converter according to claim 1 or 2, which is mounted on the member; 1. An electronic module comprising:

13. A printed wiring board; A semiconductor device mounted on the printed wiring board; a power supply circuit mounted on the printed wiring board and supplying a DC voltage to the semiconductor device; having 3. An electronic module, wherein the power supply circuit is constituted by the DC / DC converter according to claim 1.

14. The semiconductor device is a digital signal processor.

14. An electronic module according to claim 13.

15. A housing and The electronic module of claim 12 disposed within the housing; 1. An electronic device comprising:

16. A housing, The electronic module of claim 13 disposed within the housing; 1. An electronic device comprising:

17. The electronic device according to claim 16, characterized in that it has a sensor module including an image sensor.

18. The electronic device described in Claim 17, characterized in that the semiconductor device acquires an electrical signal from the image sensor and performs processing to correct the acquired electrical signal to generate image data.