Battery monitoring device

Abstract

To improve voltage detection accuracy while suppressing increase in the entire detection time required for detecting voltages of a plurality of battery cells.SOLUTION: A battery monitor IC3 detects voltages of a plurality of battery cells Cb through a detection path connected to both terminals of the plurality of battery cells Cb. A filter 4 is interposed in series in the detection path. A control section 5 included in the battery monitor IC3 controls, when detecting a voltage of a target battery cell which is the battery cell Cb as a detection target, the operation of an MUX 6 so as to connect a detection path corresponding to the target battery cell to an ADC 7, and when a potential difference between a voltage of the current target battery cell and a voltage of the target battery cell connected to the ADC 7 with the previous detection path or a voltage of predetermined spots in the MUX 6 and the ADC 7 in an initial state is equal to or greater than a predetermined threshold, sets a non-detection period in which the operation of the MUX 6 is controlled so as to connect a non-detection path with smaller time constant than the detection path to the ADC 7 prior to detection of the voltage of the current target battery cell.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a battery monitoring device that monitors a battery pack in which a plurality of battery cells are connected in series. [Background technology]

[0002] Patent Documents 1 and 2 disclose a battery monitoring device having a multiplexer and one A / D converter, which detects the voltages of multiple battery cells by A / D conversion in a time-division manner using the A / D converter. In this specification, the A / D converter is sometimes abbreviated as ADC. The battery monitoring device having the above configuration is provided with a filter that is interposed in series in a detection path connected to both terminals of each of the multiple battery cells. In this case, the filter is configured as a low-pass filter made of a resistor and a capacitor having a relatively high resistance value in order to realize a function of removing noise superimposed on the battery cell. Hereinafter, the battery monitoring devices disclosed in Patent Documents 1 and 2 may be referred to as the first prior art and the second prior art, respectively. [Prior art documents] [Non-patent literature]

[0003] [Patent Document 1] Patent No. 5582116 [Patent Document 2] US Patent Application Publication No. 2011 / 0050278 Summary of the Invention [Problem to be solved by the invention]

[0004] In the first and second conventional techniques, when the common voltage of the battery cell to be detected fluctuates significantly, such as during the initial voltage detection or when the detection target switches from the top battery cell to the bottom battery cell, a current that causes an error may flow in the filter due to the discharge of charge caused by the initialization of the multiplexer, resulting in a risk of voltage detection errors. Therefore, if it is possible to arbitrarily select the battery cell to be detected from among multiple battery cells, an initial wait must be inserted, and the logic becomes more complex.

[0005] As a countermeasure to such a problem, the second prior art proposes a pyramid sampling method in which the detection target is switched from the lowest battery cell to the highest battery cell, and then switched from the highest battery cell to the lowest battery cell. However, even with a configuration that employs such a method, if the initial detection target is not the lowest battery cell but a higher battery cell, the problem of a voltage detection error occurring during the initial voltage detection cannot be solved.

[0006] The present invention has been made in consideration of the above-mentioned circumstances, and its object is to provide a battery monitoring device that can improve the accuracy of voltage detection while suppressing an increase in the overall detection time required to detect the voltages of multiple battery cells. [Means for solving the problem]

[0007] The battery monitoring device according to claim 1 is a battery monitoring device that monitors an assembled battery (2) in which a plurality of battery cells (Cb) are connected in series, and includes a voltage detection device (3) that detects the voltages of the plurality of battery cells via a detection path connected to both terminals of each of the plurality of battery cells, and filters (4, 22) that are provided corresponding to each of the plurality of battery cells and are interposed in series in the detection path. The voltage detection device includes an A / D converter (7) that performs A / D conversion of a detection target voltage corresponding to the voltages of the plurality of battery cells, a path switching unit (6) that switches the path connected to the A / D converter, and a detection control unit (5) that controls the operation of the path switching unit and the A / D converter, and detects the voltages of each of the plurality of battery cells in a time-division manner based on a digital signal output from the A / D converter.

[0008] When detecting a voltage of a target battery cell that is a detection target among the multiple battery cells, the detection control unit controls the operation of the path switching unit so that the detection path corresponding to the target battery cell is connected to the A / D converter. Also, when a potential difference between the current voltage of the target battery cell and the voltage of the target battery cell connected to the A / D converter by the previous detection path or a voltage at a predetermined location in the path switching unit and the A / D converter in an initial state becomes equal to or greater than a predetermined threshold, the detection control unit provides a non-detection period during which the operation of the path switching unit is controlled so that a non-detection path having a smaller time constant than the detection path is connected to the A / D converter before detecting the current voltage of the target battery cell.

[0009] According to this configuration, a non-detection period is provided when the common voltage of the battery cell to be detected fluctuates significantly, such as when the detection target is switched from the top battery cell to the bottom battery cell, during the initial voltage detection. Therefore, according to the above configuration, at such times, the charge that causes an error in the voltage detection is discharged through the non-detection path, and the occurrence of a voltage detection error is suppressed. In addition, in this case, since the non-detection path has a smaller time constant than the detection path, the time required for discharging the charge, and therefore the non-detection period, can be kept relatively short. Therefore, according to the above configuration, the excellent effect of improving the voltage detection accuracy while suppressing an increase in the overall detection time required to detect the voltages of multiple battery cells can be obtained. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram showing a schematic configuration of a battery monitoring device according to a first embodiment; [Diagram 2] FIG. 1 is a diagram for explaining a specific example of a series of operations performed by a battery monitoring IC during voltage detection according to the first embodiment; [Diagram 3] FIG. 13 is a diagram for explaining a specific example of a series of operations performed by a battery monitoring IC during voltage detection according to a comparative example. [Figure 4] FIG. 1 is a diagram showing a specific circuit configuration that is interposed in a path from a specific battery cell to an ADC when detecting the voltage of the specific battery cell according to a comparative example; [Diagram 5] FIG. 1 is a diagram showing an example of charge / discharge characteristics in a path that passes through a filter and a path that does not pass through a filter according to the first embodiment and a comparative example; [Figure 6] FIG. 1 is a diagram showing a specific circuit configuration on a path from a specific battery cell to an ADC when detecting the voltage of the specific battery cell according to the first embodiment; [Figure 7] FIG. 11 is a diagram showing a schematic configuration of a battery monitoring device according to a second embodiment; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, a number of embodiments will be described with reference to the drawings. Note that the same reference numerals are used to designate substantially the same components in the respective embodiments, and the description thereof will be omitted. (First embodiment) The first embodiment will be described below with reference to FIGS.

[0012] <Overall composition> As shown in Fig. 1, a battery monitoring device 1 of this embodiment is mounted on a vehicle such as an automobile, and is a device that detects various states such as the voltage of a battery pack 2 to monitor the state of the battery pack 2. The battery monitoring device 1 includes a battery monitoring IC 3, which is an integrated circuit in which circuits that perform various operations for battery monitoring are integrated, and a plurality of external elements provided outside the battery monitoring IC 3. Note that IC is an abbreviation for Integrated Circuit.

[0013] The battery pack 2 is mounted on a vehicle such as an automobile, and is configured with a plurality of battery cells Cb, for example 24 battery cells Cb, connected in series in multiple stages between a pair of DC power supply lines L1, L2. In this case, the battery cells Cb are, for example, secondary batteries such as lithium ion batteries, fuel cells, etc. In FIG. 1, five of the 24 battery cells Cb are shown, and numbers are added to the end of the reference symbols to distinguish between the five battery cells Cb.

[0014] These numbers correspond to the arrangement of the battery cells Cb in the battery pack 2, with 1 being assigned to the battery cell Cb arranged on the lowest potential side, and the numbers increasing as one moves toward the higher potential side, such as 2, 3, 4, ..., until the battery cell Cb arranged on the highest potential side is assigned the number 24. Thus, Fig. 1 shows battery cell Cb1 arranged on the lowest potential side, battery cell Cb2 arranged on the second lowest potential side, battery cell Cb11 arranged on the 11th lowest potential side, battery cell Cb12 arranged on the 12th lowest potential side, and battery cell Cb24 arranged on the highest potential side.

[0015] The components provided in the battery monitoring device 1 corresponding to each of the battery cells Cb1, Cb2, Cb11, and Cb12 among the above-mentioned battery cells Cb may be distinguished by adding the same numbers to the end of the reference numerals. However, when it is not necessary to distinguish between these components, the reference numerals at the end will be omitted and they will be referred to collectively. In the above-mentioned configuration, a common mode voltage is superimposed on the battery cell Cb.

[0016] The common mode voltage is higher for battery cells Cb connected to the upper side of the battery pack 2, i.e., the higher potential side, and the maximum common mode voltage is a relatively high voltage of, for example, several hundred volts. In this embodiment, for example, the common mode voltage of battery cell Cb1 is 5V, the common mode voltage of battery cell Cb12 is 60V, the common mode voltage of battery cell Cb13 is 65V, and the common mode voltage of battery cell Cb24 is 120V.

[0017] In the above configuration, of the 24 battery cells Cb, the battery cells Cb1 to Cb12 arranged on the low potential side are collectively referred to as the lower cells, and the battery cells Cb13 to Cb24 arranged on the high potential side are collectively referred to as the upper cells. In this embodiment, of the components of the battery monitoring device 1, only the components corresponding to the lower cells are described, and a description of the components corresponding to the upper cells is omitted, but the components corresponding to the upper cells are similar to the components corresponding to the lower cells.

[0018] <External element configuration> First, the configuration of the external elements provided outside the battery monitoring IC3 will be described. The low potential side terminal of the battery cell Cb13 and the high potential side terminal of the battery cell Cb12 (not shown) are connected to the connection terminal PS13 via a resistor RB. A resistor RS and a capacitor CS are connected in series between the high potential side terminal and the low potential side terminal of the battery cell Cb12. A node Na, which is an interconnection node between the resistor RS and the capacitor CS, is connected to the connection terminal PV12. The low potential side terminal of the battery cell Cb12 and the high potential side terminal of the battery cell Cb11 are connected to the connection terminal PS12 via a resistor RB.

[0019] Although some of the illustrations are omitted, a resistor RS and a capacitor CS are connected in series between the high potential side terminal and the low potential side terminal of the battery cell Cb11. A node Na which is an interconnection node between the resistor RS and the capacitor CS is connected to a connection terminal PV11. Although not shown in the illustrations, the low potential side terminal of the battery cell Cb11 and the high potential side terminal of the battery cell Cb10 (not shown) are connected to a connection terminal PS11 via a resistor RB.

[0020] The low potential side terminal of the battery cell Cb3 and the high potential side terminal of the battery cell Cb2 (not shown) are connected to the connection terminal PS3 via a resistor RB. A resistor RS and a capacitor CS are connected in series between the high potential side terminal and the low potential side terminal of the battery cell Cb2. A node Na, which is an interconnection node between the resistor RS and the capacitor CS, is connected to the connection terminal PV2.

[0021] The low potential side terminal of the battery cell Cb2 and the high potential side terminal of the battery cell Cb1 are connected to the connection terminal PS2 via the resistor RB. The resistor RS and the capacitor CS are connected in series between the high potential side terminal and the low potential side terminal of the battery cell Cb1. The node Na, which is the interconnection node of the resistor RS and the capacitor CS, is connected to the connection terminal PV1. The low potential side terminal of the battery cell Cb1 is connected to the connection terminal PS1 via the resistor RB.

[0022] In the above configuration, the filter 4, which is a low-pass filter, is configured by the resistor RS and the capacitor CS corresponding to each battery cell Cb. That is, in the above configuration, the filter 4 is provided so as to correspond to each battery cell Cb. In this specification, the low-pass filter may be abbreviated as LPF. The resistor RB is a discharge resistor for discharging the battery cells Cb during equalization. Since the resistor RB functions as a current limiting resistor during equalization, its resistance value is very small compared to the resistance value of the resistor RS constituting the filter 4, specifically, for example, about several tens of Ω.

[0023] <Internal configuration of battery monitoring IC> Next, the internal configuration of the battery monitoring IC3 will be described. The battery monitoring IC3 functions as a voltage detection device that detects the voltages of the multiple battery cells Cb via detection paths connected to both terminals of each of the multiple battery cells Cb. In the above configuration, the detection path corresponding to the battery cell Cb12 is the path of "high potential side terminal of the battery cell Cb12 → resistor RS → connection terminal PV12 → internal circuits of the battery monitoring IC3 → connection terminal PS12 → resistor RB → low potential side terminal of the battery cell Cb12."

[0024] In the above configuration, the detection path corresponding to the battery cell Cb11 is "high potential side terminal of the battery cell Cb11 → resistor RS → connection terminal PV11 → internal circuits of the battery monitoring IC3 → connection terminal PS11 → resistor RB → low potential side terminal of the battery cell Cb11." In the above configuration, the detection path corresponding to the battery cell Cb2 is "high potential side terminal of the battery cell Cb2 → resistor RS → connection terminal PV2 → internal circuits of the battery monitoring IC3 → connection terminal PS2 → resistor RB → low potential side terminal of the battery cell Cb2."

[0025] In the above configuration, the detection path corresponding to the battery cell Cb1 is the following path: "High potential side terminal of the battery cell Cb1 → resistor RS → connection terminal PV1 → internal circuits of the battery monitoring IC3 → connection terminal PS1 → resistor RB → low potential side terminal of the battery cell Cb1." In this way, the battery monitoring IC3 detects the voltages of the multiple battery cells Cb via the detection path that passes through the filter 4. In other words, in the above configuration, the filter 4 is provided so as to be interposed in series in the detection path.

[0026] The battery monitoring IC3 includes a control unit 5. The control unit 5 includes a communication I / F for communicating with the outside and a register for storing various data, and controls the overall operation of the battery monitoring IC3. The I / F is an abbreviation for interface. The battery monitoring IC3 also includes an equalization switch SB provided for each of the multiple battery cells Cb to discharge the corresponding battery cell Cb. The equalization switch SB is, for example, made of a MOS transistor, and forms a discharge circuit together with a resistor RB. The equalization switch SB is turned on and off by the control unit 5. In the equalization process, the operation of each discharge circuit is controlled so that the voltage of each battery cell Cb becomes approximately the same as the voltage of the lowest battery cell Cb. The specific connection form of the equalization switch SB is as follows.

[0027] That is, the equalization switch SB12 corresponding to the battery cell Cb12 is connected between the connection terminal PS13 and the connection terminal PS12. Although some illustrations are omitted, the equalization switch SB11 corresponding to the battery cell Cb11 is connected between the connection terminal PS12 and the connection terminal PS11. The equalization switch SB2 corresponding to the battery cell Cb2 is connected between the connection terminal PS3 and the connection terminal PS2. The equalization switch SB1 corresponding to the battery cell Cb1 is connected between the connection terminal PS2 and the connection terminal PS1.

[0028] In the above configuration, the equalization path, which is the path through which current flows when the battery cell Cb is discharged by the equalization switch SB connected in this manner, is specifically as follows: That is, the equalization path corresponding to the battery cell Cb12 is the path of "high potential side terminal of the battery cell Cb12 → resistor RB → connection terminal PS13 → equalization switch SB12 → connection terminal PS12 → resistor RB → low potential side terminal of the battery cell Cb12." The equalization path corresponding to the battery cell Cb11 is the path of "high potential side terminal of the battery cell Cb11 → resistor RB → connection terminal PS12 → equalization switch SB11 → connection terminal PS11 → resistor RB → low potential side terminal of the battery cell Cb12."

[0029] The equalization path corresponding to the battery cell Cb2 is the high potential side terminal of the battery cell Cb2 → resistor RB → connection terminal PS3 → equalization switch SB2 → connection terminal PS2 → resistor RB → low potential side terminal of the battery cell Cb2. The equalization path corresponding to the battery cell Cb1 is the high potential side terminal of the battery cell Cb1 → resistor RB → connection terminal PS2 → equalization switch SB1 → connection terminal PS1 → resistor RB → low potential side terminal of the battery cell Cb1. The equalization paths are paths for discharging each of the multiple battery cells Cb, and correspond to non-detection paths with a smaller time constant than the detection paths.

[0030] The battery monitoring IC3 includes a multiplexer 6, switches Sc1 to Sc4, capacitors Cs1 and Cs2, and a differential input type ADC 7. In the following description and in FIG. 1, the multiplexer may be referred to as MUX. The MUX6 includes a plurality of switches SV corresponding to the connection terminals PV1 to PV12, respectively, and a plurality of switches SS corresponding to the connection terminals PS1 to PS13, respectively. The switches SV and SS are, for example, configured of MOS transistors.

[0031] One terminal of each of the multiple switches SV is connected to a corresponding connection terminal PV. Specifically, one terminal of each of the switches SV12, SV11, SV2, and SV1 is connected to a corresponding connection terminal PV12, PV11, PV2, and PV1. The other terminal of each of the multiple switches SV is connected to a first output line Lo1. Specifically, the other terminal of each of the switches SV12, SV11, SV2, and SV1 is connected to the first output line Lo1.

[0032] One terminal of each of the multiple switches SS is connected to a corresponding connection terminal PS. Specifically, one terminal of each of the switches SS13, SS12, SS3, SS2, and SS1 is connected to a corresponding connection terminal PS13, PS12, PS3, PS2, and PS1, respectively. The other terminal of each of the multiple switches SS is connected to a second output line Lo2. Specifically, the other terminal of each of the switches SS13, SS12, SS3, SS2, and SS1 is connected to the second output line Lo2.

[0033] A parasitic capacitance Cp1 due to wiring exists between the first output line Lo1 and the ground to which the reference potential of the circuit is applied. A parasitic capacitance Cp2 due to wiring exists between the second output line Lo2 and the ground. MUX6 receives the voltages of the connection terminals PV1 to PV12 and PS1 to PS13, and selectively outputs one of the input voltages by switching the switches SV and SS on and off. Such a selection operation by MUX6, that is, the switching of the switches SV and SS on and off, is controlled by the control unit 5.

[0034] The switches Sc1 to Sc4 and the capacitors Cs1 and Cs2 constitute a differential sample-and-hold circuit together with switches, capacitors, and a differential output type OP amplifier (not shown) provided in the stage preceding the ADC 7. In this case, the sample-and-hold circuit also performs level shifting to step down a high common-mode voltage to a low common-mode voltage.

[0035] The pair of capacitors Cs1 and Cs2 in the differential configuration corresponds to a sampling capacitance and has the same capacitance value. In this specification, the term "same value" does not only mean that the values ​​are completely the same, but also means that the values ​​are slightly different and do not strictly match, so long as the desired effect is achieved. The switches Sc1 to Sc4 are composed of, for example, MOS transistors, and the on / off switching of these switches is controlled by the control unit 5. The control unit 5 basically controls the switches Sc1 and Sc4 and the switches Sc2 and Sc3 to be turned on and off complementarily.

[0036] One terminal of the capacitor Cs1 is connected to the first output line Lo1 via the switch Sc1 and to the second output line Lo2 via the switch Sc2. One terminal of the capacitor Cs2 is connected to the first output line Lo1 via the switch Sc3 and to the second output line Lo2 via the switch Sc4. The other terminals of the capacitors Cs1 and Cs2 are connected to an OP amplifier or the like provided in the front stage of the ADC 7.

[0037] The ADC 7 is a differential input type ADC, and its operation is controlled by the control unit 5. In this case, various types of ADCs, such as a ΔΣ type ADC, can be adopted as the ADC 7. The ADC 7 performs A / D conversion on the voltage output from the MUX 6, that is, the voltage of the first output line Lo1 and the voltage of the second output line Lo2, and outputs the digital signal obtained as the conversion result to the control unit 5.

[0038] In the above configuration, the MUX6 functions as a path switching unit that switches the path connected to the ADC 7. That is, in this embodiment, the path switching unit is configured to include one MUX6, and as will be described in detail later, the one MUX6 is configured to select either the detection path or the non-detection path as the path to be connected to the ADC 7. Note that "connected to the ADC 7" here means connected to the ADC 7 via the MUX6, the switches Sc1 to Sc4, and the capacitors Cs1 and Cs2.

[0039] When detecting the voltage of a target battery cell that is a detection target among the multiple battery cells Cb, the MUX6 can execute an operation of switching paths so that a detection path corresponding to the target battery cell is connected to the ADC7. The MUX6 can output only one voltage among the connection terminals PS1 to PS13. That is, the MUX6 can execute a first switching operation of switching paths so that only one of both terminals of the battery cell Cb is connected to the ADC7. The path connected to the ADC7 by the first switching operation is a part of the equalization path, and thus corresponds to a non-detection path having a smaller time constant than the detection path, similar to the equalization path. The MUX6 can execute a second switching operation of switching paths so that an equalization path, which is a path for discharging each of the multiple battery cells Cb, is connected to the ADC7.

[0040] In the above configuration, the following operation is performed during voltage detection, which is when detecting the voltage of a target battery cell that is a battery cell to be detected among the multiple battery cells Cb. When the number added to the end of the target battery cell is generalized as n, MUX6 selects and outputs the voltage of the connection terminal PVn and the voltage of the connection terminal PSn during voltage detection. For example, if the target battery cell is battery cell Cb12, the voltages of the connection terminals PV12 and PS12 are output, if the target battery cell is battery cell Cb11, the voltages of the connection terminals PV12 and PS11 are output, if the target battery cell is battery cell Cb2, the voltages of the connection terminals PV2 and PS2 are output, and if the target battery cell is battery cell Cb1, the voltages of the connection terminals PV1 and PS1 are output.

[0041] During voltage detection, the MUX6 performs the above-described operation, so that each voltage on the first output line Lo1 and the second output line Lo2 becomes a detection target voltage corresponding to the voltage of the target battery cell. As a result, during voltage detection, the ADC7 can A / D convert the detection target voltage corresponding to the voltages of the multiple battery cells Cb. The control unit 5 controls the operations of the MUX6, the switches Sc1 to Sc4, and the ADC7, and functions as a detection control unit that detects the voltages of the multiple battery cells Cb in a time-division manner based on the digital signal output from the ADC7.

[0042] In this way, the control unit 5 controls the operation of the MUX6 during voltage detection so that the detection path corresponding to the target battery cell is connected to the ADC 7. In the following description, the period during which the control unit 5 controls the operation of the MUX6 in this way will be referred to as the detection period. In this case, the control unit 5 can control the operation of the MUX6 so that the voltages of each of the multiple battery cells Cb can be detected in a time-division manner in any order, that is, in any sequence.

[0043] In the above configuration, the following operation is performed during equalization in which a specific battery cell Cb is discharged in the equalization process. The MUX6 executes the second switching operation described above so that the equalization path corresponding to the battery cell to be discharged is connected to the ADC7 during equalization. That is, when the number added to the end of the battery cell to be discharged is generalized as n, the MUX6 selects and outputs the voltage of the connection terminal PSn+1 and the voltage of the connection terminal PSn during equalization. For example, if the battery cell to be discharged is the battery cell Cb12, the voltages of the connection terminals PS13 and PS12 are output, if the battery cell to be discharged is the battery cell Cb11, the voltages of the connection terminals PS12 and PS11 are output, if the battery cell to be discharged is the battery cell Cb2, the voltages of the connection terminals PS3 and PS2 are output, and if the battery cell to be discharged is the battery cell Cb1, the voltages of the connection terminals PS2 and PS1 are output.

[0044] During equalization, the MUX6 performs the above-mentioned operation, so that the voltages of the first output line Lo1 and the second output line Lo2 become voltages corresponding to the voltages of the battery cells to be discharged. As a result, during equalization, the ADC7 can A / D convert the voltages corresponding to the voltages of the battery cells to be discharged. The control unit 5 controls the operations of the MUX6, the switches Sc1 to Sc4, and the ADC7, and detects the voltages of the battery cells to be discharged based on the digital signals output from the ADC7.

[0045] The control unit 5 is configured to perform the following operations when executing a series of operations for detecting the voltages of each of the multiple battery cells Cb in a time-division manner. That is, when the potential difference between the voltage of the current target battery cell and the voltage of the target battery cell connected to the ADC7 by the previous detection path becomes equal to or greater than a predetermined threshold Vth, the control unit 5 provides a non-detection period during which the operation of the MUX6 is controlled so that the non-detection path is connected to the ADC7 before detecting the voltage of the current target battery cell. The threshold Vth can be set to any value that is higher than a value corresponding to the difference between the common-mode voltages of two adjacently connected battery cells Cb and less than the difference between the common-mode voltages of the two most distantly connected battery cells Cb.

[0046] Furthermore, when the potential difference between the voltage of the current target battery cell and the voltage at a predetermined point in the MUX6 and ADC7 in the initial state becomes equal to or greater than the threshold Vth, the control unit 5 provides a non-detection period during which the operation of the MUX6 is controlled so that the non-detection path is connected to the ADC7 before detecting the voltage of the current target battery cell. The predetermined point in the MUX6 and ADC7 may be any point that is connected to the detection path during voltage detection.

[0047] The control unit 5 can provide the non-detection period by one of the following two methods. As a first method, the control unit 5 can determine whether the above-mentioned potential difference is equal to or greater than the threshold Vth, and provide the non-detection period based on the determination result. As a second method, the control unit 5 can provide the non-detection period in advance based on the result of a previous determination of whether the above-mentioned potential difference is equal to or greater than the threshold Vth.

[0048] In this case, the control unit 5 controls the operation of the MUX6 during the non-detection period so that the MUX6 executes a first switching operation. Specifically, the control unit 5 controls the operation during the non-detection period so that the MUX6 executes a first switching operation for switching the path so that the low potential side terminal of the current target battery cell is connected to the ADC7. That is, during the non-detection period, the control unit 5 turns on only the switch SS corresponding to the current target battery cell among the switches SS1 to SS13 of the MUX6. Also, during the non-detection period, the control unit 5 turns on all of the switches Sc1 to Sc4. Such an operation during the non-detection period is different from the operation that the battery monitoring IC3 should originally perform, such as the operation for detecting the voltage of the battery cell Cb, and therefore will be referred to as "idle running" in the following description.

[0049] <Example of a series of operations performed during voltage detection> Next, a specific example of a series of operations performed by the battery monitoring IC3 when detecting the voltages of the multiple battery cells Cb in a time-division manner, i.e., when detecting voltages, will be described with reference to Fig. 2. In the following description and Fig. 2, when it is necessary to distinguish between the configurations corresponding to the upper cells and the configurations corresponding to the lower cells, they will be distinguished by adding "upper side" and "lower side" to the beginning of the name. Also, in Fig. 2, the battery cells Cb1 to Cb24 are represented by the reference numerals added to the end of each cell, and "idling" is represented by the abbreviated name "idle".

[0050] As shown in Fig. 2, a series of operations related to voltage detection starts at time t1 when a series of operations related to communication ends. This series of operations is executed until time t2. In this case, the control unit 5 controls various operations so that the upper side ADC 7 performs A / D conversion on the detection target voltage corresponding to the voltage of the upper cell in the order of "battery cell Cb23 → battery cell Cb24 → battery cell Cb13 → battery cell Cb14 → ... → battery cell Cb23". Also, in this case, the control unit 5 controls various operations so that the lower side ADC 7 performs A / D conversion on the detection target voltage corresponding to the voltage of the upper cell in the order of "battery cell Cb12 → battery cell Cb1 → battery cell Cb2 → ... → battery cell Cb11".

[0051] In the initial state before the upper ADC 7 performs A / D conversion on the first battery cell Cb24 in the above sequence, the voltage at a predetermined point in the MUX 6 and the ADC 7 is approximately zero. When voltage detection of the first battery cell Cb24 is performed from such an initial state, the potential difference between the voltage of the battery cell Cb24, which is the target battery cell this time, and the voltage at a predetermined point in the MUX 6 and the ADC 7 in the initial state becomes equal to or greater than the threshold Vth. Therefore, the control unit 5 performs idling before the upper ADC 7 performs A / D conversion on the first battery cell Cb24 in the above sequence.

[0052] In addition, in the initial state before the lower ADC 7 performs A / D conversion on the first battery cell Cb12 in the above sequence, the voltage at a predetermined point in the MUX 6 and the ADC 7 is approximately zero. When voltage detection of the first battery cell Cb12 is performed from such an initial state, the potential difference between the voltage of the battery cell Cb12, which is the target battery cell this time, and the voltage at a predetermined point in the MUX 6 and the ADC 7 in the initial state becomes equal to or greater than the threshold Vth. Therefore, the control unit 5 performs idling before the upper ADC 7 performs A / D conversion on the first battery cell Cb12 in the above sequence.

[0053] When the upper ADC 7 performs A / D conversion on the battery cell Cb13, the potential difference between the common voltage of the battery cell Cb13, which is the current target battery cell, and the common voltage of the battery cell Cb24, which is the target battery cell connected to the ADC 7 by the previous detection path, becomes equal to or greater than the threshold value Vth. Therefore, the control unit 5 executes idling before the upper ADC 7 performs A / D conversion on the battery cell Cb13.

[0054] Also, when the lower ADC7 performs A / D conversion on the battery cell Cb1, the potential difference between the common voltage of the battery cell Cb1, which is the current target battery cell, and the common voltage of the battery cell Cb12, which is the target battery cell connected to the ADC7 by the previous detection path, becomes equal to or greater than the threshold value Vth. Therefore, the control unit 5 executes idling before the upper ADC7 executes A / D conversion on the battery cell Cb1. In this embodiment, the non-detection period during which idling is executed is, for example, about 7 μs, which is sufficiently short compared to the overall operation time of about 8 ms. In this way, the control unit 5 controls the operation of the MUX6 and the ADC7 so that the non-detection period is short compared to the detection period.

[0055] According to the present embodiment described above, the following effects can be obtained. When the potential difference between the voltage of the current target battery cell and the voltage of the target battery cell connected to ADC7 by the previous detection path or the voltage of a specified location in MUX6 and ADC7 in the initial state becomes equal to or greater than a threshold Vth, the control unit 5 provides a non-detection period in which the operation of MUX6 is controlled so that a non-detection path having a smaller time constant than the detection path is connected to ADC7 before detecting the voltage of the current target battery cell.

[0056] According to this configuration, a non-detection period is provided when the common voltage of the battery cell Cb to be detected fluctuates greatly, such as when the detection target is switched from the top battery cell Cb24, Cb12 to the bottom battery cell Cb13, Cb1. Therefore, according to the above configuration, at such times, the charge that causes an error in the voltage detection is discharged through the non-detection path, and the occurrence of a voltage detection error is suppressed. In addition, in this case, since the non-detection path has a smaller time constant than the detection path, the time required for discharging the charge, and therefore the non-detection period, can be suppressed to a relatively short time. Therefore, according to this embodiment, an excellent effect is obtained in that the voltage detection accuracy can be improved while suppressing an increase in the overall detection time required to detect the voltages of the multiple battery cells Cb.

[0057] The effect obtained by this embodiment becomes clearer when compared with the conventional technology. Therefore, a comparative example equivalent to the conventional technology will be described and then the comparative example will be compared with this embodiment. The comparative example has the same configuration as this embodiment, but the control contents by the control unit 5 are different from those of this embodiment. In the comparative example, as shown in FIG. 3, in the series of operations performed by the battery monitoring IC 3 when detecting the voltages of each of the multiple battery cells Cb in a time-division manner, no non-detection period is provided and idling is not performed.

[0058] Therefore, in the comparative example, when voltage detection is performed on the first battery cells Cb24 and Cb12 from the initial state, and when voltage detection is performed on the battery cells Cb13 and Cb1, a current that causes an error flows through the filter 4 due to the discharge of the electric charge stored in the internal parasitic capacitance of the MUX6, ADC7, etc., and as a result, a voltage detection error occurs. The occurrence of such a detection error will be described in detail based on a concrete example. Note that, here, it is assumed that voltage detection is performed on the battery cell Cb1 after voltage detection on the battery cell Cb12 is performed.

[0059] In this case, the fluctuation in the common voltage of the detection target battery cell Cb is extremely large, at approximately 60 V. As shown in Fig. 4, in the path from battery cell Cb1 to ADC7 when detecting the voltage of battery cell Cb1, MOS transistors Q1 and Q2 constituting switch SV1 of MUX6 and MOS transistors Q3 and Q4 constituting switch Sc1 or Sc3 are interposed. Each of MOS transistors Q1 to Q4 has MOS capacitance between the gate and source, between the gate and drain, and between the drain and source.

[0060] In addition, there is a parasitic capacitance Cp3 due to wiring between the filter 4 and MUX6, a parasitic capacitance Cp1 due to wiring between the MUX6 and the switch Sc1 or Sc3, and a parasitic capacitance Cp4 due to wiring between the switch Sc1 or Sc3 and the capacitor Cs1 or Cs2 and the ADC7. In the following, such parasitic capacitance will be referred to as an internal node parasitic capacitance. In this case, a very large fluctuation in the common voltage causes electric charge to be discharged from the internal node parasitic capacitance and the MOS capacitance. This causes a current to flow through a path indicated by the dashed arrow in FIG. 4, that is, a path including a detection path passing through the resistor RS and the capacitor CS of the filter 4, and as a result, a voltage detection error due to a voltage drop ΔV1 at the resistor RS occurs.

[0061] The charge / discharge characteristics of the path including the detection path passing through the filter 4 are determined by the filter constant of the filter 4, which is an RC filter. The filter 4 is required to remove noise of a relatively low frequency superimposed on the battery cell Cb, so the resistance value of the resistor RS and the capacitance value of the capacitor CS are relatively large. Therefore, as shown by the characteristic A shown by the dashed line in FIG. 5, the charge / discharge response during the above-mentioned discharge is very slow. In FIG. 5, the vertical axis represents the charge / discharge current I, and the horizontal axis represents the time t. Therefore, in the comparative example, the discharge of the internal node parasitic capacitance and the MOS capacitance is slowed down by the action of the filter 4, and the voltage detection error increases.

[0062] In contrast, in this embodiment, as shown in Fig. 2, a non-detection period is provided in the series of operations performed by the battery monitoring IC 3 when detecting the voltages of the multiple battery cells Cb in a time-division manner, and idling is performed. Therefore, in this embodiment, when performing voltage detection of the first battery cells Cb24 and Cb12 from the initial state, and when performing voltage detection of the battery cells Cb13 and Cb1, idling is performed and the internal charge is discharged before performing these voltage detections. As a result, in this embodiment, the flow of current that causes errors in the filter 4 is suppressed, and as a result, the occurrence of voltage detection errors is suppressed.

[0063] The reason why the occurrence of detection errors is suppressed in this way will be described in detail with reference to a specific example. Here, it is assumed that the battery cell Cb12 is idled after the voltage detection and the battery cell Cb1 is idled before the voltage detection. In this case, the common voltage of the battery cell Cb to be detected varies significantly, at about 60V. As shown in FIG. 6, the path from the battery cell Cb1 to the ADC7 during the idle rotation includes MOS transistors Q5 and Q6 constituting the switch SS1 of the MUX6, and MOS transistors Q7 and Q8 constituting the switch Sc2 or Sc4. Each of the MOS transistors Q5 to Q8 has a MOS capacitance between the gate and source, between the gate and drain, and between the drain and source.

[0064] In addition, there is a parasitic capacitance Cp5 due to wiring between the filter 4 and MUX6, a parasitic capacitance Cp2 due to wiring between the MUX6 and the switch Sc2 or Sc4, and a parasitic capacitance Cp6 due to wiring between the switch Sc2 or Sc4 and the capacitor Cs1 or Cs2 and the ADC7. In this case, too, the charge is discharged from the internal node parasitic capacitance and the MOS capacitance due to a very large fluctuation in the common voltage. As a result, a current flows through a path shown by the dashed arrow in Figure 6, that is, a path including a non-detection path that does not pass through the resistor RS and the capacitor CS of the filter 4 but passes through the equalization resistor RB.

[0065] In this case, a voltage detection error occurs due to the voltage drop ΔV2 in the resistor RB, but since the resistance value of the resistor RB is much smaller than the resistance value of the resistor RS, the voltage drop ΔV2 is much smaller than the voltage drop ΔV1, and as a result, the voltage detection error is also suppressed to a very small value. The charge and discharge characteristics of the path including the non-detection path that does not pass through the filter 4 are very fast in the charge and discharge response in the above-mentioned discharge, as shown by the characteristic B shown by the solid line in Figure 5, since there is no resistor with a relatively large resistance value and no capacitor with a relatively large capacitance value on the path. Therefore, in this embodiment, by passing a current through the equalization resistor RB, the internal node parasitic capacitance and the MOS capacitance are discharged quickly, and the voltage detection error is suppressed to a small value.

[0066] In this embodiment, one MUX6 is used to select either the detection path or the non-detection path as the path to be connected to the ADC7. In this way, since the MUX6 originally provided in the battery monitoring IC3 can be used to switch to the non-detection path, the increase in circuit size accompanying the addition of the non-detection period is suppressed. In this embodiment, the control unit 5 controls the operation of the MUX6 and the ADC7 so that the non-detection period is shorter than the detection period. In this way, the voltage detection accuracy can be improved while minimizing the increase in the overall detection time caused by adding a non-detection period to suppress voltage detection errors.

[0067] The control unit 5 can determine whether the potential difference is equal to or greater than the threshold Vth, and provide a non-detection period based on the result of the determination. In this way, it is possible to add a minimum non-detection period required to obtain a desired voltage detection accuracy, and as a result, the increase in the overall detection time can be further suppressed. In addition, in this way, even if the sequence for detecting the voltages of the multiple battery cells Cb is not predetermined and changes, the non-detection period can be added at an appropriate timing. In addition, the control unit 5 can provide a non-detection period in advance based on the result of a previous determination of whether the potential difference is equal to or greater than the threshold Vth. In this way, the complexity of the control contents by the control unit 5 due to the addition of a non-detection period can be suppressed as much as possible.

[0068] <Modifications regarding the control contents by the control unit 5 during the non-detection period> The control unit 5 controls the operation of the MUX6 so that the MUX6 executes the first switching operation during the non-detection period, but can also control the MUX6 to execute the second switching operation. Specifically, the control unit 5 can also control the operation of the MUX6 so that the MUX6 executes the second switching operation to switch the path so that the equalization path corresponding to the current target battery cell is connected to the ADC7 during the non-detection period. With this modification, as with the present embodiment, the charge that is a cause of error in voltage detection is discharged through the equalization path corresponding to the non-detection path, thereby suppressing the occurrence of voltage detection errors. Also in this case, since the equalization path has a smaller time constant than the detection path, the time required for discharging the charge can be kept relatively short.

[0069] <Modifications regarding the route switching unit> In this embodiment, the path switching unit is configured to have one MUX 6 and to use the one MUX 6 to select either the detection path or the non-detection path as the path to connect to ADC 7, but it can also be configured to have two MUXs and to use the two MUXs to select either the detection path or the non-detection path as the path to connect to ADC 7.

[0070] Specifically, the path switching unit can be configured to include a first MUX having a plurality of switches SV corresponding to the connection terminals PV1 to PV12, and a second MUX having a plurality of switches SS corresponding to the connection terminals PS1 to PS13. The switches SV of the first MUX and the switches SS of the second MUX are connected in such a manner that they can perform switching similar to the switches SV and SS of the MUX6. With this modification, the path connected to the ADC7 can be switched as in the present embodiment, and the same effect as in the present embodiment can be obtained.

[0071] Second embodiment The second embodiment will be described below with reference to FIG. 7, a battery monitoring device 21 of this embodiment is different from the battery monitoring device 1 of the first embodiment in the configuration of external elements. The battery monitoring device 21 includes a filter 22 instead of the filter 4.

[0072] Similar to filter 4, filter 22 is an LPF configured with resistor RS and capacitor CS. However, filter 22 differs from filter 4 in the connection form of the low potential side terminal of capacitor CS. That is, although some are not shown in the figure, the low potential side terminals of capacitors CS corresponding to each of battery cells Cb1 to Cb24 are commonly connected and are also connected to a DC power supply line L2.

[0073] The battery monitoring device 21 includes a capacitor CB provided corresponding to each of the multiple battery cells Cb. Capacitor CB constitutes a discharge circuit together with resistor RB and equalization switch SB, and therefore its capacitance value is much smaller than the capacitance value of capacitor CS constituting filter 22. The specific connection form of capacitor CB is as follows.

[0074] That is, the capacitor CB12 corresponding to the battery cell Cb12 is connected between the connection terminal PS13 and the connection terminal PS12. Although some parts are not shown in the figures, the capacitor CB11 corresponding to the battery cell Cb11 is connected between the connection terminal PS12 and the connection terminal PS11. The capacitor CB2 corresponding to the battery cell Cb2 is connected between the connection terminal PS3 and the connection terminal PS2. The capacitor CB1 corresponding to the battery cell Cb1 is connected between the connection terminal PS2 and the connection terminal PS1.

[0075] The detection path in the battery monitoring device 21 configured as above is the same as the detection path in the battery monitoring device 1 of the first embodiment. Moreover, the equalization path in the battery monitoring device 21 configured as above is the same as the equalization path in the battery monitoring device 1 of the first embodiment. Therefore, also in the battery monitoring device 21, the equalization path corresponds to a non-detection path with a smaller time constant than the detection path.

[0076] In this embodiment, the control unit 5 controls the operation of the MUX6 during the non-detection period so that the MUX6 performs the second switching operation. Specifically, the control unit 5 controls the operation during the non-detection period so that the MUX6 performs the second switching operation of switching the path so that the equalization path corresponding to the current target battery cell is connected to the ADC7. In this embodiment, as in the first embodiment, the charge that is a cause of error in voltage detection is discharged through the equalization path corresponding to the non-detection path, and the occurrence of voltage detection errors is suppressed. Also in this case, since the equalization path has a smaller time constant than the detection path, the time required for discharging the charge can be kept relatively short.

[0077] (Other embodiments) The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified, combined, or expanded as desired without departing from the spirit and scope of the present invention. The numerical values ​​and the like shown in the above embodiments are merely examples and are not intended to be limiting.

[0078] The filter interposed in series in the detection path is not limited to the filters 4 and 22 described in the above embodiments, and filters of various configurations can be used, such as a pi-shaped RC filter, an LC filter, etc. The non-detection path is not limited to the equalization path or a part of the equalization path described in the above embodiments, and may be any path with a smaller time constant than the detection path.

[0079] Although the present disclosure has been described based on the embodiment, it is understood that the present disclosure is not limited to the embodiment or structure. The present disclosure also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure.

[0080] In addition to the inventions described in the claims, the present disclosure includes the following inventions. [1] A battery monitoring device that monitors a battery pack (2) having a configuration in which a plurality of battery cells (Cb) are connected in series, a voltage detection device (3) that detects the voltages of the plurality of battery cells via detection paths connected to both terminals of each of the plurality of battery cells; a filter (4, 22) provided corresponding to each of the plurality of battery cells and connected in series to the detection path; Equipped with The voltage detection device is an A / D converter (7) that performs A / D conversion on a detection target voltage corresponding to the voltages of the plurality of battery cells; a path switching unit (6) for switching a path connected to the A / D converter; a detection control unit (5) that controls operations of the path switching unit and the A / D converter, and detects the voltages of the plurality of battery cells in a time-division manner based on the digital signal output from the A / D converter; Equipped with The detection control unit is When detecting a voltage of a target battery cell that is a detection target among the plurality of battery cells, the operation of the path switching unit is controlled so that the detection path corresponding to the target battery cell is connected to the A / D converter; A battery monitoring device that provides a non-detection period in which the operation of the path switching unit is controlled so that a non-detection path having a smaller time constant than the detection path is connected to the A / D converter before detecting the current voltage of the target battery cell, when the potential difference between the voltage of the target battery cell currently and the voltage of the target battery cell connected to the A / D converter by the previous detection path or the voltage of a predetermined location in the path switching unit and the A / D converter in an initial state becomes equal to or greater than a predetermined threshold. [2] The battery monitoring device according to [1], wherein the path switching unit is configured to include a single multiplexer (6) for selecting either the detection path or the non-detection path as the path to be connected to the A / D converter by using the single multiplexer. [3] the path switching unit is capable of executing a first switching operation of switching the path such that only one of both terminals of the target battery cell is connected to the A / D converter; The battery monitoring device of claim [1] or [2], wherein the detection control unit controls the operation of the path switching unit so that the path switching unit performs the first switching operation during the non-detection period. [4] A battery monitoring device as described in any one of claims [1] to [3], wherein the detection control unit controls the operation of the path switching unit and the A / D converter so that the non-detection period is shorter than the detection period that controls the operation of the path switching unit to detect the voltage of the target battery cell. [5] the path switching unit is capable of executing a second switching operation of switching a path such that an equalization path, which is a path for discharging each of the plurality of battery cells, is connected to the A / D converter; The battery monitoring device of any one of claims [1] to [4], wherein the detection control unit controls the operation of the path switching unit so that the path switching unit performs the second switching operation during the non-detection period. [6] The battery monitoring device according to any one of claims [1] to [5], wherein the detection control unit determines whether the potential difference is greater than or equal to the threshold value, and sets the non-detection period based on the determination result. [7] The battery monitoring device according to any one of claims [1] to [5], wherein the detection control unit sets the non-detection period in advance based on a result of a pre-determination of whether the potential difference is greater than or equal to the threshold value. [Explanation of symbols]

[0081] Reference Signs List 1, 21...battery monitoring device, 2...battery pack, 3...battery monitoring IC, 4, 22...filter, 5...control unit, 6...multiplexer, 7...A / D converter, Cb...battery cell.

Claims

1. A battery monitoring device that monitors a battery pack (2) having a configuration in which a plurality of battery cells (Cb) are connected in series, a voltage detection device (3) that detects the voltage of the plurality of battery cells via a detection path connected to both terminals of each of the plurality of battery cells; a filter (4, 22) provided corresponding to each of the plurality of battery cells and interposed in series in the detection path; Equipped with The voltage detection device is an A / D converter (7) that performs A / D conversion on a detection target voltage corresponding to the voltages of the plurality of battery cells; A path switching unit (6) for switching a path connected to the A / D converter; a detection control unit (5) that controls the operation of the path switching unit and the A / D converter, and detects the voltages of the plurality of battery cells in a time-division manner based on the digital signal output from the A / D converter; Equipped with The detection control unit is When detecting a voltage of a target battery cell that is a detection target among the plurality of battery cells, the operation of the path switching unit is controlled so that the detection path corresponding to the target battery cell is connected to the A / D converter; when a potential difference between the current voltage of the target battery cell and the voltage of the target battery cell connected to the A / D converter by the previous detection path or a voltage at a predetermined location in the path switching unit and the A / D converter in an initial state becomes equal to or greater than a predetermined threshold value, a non-detection period is provided during which operation of the path switching unit is controlled so that a non-detection path having a smaller time constant than the detection path is connected to the A / D converter before detecting the current voltage of the target battery cell; The path switching unit is provided with a single multiplexer (6) and is configured to select either the detection path or the non-detection path as the path to be connected to the A / D converter by using the single multiplexer.

2. the path switching unit is capable of executing a first switching operation of switching the path such that only one of both terminals of the target battery cell is connected to the A / D converter; The battery monitoring device according to claim 1 , wherein the detection control unit controls the operation of the path switching unit so that the path switching unit performs the first switching operation during the non-detection period.

3. 2. The battery monitoring device according to claim 1, wherein the detection control unit controls the operation of the path switching unit and the A / D converter so that the non-detection period is a period shorter than a detection period in which the operation of the path switching unit is controlled to detect the voltage of the target battery cell.

4. the path switching unit is capable of performing a second switching operation of switching a path such that an equalization path, which is a path for discharging each of the plurality of battery cells, is connected to the A / D converter; The battery monitoring device according to claim 1 , wherein the detection control unit controls the operation of the path switching unit so that the path switching unit performs the second switching operation during the non-detection period.

5. The battery monitoring device according to claim 1 , wherein the detection control unit determines whether the potential difference is equal to or greater than the threshold value, and provides the non-detection period based on a result of the determination.

6. The battery monitoring device according to claim 1 , wherein the detection control unit provides the non-detection period in advance based on a result of a pre-determination of whether the potential difference is equal to or greater than the threshold value.

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