Package, semiconductor device, and device

Abstract

To provide a technique for suppressing the reduction in the visibility of a mark for identification.SOLUTION: A package includes on one of the faces of a base a plurality of terminals and a mark portion provided with a mark for identification. A smooth portion is provided between at least one of the plurality of terminals and the mark portion, which is smoother than the other portion between the plurality of terminals and the mark portion.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a package, a semiconductor device, and an apparatus. [Background technology]

[0002] A mark for product identification may be provided on a package on which a semiconductor chip is mounted. Patent Document 1 shows that a two-dimensional barcode for registering an identification number of each circuit board is provided on a board on which a chip is mounted. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2013-247256 A Summary of the Invention [Problem to be solved by the invention]

[0004] As the number of terminals arranged in a package increases and the package becomes smaller, the distance between the terminals and the product identification mark becomes closer. If flux seeps out from the terminal onto the mark during solder mounting, the visibility of the identification mark may decrease.

[0005] An object of the present invention is to provide a technique for suppressing a decrease in the visibility of an identification mark. [Means for solving the problem]

[0006] In view of the above problems, a package according to an embodiment of the present invention is a package having a plurality of terminals and a mark portion having an identification mark provided on one surface of a base, and is characterized in that a smooth portion is provided between at least one of the plurality of terminals on the surface and the mark portion, the smooth portion being smoother than other portions between the plurality of terminals and the mark portion. Effect of the Invention

[0007] According to the present invention, it is possible to provide a technique for suppressing a decrease in the visibility of an identification mark. [Brief description of the drawings]

[0008] [Figure 1] 1A and 1B are a plan view and a cross-sectional view showing an example of a configuration of a package according to an embodiment of the present invention. [Diagram 2] 2A and 2B are a plan view and a cross-sectional view showing a configuration example of a semiconductor device using the package of FIG. [Diagram 3] FIG. 2 is a plan view showing a modification of the package in FIG. [Figure 4] 2A and 2B are a plan view and a cross-sectional view showing a modified example of the package in FIG. [Diagram 5] 2A and 2B are a plan view and a cross-sectional view showing a modified example of the package in FIG. [Figure 6] FIG. 1 is a diagram showing a configuration example of a device in which a package according to an embodiment of the present invention is incorporated. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.

[0010] A package on which a semiconductor chip according to an embodiment of the present disclosure is mounted will be described with reference to Figures 1 to 5. Figure 1 is a plan view and a cross-sectional view showing a configuration example of a package 100 of this embodiment. The cross-sectional view shown in the lower part of Figure 1 shows a cross section between A-A' in the plan view shown in the upper part of Figure 1.

[0011] The package 100 includes a plurality of terminals 120 and a mark portion 130 provided with an identification mark on one surface 111 of a base 110. A smooth portion 140 that is smoother than other portions 112 between the plurality of terminals 120 and the mark portion 130 is provided between at least one of the plurality of terminals 120 on the surface 111 of the base 110 and the mark portion 130.

[0012] The base 110 may be an insulating base using an insulator. The base 110 may have a wiring layer using a conductor such as a metal arranged on the insulating base. The package 100 includes terminals 120 for electrically connecting the semiconductor chip mounted on the package 100 to an external device of the package 100, and may be used as a semiconductor device including the package 100 and the semiconductor chip mounted on the package 100. In this case, the base 110 of the package 100 may be an insulating base using a ceramic such as alumina or steatite, which has excellent heat dissipation and electrical properties.

[0013] The terminals 120 arranged on the surface 111 of the base 110 are connected to inner leads arranged on the mounting surface 181 of the base 110 on which the semiconductor chip of the base 110 is mounted, through an internal wiring pattern arranged inside the base 110. A plating layer such as gold plating may be formed on the surfaces of the terminals 120 and the inner leads to provide wettability to solder. In the case of the terminals 120 and the inner leads made of a copper-based material, for example, nickel plating is applied on the copper, and then gold plating is applied on the nickel plating.

[0014] The mark section 130, on which a mark used for identifying a product or each package 100 is arranged, is arranged on the same surface 111 as the terminals 120 of the base 110. The mark section 130 may be arranged in the center of the surface 111 of the base 110 as shown in FIG. 1. Here, the center of the surface 111 of the base 110 may be an area inside a set of imaginary points that bisect an imaginary line connecting the center (e.g., the geometric center position) of the surface 111 to each side in an orthogonal projection onto the surface 111. However, the arrangement of the mark section 130 is not limited thereto, and the mark section 130 may be arranged at an appropriate position according to the arrangement of the terminals 120, etc. Also, the mark section 130 may be an area surrounding the outer edge of an identification mark using characters, figures, etc. formed on the mark section 130. For example, the mark section 130 may be an area surrounded by the outermost edge of the characters, figures, etc. of the identification mark and a line connecting the outermost edges.

[0015] For example, a data matrix may be used as the mark formed in the mark section 130 for identification. However, the type of mark is not limited to a data matrix, and other symbols, characters, or figures may be used as long as the individual packages can be identified. The marks arranged in the mark section 130 can be formed, for example, by laser irradiation. The laser used to form the marks in the mark section 130 includes CO 2 Laser, YVO 4 However, other types of lasers may be used. That is, the identification mark provided in the mark section 130 may be an engraving formed by engraving the surface 111 of the package 100 using laser irradiation or the like. Also, for example, the mark provided in the mark section 130 may be formed using printing or the like.

[0016] In the configuration example shown in FIG. 1, the package 100 has a cavity structure 180 formed on a mounting surface 181 on which a semiconductor chip is mounted, for accommodating a semiconductor chip on which a semiconductor element is formed. In this manner, the surface 111 on which the mark portion 130 of the base 110 is disposed may be the surface opposite to the mounting surface 181 on which the semiconductor chip is mounted. For example, a light-transmitting member is attached to a frame portion surrounding the cavity structure 180 on the mounting surface 181 of the base 110, thereby forming a hollow structure between the semiconductor chip disposed in the cavity structure 180 and the light-transmitting member. However, the configuration of the package 100 is not limited to this, and the mounting surface 181 on which the semiconductor chip of the base 110 is mounted may be flat, for example.

[0017] A configuration example of a semiconductor device 200 in which a semiconductor chip 210 is mounted on a package 100 will be described with reference to Fig. 2. Fig. 2 is a plan view and a cross-sectional view showing the configuration example of a semiconductor device 200 in which a semiconductor chip 210 is mounted on a package 100. The cross-sectional view shown in the lower part of Fig. 2 shows a cross section taken along line A-A' in the plan view shown in the upper part of Fig. 2.

[0018] The semiconductor device 200 may include a package 100, a semiconductor chip 210 mounted on a cavity structure 180 formed on a mounting surface 181 of a base 110 of the package 100, and a light-transmitting member 220 arranged to cover the semiconductor chip 210. The semiconductor chip 210 may have, for example, a pixel region having a plurality of light-receiving elements, and the surface of the pixel region may be a light-receiving surface. The pixel region may include a color filter arranged on the light-receiving side of the light-receiving elements, a planarizing film arranged on the color filter, a microlens arranged on the planarizing film, or the like. The semiconductor chip 210 may be a CCD image sensor, a CMOS image sensor, or the like. In addition, the semiconductor chip 210 may have, for example, a pixel region having a plurality of light-emitting elements, and the surface of the pixel region may be a light-emitting surface. The pixel region may include a color filter arranged on the light-receiving side of the light-receiving elements, a planarizing film arranged on the color filter, a microlens arranged on the planarizing film, or the like. The semiconductor chip 210 may be a liquid crystal display, or an organic or inorganic electroluminescence (EL) display.

[0019] The semiconductor chip 210 is provided with electrodes for transmitting and receiving signals to and from the outside of the semiconductor chip 210. The electrodes of the semiconductor chip 210 are connected to the inner leads of the package 100 using a conductor such as gold wire. Wires such as copper or aluminum may be used to connect the electrodes of the semiconductor chip 210 to the inner leads of the package 100.

[0020] The light transmitting member 220 arranged to cover the mounting surface 181 of the package 100 and the semiconductor chip 210 may be made of light-transmitting glass, quartz crystal, plastic, or the like. For example, a material having a linear expansion coefficient equivalent to that of the material used for the base 110 of the package 100 is selected as the material for the light transmitting member 220. This can suppress warping and deformation of the semiconductor device 200.

[0021] Next, the smooth portion 140 disposed between the terminal 120 and the mark portion 130 on the surface 111 of the base 110 will be described in detail. The smooth portion 140 is provided on the surface 111 on which the terminal 120 for solder mounting of the base 110 is provided. The smooth portion 140 is provided for the purpose of suppressing seepage of flux contained in the solder material from the terminal 120 to the mark portion 130 during solder mounting. As described above, when ceramics or the like is used as the material of the base 110, the surface of the base 110 is often porous and has a rough surface condition. Therefore, there is a problem that the flux is likely to wet and spread on the surface 111 of the base 110 due to the capillary phenomenon. In solder mounting, if the flux seeps out from the terminal 120 onto the identification mark, the visibility of the mark may be reduced. For example, in an inspection process, it may become difficult to identify each package 100 (semiconductor device 200) using a camera. When the number of terminals 120 is increased or when the package 100 is made smaller, the distance between the terminals 120 and the mark portion 130 becomes smaller, and the effect of the seepage of flux can become greater.

[0022] Therefore, a smooth portion 140 is formed on the surface 111 of the base 110, which is smoother than the portion 112 other than the smooth portion 140 between the terminal 120 and the mark portion 130. The inventors have confirmed that the smooth portion 140 can suppress the spreading of the flux during solder mounting. In this embodiment, the arithmetic mean roughness (Ra) of the portion 112 of the surface 111 of the base 110 is 4.0 μm, while the Ra of the smooth portion 140 is 1.0 μm. In other words, the Ra of the smooth portion 140 may be ¼ or less than the Ra of the portion 112. Also, for example, the Ra of the smooth portion 140 may be 1.0 μm or less. This can suppress the flux from seeping out and reducing the visibility of the mark portion 130.

[0023] Furthermore, the inventors' experiments have found that the width of the smooth portion 140 of 0.25 μm or more is effective in suppressing the spreading of the flux. The wider the width of the smooth portion 140 is, the more the flux can be suppressed from spreading. On the other hand, from the viewpoint of miniaturization and space saving of the package 100 (semiconductor device 200), it is better that the width of the smooth portion 140 is not too large. For example, the width of the smooth portion 140 may be 1.0 μm or less. In other words, the width of the smooth portion 140 may be 0.25 μm or more and 1.0 μm or less. For example, the width of the smooth portion 140 may be 0.75 μm.

[0024] As described above, the smooth portion 140 is formed by applying CO 2 Laser and YVO 4 For example, the smooth portion 140 may be formed by the same method as the mark formed in the mark portion 130. That is, the identification mark may be formed by irradiating the mark portion 130 with CO 2 Laser and YVO 4 The smooth portion 140 is formed by irradiating a laser. 2 Laser and YVO 4The smooth portion 140 may be formed by irradiating a laser. For example, the smooth portion 140 may be formed in the process of forming a mark on the mark portion 130, or before or after the process of forming a mark. This makes it possible to form the smooth portion 140 that suppresses the seepage of flux during solder mounting while suppressing an increase in the number of processes. In this case, the surface of the smooth portion 140 may have a similar configuration to the surface of the mark provided on the mark portion 130. For example, the Ra of the surface of the smooth portion 140 may be substantially the same as the Ra of the surface of the mark on the mark portion 130. Also, for example, the composition of the surface of the smooth portion 140 may be substantially the same as the composition of the surface of the mark on the mark portion 130. However, the method of forming the smooth portion 140 is not limited to the irradiation of a laser, and the smooth portion 140 may be formed by printing a material that becomes smooth after firing, such as an alumina coat. As long as a surface smoother than the portion 112 other than the smooth portion 140 between the terminal 120 and the mark portion 130 can be obtained on the surface 111 of the base 110, the method of forming the smooth portion 140 may be any method. Furthermore, the method of forming the marks provided in the mark section 130 is not limited to laser irradiation. For example, the marks may be formed by printing a material such as an alumina coat or ink.

[0025] The smooth portion 140 exerts a sufficient effect by providing it at a place where there is a concern that the visibility of the mark portion 130 may be hindered by the spreading of the flux. For example, as shown in FIG. 1, the smooth portion 140 may be provided at a portion where the distance between the terminal 120 and the mark portion 130 is short. Also, for example, if the layout arrangement is possible, the smooth portion 140 may be provided in a ring shape so as to surround the mark portion 130, as shown in FIG. 3(a). Furthermore, as shown in FIG. 3(b), the smooth portion 140 may be provided so as to surround the mark portion 130 in a plurality of rows. By providing a plurality of rows of the smooth portion 140, for example, even when a solder material with a large flux component, such as a resin-reinforced solder, is used, it is possible to more reliably suppress the seepage of the flux to the mark portion 130. As a result, it is possible to shorten the distance between the terminal 120 and the mark portion 130, and the package 100 can be made smaller. 3(a) and 3(b), the mark portion 130 is surrounded by a seamless annular smooth portion 140, but the smooth portion 140 may have a (discontinuous) form in which a portion of the ring of the smooth portion 140 is notched. For example, the smooth portion 140 may be formed at locations facing each side of the rectangular mark portion 130, and the smooth portion 140 may not be formed at locations corresponding to the corners of the mark portion 130.

[0026] As described above, the package 100 having the smooth portion 140 and the semiconductor device 200 having the semiconductor chip 210 mounted on the package 100 are used. This suppresses the seepage of flux from the terminal 120 to the mark portion 130 having the mark provided thereon, which is caused by solder mounting. As a result, the visibility of the identification mark formed on the mark portion 130 is ensured, and the package 100 (semiconductor device 200) can be made smaller.

[0027] FIG. 4 is a plan view and a cross-sectional view of a package 100' showing a modified example of the package 100 described above. The cross-sectional view shown in the lower part of FIG. 4 shows a cross section between A-A' in the plan view shown in the upper part of FIG. 4. Compared to the configuration of the package 100 shown in FIG. 1, the package 100' shown in FIG. 4 has a convex portion 160 protruding from the surface 111 of the base 110 in the normal direction of the surface 111 instead of the smooth portion 140. More specifically, a convex portion 160 protruding from the other portion 112 between the multiple terminals 120 and the mark portion 130 is provided between at least one terminal of the multiple terminals 120 on the surface 111 of the base 110 and the mark portion 130. The configuration of the package 100' other than this may be the same as the configuration of the package 100 described above, so the convex portion 160 will be mainly described.

[0028] The convex portion 160, like the smooth portion 140, is provided on the surface 111 on which the terminals 120 are provided for solder mounting of the base 110. The convex portion 160 is arranged for the purpose of suppressing seepage of flux contained in the solder material from the terminals 120 to the mark portion 130 during solder mounting. Specifically, the provision of the convex portion 160 suppresses the flux component from wetting and spreading from the terminals 120 to the mark portion 130. As a result, it becomes possible to narrow the distance between the terminals 120 and the mark portion 130, and the package 100' can be made smaller.

[0029] 2, in the package 100' shown in Fig. 4, the semiconductor chip 210 may be placed on the mounting surface 181, and the package 100' may constitute a part of the semiconductor device 200. As shown in Fig. 4, similarly to the package 100, a cavity structure 180 for accommodating the semiconductor chip 210 and the like may be formed on the mounting surface 181 on which the semiconductor chip 210 of the package 100' is placed.

[0030] In cases where the base 110 of the package 100′ is made of ceramic, the protrusion 160 may be formed by recessing a portion of a mold for forming the base 110 that corresponds to the protrusion 160. Alternatively, for example, the protrusion 160 may be formed by further disposing an appropriate material, such as an alumina coat or resin, on the surface 111 of the flat base 110. For example, the surface of the protrusion 160 may be smoother than the surface of the portion 112 between the terminal 120 and the mark portion 130 other than the protrusion 160.

[0031] The protrusions 160 are sufficiently effective when provided at a location where there is a concern that the visibility of the mark portion 130 may be hindered by the spread of the flux. For example, as shown in FIG. 4, the protrusions 160 may be disposed at a portion where the distance between the terminal 120 and the mark portion 130 is short. Also, for example, if the layout arrangement allows, the protrusions 160 may be disposed in a ring shape so as to surround the mark portion 130, similar to the package 100 shown in FIG. 3(a). Furthermore, as shown in FIG. 3(b), the protrusions 160 may be disposed so as to surround the mark portion 130 in a plurality of rows.

[0032] Regarding the height of the protrusion 160, in view of the nature of the protrusion 160 as a wall structure that suppresses the spread of the flux, it is considered that the height of the protrusion 160 should be as high as possible. Experiments by the inventors have revealed that if the protrusion 160 protrudes 1 μm or more from the other portion 112 between the terminal 120 and the mark portion 130, the effect of suppressing the spread of the flux can be sufficiently obtained. For example, the height of the protrusion 160 may be 5 μm. However, if the protrusion 160 is made too high, there is a possibility that a defect will occur in the joint between the terminal 120 and the external terminal of the package 100 (semiconductor device 200) connected to the terminal 120 during solder mounting. Therefore, an appropriate height can be selected depending on the height of the terminal 120, the size of the solder ball used, and the like. The height of the protrusion 160 may be, for example, 1 mm or less, 500 μm or less, 100 μm or less, or even 10 μm or less.

[0033] As described above, the package 100' having the protruding portion 160 and the semiconductor device 200 having the semiconductor chip 210 mounted on the package 100' are used. This suppresses the seepage of flux from the terminals 120 to the mark portion 130 having the mark provided thereon, which is caused by solder mounting. As a result, it is possible to ensure the visibility of the identification mark formed on the mark portion 130 and to miniaturize the package 100' (semiconductor device 200).

[0034] FIG. 5 is a plan view and a cross-sectional view of a package 100″ showing a modified example of the above-mentioned packages 100 and 100′. The cross-sectional view shown in the lower part of FIG. 5 shows a cross section between A-A′ in the plan view shown in the upper part of FIG. 5. Compared to the configuration of the package 100 shown in FIG. 1, the package 100″ shown in FIG. 5 has a recess 170 recessed from the surface 111 of the base 110 in the normal direction of the surface 111 instead of the smooth part 140. More specifically, a recess 170 recessed further than other parts 112 between the multiple terminals 120 and the mark part 130 is provided between at least one terminal of the multiple terminals 120 on the surface 111 of the base 110 and the mark part 130. The configuration of the package 100″ other than this may be the same as the configuration of the above-mentioned package 100, so the recess 170 will be mainly described.

[0035] The recesses 170, like the smooth portion 140, are provided on the surface 111 on which the terminals 120 are provided for solder mounting of the base 110. The recesses 170 are arranged for the purpose of suppressing seepage of flux contained in the solder material from the terminals 120 to the mark portion 130 during solder mounting. Specifically, the provision of the recesses 170 suppresses the flux components from wetting and spreading from the terminals 120 to the mark portion 130. As a result, it becomes possible to narrow the distance between the terminals 120 and the mark portion 130, and the package 100'' can be made smaller.

[0036] 2, in the package 100'' shown in FIG. 5, a semiconductor chip 210 may be placed on the mounting surface 181, and the package 100'' may constitute a part of the semiconductor device 200. As shown in FIG. 5, similarly to the package 100, a cavity structure 180 for accommodating the semiconductor chip 210 and the like may be formed on the mounting surface 181 on which the semiconductor chip 210 of the package 100'' is placed.

[0037] In a case where the base 110 of the package 100'' is made of ceramic, the recess 170 may be formed by protruding a portion of a mold for forming the base 110 that corresponds to the recess 170. Alternatively, for example, the recess 170 may be formed by cutting the surface 111 of the base 110.

[0038] The recess 170 exerts a sufficient effect when provided at a location where there is a concern that the visibility of the mark portion 130 may be hindered by the spreading of the flux. For example, as shown in FIG. 5, the recess 170 may be disposed at a portion where the distance between the terminal 120 and the mark portion 130 is short. Also, for example, if the layout arrangement allows, the recess 170 may be disposed in a ring shape so as to surround the mark portion 130, similar to the package 100 shown in FIG. 3(a). Furthermore, as shown in FIG. 3(b), the recess 170 may be disposed so as to surround the mark portion 130 in a plurality of rows.

[0039] Regarding the depth of the recess 170, in view of the property of suppressing the progress of the flux by storing the flux in the recess 170 (groove), it is suitable to make it as deep as possible. However, for example, when a groove is formed by cutting as the recess 170 on the surface 111 of the base 110, if the depth of the recess 170 is made deep, the processing time of the process of forming the recess 170 becomes long. In addition, for example, if the depth of the recess 170 is made deep, the strength of the base 110 may be reduced. As a result of the inventors' repeated intensive studies, it was found that a sufficient effect can be obtained if the recess 170 is recessed by 2 μm or more from the other part 112 between the terminal 120 and the mark part 130. For example, the depth of the recess 170 may be 5 μm. In addition, the depth of the recess 170 may be, for example, 1 mm or less, 500 μm or less, 100 μm or less, or even 10 μm or less, taking into consideration the process of forming the recess 170 and the strength of the base 110.

[0040] As described above, a package 100'' having a recess 170 and a semiconductor device 200 having a semiconductor chip 210 mounted on the package 100'' are used. This suppresses the seepage of flux from the terminals 120 to the mark section 130 on which the mark is provided, which is caused by solder mounting. As a result, the visibility of the identification mark formed on the mark section 130 is ensured, and the package 100'' (semiconductor device 200) can be made smaller.

[0041] Hereinafter, the above-mentioned package 100, 100', 100'' and the device 1000 including the semiconductor device 200 including the semiconductor chip 210 mounted on the package 100, 100', 100'' shown in FIG. 6 will be described. The semiconductor chip 210 is accommodated in the package 100, 100', 100'' and mounted on the device 1000. In the configuration shown in FIG. 6, the semiconductor chip 210 is a photoelectric conversion device. The semiconductor device 200 can include the package 100, 100', 100'' including the base 110 to which the semiconductor chip 210 is fixed and a light-transmitting member 220 such as glass facing the semiconductor chip 210. As described above, the package 100, 100', 100'' can include a bonding member such as a wire or a bump that connects an inner lead provided on the base 110 and a terminal such as a pad electrode provided on the semiconductor chip 210.

[0042] The device 1000 may include at least one of an optical device 1040, a control device 1050, a processing device 1060, a display device 1070, a storage device 1080, and a mechanical device 1090. The optical device 1040 is, for example, a lens, a shutter, or a mirror. The control device 1050 controls the semiconductor chip 210. The control device 1050 is, for example, a semiconductor device such as an ASIC.

[0043] The processing device 1060 processes a signal output from the semiconductor chip 210. The processing device 1060 is a semiconductor device such as a CPU or ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 1070 is an EL display device or a liquid crystal display device that displays information (images) obtained by the semiconductor chip 210. The storage device 1080 is a magnetic device or a semiconductor device that stores information (images) obtained by the semiconductor chip 210. The storage device 1080 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0044] The mechanical device 1090 has a moving part or a propulsion part such as a motor or an engine. In the device 1000, the signal output from the semiconductor chip 210 is displayed on the display device 1070, or transmitted to the outside by a communication device (not shown) included in the device 1000. For this purpose, the device 1000 may further include a storage device 1080 and a processing device 1060 in addition to the memory circuit and arithmetic circuit included in the semiconductor chip 210. The mechanical device 1090 may be controlled based on the signal output from the semiconductor chip 210.

[0045] The device 1000 is also suitable for electronic devices such as information terminals (e.g., smartphones and wearable devices) with a photographing function and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 1090 in the camera can drive components of the optical device 1040 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 1090 in the camera can move the semiconductor chip 210 for vibration isolation operation.

[0046] Furthermore, the device 1000 may be transportation equipment such as a vehicle, a ship, or an aircraft. The mechanical device 1090 in the transportation equipment may be used as a moving device. The device 1000 as a transportation equipment is suitable for transporting the semiconductor chip 210, or for assisting and / or automating driving (piloting) by using a photographing function. The processing device 1060 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 1090 as a moving device based on information obtained by the semiconductor chip 210. Alternatively, the device 1000 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot.

[0047] The disclosure of the present specification includes the following packages, semiconductor devices, and devices.

[0048] (Item 1) A package including a plurality of terminals and a mark portion having an identification mark provided on one surface of a base, A package characterized in that a smooth portion is provided on the surface between at least one of the plurality of terminals and the mark portion, the smooth portion being smoother than other portions between the plurality of terminals and the mark portion.

[0049] (Item 2) 2. The package according to item 1, wherein the smooth portion is arranged so as to surround the mark portion.

[0050] (Item 3) 3. The package according to item 1 or 2, wherein the smooth portion is arranged so as to surround the mark portion in a plurality of rows.

[0051] (Item 4) 4. The package described in any one of items 1 to 3, wherein the arithmetic mean roughness of the smooth portion is 1 / 4 or less than the arithmetic mean roughness of the other portions.

[0052] (Item 5) 5. The package described in any one of items 1 to 4, wherein the smooth portion has an arithmetic mean roughness of 1.0 μm or less.

[0053] (Item 6) 6. The package described in any one of items 1 to 5, wherein the width of the smooth portion is 0.25 μm or more and 1.0 μm or less.

[0054] (Item 7) The package described in any one of items 1 to 6, wherein the surface of the smooth portion has a configuration similar to that of the surface of the mark provided on the mark portion.

[0055] (Item 8) A package including a plurality of terminals and a mark portion having an identification mark provided on one surface of a base, A package characterized in that a convex portion is provided on the surface between at least one of the plurality of terminals and the mark portion, the convex portion protruding further than other portions between the plurality of terminals and the mark portion.

[0056] (Item 9) 9. The package according to item 8, wherein the protrusion is arranged so as to surround the mark portion.

[0057] (Item 10) 10. The package according to item 8 or 9, wherein the protrusions are arranged in a plurality of rows surrounding the mark portion.

[0058] (Item 11) 11. The package according to any one of items 8 to 10, wherein the convex portion protrudes 1 μm or more from the other portions.

[0059] (Item 12) A package including a plurality of terminals and a mark portion having an identification mark provided on one surface of a base, A package characterized in that a recess is provided on the surface between at least one of the plurality of terminals and the mark portion, the recess being recessed deeper than other portions between the plurality of terminals and the mark portion.

[0060] (Item 13) Item 13. The package according to item 12, wherein the recess is arranged to surround the mark portion.

[0061] (Item 14) 14. The package according to item 12 or 13, wherein the recesses are arranged in a plurality of rows surrounding the mark portion.

[0062] (Item 15) 15. The package described in any one of items 12 to 14, wherein the recess is recessed by 2 μm or more from the other portion.

[0063] (Item 16) 16. The package described in any one of items 1 to 15, wherein the base is an insulating base.

[0064] (Item 17) 17. The package of any one of claims 1 to 16, wherein the base comprises alumina or steatite.

[0065] (Item 18) 18. The package described in any one of items 1 to 17, wherein the mark portion is arranged in the center of the surface.

[0066] (Item 19) 19. The package described in any one of items 1 to 18, wherein the surface is a surface opposite to a mounting surface on which a semiconductor chip is mounted.

[0067] (Item 20) A package according to any one of items 1 to 19; A semiconductor chip mounted on the package; A semiconductor device comprising:

[0068] (Item 21) The semiconductor device according to item 20, a processing device for processing a signal output from the semiconductor device; An apparatus comprising:

[0069] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0070] 100, 100', 100'': package, 110: base, 111: surface, 120: terminal, 130: mark portion, 140: smooth portion

Claims

1. A package having a plurality of terminals and a mark portion on one surface of a base, the mark portion having an identification mark, A package characterized in that a smooth portion is provided on the surface between at least one of the plurality of terminals and the mark portion, the smooth portion being smoother than other portions between the plurality of terminals and the mark portion.

2. 2. The package according to claim 1, wherein the smooth portion is disposed so as to surround the mark portion.

3. 2. The package according to claim 1, wherein the identification mark on the smooth portion is a data matrix.

4. 2. The package according to claim 1, wherein the arithmetic mean roughness of the smooth portion is equal to or less than 1 / 4 of the arithmetic mean roughness of the other portion.

5. 2. The package according to claim 1, wherein the smooth portion has an arithmetic mean roughness of 1.0 [mu]m or less.

6. 2. The package according to claim 1, wherein the width of the flat portion is 0.25 [mu]m or more and 1.0 [mu]m or less.

7. 2. The package according to claim 1, wherein the surface of the smooth portion has a configuration similar to that of the surface of the mark provided on the mark portion.

8. A package having a plurality of terminals and a mark portion on one surface of a base, the mark portion having an identification mark, A package characterized in that a convex portion is provided on the surface between at least one of the plurality of terminals and the mark portion, the convex portion protruding more than other portions between the plurality of terminals and the mark portion.

9. 9. The package according to claim 8, wherein the protrusion is disposed so as to surround the mark portion.

10. 9. The package according to claim 8, wherein the protrusion and the identification mark are a data matrix.

11. 9. The package according to claim 8, wherein the protrusion protrudes from the other portion by 1 [mu]m or more.

12. A package having a plurality of terminals and a mark portion on one surface of a base, the mark portion having an identification mark, A package characterized in that a recess is provided on the surface between at least one of the plurality of terminals and the mark portion, the recess being recessed more than other portions between the plurality of terminals and the mark portion.

13. 13. The package according to claim 12, wherein the recess is disposed so as to surround the mark portion.

14. 13. The package according to claim 12, wherein the recess has an identification mark that is a data matrix.

15. 13. The package according to claim 12, wherein the recess is recessed by 2 [mu]m or more from the other portion.

16. 2. The package of claim 1, wherein the base is an insulating base.

17. 10. The package of claim 1, wherein the base comprises alumina or steatite.

18. 2. The package according to claim 1, wherein the marking portion is disposed at the center of the surface.

19. 2. The package according to claim 1, wherein the surface is a surface opposite to a mounting surface on which a semiconductor chip is mounted.

20. A package according to any one of claims 1 to 19; a semiconductor chip mounted on the package; A semiconductor device comprising:

21. The semiconductor device according to claim 20; a processing device that processes a signal output from the semiconductor device; An apparatus characterized by comprising:

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