Manufacturing method for semiconductor device

Abstract

To provide a technique of enabling the reduction of stress on an insulating layer that occurs at a bonding of a semiconductor module and a metal base plate without increasing the rigidity of a metal plate that is bonded to a lower surface of the insulating layer.SOLUTION: A manufacturing method for a semiconductor device 100 includes a transfer mold step and a mold package mounting step. The mold package mounting step includes disposing a semiconductor module 50 on an upper surface of a metal base plate 1 through a second bonding material 9, heating the metal base plate 1, the second bonding material 9, and the semiconductor module 50 to melt the second bonding material 9, and then cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50, thereby hardening the second bonding material 9. When the metal base plate 1, the second bonding material 9, and the semiconductor module 50 are cooled, the difference between an upper surface temperature of the metal base plate 1 and a lower surface temperature of a first metal plate 4 at a solidus line of the second bonding material 9 is 5°C or less.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] For example, Patent Document 1 proposes a technology for avoiding problems such as peeling off of the resin insulation layer built into a semiconductor device due to high temperatures during the reflow process for soldering by setting the thickness dimension of a copper plate fixed to the underside of a heat spreader via a resin insulation layer (equivalent to an insulation layer) to a value that is at least 0.3 mm and does not exceed the thickness dimension of the heat spreader. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-111765 Summary of the Invention [Problem to be solved by the invention]

[0004] In the technology described in Patent Document 1, the rigidity of the copper plate is improved by increasing the thickness of the copper plate that is integrated with the insulating resin layer in order to suppress peeling of the resin insulating layer. However, in order to enhance the effect of suppressing peeling of the resin insulating layer, electrolytic copper foil is generally used as the copper plate.

[0005] However, increasing the thickness of the electrolytic copper foil increases the manufacturing cost. When a rolled copper plate is used instead of the electrolytic copper foil, the adhesion to the resin insulating layer is lower than when the electrolytic copper foil is used, so that another process such as roughening treatment of the surface of the rolled copper plate is required to improve the adhesion to the resin insulating layer, which increases the manufacturing cost.

[0006] Also, in a structure in which a ceramic insulating substrate is used as an insulating layer, stress on the ceramic insulating substrate that occurs when the semiconductor module is joined to the metal base plate becomes a problem.

[0007] Therefore, the present disclosure aims to provide a technology that can reduce the stress on an insulating layer that occurs when a semiconductor module and a metal base plate are joined together, without increasing the rigidity of the metal plate joined to the underside of the insulating layer. [Means for solving the problem]

[0008] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of: (a) manufacturing a semiconductor module by sealing a first metal plate, an insulating layer bonded to a lower surface of the first metal plate, a second metal plate bonded to a lower surface of the insulating layer, and a semiconductor element mounted on an upper surface of the first metal plate via a first bonding material with a molding resin while leaving the lower surface of the second metal plate exposed; and (b) mounting the semiconductor module on a metal base plate by bonding the lower surface of the second metal plate to the upper surface of the metal base plate with a second bonding material having a lower melting point than the first bonding material. the step (b) includes a step of placing the semiconductor module on an upper surface of the metal base plate via the second bonding material, heating the metal base plate, the second bonding material, and the semiconductor module to melt the second bonding material, and then cooling the metal base plate, the second bonding material, and the semiconductor module to harden the second bonding material, wherein when the metal base plate, the second bonding material, and the semiconductor module are cooled, a difference between a temperature of the upper surface of the metal base plate and a temperature of the lower surface of the first metal plate at a solidus of the second bonding material is 5° C. or less. Effect of the Invention

[0009] According to the present disclosure, it is possible to reduce the stress on the insulating layer that occurs when the semiconductor module and the metal base plate are joined together, without increasing the rigidity of the second metal plate that is joined to the underside of the insulating layer. [Brief description of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Diagram 2]1 is a top view of a semiconductor device according to a first embodiment. [Diagram 3] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Figure 4] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Diagram 5] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Figure 6] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Figure 7] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Figure 8] 2 is a cross-sectional view showing a part of a manufacturing method of the semiconductor device according to the first embodiment. [Figure 9] 5 is a graph showing the difference between the temperature of the top surface of the metal base plate and the temperature of the bottom surface of the first metal plate during cooling in the first embodiment. [Figure 10] 4 is a graph showing temperature profiles of a metal base plate and a first metal plate during rapid cooling in the first embodiment. FIG. [Figure 11] 4 is a graph showing a dielectric strength voltage during rapid cooling in the first embodiment. FIG. [Figure 12] 4 is a graph showing temperature profiles of a metal base plate and a first metal plate during slow cooling in the first embodiment. FIG. [Figure 13] 4 is a graph showing a dielectric strength voltage during slow cooling in the first embodiment. FIG. [Figure 14] FIG. 11 is a cross-sectional view of a semiconductor device according to a second embodiment. [Figure 15] FIG. 11 is a cross-sectional view of a semiconductor device according to a third embodiment. [Figure 16] 13 is a graph showing the difference between the temperature of the top surface of the metal base plate and the temperature of the bottom surface of the first metal plate during cooling in the third embodiment. FIG. [Figure 17] 13 is a cross-sectional view showing a part of a manufacturing method of a semiconductor device according to a modified example of the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] <Embodiment 1> <Structure of Semiconductor Device> The first embodiment will be described below with reference to the drawings. Fig. 1 is a cross-sectional view of a semiconductor device 100 according to the first embodiment. Fig. 2 is a top view of the semiconductor device 100 according to the first embodiment. In Fig. 2, in order to make the internal structure easier to see, the portion of the molded resin 11 above the main terminals 6 and the signal terminals 7 is not shown.

[0012] As shown in FIGS. 1 and 2, the semiconductor device 100 includes a semiconductor module 50 and a metal base plate 1. The semiconductor module 50 includes a metal base plate 1 and a semiconductor module 50. The metal base plate 1 includes a metal substrate 1a.

[0013] The semiconductor module 50 comprises a first metal plate 4, a resin insulation layer 3 (corresponding to an insulation layer), a second metal plate 2, a semiconductor element 5, a plurality of (e.g., two) main terminals 6, a plurality of (e.g., three) signal terminals 7, and a molded resin 11.

[0014] A first metal plate 4 is bonded to the upper surface of the resin insulating layer 3. In addition, a second metal plate 2 is bonded to the lower surface of the resin insulating layer 3. The first metal plate 4 and the second metal plate 2 are preferably made of copper, but may be made of a metal other than copper.

[0015] The semiconductor element 5 is mounted on the upper surface of the first metal plate 4 via the first bonding material 10. Although only one semiconductor element 5 is shown in Fig. 1 and Fig. 2, the number of semiconductor elements 5 is not limited to one and may be multiple.

[0016] The semiconductor element 5 is, for example, an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). The semiconductor element 5 may also include an electrically connected free wheeling diode (FWD). The semiconductor element 5 is made of silicon or a wide band gap semiconductor material. Wide band gap semiconductor materials include silicon carbide, gallium nitride semiconductor materials, diamond, and the like.

[0017] One end of one of the main terminals 6 is joined to the upper surface electrode of the semiconductor element 5 via a first bonding material 10. One end of the other main terminal 6 is joined to the upper surface of the first metal plate 4 via a first bonding material 10. One ends of the three signal terminals 7 are joined to signal pads (not shown) on the upper surface of the semiconductor element 5 via aluminum wires 8. The first bonding material 10 is solder.

[0018] The molded resin 11 seals the first metal plate 4, the resin insulating layer 3, the second metal plate 2, the semiconductor element 5, one end sides of the two main terminals 6, and one end sides of the three signal terminals 7, with the lower surface of the second metal plate 2 exposed. Therefore, the other end sides of the two main terminals 6 and the other end sides of the three signal terminals 7 protrude from the molded resin 11. The molded resin 11 is a thermosetting resin such as an epoxy resin.

[0019] The lower surface of the second metal plate 2 is joined to the upper surface of the metal base plate 1 via a second bonding material 9, thereby bonding the semiconductor module 50 to the metal base plate 1. The second bonding material 9 has a lower melting point than the first bonding material 10. Specifically, the second bonding material 9 is a tin solder containing bismuth.

[0020] <Method of Manufacturing Semiconductor Device> Next, an outline of a method for manufacturing the semiconductor device 100 will be described with reference to Figures 3 to 8. Figures 3 to 8 are cross-sectional views showing a part of the method for manufacturing the semiconductor device 100 according to the first embodiment.

[0021] First, as shown in FIG. 3, a die-bonding step is performed in which a semiconductor element 5 is mounted on the upper surface of a first metal plate 4 via a first bonding material 10.

[0022] Next, as shown in FIG. 4, frame joining is performed in which the semiconductor element 5 and the main terminal 6, and the first metal plate 4 and the main terminal 6 are joined with the first joining material 10, respectively.

[0023] Next, as shown in FIG. 5, a wire bonding process is performed in which the three signal pads of the semiconductor element 5 are connected to the three signal terminals 7 by aluminum wires 8, respectively.

[0024] Next, as shown in FIG. 6, the insulating sheet in which the semi-cured resin insulation layer 3 and the second metal plate 2 are integrated, and the wire-bonded product are set in the cavity of a mold (not shown) heated to, for example, 180° C., and molten molding resin 11 is poured into the cavity. Pressure is then applied to the molten molding resin 11 to harden it, and the transfer molding process is performed to harden the semi-cured resin insulation layer 3 as well.

[0025] The transfer molding process corresponds to process (a) of manufacturing a semiconductor module 50 by sealing a first metal plate 4, a resin insulation layer 3 bonded to the underside of the first metal plate 4, a second metal plate 2 bonded to the underside of the resin insulation layer 3, and a semiconductor element 5 mounted on the upper surface of the first metal plate 4 via a first bonding material 10, with molded resin 11 while leaving the underside of the second metal plate 2 exposed.

[0026] Next, as shown in Fig. 7, a lead processing step is performed in which unnecessary portions of the lead frame having the main terminals 6 and the signal terminals 7 are cut off and the remaining portions are bent into a desired shape. Through the steps in Figs. 3 to 7, a semiconductor module 50 is manufactured.

[0027] Next, as shown in FIG. 8, a mold package mounting process is performed in which the upper surface of the metal base plate 1 and the lower surface of the second metal plate 2 are bonded with a second bonding material 9, thereby mounting the semiconductor module 50 on the metal base plate 1.

[0028] The molded package mounting process corresponds to process (b) of mounting a semiconductor module 50 to a metal base plate 1 by joining the lower surface of a second metal plate 2 to the upper surface of the metal base plate 1 with a second bonding material 9 having a lower melting point than the first bonding material 10.

[0029] Here, the first bonding material 10 used in the die bonding process and the first bonding material 10 used in the frame bonding process are the same material, and the first bonding material 10 used in the die bonding process will be re-melted due to the heating during the frame bonding process, but this does not cause any particular problem because the area around the first bonding material 10 is not sealed.

[0030] However, it is necessary to prevent the first bonding material 10 in the semiconductor module 50 from remelting during the mold package mounting process. Therefore, the second bonding material 9 needs to have a melting point lower than that of the first bonding material 10. This is because when the first bonding material 10 remelts, the volume of the first bonding material 10 expands, causing the first bonding material 10 to leak out to the interface between the molded resin 11 and the first metal plate 4, or the molded resin 11 cracks, causing the first bonding material 10 to erupt.

[0031] During the mold package mounting process, there is a transient difference between the amount of shrinkage of the metal base plate 1 bonded at a high temperature when it returns to room temperature and the amount of shrinkage of the first metal plate 4 sealed with the mold resin 11, and the second bonding material 9 hardens in a state where shear stress acts on the second bonding material 9 and the resin insulating layer 3, causing the resin insulating layer 3 to peel off. To prevent this, it is important to manage the temperature during cooling.

[0032] Next, temperature management during cooling will be described. Fig. 9 is a graph showing the difference between the upper surface temperature of metal base plate 1 and the lower surface temperature of first metal plate 4 during cooling in embodiment 1.

[0033] In the mold package mounting process, the semiconductor module 50 can be efficiently heated and cooled by contacting a heater block or a cooling block with the lower surface of the metal base plate 1. However, since there is a delay in the temperature change of the second bonding material 9 and the semiconductor module 50 with respect to the metal base plate 1, a temperature difference occurs between the metal base plate 1 and the second bonding material 9 and the semiconductor module 50 during heating and cooling. Therefore, the steeper the heating rate and cooling rate are, and the larger the heat capacity of the semiconductor module 50 is, the larger the temperature difference becomes. When the temperature difference during cooling becomes large, shear stress occurs in the resin insulating layer 3 and the second bonding material 9 as described above. Therefore, as shown in FIG. 9, it is desirable to set the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the time when the temperature of the second bonding material 9 reaches the solidus during cooling to 5° C. or less.

[0034] As described above, the second bonding material 9 is a tin solder containing bismuth. When bismuth is added to tin solder, the melting point changes depending on the ratio, and when the bismuth content is 58%, the melting point is the lowest at 139°C (eutectic point). Hereinafter, tin solder containing 58% bismuth is also referred to as "Sn-58Bi".

[0035] Regardless of the amount of bismuth added, the second bonding material 9 may partially have a eutectic point, and the second bonding material 9 will not fully harden until it reaches 139°C or lower. Therefore, it is desirable to set the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the eutectic point of Sn-58Bi of 139°C at which the second bonding material 9 will fully harden to 2°C or lower. Experimental results have revealed that such temperature control can reduce stress on the resin insulating layer 3.

[0036] The experimental results are shown in Figs. 10 to 13. Fig. 10 is a graph showing the temperature profile of the metal base plate 1 and the first metal plate 4 during rapid cooling in embodiment 1. Fig. 11 is a graph showing the dielectric strength voltage during rapid cooling in embodiment 1. Fig. 12 is a graph showing the temperature profile of the metal base plate 1 and the first metal plate 4 during slow cooling in embodiment 1. Fig. 13 is a graph showing the dielectric strength voltage during slow cooling in embodiment 1.

[0037] Figures 10 and 12 plot the temperatures of the metal base plate 1 and the first metal plate 4 during the molded package mounting process. Figure 10 shows the state in which the metal base plate 1 is rapidly cooled by contacting it with a cooling block, while Figure 12 shows the state in which the metal base plate 1 is cooled slowly without being in contact with anything during cooling.

[0038] As shown in Figure 10, the temperature of the metal base plate 1 is lower than that of the first metal plate 4 during rapid cooling, whereas, as shown in Figure 12, the temperatures of the metal base plate 1 and the first metal plate 4 are almost the same during slow cooling.

[0039] In order to confirm the soundness of the resin insulating layer 3 during rapid cooling and slow cooling, several tens of semiconductor device 100 samples were used to measure the dielectric strength, and the results are shown in Figures 11 and 13. The metal base plate 1 of the semiconductor device 100 used in the samples is made of aluminum or copper. The horizontal axis shows the dielectric strength, with higher insulation performance indicated as the value increases to the right, and the vertical axis shows the frequency (number of samples). In Figure 11, there are some samples with high dielectric strength, but the dielectric strength varies to a low level, whereas in Figure 13, only samples with high dielectric strength are shown.

[0040] To achieve this temperature control, in embodiment 1, in the mold package mounting process, the metal base plate 1, the second bonding material 9 and the semiconductor module 50 are cooled by spraying cooled reducing gas from above the semiconductor module 50, without contacting the underside of the metal base plate 1 with a heater block or a cooling block.

[0041] In addition, a semiconductor element 5 is mounted on the upper surface of the first metal plate 4, and the heat generated during operation of the semiconductor element 5 needs to be efficiently dissipated to the metal base plate 1. Therefore, if the heat is spread out by the first metal plate 4 and dissipated over a large area before passing through the resin insulation layer 3, which has a lower thermal conductivity than metal, the thermal resistance of the entire semiconductor device 100 decreases, resulting in a package with good heat dissipation properties.

[0042] Furthermore, it is effective to absorb heat generated by the semiconductor element 5 due to a short-term load with the thermal capacity of the first metal plate 4 located directly below. For this reason, the first metal plate 4 needs to have a certain degree of thickness, and the thickness of the first metal plate 4 is preferably 2.5 mm or more and 4 mm or less. If the thickness exceeds this, not only will the thermal resistance of the first metal plate 4 itself increase, deteriorating heat dissipation, but the package weight and manufacturing costs will also increase.

[0043] The resin insulating layer 3 has the functions of insulation and heat dissipation, and it is better to be thick for insulation, but it is better to be thin for heat dissipation. Therefore, it is better to make the resin insulating layer 3 as thin as possible while ensuring a thickness corresponding to the dielectric strength voltage required for the package. The thickness corresponding to the dielectric strength voltage includes aging deterioration and margin, so the thickness of the resin insulating layer 3 is preferably 0.1 mm or more and 0.25 mm or less. Since the resin insulating layer 3 is sandwiched between the first metal plate 4 and the second metal plate 2 on the top and bottom, it is better for the linear expansion coefficient of the resin insulating layer 3 to be as close as possible to that of copper, and the content of the filler is adjusted so that the linear expansion coefficient of the resin insulating layer 3 is 10 ppm / K or more and 20 ppm / K or less. The filler is boron nitride, aluminum nitride, aluminum oxide, etc. Note that the filler is important not only for adjusting the linear expansion coefficient but also for improving the thermal conductivity.

[0044] The part in which the second metal plate 2 and the resin insulation layer 3 are integrated is called an insulating sheet, and its manufacturing method involves applying a liquid resin that will become the resin insulation layer 3 to the second metal plate 2, and then applying pressure while heating it to semi-harden the liquid resin.

[0045] The functions of the second metal plate 2 are to maintain the shape of the insulating sheet, to protect the resin insulating layer 3 after the mold package mounting process, and to bond with the metal base plate 1. To fulfill these functions, the adhesion between the second metal plate 2 and the resin insulating layer 3 is important, and it is suitable and common to use electrolytic copper foil with unevenness on one side as the second metal plate 2. However, the manufacturing method of electrolytic copper foil involves passing electricity through a copper sulfate bath and processing the copper deposited on the cathode into a sheet, so the manufacturing cost increases with each increase in thickness. Therefore, it is desirable to use electrolytic copper foil of 0.25 mm or less as the second metal plate 2.

[0046] Like the first metal plate 4, the metal base plate 1 needs to have a certain thickness in order to spread the heat from the semiconductor element 5. Specifically, it is desirable that the metal base plate 1 has a thickness of 2 mm or more and 4 mm or less, and is made of a material such as copper, aluminum, or an alloy containing these as its main components.

[0047] <Effects> As described above, the manufacturing method of embodiment 1 includes a transfer molding process in which a first metal plate 4, a resin insulation layer 3 bonded to the underside of the first metal plate 4, a second metal plate 2 bonded to the underside of the resin insulation layer 3, and a semiconductor element 5 mounted on the upper surface of the first metal plate 4 via a first bonding material 10 are sealed with molded resin 11 with the underside of the second metal plate 2 exposed to manufacture a semiconductor module 50, and a mold package mounting process in which the semiconductor module 50 is mounted on the metal base plate 1 by bonding the underside of the second metal plate 2 to the upper surface of the metal base plate 1 with a second bonding material 9 having a lower melting point than the first bonding material 10. The mold package mounting process includes a process of placing the semiconductor module 50 on the upper surface of the metal base plate 1 via the second bonding material 9, heating the metal base plate 1, the second bonding material 9, and the semiconductor module 50 to melt the second bonding material 9, and then cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50 to harden the second bonding material 9. When the metal base plate 1, the second bonding material 9, and the semiconductor module 50 are cooled, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the solidus of the second bonding material 9 is 5° C. or less.

[0048] Therefore, it is possible to reduce the stress on the resin insulation layer 3 that occurs when the semiconductor module 50 and the metal base plate 1 are joined together, without improving the rigidity of the second metal plate 2 joined to the lower surface of the resin insulation layer 3. This makes it possible to suppress peeling of the resin insulation layer 3. In addition, since the durability of the semiconductor device 100 against thermal cycles is improved, the long-term reliability of the semiconductor device 100 is also improved.

[0049] In addition, the second bonding material 9 is a tin solder containing bismuth, and when the metal base plate 1, the second bonding material 9 and the semiconductor module 50 are cooled, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the eutectic point of the second bonding material 9 when it contains 58% bismuth is 2°C or less.

[0050] Therefore, since the semiconductor module 50 can be mounted on the metal base plate 1 using tin solder having a relatively low melting point, remelting of the first bonding material 10 inside the semiconductor module 50 can be suppressed.

[0051] In addition, in the mold package mounting process, the metal base plate 1, the second bonding material 9, and the semiconductor module 50 are cooled by blowing cooled reducing gas from above the semiconductor module 50, so that the semiconductor module 50 can be uniformly cooled. Also, oxidation of each part of the semiconductor module 50 can be suppressed.

[0052] <Embodiment 2> <Structure of Semiconductor Device> Next, a semiconductor device 100A according to embodiment 2 will be described. Fig. 14 is a cross-sectional view of the semiconductor device 100A according to embodiment 2. Note that in embodiment 2, the same components as those described in embodiment 1 are denoted by the same reference numerals and the description thereof will be omitted.

[0053] As shown in FIG. 14, in the second embodiment, a ceramic insulating substrate 12 (corresponding to an insulating layer) is provided in place of the resin insulating layer 3 in the first embodiment.

[0054] A first metal plate 4 is bonded to the upper surface of the ceramic insulating substrate 12. A second metal plate 2 is bonded to the lower surface of the ceramic insulating substrate 12. A molded resin 11 seals the first metal plate 4, the ceramic insulating substrate 12, the second metal plate 2, the semiconductor element 5, one ends of the two main terminals 6, and one ends of the three signal terminals 7, with the lower surface of the second metal plate 2 exposed.

[0055] <Method of Manufacturing Semiconductor Device> The manufacturing method of the semiconductor device 100A is the same as that of embodiment 1, except that the semiconductor element 5 is die-bonded to the first metal plate 4 joined to the upper surface of the ceramic insulating substrate 12, and only the wire-bonded product is set in the cavity of the mold during transfer molding.

[0056] As in the first embodiment, it is better for the first metal plate 4 to have a certain thickness in order to spread the heat from the semiconductor element 5, but since it is common to attach the first metal plate 4 to the ceramic insulating substrate 12 and remove unnecessary portions by etching, manufacturing becomes difficult if the first metal plate 4 is too thick. Therefore, it is desirable for the thickness of the first metal plate 4 to be 0.5 mm or more and 0.8 mm or less.

[0057] The function of the ceramic insulating substrate 12 is similar to that of the resin insulating layer 3 in the first embodiment; it is better to make it thin for heat dissipation while ensuring the necessary dielectric strength, but since the ceramic insulating substrate 12 is a brittle material, it also needs to be strong against cracking. Therefore, the most suitable material for the ceramic insulating substrate 12 is silicon nitride, and the thickness is preferably 0.25 mm or more and 0.35 mm or less.

[0058] Since the second metal plate 2 is joined to the ceramic insulating substrate 12 together with the first metal plate 4 by soldering at high temperatures, it is necessary for the second metal plate 2 to have the same thickness as the first metal plate 4 in order to prevent warping after joining.

[0059] As in the first embodiment, the metal base plate 1 preferably has a thickness of 2 mm to 4 mm and is made of copper, aluminum, or an alloy containing these as its main component.

[0060] <Effects> As described above, the manufacturing method of embodiment 2 includes a transfer molding process in which a first metal plate 4, a ceramic insulating substrate 12 bonded to the underside of the first metal plate 4, a second metal plate 2 bonded to the underside of the ceramic insulating substrate 12, and a semiconductor element 5 mounted on the upper surface of the first metal plate 4 via a first bonding material 10 are sealed with molding resin 11 with the underside of the second metal plate 2 exposed, to manufacture a semiconductor module 50A, and a mold package mounting process in which the semiconductor module 50A is mounted on the metal base plate 1 by bonding the underside of the second metal plate 2 to the upper surface of the metal base plate 1 with a second bonding material 9 having a lower melting point than the first bonding material 10. The mold package mounting process includes a process of placing the semiconductor module 50A on the upper surface of the metal base plate 1 via the second bonding material 9, heating the metal base plate 1, the second bonding material 9, and the semiconductor module 50A to melt the second bonding material 9, and then cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50A to harden the second bonding material 9. When the metal base plate 1, the second bonding material 9, and the semiconductor module 50A are cooled, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the solidus of the second bonding material 9 is 5° C. or less.

[0061] In the second embodiment, unlike the resin insulating layer 3 in the first embodiment, the ceramic insulating substrate 12 does not peel off due to shear stress. However, in the mold package mounting process, if the metal base plate 1 is cooled and contracted faster than the first metal plate 4 during cooling, and the second bonding material 9 solidifies in that state, the contraction of the first metal plate 4, which is cooled later, causes warping of the first metal plate 4. This may cause the ceramic insulating substrate 12, which is a brittle material, to be subjected to bending stress and crack. Therefore, by reducing the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 during cooling, the residual stress during the mold package mounting process can be reduced. This can suppress warping of the first metal plate 4 and cracking of the ceramic insulating substrate 12. In addition, the durability of the semiconductor device 100A against heat and cold cycles is improved, and the long-term reliability of the semiconductor device 100A is also improved.

[0062] In addition, the second bonding material 9 is a tin solder containing bismuth, and when the metal base plate 1, the second bonding material 9 and the semiconductor module 50A are cooled, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the eutectic point of the second bonding material 9 when it contains 58% bismuth is 2°C or less.

[0063] Therefore, the semiconductor module 50A can be mounted on the metal base plate 1 using tin solder, which has a relatively low melting point, and remelting of the first bonding material 10 inside the semiconductor module 50A can be suppressed.

[0064] In addition, in the mold package mounting process, the metal base plate 1, the second bonding material 9, and the semiconductor module 50A are cooled by blowing cooled reducing gas from above the semiconductor module 50A, so that the semiconductor module 50A can be uniformly cooled. Also, oxidation of each part of the semiconductor module 50A can be suppressed.

[0065] <Embodiment 3> <Structure of Semiconductor Device> Next, a semiconductor device 100B according to a third embodiment will be described. Fig. 15 is a cross-sectional view of the semiconductor device 100B according to the third embodiment. Fig. 16 is a graph showing the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 during cooling in the third embodiment. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals and the description thereof will be omitted.

[0066] As shown in FIG. 15, in the third embodiment, unlike the first embodiment, a metal base plate 1 is provided on its lower surface with a plurality of pin fins 1a that protrude downward.

[0067] <Method of Manufacturing Semiconductor Device> 15, the manufacturing method of the semiconductor device 100B differs from that of the first embodiment in that a cooling block 13 is disposed under the metal base plate 1. In the mold package mounting process, the metal base plate 1, the second bonding material 9, and the semiconductor module 5 are cooled by bringing the cooling block 13 into contact with the tips of the multiple pin fins 1a without spraying a reducing gas.

[0068] As described above, temperature control during cooling is important in the molded package mounting process, but when semiconductor module 50 is mounted on the upper surface of metal base plate 1 having multiple pin fins 1a on its underside, cooling by contacting cooling block 13 with the tips of pin fins 1a makes it impossible to achieve rapid cooling, making it easier or unnecessary to control the temperature to reduce the difference between the temperature of the upper surface of metal base plate 1 and the temperature of the underside of first metal plate 4.

[0069] That is, when cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50B, it is easy or unnecessary to control the temperature to keep the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the solidus of the second bonding material 9 to 5° C. or less, and when cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50B, it is easy or unnecessary to control the temperature to keep the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the eutectic point of the second bonding material 9 when it contains 58% bismuth. This is also true when the metal base plate 1 provided with multiple pin fins 1a is used in the semiconductor device 100A of the second embodiment.

[0070] <Modification of the third embodiment> Next, a description will be given of a variation of the embodiment 3. Fig. 17 is a cross-sectional view showing a part of a method for manufacturing the semiconductor device 100 according to the variation of the embodiment 3.

[0071] As shown in FIG. 17, a modification of the third embodiment will be described using the semiconductor device 100 according to the first embodiment.

[0072] In the above, defects in the resin insulating layer 3, the ceramic insulating substrate 12, and the second bonding material 9 are suppressed by slowing down the cooling rate, but the drawback of slowing down the cooling rate is that the processing time increases and there is a concern that sink marks may occur in the second bonding material 9. Sink marks in the second bonding material 9 are likely to occur if the time from when the second bonding material 9 starts to solidify until it completely solidifies during cooling becomes long. This occurs when the volume of the second bonding material 9 at the part that solidifies last is insufficient due to the volumetric shrinkage that occurs when the second bonding material 9 solidifies.

[0073] Therefore, by rapidly cooling the entire second bonding material 9, it is possible to suppress the occurrence of sink marks in the second bonding material 9. As shown in Fig. 16, when the metal base plate 1, the second bonding material 9, and the semiconductor module 50 are cooled, the occurrence of sink marks in the second bonding material 9 can be suppressed by setting the temperature gradient a / b from the solidus of the second bonding material 9 to the eutectic point of the second bonding material 9 when the second bonding material 9 contains 58% bismuth to a gradient of 0.2°C / sec or more.

[0074] 17, in the manufacturing method of the semiconductor device 100, in the mold package mounting step, the cooling block 13 is brought into contact with the lower surface of the metal base plate 1, and the cooled reducing gas is blown from above the semiconductor module 50 to cool the metal base plate 1, the second bonding material 9, and the semiconductor module 50. That is, the lower surface of the metal base plate 1 is rapidly cooled by the cooling block 13, and the first metal plate 4 is also rapidly cooled by blowing the cooled reducing gas from above the semiconductor module 50. This can suppress defects in the resin insulating layer 3 and the second bonding material 9, and suppress the occurrence of sink marks in the second bonding material 9. The same effect can be obtained when the modified example of the third embodiment is adopted for the semiconductor device 100A of the second embodiment.

[0075] However, even in the case of Figure 17, the following conditions are satisfied: when cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50B, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the solidus of the second bonding material 9 is 5°C or less; and when cooling the metal base plate 1, the second bonding material 9, and the semiconductor module 50B, the difference between the upper surface temperature of the metal base plate 1 and the lower surface temperature of the first metal plate 4 at the eutectic point of the second bonding material 9 when it contains 58% bismuth is 2°C or less.

[0076] <Effects> As described above, in the manufacturing method of embodiment 3, a plurality of pin fins 1a protruding downward are provided on the underside of the metal base plate 1, and in the mold package mounting process, the metal base plate 1, second bonding material 9 and semiconductor module 50 are cooled by contacting the tips of the plurality of pin fins 1a with a cooling block 13.

[0077] Therefore, by conducting heat through the pin fins 1a, the number of heat transfer paths can be reduced, reducing the temperature distribution caused by rapid cooling and suppressing the shear stress applied to the resin insulation layer 3. This makes it possible to suppress damage to the resin insulation layer 3.

[0078] In the manufacturing method of the modified example of the third embodiment, the second bonding material 9 is a tin solder containing bismuth, and when the metal base plate 1, the second bonding material 9, and the semiconductor module 50 are cooled, the temperature gradient from the solidus of the second bonding material 9 to the eutectic point of the second bonding material 9 when the second bonding material 9 contains 58% bismuth is -0.2°C / sec or more. Therefore, the occurrence of sink marks in the second bonding material 9 can be suppressed.

[0079] In addition, in the mold package mounting process, a cooling block 13 is brought into contact with the underside of the metal base plate 1, and cooled reducing gas is sprayed from above the semiconductor module 50 to cool the metal base plate 1, the second bonding material 9, and the semiconductor module 50.

[0080] This makes it possible to suppress defects in the resin insulating layer 3 and the second bonding material 9, and also to suppress the occurrence of sink marks in the second bonding material 9. Furthermore, oxidation of each portion of the semiconductor module 50 can be suppressed.

[0081] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0082] Various aspects of the present disclosure are summarized below as appendices.

[0083] (Appendix 1) (a) manufacturing a semiconductor module by sealing a first metal plate, an insulating layer bonded to a lower surface of the first metal plate, a second metal plate bonded to a lower surface of the insulating layer, and a semiconductor element mounted on an upper surface of the first metal plate via a first bonding material with a molding resin in a state where the lower surface of the second metal plate is exposed; (b) mounting the semiconductor module on the metal base plate by bonding a lower surface of the second metal plate to an upper surface of the metal base plate with a second bonding material having a lower melting point than the first bonding material; the step (b) includes a step of arranging the semiconductor module on an upper surface of the metal base plate via the second bonding material, heating the metal base plate, the second bonding material, and the semiconductor module to melt the second bonding material, and then cooling the metal base plate, the second bonding material, and the semiconductor module to harden the second bonding material; A method for manufacturing a semiconductor device, wherein when the metal base plate, the second bonding material, and the semiconductor module are cooled, a difference between the upper surface temperature of the metal base plate and the lower surface temperature of the first metal plate at the solidus of the second bonding material is 5°C or less.

[0084] (Appendix 2) the second bonding material is a tin solder containing bismuth; The method for manufacturing a semiconductor device described in Appendix 1, wherein when the metal base plate, the second bonding material, and the semiconductor module are cooled, when the second bonding material contains 58% bismuth, the difference between the top surface temperature of the metal base plate and the bottom surface temperature of the first metal plate at the eutectic point of the second bonding material is 2°C or less.

[0085] (Appendix 3) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein in the step (b), the metal base plate, the second bonding material, and the semiconductor module are cooled by spraying a cooled reducing gas from above the semiconductor module.

[0086] (Appendix 4) A plurality of pin fins protruding downward are provided on the lower surface of the metal base plate, The method for manufacturing a semiconductor device according to claim 1 or 2, wherein in the step (b), the metal base plate, the second bonding material, and the semiconductor module are cooled by contacting a cooling block with tips of the pin fins.

[0087] (Appendix 5) the second bonding material is a tin solder containing bismuth; 4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein, during cooling of the metal base plate, the second bonding material, and the semiconductor module, a temperature gradient from the solidus of the second bonding material to the eutectic point of the second bonding material when the second bonding material contains 58% bismuth is -0.2°C / sec or more.

[0088] (Appendix 6) The method for manufacturing a semiconductor device described in Appendix 5, wherein in the step (b), a cooling block is brought into contact with the underside of the metal base plate, and the cooled reducing gas is sprayed from above the semiconductor module to cool the metal base plate, the second bonding material, and the semiconductor module. [Explanation of symbols]

[0089] 1 metal base plate, 1a pin fin, 2 second metal plate, 3 resin insulating layer, 4 first metal plate, 5 semiconductor element, 9 second bonding material, 10 first bonding material, 11 molded resin, 12 ceramic insulating substrate, 13 cooling block, 50, 50A semiconductor module, 100, 100A, 100B semiconductor device.

Claims

1. (a) manufacturing a semiconductor module by sealing a first metal plate, an insulating layer bonded to a lower surface of the first metal plate, a second metal plate bonded to a lower surface of the insulating layer, and a semiconductor element mounted on an upper surface of the first metal plate via a first bonding material with a molding resin in a state where the lower surface of the second metal plate is exposed; (b) mounting the semiconductor module on the metal base plate by bonding a lower surface of the second metal plate to an upper surface of the metal base plate with a second bonding material having a lower melting point than the first bonding material; the step (b) includes a step of arranging the semiconductor module on an upper surface of the metal base plate via the second bonding material, heating the metal base plate, the second bonding material, and the semiconductor module to melt the second bonding material, and then cooling the metal base plate, the second bonding material, and the semiconductor module to harden the second bonding material; A method for manufacturing a semiconductor device, wherein when the metal base plate, the second bonding material, and the semiconductor module are cooled, the difference between the upper surface temperature of the metal base plate and the lower surface temperature of the first metal plate at the solidus of the second bonding material is 5°C or less.

2. the second bonding material is a tin solder containing bismuth; 2. The method for manufacturing a semiconductor device according to claim 1, wherein when the metal base plate, the second bonding material, and the semiconductor module are cooled, a difference between the upper surface temperature of the metal base plate and the lower surface temperature of the first metal plate at the eutectic point of the second bonding material when the second bonding material contains 58% bismuth is 2°C or less.

3. 3. The method for manufacturing a semiconductor device according to claim 1, wherein in the step (b), the metal base plate, the second bonding material, and the semiconductor module are cooled by spraying a cooled reducing gas from above the semiconductor module.

4. A plurality of pin fins protruding downward are provided on the lower surface of the metal base plate, 3. The method for manufacturing a semiconductor device according to claim 1, wherein in the step (b), the metal base plate, the second bonding material, and the semiconductor module are cooled by contacting a cooling block with tips of the pin fins.

5. the second bonding material is a tin solder containing bismuth; 4. The method for manufacturing a semiconductor device according to claim 3, wherein, when the metal base plate, the second bonding material, and the semiconductor module are cooled, a temperature gradient from a solidus of the second bonding material to a eutectic point of the second bonding material when the second bonding material contains 58% bismuth is -0.2°C / sec or more.

6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein in the step (b), a cooling block is brought into contact with the underside of the metal base plate, and the cooled reducing gas is sprayed from above the semiconductor module to cool the metal base plate, the second bonding material, and the semiconductor module.

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