Photonic-crystal surface-emitting laser element

Abstract

To provide a photonic-crystal surface-emitting laser element which has a high injection efficiency and emits light with a low threshold and a high efficiency.SOLUTION: A photonic-crystal surface-emitting laser element includes: a first guide layer which includes a lower guide layer, a photonic crystal layer that is formed on the lower guide layer and that has vacancies two-dimensionally arranged on lattice points, and an embedment layer that is formed on the photonic crystal layer and that fills the vacancies; a hetero semiconductor layer which is formed on the embedment layer and is composed of a semiconductor having a crystal composition different from that of the embedment layer; an active layer which is formed on the hetero semiconductor layer; and a second guide layer which is formed on the active layer. The embedment layer is doped with an n-type dopant at a concentration of 1.0×1017-1.0×1020 cm-3.SELECTED DRAWING: Figure 1A

Description

[Technical field]

[0001] The present invention relates to a photonic crystal surface-emitting laser element having a photonic crystal layer. [Background technology]

[0002] Conventionally, various structures have been proposed to improve the efficiency of semiconductor light-emitting devices. For example, Patent Document 1 describes an ultraviolet light-emitting device having a composition gradient layer for generating holes by the polarization doping effect and efficiently injecting the holes into an active layer.

[0003] Furthermore, Patent Document 2 describes a nitride semiconductor light-emitting device having a composition gradient layer in which the Al composition value decreases toward the side where the sum of spontaneous polarization and piezoelectric polarization becomes negative, in order to improve the efficiency of hole injection into the active layer.

[0004] Patent Document 3 discloses a photonic crystal surface-emitting laser (PCSEL) that is made of a crystal layer having a different crystal composition from the hole layer (photonic crystal layer) and is provided with a light distribution adjustment layer that adjusts the coupling efficiency between light and the hole layer. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2022-041738 A [Patent Document 2] Patent No. 6192378 [Patent Document 3] WO2021 / 186965 A1 publication Summary of the Invention [Problem to be solved by the invention]

[0006] The inventors of the present application have discovered that depletion due to piezoelectric polarization occurs at a heterointerface between a photonic crystal layer and a semiconductor layer formed on the photonic crystal layer and having a different crystal composition from that of the photonic crystal layer, forming a barrier against electrons and preventing efficient operation of a photonic crystal surface-emitting laser (PCSEL).

[0007] The present application has been made based on this finding, and has an object to provide a photonic crystal surface-emitting laser element that has high injection efficiency and emits light with a low threshold and high efficiency. [Means for solving the problem]

[0008] A photonic crystal surface emitting laser element according to one embodiment of the present invention comprises: An n-type semiconductor layer; a first guide layer including: a photonic crystal layer formed on the n-type semiconductor layer, the photonic crystal layer having holes arranged two-dimensionally at each lattice point; and a buried layer formed on the photonic crystal layer for closing the holes; a hetero semiconductor layer formed on the buried layer and made of a semiconductor having a different crystal composition from that of the buried layer; an active layer formed on the hetero semiconductor layer; a second guide layer formed on the active layer; The buried layer contains an n-type dopant at 1.0×10 17 ~1.0×10 20 cm -3 It is doped at a concentration of [Brief description of the drawings]

[0009] [Figure 1A] 1 is a cross-sectional view illustrating an example of the structure of a PCSEL element according to a first embodiment. [Figure 1B] 1B is an enlarged cross-sectional view showing a schematic diagram of holes arranged in the photonic crystal layer shown in FIG. 1A. [Figure 2A] FIG. 2 is a plan view showing a schematic top surface of a PCSEL element. [Figure 2B]2 is a cross-sectional view that diagrammatically shows a cross section in a plane parallel to an n-side guide layer. FIG. [Figure 2C] FIG. 2 is a plan view showing a schematic view of the bottom surface of a PCSEL element. [Diagram 3] FIG. 2 is a plan view showing a schematic view of a main opening and a sub-opening in a resist, and a hole after etching. [Figure 4] 3 is a schematic diagram showing a cross section perpendicular to the central axis CX of the formed photonic crystal layer. FIG. [Diagram 5] 1 is a graph showing the measurement results of the IV characteristics of Samples 1 to 4 (EX.1 to EX.4) of the PCSEL element of the present embodiment. [Figure 6] 1 is a graph showing the results of measuring the IV characteristics of samples 1 to 5 (CX.1 to CX.5) of a PCSEL device and a surface light emitting device of a comparative example. [Figure 7] 1 is a graph showing a SIMS profile in the depth direction of a PCSEL element. [Figure 8] 1 is a table showing parameters of each semiconductor layer of a PCSEL device. [Figure 9] FIG. 13 is a diagram showing the results of a simulation of the energy band of the conduction band, and the concentrations of electrons and holes when the donor concentration of the buried layer is set to 2.0×10 17 cm −3 . [Figure 10] FIG. 13 is a diagram showing the results of a simulation of the energy band of the conduction band, and the concentrations of electrons and holes when the donor concentration of the buried layer is set to 2.0×10 18 cm −3 . [Figure 11] 11 is a graph showing a simulation result of IV characteristics when the donor concentration of the buried layer is changed. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] In the following, preferred embodiments of the present invention will be described, which may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0011] [First embodiment] 1. Structure of photonic crystal surface-emitting laser element A photonic crystal surface-emitting laser element (PCSEL element) is an element that has a resonator layer in a direction parallel to the semiconductor light-emitting structure layers (n-side guide layer, light-emitting layer, p-side guide layer) that constitute the light-emitting element, and emits coherent light in a direction perpendicular to the resonator layer.

[0012] That is, in a PCSEL element, light waves propagating in a plane parallel to the photonic crystal layer (hole layer) are diffracted by the diffraction effect of the photonic crystal to form a two-dimensional resonance mode, and are also diffracted in a direction perpendicular to the parallel plane. That is, in a PCSEL element, the light extraction direction is perpendicular to the resonance direction (in the plane parallel to the photonic crystal layer).

[0013] Fig. 1A is a cross-sectional view showing an example of the structure of a photonic crystal surface-emitting laser device (PCSEL device) 10 according to an embodiment of the present invention, and Fig. 1B is an enlarged cross-sectional view showing a photonic crystal layer 14P and air hole pairs 14K arranged in the photonic crystal layer 14P in Fig. 1A.

[0014] Fig. 2A is a plan view diagrammatically illustrating the upper surface of the PCSEL device 10. Fig. 2B is a cross-sectional view diagrammatically illustrating the cross section of the photonic crystal layer 14P in a plane parallel to the n-side guide layer 14, and Fig. 2C is a plan view diagrammatically illustrating the lower surface of the PCSEL device 10. 1A, a semiconductor structure layer 11 is formed on a light-transmitting element substrate 12. Note that semiconductor layers are stacked perpendicularly to a central axis CX of the semiconductor structure layer 11.

[0015] The semiconductor structure layer 11 is made of a hexagonal nitride semiconductor. In this embodiment, the semiconductor structure layer 11 is made of, for example, a GaN-based semiconductor.

[0016] More specifically, a semiconductor structure layer 11 consisting of a plurality of semiconductor layers is formed on an element substrate 12, in this order: an n-clad layer (first clad layer of a first conductivity type) 13, an n-side guide layer (first guide layer) 14 which is a guide layer provided on the n-side, a light distribution adjustment layer 23, an active layer (ACT) 15, a p-side guide layer (second guide layer) 16 which is a guide layer provided on the p-side, an electron barrier layer (EBL: Electron Blocking Layer) 17, a p-clad layer (second clad layer of a second conductivity type) 18, and a p-contact layer 19.

[0017] Although the case will be described where the first conductivity type is n-type and the second conductivity type opposite to the first conductivity type is p-type, the first conductivity type and the second conductivity type may be p-type and n-type, respectively.

[0018] The element substrate 12 is a hexagonal GaN single crystal substrate having a high transmittance for light emitted from the active layer 15. More specifically, the element substrate 12 is a hexagonal GaN single crystal substrate whose main surface (crystal growth surface) is a +c plane, which is a {0001} plane in which Ga atoms are arranged on the outermost surface. The back surface (light emission surface) is a -c plane, which is a (000-1) plane in which N atoms are arranged on the outermost surface. The -c plane is suitable as a light emission surface because it is resistant to oxidation and the like.

[0019] Although the element substrate 12 is not limited thereto, a so-called just substrate or, for example, a substrate whose main surface is offset by about 1° in the m-axis direction is preferable. For example, a substrate offset by about 0.3 to 0.7° in the m-axis direction can obtain mirror-finish growth under a wide range of growth conditions.

[0020] The substrate surface (back surface, light emission surface) on which the light emission region 20L (FIG. 2C) facing the main surface is provided is the "-c" surface, which is the (000-1) surface on which N atoms are arranged. The -c surface is resistant to oxidation and the like, making it suitable as a light extraction surface.

[0021] The composition, thickness, and other configurations of each semiconductor layer will be described below, but these are merely examples and can be modified as appropriate.

[0022] The n-clad layer 13 is, for example, n-Al 0.04 Ga 0.96 The N layer has a thickness of 2 μm. The aluminum (Al) composition ratio is set so that the refractive index is smaller than that of the layer adjacent to the active layer 15 side (that is, the n-side guide layer 14).

[0023] The n-side guide layer 14 is composed of a lower guide layer 14A, a photonic crystal layer (PC layer) 14P which is an air-hole layer, and a buried layer 14B. As shown in FIG. 1B, the photonic crystal layer 14P has a layer thickness d PC The buried layer 14B has a thickness d EMB For example, the thickness d PC is 40 to 180 nm.

[0024] In this specification, photonic crystal layer 14P refers to the layer portion from the upper end to the lower end of the holes in n-side guide layer 14 (see FIG. 1B). PC is equal to the height of the hole.

[0025] Lower guide layer 14A is, for example, n-GaN with a layer thickness of 100 to 400 nm. Photonic crystal layer 14P is n-GaN with a layer thickness (or the depth of holes 14K) of 40 to 180 nm.

[0026] The buried layer 14B is made of n-GaN or n-InGaN. Alternatively, it may be a layer in which these semiconductor layers are stacked. The thickness d of the buried layer 14B is EMB The buried layer 14B is composed of a first buried layer 14B1 and a second buried layer 14B2, and has a thickness of, for example, 1×10 18 cm -3 It is doped with a high concentration of n-type dopant (Si). It is sufficient that the second embedded layer 14B2, which is a surface layer of the embedded layer 14B that is in contact with the light distribution adjustment layer 23, is doped with an n-type dopant.

[0027] A light distribution adjustment layer 23 is provided on the second embedded layer 14B2, which is the surface layer of the embedded layer 14B. The light distribution adjustment layer 23 is a hetero semiconductor layer (a heterogeneous semiconductor layer) that has a different crystal composition from the second embedded layer 14B2 and forms a heterostructure with the second embedded layer 14B2.

[0028] That is, a hetero interface is formed between the hetero semiconductor layer (light distribution adjustment layer 23) and the second buried layer 14B2.

[0029] The hetero semiconductor layer (light distribution adjustment layer 23) may be a semiconductor layer of the same conductivity type as the second embedded layer 14B2, or at least one of them may be an i-layer (intrinsic semiconductor layer). Light distribution adjustment layer 23 is provided between embedded layer 14B and active layer 15, and has the function of adjusting the coupling efficiency between the light propagating within photonic crystal layer 14P and photonic crystal layer 14P acting as a resonator.

[0030] In this embodiment, the light distribution adjustment layer 23 is made of undoped In. 0.03 Ga 0.97 N layers, and the layer thickness is, for example, 50 nm. The composition or refractive index and layer thickness of the light distribution adjustment layer 23 are selected according to the adjustment of the coupling efficiency.

[0031] The n-side semiconductor layer including the n-side guide layer 14 and the light distribution adjustment layer 23 is also referred to as a first semiconductor layer.

[0032] The active layer 15, which is a light emitting layer, is, for example, a multiple quantum well (MQW) layer having two quantum well layers. The barrier layer and quantum well layer of the MQW are GaN (layer thickness 6.0 nm) and InGaN (layer thickness 4.0 nm), respectively. The central emission wavelength of the active layer 15 is 440 nm.

[0033] Active layer 15 is preferably disposed within 180 nm (ie, within the period PK of the holes) from photonic crystal layer 14P, in which case a high resonance effect is obtained by photonic crystal layer 14P.

[0034] The p-side guide layer 16 is an undoped In 0.02 Ga 0.98 It is composed of a p-side guide layer (1) 16A which is an N layer (layer thickness 70 nm) and a p-side guide layer (2) 16B which is an undoped GaN layer (layer thickness 180 nm).

[0035] The p-side guide layer 16 is an undoped layer in consideration of light absorption by dopants (Mg: magnesium, etc.), but may be doped to obtain good electrical conductivity. In addition, the In composition and layer thickness of the p-side guide layer (1) 16A can be appropriately selected to adjust the electric field distribution in the oscillation operation mode.

[0036] The electron barrier layer (EBL) 17 is a magnesium (Mg) doped p-type Al 0.2 Ga 0.8 N layers, for example, having a layer thickness of 15 nm.

[0037] The p-cladding layer 18 is made of Mg-doped p-Al 0.06 Ga 0.94 The p-cladding layer 18 is an N layer having a thickness of, for example, 600 nm. The Al composition of the p-cladding layer 18 is preferably selected so that the refractive index is smaller than that of the p-side guide layer 16. The p-cladding layer 18 functions as a first p-cladding layer.

[0038] The p-contact layer 19 is a Mg-doped p-GaN layer having a thickness of, for example, 20 nm. The carrier density of the p-contact layer 19 is set to a concentration that allows ohmic junction with the transparent electrode 29, which is a transparent conductive layer provided on the surface of the p-contact layer 19. Instead of p-type GaN, p-type or undoped InGaN may be used. Alternatively, a layer in which a GaN layer and an InGaN layer are stacked may be used.

[0039] The layer consisting of the p-side guide layer 16, the electron barrier layer 17, the p-cladding layer 18 and the p-contact layer 19 is also referred to as a second semiconductor layer.

[0040] In this specification, "n-side" and "p-side" do not necessarily mean n-type and p-type. For example, the n-side guide layer means a guide layer provided on the n-side of the active layer, and may be an undoped layer (or an i-layer).

[0041] In addition, the n-cladding layer 13 may be composed of multiple layers instead of a single layer, and in that case, all layers do not need to be n layers (n-doped layers) and may include an undoped layer (i layer). The same applies to the guide layer 16 and the p-cladding layer 18.

[0042] Furthermore, it is not necessary to provide all of the semiconductor layers described above, and it is sufficient to have a configuration having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and an active layer (light-emitting layer) sandwiched between these layers.

[0043] On p-contact layer 19, a translucent electrode / Ag / Au layer is formed as p-electrode 20B (second electrode), in which a translucent electrode 29 (not shown), a silver (Ag) layer, and a gold (Au) layer are laminated in this order. That is, p-electrode 20B functions as a light reflecting layer, and the interface between translucent electrode 29 and the Ag layer of p-electrode 20B is a reflecting surface SR. The reflecting surface SR is provided parallel to photonic crystal layer 14P.

[0044] The p-electrode 20B has a circular shape with a diameter RA centered on the central axis CX of the hole formation region 14R. Specifically, the transparent electrode 29 has a diameter of, for example, RA=300 μm in top view (i.e., when viewed from a direction perpendicular to the semiconductor structure layer 11). Note that Pd, Al, Al alloys, etc. may also be used as the p-electrode 20B. A pad electrode, etc. may also be provided on the p-electrode 20B.

[0045] The transparent electrode 29 is formed of a transparent conductor, for example, indium tin oxide (ITO). Note that the transparent electrode 29 is not limited to ITO, and other transparent conductors such as zinc tin oxide (ZTO), GZO (ZnO:Ga), and AZO (ZnO:Al) can be used.

[0046] The side and top surfaces of the semiconductor structure layer 11 and the side surfaces of the p-electrode 20B are covered with an insulating film 21 such as SiO2. The insulating film 21 is formed so as to overlap the p-electrode 20B and cover the edge of the top surface of the p-electrode 20B.

[0047] The insulating film 21 also functions as a protective film, protecting the aluminum (Al)-containing crystal layer that constitutes the PCSEL element 10 from corrosive gases and the like. It also prevents short circuits caused by adhesions or solder creeping up during mounting, contributing to improved reliability and yield. The material for the insulating film 21 is not limited to SiO2, but may be ZrO2, HfO2, TiO2, Al2O3, SiNx, or the like.

[0048] A circular cathode electrode 20A (first electrode) (see FIG. 2C) is formed on the back surface of the element substrate 12. In addition, an anti-reflection (AR) coating layer 27 is formed on the inner side of the cathode electrode 20A.

[0049] The cathode electrode 20A is made of Ti / Au and is in ohmic contact with the element substrate 12. In addition to Ti / Au, the electrode material may be selected from Ti / Al, Ti / Rh, Ti / Al / Pt / Au, Ti / Pt / Au, and the like.

[0050] The light emitted from active layer 15 is diffracted by photonic crystal layer (PC layer) 14P. The light diffracted by photonic crystal layer 14P (diffraction surface WS) and directly emitted from photonic crystal layer 14P (direct diffracted light Ld: first diffracted light) and the light emitted by diffraction of photonic crystal layer 14P and reflected by reflection surface SR (reflected diffracted light Lr: second diffracted light) are emitted to the outside from light emission region 20L ( FIG. 2C ) of rear surface (emission surface) 12R of element substrate 12.

[0051] As shown in FIG. 2B, in photonic crystal layer 14P, holes 14K are provided, for example, in a rectangular hole formation region 14R, and are periodically arranged.

[0052] As shown in FIG. 2C, the anode region RA is formed so as to be contained within the hole-forming region 14R.

[0053] Cathode electrode 20A is provided as a ring-shaped electrode on the outside of p-electrode 20B so as not to overlap p-electrode 20B when viewed from a direction perpendicular to photonic crystal layer 14P.

[0054] The region inside the cathode electrode 20A is the light emission region 20L. Also provided is a bonding pad 20C that is electrically connected to the cathode electrode 20 and for connecting a wire for power supply from the outside.

[0055] 2. Photonic crystal layer fabrication method and recrystallization growth The manufacturing process and recrystallization growth of the photonic crystal layer are described below. Metalorganic Vapor Phase Epitaxy (MOVPE) was used as the crystal growth method. Note that the method of forming the photonic crystal layer 14P will be described below using the case where the photonic crystal layer 14P is a double lattice photonic crystal layer as an example, but a single lattice photonic crystal layer and a multiple lattice photonic crystal layer can also be formed in the same manner.

[0056] (a) Hole formation First, an n-type Al layer having an Al composition of 4% was formed on a substrate 12 as an n-clad layer 13. 0.04 Ga 0.96 An N layer was grown. Then, an n-type GaN layer was grown on n-cladding layer 13. This grown layer was a preparatory layer for forming lower guide layer 14A and photonic crystal layer 14P.

[0057] After forming the above-mentioned preparation layer, the substrate was removed from the chamber of the MOVPE apparatus, and fine recesses (holes) were formed on the surface of the growth layer. After obtaining a clean surface by washing, a silicon nitride film (SiN x A resist for electron beam lithography was applied on top of this, and the device was placed in an electron beam lithography system to pattern a two-dimensional periodic structure.

[0058] 3 is a plan view showing the main opening K1 and sub-opening K2 of the resist, and the holes 14H1 and 14H2 after etching. As shown in FIG. 3, a pair of openings, each consisting of an oval main opening K1 and a sub-opening K2 smaller than the main opening K1, was patterned in such a way that they were two-dimensionally arranged in the plane of the resist in a square lattice shape with a period PK. For clarity of the drawing, the openings are shown with hatching.

[0059] More specifically, the main apertures K1 are arranged two-dimensionally with their centers of gravity CD1 in two mutually orthogonal directions (x-direction and y-direction) on the lattice points of a square lattice with a period PK, and the sub-apertures K2 are arranged two-dimensionally with their centers of gravity CD2 in the x-direction and y-direction on the lattice points of a square lattice with a period PK.

[0060] The major axes of the main aperture K1 and the sub aperture K2 are parallel to the <11-20> direction of the crystal orientation, and the minor axes of the main aperture K1 and the sub aperture K2 are parallel to the <1-100> direction.

[0061] The center of gravity CD2 of the sub-opening K2 is spaced apart from the center of gravity CD1 of the main opening K1 by Δx and Δy. Here, Δx=Δy. That is, the center of gravity CD2 of the sub-opening K2 is spaced apart from the center of gravity CD1 of the main opening K1 in the <1-100> direction.

[0062] The distance Δx, Δy between the centers of gravity of the main opening K1 and the sub-opening K2 was set to Δx=Δy=0.46PK. After developing the patterned resist, a SiN x The film was selectively dry etched. As a result, main openings K1 and sub-openings K2 arranged two-dimensionally on the lattice points of a square lattice with a period PK were formed in the SiN x formed to penetrate the membrane.

[0063] The period (hole spacing) PK was set to PK=177.5 nm in order to set the oscillation wavelength (λ) to 438 nm.

[0064] Next, the resist is removed and the patterned SiN x Using the film as a hard mask, recesses (holes) were formed in the GaN surface. The GaN was dry-etched in the depth direction using a chlorine-based gas and argon gas in an ICP-RIE apparatus to form an oval cylindrical main hole 14H1 and a sub-hole 14H2 that were dug vertically into the GaN surface.

[0065] In addition, the recesses (holes) dug in the GaN surface portion by the above etching are simply referred to as main holes and sub-holes in order to distinguish them from air holes in photonic crystal layer 14P. When main holes 14H1 and sub-holes 14H2 are not particularly distinguished from each other, they may be collectively referred to as holes 14H. The shape of the hole 14H is not limited to an elongated cylindrical shape, but may be a cylindrical shape, a polygonal shape, or the like.

[0066] (b) Formation of buried layer (recrystallization growth) After cleaning the substrate in which the hole 14H was formed, it was again introduced into the reactor of the MOVPE apparatus and regrowth was performed. Specifically, ammonia (NH3) and trimethylgallium (TMG) were supplied to form the first buried layer 14B1 and close the opening of the hole 14H.

[0067] At the same time, silane (SiH4) is supplied as an n-type dopant to the first buried layer 14B1 at a concentration of 1×10 18 cm -3 The n-type dopant may be Ge instead of Si, and disilane (Si2H6) or germanium (GeH4) may be used as the supply source of the n-type dopant.

[0068] That is, the first embedded layer 14B1 was formed at a first temperature (920° C.) at which the shape of the hole 14H was transformed by mass transport into a shape formed of thermally stable surfaces.

[0069] In this first temperature region, N atoms are attached to the top surface of the growth substrate, so that N-polar faces are selectively grown. Therefore, {1-101} facets are selectively grown on the surface. When the opposing {1-101} facets collide with each other, the holes 14H are blocked and filled. This forms the first buried layer 14B1.

[0070] Next, after blocking the main hole 14H1 and the sub-hole 14H2, a second buried layer 14B2 having a thickness of 50 nm was grown. The second buried layer 14B2 was grown by raising the substrate temperature (growth temperature) to 1050°C (second buried temperature) and then supplying trimethylgallium (TMG), NH3, and silane (SiH4). The second buried temperature was higher than the first buried temperature. However, the temperature relationship between the second buried temperature and the first buried temperature may be reversed as long as the second buried layer 14B2 can be grown so that its growth surface becomes the (0001) plane. In addition, a 1×10 18 cm -3 The Si was doped at a concentration of 1000 nm.

[0071] Moreover, second embedded layer 14B2 in this embodiment also functions as a light distribution adjusting layer for adjusting the coupling efficiency (light field) between light and photonic crystal layer 14P.

[0072] That is, the first buried layer 14B1 and the second buried layer 14B2 in this embodiment are GaN layers doped with Si. However, the first buried layer 14B1 and the second buried layer 14B2 are not limited to GaN, and may be n-GaN, n-InGaN, or a layer in which these semiconductor layers are stacked.

[0073] The above embedding process results in a photonic crystal layer 14P having a double lattice structure in which air hole pairs 14K, each consisting of a main air hole 14K1 and a sub-hole 14K2, are two-dimensionally arranged at each of the square lattice points. Here, the sub-hole 14K2 has a smaller air hole diameter and height than the main air hole 14K1.

[0074] In addition, when the main hole 14K1 and the sub-hole 14K2 are not particularly distinguished from each other, they may be collectively referred to as the hole 14K.

[0075] 4 is a schematic diagram showing a cross section perpendicular to the central axis CX of the formed photonic crystal layer 14P. When holes are embedded in the group III nitride, the shape of the holes 14H is deformed by mass transport into a shape composed of thermally stable surfaces, and voids 14K are formed.

[0076] That is, in the +c-plane substrate, the inner side surface of the hole 14H changes shape to a (1-100) plane (i.e., an m-plane), that is, changes shape from an oval cylindrical shape to an oval hexagonal prism-shaped hole 14K whose side surface is formed of an m-plane.

[0077] The formed primary void 14K1 had a long hexagonal prism shape with a long diameter of 72.5 nm, a short diameter of 43.5 nm, and a long diameter / short diameter ratio of 1.67. The secondary void 14K2 had a long diameter of 44.6 nm, a short diameter of 38.3 nm, and a long diameter / short diameter ratio of 1.16, and had a long hexagonal prism shape closer to a regular hexagonal prism than the primary void 14K1.

[0078] It was also confirmed that the distances Δx and Δy between the centers of gravity of the main hole 14K1 and the subhole 14K2 were 81.6 nm (Δx=Δy=0.46PK) and had not changed since before filling. It was also confirmed that the major axes of the main hole 14K1 and the subhole 14K2 were parallel to the <11-20> axis (i.e., the a-axis).

[0079] Furthermore, the hole filling factors FF1 and FF2 of the main holes 14K1 and the sub-holes 14K2 were calculated to be FF1 = 8.8% and FF2 = 4.2%. Here, the hole filling factor is the ratio of the area occupied by each hole per unit area in a two-dimensional regular array. Specifically, when the areas of the main holes 14K1 and the sub-holes 14K2 in the photonic crystal layer 14P are S1 and S2, respectively, the hole filling factors FF1 and FF2 of the main holes 14K1 and the sub-holes 14K2 are given by the following equations.

[0080] FF1=S1 / PK 2 , FF2=S2 / PK 2 Through the above steps, the formation of the n-side guide layer 14 including the photonic crystal layer 14P, which is a hole layer, is completed.

[0081] (c) Growth of the light distribution control layer, the active layer, and the p-semiconductor layer Following the growth of the burying layer 14B, the supply of the MO raw material was switched to sequentially grow the light distribution-adjusting layer 23.

[0082] In this embodiment, the light distribution adjustment layer 23 is made of a semiconductor having a different crystal composition from that of the buried layer 14B. 0.03 Ga 0.97 It is an N-layer, and is a hetero semiconductor layer (different semiconductor layer) that forms a hetero structure with the buried layer 14B (GaN layer). The semiconductor layer that constitutes the buried layer 14B has a smaller lattice constant in the a-axis direction than the semiconductor layer that constitutes the light distribution adjustment layer 23. That is, the lower guide layer 14A, the photonic crystal layer 14P, and the buried layer 14B that constitute the guide layer 14 are configured with the same lattice constant. However, the light distribution adjustment layer 23 is epitaxially grown from the n-side guide layer 14. Therefore, the a-axis is compressed and the c-axis is expanded, and the polarization becomes large. Therefore, a band barrier (BB) is generated as shown in FIG. 9 described later. This band barrier (BB) does not occur in a semiconductor growth process with a small lattice constant difference, such as when AlGaN is grown on GaN.

[0083] Next, the active layer 15, the p-side guide layer (second guide layer) 16, the electron barrier layer (EBL) 17, the p-cladding layer 18, and the p-contact layer 19 were sequentially grown on the light distribution adjustment layer 23. In this manner, the PCSEL device 10 was fabricated.

[0084] 3. Characteristics of PCSEL elements (a) Characteristics of the PCSEL device according to this embodiment A number of samples of the PCSEL device 10 were fabricated and their current-voltage characteristics (IV characteristics) were evaluated. Fig. 5 is a graph showing the measurement results of the IV characteristics of Samples 1 to 4 (EX.1 to EX.4).

[0085] Here, Samples 1 to 3 (EX.1 to EX.3) of the embodiment are PCSEL devices 10 having the structure described above. Sample 4 (EX.4) is a reference sample that serves as a reference standard for evaluating the characteristics of Samples 1 to 3. Specifically, Sample 4 (EX.4) is a surface-emitting device that differs from PCSEL device 10 in that it does not have photonic crystal layer 14P, but otherwise has the same structure as PCSEL device 10.

[0086] More specifically, the surface-emitting device of Reference Sample 4 (EX.4) was fabricated as follows: First, an n-clad layer 13 was grown on a substrate 12, and then an n-type GaN layer was grown on the n-clad layer 13. Next, the substrate was once removed from the reactor of the MOVPE apparatus, and after cleaning, it was again introduced into the reactor of the MOVPE apparatus for regrowth.

[0087] As shown in FIG. 5, it was confirmed that each of the PCSEL elements (EX.1 to EX.3) of this embodiment exhibited approximately the same threshold value and efficiency, and had good IV characteristics.

[0088] It was also confirmed that each of the PCSEL elements of Samples 1 to 3 (EX.1 to EX.3) had excellent IV characteristics that were comparable to those of the surface-emitting element of Reference Sample 4 (EX.4), which did not have the photonic crystal layer 14P (PC layer).

[0089] (b) Characteristics of the PCSEL element of the comparative example A number of PCSEL elements and surface-emitting devices were fabricated as comparative examples to the PCSEL element 10 of this embodiment, and their current-voltage characteristics (IV characteristics) were evaluated. Fig. 6 is a graph showing the measurement results of the IV characteristics of Samples 1 to 5 (CX.1 to CX.5).

[0090] Specifically, in the surface-emitting devices of Samples 1 to 5 (CX.1 to CX.5) of the comparative examples, the burying layer 14B (first burying layer 14B1 and second burying layer 14B2) is an undoped layer that is not doped with a dopant, and in this respect, they differ from the PCSEL devices 10 of Samples 1 to 4 (EX.1 to EX.4) of the embodiment.

[0091] More specifically, the PCSEL devices of Comparative Examples 1 to 3 (CX.1 to CX.3) differ from the PCSEL devices 10 of Samples 1 to 3 (EX.1 to EX.3) of the embodiment only in that the buried layer 14B is an undoped layer.

[0092] The surface-emitting device of Comparative Example Sample 4 (CX.4) differs from the PCSEL devices of Comparative Examples Samples 1 to 3 (CX.1 to CX.3) in that it does not have photonic crystal layer 14P, but is the same as the surface-emitting device of Example Reference Sample 4 (EX.4) in that it has been regrown.

[0093] The surface light emitting device of comparative sample 5 (CX.5) does not have a photonic crystal layer 14P, and is an element in which an n-type GaN layer is grown on n-cladding layer 13, and then undoped GaN is continuously grown on the n-type GaN layer. In other words, the element is an element in which an n-type GaN layer and an undoped GaN layer are continuously grown on n-cladding layer 13 in a crystal growth apparatus (MOCVD apparatus) without performing a process for forming recesses (holes). The rest of the surface light emitting device has the same structure as PCSEL device 10. The only difference between comparative sample 4 and sample 5 is the manufacturing method in which the substrate is removed from the MOVPE apparatus midway through growth and re-grown, or the substrate is continuously grown without being removed from the MOVPE apparatus, and the laminated structure is the same for both surface light emitting devices.

[0094] As shown in FIG. 6, the PCSEL elements of comparative samples 1 to 3 (CX.1 to CX.3) and the surface-emitting device of sample 4 (CX.4) have increased driving voltages and extremely large differential resistances compared to the surface-emitting device of sample 5 (CX.5) which does not have a photonic crystal layer 14P and is formed by continuous growth.

[0095] (c) Cause of increase in driving voltage in the PCSEL element of the comparative example 7 shows the results of SIMS (secondary ion mass spectrometry) measurements (SIMS profile) in the depth direction of a PCSEL device formed by regrowth. For clarity of the figure, each semiconductor layer is indicated by its reference number. For example, "14B" indicates buried layer 14B, and "23" indicates light distribution adjustment layer (hetero semiconductor layer) 23.

[0096] 7, since the buried layer 14B is close to the regrowth interface, unintended elements such as Mg are incorporated due to the memory effect during MOCVD growth, resulting in a low donor concentration. This phenomenon occurs regardless of the presence or absence of vacancies.

[0097] In addition, when filling vacancies, the vacancies are blocked by selectively growing the {1-101} facet, and the vacancies are filled in the GaN layer. In this case, more impurities present in the atmosphere are taken in than in the (0001) face growth, so the donors are compensated, and the driving voltage is thought to increase.

[0098] (d) Improvement of the characteristics of the PCSEL device according to this embodiment As described above, in the PCSEL device 10 of this embodiment, the buried layer 14B (that is, the first buried layer 14B1 and the second buried layer 14B2) are doped with an n-type dopant.

[0099] The IV characteristics when the donor concentration of the buried layer 14B is changed are simulated using the device simulator Atlas.

[0100] Figure 8 is a table showing the parameters of each semiconductor layer of the PCSEL device used in the simulation. "x.comp" in the layer configuration (layer config.) represents the composition x (In x Ga 1-x N,Al x Ga 1-x"Thickness (nm)" indicates the layer thickness. "Doping profiles" shows the conductivity type and doping concentration (Conc (cm -3 In addition, in III-nitride semiconductors, the undoped layer exhibits slight n-type conductivity, so the conductivity type is indicated as n-type, and the doping concentration is 5.0×10 16 cm -3 It was decided.

[0101] In this simulation, the n concentration of the buried layer 14B is set to 1.0×10 17 ~2.0×10 18 cm -3 The calculations were carried out by changing the range.

[0102] 9 and 10 show the donor concentration (Nd) of the buried layer 14B of 2.0×10 17 cm -3 , 2.0×10 18 cm -3 FIG. 13 is a diagram showing a simulation result of the energy band of the conduction band and the concentrations of electrons and holes when

[0103] As shown in Figure 9, when the donor concentration (Nd) is 2.0 × 10 17 cm -3 At this time, it can be seen that the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 (InGaN) and the buried layer 14B (GaN) is depleted due to piezoelectric polarization, and a band barrier (BB, shown surrounded by a dashed line) against electrons injected from the buried layer 14B is formed.

[0104] When the band barrier (BB) is high, current does not flow unless a voltage is applied until the barrier height at the interface becomes low, and if the donor concentration in the buried layer 14B is too low, the drive voltage increases.

[0105] As shown in Figure 10, the donor concentration (Nd) was set to 2.0 × 10 18 cm -3It can be seen that when the donor concentration (Nd) is increased to 2.0×10, the band barrier at the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 and the buried layer 14B is lowered (see FIG. 9). 18 cm -3 If this is the case or more, it is clear that the band barrier is significantly improved.

[0106] In PCSEL devices, impurities (Mg, C, etc.) easily enter during buried growth (regrowth), compensating for donors. Also, unintended acceptors are introduced due to the introduction of defects during facet growth. Therefore, in PCSEL devices, the band barrier at the interface between the hetero semiconductor layer and the buried layer, which is caused by the compensation effect, is considered to significantly impair the device characteristics.

[0107] 11 is a graph showing the results of a simulation of the IV characteristics when the donor concentration (Nd) of the buried layer 14B is changed. As a result, the IV characteristics become better as the donor concentration (Nd) increases. 18 cm -3 It was found that the characteristics could be significantly improved by increasing the donor concentration to 2.0×10 18 cm -3 It was found that the characteristic improvement saturates at this point. Note that in the figure, the arrow indicates the direction of increase in donor concentration Nd.

[0108] On the other hand, in the simulation of the IV characteristics, the n concentration of the buried layer 14B is 1.0×10 17 cm -3 Below, the calculated values ​​diverged. That is, it was found that the barrier at the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 (InGaN) and the buried layer 14B (GaN) was high and no current flowed.

[0109] That is, the doping concentration of the buried layer 14B is 2.0×10 17 cm -3 It is preferable that the thickness is 5.0×10 or more, and the autodoping of the memory effect in the regrowth (5.0×10 16 cm -3Considering donor uptake, the ratio is 1.5 × 10 17 cm -3 More preferably, the above is 1.0×10 18 cm -3 More preferably, it is 2.0×10 18 cm -3 More preferably, it is equal to or greater than this.

[0110] In addition, the Si dopant that is commonly used is 1.0×10 20 cm -3 If the doping is performed to about 1.0×10, polarity inversion occurs and the surface morphology deteriorates. Therefore, the doping concentration of the buried layer 14B is set to 1.0×10 20 cm -3 It is preferable that:

[0111] In addition, taking into consideration the effect of the surface roughness of the growth surface of the buried layer 14B on the regrown layer, the doping concentration of the buried layer 14B is set to 2.0×10 19 cm -3 It is even more preferable that: As described above in detail, according to the present invention, it is possible to provide a photonic crystal surface emitting laser element that has high injection efficiency and emits light with a low threshold and high efficiency.

[0112] Unless otherwise specified, the numerical values ​​and the like in the above-described embodiments are merely examples and may be modified as appropriate. In addition, although a double lattice structure PCSEL element has been illustrated, the present invention can be applied to a single lattice structure PCSEL element and generally to a multiple lattice structure PCSEL element.

[0113] Furthermore, although the present invention has been exemplified with respect to a photonic crystal layer in which the holes have a hexagonal columnar shape, the present invention can also be applied to photonic crystal layers in which the holes have an irregular columnar shape, such as a cylindrical, rectangular, polygonal, or teardrop shape. [Explanation of symbols]

[0114] 10: PCSEL element 12: Element substrate 13: First cladding layer 14: First guide layer 14A: Lower guide layer 14B: Buried layer 14B1: First buried layer 14B2: second buried layer 14K: Hole / hole pair 14K1 / 14K2: Main / secondary hole 14P: Photonic crystal layer (hole layer) 15:Active layer 16: Second guide layer 17: Electron barrier layer 18: Second cladding layer 19: Contact layer 23: Light distribution adjustment layer (hetero semiconductor layer)

Claims

1. A photonic crystal laser element made of a group III nitride semiconductor, Lower guide layer, A first guide layer comprising: a photonic crystal layer formed on the lower guide layer and having vacancies arranged two-dimensionally at each lattice point; and an embedding layer formed on the photonic crystal layer and closing the vacancies; A heterosemiconductor layer formed on the aforementioned embedded layer and consisting of a semiconductor with a different crystal composition from the aforementioned embedded layer, An active layer formed on the heterosemiconductor layer, It comprises a second guide layer formed on the active layer, The aforementioned embedded layer contains 1.0 × 10 units of n-type dopant. １７ ~1.0 x 10 ２０ cm －３ A photonic crystal surface-emitting laser element doped with [specific concentration].

2. The doping concentration of the aforementioned embedding layer is 1.0 × 10⁻⁶ １８ ~1.0 x 10 ２０ cm －３ A photonic crystal surface-emitting laser element according to claim 1, within the range of [specify range].

3. The doping concentration of the embedded layer is 2.0×10 １８ ~2.0×10 １９ cm －３ The photonic crystal surface emitting laser device according to claim 1, wherein the doping concentration is within the range of

4. The photonic crystal surface-emitting laser element according to claim 1, wherein the embedded layer comprises an undoped first embedded layer and a second embedded layer formed on the first embedded layer and doped with an n-type dopant.

5. The photonic crystal surface-emitting laser element according to claim 1, wherein the heterosemiconductor layer is an undoped layer.

6. The photonic crystal surface-emitting laser element according to any one of claims 1 to 5, wherein the embedded layer is made of GaN and the heterosemiconductor layer is made of InGaN.

7. A step of forming a cladding layer on the c-plane of a group III nitride semiconductor, The process of forming a guide layer on the cladding layer, The steps include forming an etching mask on the guide layer, having an opening at each of the square grid points, A step of etching the guide layer using the etching mask to form a hole, A step of performing crystal growth including mass transport to form a photonic crystal layer in which a first embedding layer that closes the opening of the hole and a second embedding layer formed on the first embedding layer, The process includes forming a semiconductor layer including an active layer on the aforementioned photonic crystal layer, The second temperature for forming the second embedded layer is higher than the first temperature for forming the first embedded layer. The second embedding layer is a method for manufacturing a photonic crystal surface-emitting laser element in which an n-type dopant is doped at a concentration of 1.0 × 10¹⁷ to 1.0 × 10²⁰ cm⁻³.

8. The method for manufacturing a photonic crystal surface-emitting laser element according to claim 7, wherein the first embedded layer is an undoped layer.

9. A method for manufacturing a photonic crystal surface emitting laser element according to claim 7 or 8, further comprising the step of forming a heterosemiconductor layer on the second embedded layer, the heterosemiconductor layer being made of a semiconductor having a different crystal composition from the second embedded layer.

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