Light emission device

Abstract

To efficiently use a space which exists in an area where no pixel electrode is formed.SOLUTION: A light emission device comprises: a semiconductor layer; a first insulation layer on the semiconductor layer; a gate electrode and a first conductive layer on the first insulation layer; a second insulation layer on the gate electrode and the first conductive layer; a source electrode, a drain electrode and a second conductive layer on the second insulation layer; a third insulation layer on the source electrode, the drain electrode and the second conductive layer; a first electrode and a third conductive layer on the third insulation layer; a flattening film for covering an end of the first electrode; an electroluminescence layer on the first electrode; and a second electrode on the electroluminescence layer and the flattening film. The second electrode is electrically connected to the third conductive layer through an opening provided on the flattening film, and the opening is overlapped to the first conductive layer, the second conductive layer, and the third conductive layer.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The technical fields are light-emitting devices, display devices (EL display devices, liquid crystal display devices, etc.), semiconductor devices, etc. Regarding. [Background technology]

[0002] In Patent Document 1, a pixel electrode is disposed on the wiring used in the pixel circuit via an insulating layer. A light emitting device is disclosed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2003-257657 A Summary of the Invention [Problem to be solved by the invention]

[0004] When the structure described in Patent Document 1 is adopted, the only conductive layer in contact with the insulating layer is the pixel electrode. Therefore, there is a space in which a conductive layer can be disposed in the area where the pixel electrode is not formed. become.

[0005] Therefore, the first step is to effectively utilize the space in the area where no pixel electrode is formed. This will be task number 1.

[0006] A second object of the present invention is to reduce the parasitic capacitance formed at the intersections of wirings.

[0007] The invention disclosed below can be realized if it can solve either the first or second problem. good. [Means for solving the problem]

[0008] In the area where the pixel electrode is not formed, an auxiliary wiring (auxiliary electrode), one transistor and another The first problem is solved by forming connection wiring and capacitance electrodes that connect to transistors. can be solved.

[0009] On the other hand, when the first wiring and the second wiring cross each other, the first wiring has a first opening. and a second opening is provided in the second wiring.

[0010] The first opening and the second opening are disposed at an intersection of the first wiring and the second wiring; Furthermore, by making the first opening not overlap the second opening in part or in whole, , the second problem can be solved.

[0011] For example, a semiconductor layer, a first insulating layer on the semiconductor layer, and a gate electrode on the first insulating layer. an electrode and a first conductive layer, and a second insulating layer on the gate electrode and on the first conductive layer; a source electrode, a drain electrode, and a second conductive layer on the second insulating layer; and a third insulating layer on the first conductive layer, on the drain electrode, and on the second conductive layer; a first electrode and a third conductive layer on the first substrate, a planarization film covering an end of the first electrode, and a second conductive layer on the first substrate. an electroluminescent layer on the electrode; a second electrode on the planarization film, the second electrode being disposed through an opening in the planarization film. the opening is electrically connected to the third conductive layer through the first conductive portion, a light-emitting device comprising: a first conductive layer, a second conductive layer, and a third conductive layer; It is possible.

[0012] For example, a gate electrode and a first conductive layer, and a gate electrode and a first conductive layer A first insulating layer, a semiconductor layer on the first insulating layer, and a second conductive layer on the semiconductor layer. A source electrode and a drain electrode, and a second electrode on the source electrode, the drain electrode, and the second a second insulating layer on the conductive layer, a first electrode and a third conductive layer on the second insulating layer, a planarization film covering an edge of the first electrode; and an electroluminescence layer on the first electrode. and a second electrode on the electroluminescent layer and on the planarization film, The second electrode is electrically connected to the third conductive layer through an opening provided in the planarization film. The opening is connected to the first conductive layer, the second conductive layer, and the third conductive layer. It is possible to provide a light-emitting device characterized in that the conductive layer overlaps the light-emitting layer.

[0013] In the light emitting device, one of the first conductive layer and the second conductive layer is a dummy electrode. and the other of the first conductive layer or the second conductive layer is preferably a wiring.

[0014] In the light-emitting device, one of the first conductive layer and the second conductive layer is a first dummy conductive layer. the other of the first conductive layer or the second conductive layer is a second dummy electrode. It is preferable to do so.

[0015] In the light emitting device, one of the first conductive layer and the second conductive layer is a first wiring the other of the first conductive layer and the second conductive layer is a second wiring, It is preferable that the portion is provided at an intersection of the first wiring and the second wiring.

[0016] In the light emitting device, the first conductive layer is provided with a first opening, The first opening is preferably provided inside the above opening.

[0017] In the light emitting device, the second conductive layer is provided with a second opening, The second opening is preferably provided inside the aforementioned opening.

[0018] In the light emitting device, the first conductive layer is provided with a first opening, The second conductive layer has a second opening, and the first opening and the second opening is preferably provided inside the opening.

[0019] In the light emitting device, the first conductive layer is the same layer as the gate electrode, and the second conductive layer is The conductive layer is the same layer as the source electrode and the drain electrode, and the third conductive layer is It is preferable that it is in the same layer as the first electrode.

[0020] For example, a pixel electrode may include first and second transistors, first to third wirings, and a pixel electrode. The first and second transistors are inverted staggered transistors, One of the source and the drain of the first transistor is electrically connected to the first wiring. The gate of the first transistor is electrically connected to the second wiring. The third wiring is electrically connected to one of the source and drain of the second transistor. The pixel electrode is connected to the source or drain of the second transistor. The other of the source and drain of the first transistor is electrically connected to the other of the source and drain of the first transistor. The gate of the second transistor is electrically connected to the pixel electrode via a connection wiring in the same layer as the pixel electrode. It is possible to provide a display device characterized in that the display device is connected to the

[0021] In the display device, a capacitance element is provided, and the gate electrode of the second transistor is The third wiring is also used as one electrode of the capacitance element, and the third wiring is also used as the other electrode of the capacitance element. It is preferable that the electrode is used in combination with the electrode.

[0022] In the display device, a conductive layer is provided in the same layer as the pixel electrode, and the conductive layer is The conductive layer is electrically connected to the gate electrode of the second transistor. It is preferable if this is done.

[0023] In the display device, the conductive layer is provided on the inside of an opening provided in the third wiring. In this case, it is preferable that the first transistor is electrically connected to the gate electrode of the second transistor.

[0024] For example, a semiconductor device having a transistor and first and second wirings, the first wiring being The second wiring is electrically connected to one of the source and drain of the transistor, The first wiring is electrically connected to the gate of the transistor, and the first wiring passes through the first opening. the second wiring has a second opening, and the first and second openings are The first wiring is provided at an intersection of the first wiring and the second wiring, and the first wiring is provided at the intersection. The semiconductor device is characterized in that the opening has a region that does not overlap with the second opening. It is possible.

[0025] For example, a transistor, first to third wirings, and a capacitor element are included, and the first wiring is , electrically connected to one of the source and drain of the transistor, The wiring is electrically connected to the gate of the transistor, and the third wiring is The capacitor is electrically connected to one electrode of the capacitor element, and the source or drain of the transistor is The other electrode of the capacitor is electrically connected to the other electrode of the first wiring. the third wiring has a third opening, and the first and third wirings The opening is provided at an intersection of the first wiring and the third wiring, The first opening has an area that does not overlap with the third opening. A semiconductor device can be provided.

[0026] For example, a transistor, first to third wirings, and a capacitor element are included, and the first wiring is , electrically connected to one of the source and drain of the transistor, The wiring is electrically connected to the gate of the transistor, and the third wiring is The capacitor is electrically connected to one electrode of the capacitor element, and the source or drain of the transistor is The other electrode of the capacitor is electrically connected to the other electrode of the first wiring. The first wiring has a first opening, the second wiring has a second opening, and the third wiring has a third opening. the first wiring has a fourth opening, and the first and second openings , provided at a first intersection of the first wiring and the second wiring, The fourth opening is provided at a second intersection of the first wiring and the third wiring, At the first intersection, the first opening has an area that does not overlap with the second opening. At the second intersection, the third opening has an area that does not overlap with the fourth opening. It is possible to provide a semiconductor device having the above-mentioned features.

[0027] In this specification, a dummy electrode (an electrically isolated electrode, a floating electrode) "Floating" refers to an electrode that is in an electrically floating state (floating state) to which no current or voltage is supplied. Taste.

[0028] In this specification, a dummy semiconductor layer (an electrically isolated semiconductor layer, a floating semiconductor layer) is also referred to as a dummy semiconductor layer. A floating semiconductor layer is a layer in which no current or voltage is supplied and which is in an electrically floating state. ) semiconductor layer.

[0029] In addition, in this specification, "A and B are the same layer" means "A and B are formed in the same process" or means that "A and B are formed from the same material."

[0030] For example, "A and B were formed in the same process" or "A and B were formed from the same material." means that a specific film (starting film) was patterned to form A and B.

[0031] The patterning process is carried out, for example, by forming a mask on a predetermined film (starting film) and then using the mask. In this case, the masking process means processing a predetermined film (starting film) into a predetermined shape and removing the mask.

[0032] Therefore, "A and B were formed in the same process" or "A and B were formed from the same material." The concept of "A and B were formed using the same starting film" includes the concept of "A and B were formed using the same starting film."

[0033] As another example, A and B can be printed by a printing method (inkjet printing, letterpress printing, etc.). In the case of forming, "A and B are formed in the same process" or "A and B are formed with the same material" "Printed" means that printing was performed so that both A and B were patterned. Effect of the Invention

[0034] By solving the first problem, the space existing in the area where the pixel electrode is not formed can be reduced. This allows for effective use of the available space.

[0035] By solving the second problem, the parasitic capacitance formed at the intersection of wirings is reduced. It is possible. [Brief description of the drawings]

[0036] [Figure 1] An example of a light emitting device. [Diagram 2] An example of a light emitting device. [Diagram 3] An example of a light emitting device. [Figure 4] An example of a light emitting device. [Diagram 5] An example of a light emitting device. [Figure 6] An example of a light emitting device. [Figure 7] An example of a light emitting device. [Figure 8] An example of a light emitting device. [Figure 9] An example of a light emitting device. [Figure 10] An example of a light emitting device. [Figure 11] An example of a light emitting device. [Figure 12] An example of a light emitting device. [Figure 13] An example of a light emitting device. [Figure 14] An example of a light emitting device. [Figure 15] An example of a light emitting device. [Figure 16] An example of a light emitting device. [Figure 17] An example of a light emitting device. [Figure 18] An example of a light emitting device. [Figure 19] An example of a light emitting device. [Figure 20] An example of a light emitting device. [Figure 21] An example of a light emitting device. [Figure 22] An example of a light emitting device. [Figure 23] An example of a light emitting device. [Figure 24] An example of a light emitting device. [Diagram 25] An example of a light emitting device. [Figure 26] An example of a light emitting device. [Figure 27] An example of a light emitting device. [Figure 28] An example of a light emitting device. [Figure 29] An example of a light emitting device. [Diagram 30] An example of a light emitting device. [Diagram 31] 1 is an example of a semiconductor device. [Diagram 32] 1 is an example of a semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0037] The embodiments will be described in detail with reference to the drawings.

[0038] However, the form and details of the invention may be modified in various ways without departing from the spirit of the invention. This will be readily understood by those skilled in the art.

[0039] Therefore, the scope of the invention should not be construed as being limited to the description of the following embodiments. do not have.

[0040] In the configurations described below, the same parts or parts having similar functions are referred to as the same parts. Reference numerals are used commonly among different drawings, and repeated explanations will be omitted.

[0041] In addition, the following embodiments can be implemented in combination in part or in whole as appropriate.

[0042] (Embodiment 1) FIG. 1 shows an example of a light emitting device.

[0043] A semiconductor layer 1110 is formed on a substrate 1050 having an insulating surface.

[0044] An insulating layer 1111 is formed on a semiconductor layer 1110 .

[0045] The semiconductor layer 1110 has at least a channel forming region, a source region, and a drain region. do.

[0046] The insulating layer 1111 corresponds to the gate insulating film of the transistor 1100 .

[0047] A conductive layer 1112 is formed on the insulating layer 1111 .

[0048] The conductive layer 1112 corresponds to the gate electrode of the transistor 1100 and serves as a channel forming region. They are formed at overlapping positions.

[0049] An insulating layer 1113 is formed over the conductive layer 1112 .

[0050] The insulating layer 1113 corresponds to an interlayer insulating film.

[0051] A conductive layer 1114 and a conductive layer 1115 are formed over the insulating layer 1113 .

[0052] The conductive layer 1114 corresponds to one of the source electrode and the drain electrode of the transistor 1100. do.

[0053] The conductive layer 1114 is formed by contacting the insulating layer 1111 and the insulating layer 1113. The semiconductor layer is electrically connected to either the source region or the drain region through a through hole. do.

[0054] The conductive layer 1115 corresponds to the other of the source electrode and the drain electrode of the transistor 1100. do.

[0055] The conductive layer 1115 is formed by contacting the insulating layer 1111 and the insulating layer 1113. The semiconductor layer is electrically connected to the other of the source region and the drain region through a through hole. do.

[0056] An insulating layer 1120 is formed over the conductive layer 1114 and the conductive layer 1115 .

[0057] The insulating layer 1120 corresponds to an interlayer insulating film.

[0058] Over the insulating layer 1120, a conductive layer 1211 and a conductive layer 1212 are formed.

[0059] The conductive layer 1211 corresponds to a first electrode (pixel electrode, lower electrode) of the light-emitting element.

[0060] The conductive layer 1211 is connected to the conductive layer 11 through a contact hole formed in the insulating layer 1120. 15.

[0061] The conductive layer 1212 is a conductive layer 1 corresponding to the second electrode (opposite electrode, upper electrode) of the light-emitting element. 230 and functions as an auxiliary wiring (auxiliary electrode) for the conductive layer 1230.

[0062] In order to reduce the number of steps, the conductive layer 1211 and the conductive layer 1212 are formed in the same step. That is, it is preferable that the conductive layer 1211 and the conductive layer 1212 are the same layer.

[0063] Of course, the conductive layer 1211 and the conductive layer 1212 may be formed in different steps.

[0064] An insulating layer 1130 is formed on the conductive layer 1211 and the conductive layer 1212 .

[0065] The insulating layer 1130 corresponds to a barrier layer.

[0066] The insulating layer 1130 has an opening for exposing a part of the surface of the conductive layer 1211, and a conductive An opening is provided to expose a portion of the surface of layer 1212 .

[0067] That is, the insulating layer 1130 covers the end of the conductive layer 1211 and the end of the conductive layer 1212. There are.

[0068] On the conductive layer 1211 and the insulating layer 1130, an electroluminescent layer 1220 ( An EL layer, electroluminescent layer) is formed.

[0069] On the electroluminescent layer 1220, on the insulating layer 1130, and on the conductive layer 1212 A conductive layer 1230 is formed on the insulating layer 1230 .

[0070] That is, the conductive layer 1230 is formed by arranging the openings (contact holes) in the insulating layer 1130. The conductive layer 1212 is electrically connected to the conductive layer 1212 via a conductive layer 1212 .

[0071] The conductive layer 1230 corresponds to a second electrode (counter electrode, upper electrode) of the light-emitting element.

[0072] By adopting the structure shown in FIG. 1, the conductive layer 1211 is formed in the region where the conductive layer 1211 is not formed. The conductive layer 1212 can be used as an auxiliary wiring for the conductive layer 1230.

[0073] Therefore, the space in the region where no pixel electrodes are formed can be effectively utilized.

[0074] In FIG. 1, the transistor 1100 provided on the substrate 1050 is a top gate transistor. Although a top-gate TFT is shown, the transistor 1100 may also be a bottom-gate TFT. Alternatively, a transistor formed using a silicon wafer, an SOI substrate, or the like may be used.

[0075] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0076] (Embodiment 2) A case where a planarizing film is used as the partition layer will be described.

[0077] The planarizing film is an insulating film having a flat surface.

[0078] A typical example of a planarization film is a film formed by discharging a liquid raw material onto a substrate and then curing it. Insulating films and the like.

[0079] Examples of insulating films formed by discharging liquid raw materials onto a substrate and then curing them include organic There are insulating films, etc.

[0080] The organic insulating film may be, for example, a polyimide film, an acrylic film, or a siloxane film.

[0081] Since the raw material for the organic insulating film is liquid, the higher the height of the structure formed under the film, the , the distance between the structure and the membrane surface is shortened.

[0082] Therefore, the higher the height of the structure formed in the lower layer of the film, the greater the distance between the bottom and the surface of the opening. The distance becomes shorter.

[0083] In addition, instead of a flattening film, CMP (Chemical Mechanical Polishing) Alternatively, an insulating film or the like whose surface has been polished and planarized by polishing or the like may be used.

[0084] The insulating film with a polished surface has a surface that reflects the unevenness of the underlying structure. The surface is flattened and polished after it is cut, so the raw material is liquid. The shape of the insulating film is similar to that of the insulating film formed by the above process.

[0085] Therefore, an example of a configuration in which the bottom surface of the opening is raised is shown in FIG. 2 and FIG.

[0086] FIG. 2 shows a configuration in which a conductive layer 1300 is added to the configuration of FIG.

[0087] In order to reduce the number of processes, the conductive layer 1300 is formed in the same process as the gate electrode of the transistor 1100. It is preferable that the conductive layer is formed of

[0088] FIG. 3 shows a configuration in which a conductive layer 1400 is added to the configuration of FIG.

[0089] In order to reduce the number of steps, the conductive layer 1400 is formed as the source electrode and the drain electrode of the transistor 1100. It is preferable that the conductive layer is formed in the same process as the contact electrode.

[0090] The conductive layer 1300 or the conductive layer 1400 is, for example, a wiring or a dummy electrode used in a light emitting device. (electrically isolated electrode, floating electrode), etc.

[0091] Examples of wiring used in a light emitting device include gate wiring, capacitance wiring, signal lines, power supply lines, and consumption lines. A line or the like can be used.

[0092] Dummy electrodes (electrically isolated electrodes, floating electrodes) are used in light-emitting devices. An electrode that is electrically isolated from the wiring or electrode.

[0093] The conductive layer 1300 or the conductive layer 1400 is formed by bonding the conductive layer 1212 and the conductive layer 1230 together. The insulating layer 1130 is formed at a position overlapping an opening for electrical connection. do.

[0094] At least the edge (edge, periphery) of the opening overlaps with the conductive layer 1300 or the conductive layer 1400. It is sufficient that the insulating film 11 is formed at a position where the insulating film 11 is located.

[0095] As described above, by disposing the conductive layer at a position overlapping the opening, the conductive layer 1230 This can reduce the probability of the wire breaking.

[0096] That is, by providing a conductive layer under the opening, the bottom surface of the opening is raised. The gap at the mouth becomes smaller.

[0097] If the step of the opening is reduced, the probability of the conductive layer 1230 being broken can be reduced. can be done.

[0098] In addition, a dummy semiconductor layer (electrically isolated By disposing a semiconductor layer, a floating semiconductor layer, the probability of the conductive layer 1230 being broken is reduced. This is preferable because it reduces the

[0099] The dummy semiconductor layer is preferably formed in the same process as the semiconductor layer of the transistor. stomach.

[0100] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0101] (Embodiment 3) FIG. 4 is an example of a configuration in which both the conductive layer 1300 and the conductive layer 1400 are added to FIG. In FIG. 4, a planarizing film is used as the partition layer.

[0102] In order to reduce the number of processes, the conductive layer 1300 is formed in the same process as the gate electrode of the transistor 1100. It is preferable that the conductive layer is formed of

[0103] In order to reduce the number of steps, the conductive layer 1400 is formed as the source electrode and the drain electrode of the transistor 1100. It is preferable that the conductive layer is formed in the same process as the contact electrode.

[0104] By having both the conductive layer 1300 and the conductive layer 1400 as shown in FIG. This is preferable because the probability of the conductive layer 1230 being broken can be reduced compared to FIG.

[0105] The conductive layer 1300 or the conductive layer 1400 is, for example, a wiring or a dummy electrode used in a light emitting device. (electrically isolated electrode, floating electrode), etc.

[0106] Examples of wiring used in a light emitting device include gate wiring, capacitance wiring, signal lines, power supply lines, and consumption lines. A line or the like can be used.

[0107] Dummy electrodes (electrically isolated electrodes, floating electrodes) are used in light-emitting devices. An electrode that is electrically isolated from the wiring or electrode.

[0108] For example, in a configuration in which an opening is provided at the intersection of two wirings, the conductive layer 1300 is a first wiring 14, and the conductive layer 1400 corresponds to the second wiring.

[0109] For example, in a configuration in which one wiring, a dummy electrode, and an opening are overlapped, the conductive layer 1300 is the wiring. or corresponds to one of the dummy electrodes, and the conductive layer 1400 corresponds to the other of the wiring or dummy electrodes. .

[0110] For example, in a configuration in which two dummy electrodes and an opening are overlapped, the conductive layer 1300 is the first dummy electrode. The conductive layer 1400 corresponds to a first dummy electrode, and the conductive layer 1400 corresponds to a second dummy electrode.

[0111] In addition, a dummy semiconductor layer (an electrically isolated semiconductor layer) is provided at a position overlapping with the opening in FIG. By providing a floating semiconductor layer, the probability of the conductive layer 1230 being broken is further reduced. This is preferable.

[0112] The dummy semiconductor layer is preferably formed in the same process as the semiconductor layer of the transistor. stomach.

[0113] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0114] (Embodiment 4) When a planarizing film is used as the partition layer, in order to reduce the probability of disconnection in the light-emitting region, A dummy electrode or a dummy semiconductor layer may be disposed under the pixel electrode.

[0115] Of course, both the dummy electrode and the dummy semiconductor layer may be disposed under the pixel electrode.

[0116] The dummy semiconductor layer is preferably formed in the same process as the semiconductor layer of the transistor. stomach.

[0117] The dummy electrode is preferably formed in the same process as the gate electrode of the transistor. .

[0118] The dummy electrode is formed in the same process as the source electrode and the drain electrode of the transistor. It is preferable that

[0119] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0120] (Embodiment 5) Figures 5, 6, and 7 show the results of using a channel-etched TFT, which is a type of TFT with an inverted staggered structure. An example of a light emitting device is shown.

[0121] FIG. 5 is a circuit diagram of a pixel circuit used in the light emitting device shown in FIGS.

[0122] The pixel circuit shown in FIG. 5 includes a transistor Tr1, a transistor Tr2, a line G, a line S, It has wiring V and a light-emitting element EL (EL element).

[0123] The transistor Tr1 has a function of controlling the conduction and non-conduction of the transistor Tr2.

[0124] The transistor Tr1 is sometimes called a switching transistor.

[0125] The transistor Tr2 has a function of controlling the current supplied to the light-emitting element EL.

[0126] The transistor Tr2 is sometimes called a drive transistor.

[0127] The wiring G corresponds to, for example, a gate line.

[0128] The gate line is electrically connected to the gate of the transistor Tr1. It has the function of supplying a signal to control continuity / non-continuity.

[0129] The wiring S corresponds to, for example, a signal line.

[0130] The signal line has a function of supplying a video signal.

[0131] The wiring V corresponds to, for example, a power supply line.

[0132] The power supply line has a function of supplying a current or a voltage.

[0133] The wiring G is electrically connected to the gate of the transistor Tr1.

[0134] The wiring S is electrically connected to one of the source and the drain of the transistor Tr1.

[0135] The wiring V is electrically connected to one of the source and the drain of the transistor Tr2.

[0136] The light-emitting element EL is electrically connected to the other of the source and drain of the transistor Tr2. There are.

[0137] the other of the source or drain of the transistor Tr1, the gate of the transistor Tr2, are electrically connected.

[0138] The cross-sectional view taken along the line AB in FIG. 6 corresponds to FIG.

[0139] FIG. 7A corresponds to a cross-sectional view of the transistor Tr2 in FIG.

[0140] The cross-sectional view taken along the line CD in FIG. 6 corresponds to FIG.

[0141] 7B shows the other of the source or drain of the transistor Tr1 in FIG. 1 corresponds to a cross-sectional view of the connection portion with the gate of transistor Tr2.

[0142] The cross-sectional view taken along the line EF in FIG. 6 corresponds to FIG.

[0143] FIG. 7C corresponds to a cross-sectional view of the transistor Tr1 in FIG.

[0144] 6 and 7, a conductive layer 101 and a conductive A layer 102 is formed.

[0145] The conductive layer 101 corresponds to the gate electrode of the transistor Tr2.

[0146] The conductive layer 101 is connected to the other of the source and drain of the transistor Tr1. It also functions as a part of the connection wiring for electrically connecting the gate of transistor Tr2.

[0147] The conductive layer 102 corresponds to the gate electrode of the transistor Tr1.

[0148] The conductive layer 102 also functions as a wiring G (gate line).

[0149] An insulating layer 200 is formed on the conductive layer 101 and the conductive layer 102 .

[0150] The insulating layer 200 functions as a gate insulating film for the transistor Tr1 and also functions as a gate insulating film for the transistor T It also has a function as a gate insulating film for r2.

[0151] On the insulating layer 200, a semiconductor layer 301 and a semiconductor layer 302 are formed.

[0152] The semiconductor layer 301 corresponds to the semiconductor layer of the transistor Tr2.

[0153] The semiconductor layer 302 corresponds to the semiconductor layer of the transistor Tr1.

[0154] On the semiconductor layer 301, a conductive layer 401 and a conductive layer 402 are formed.

[0155] The conductive layer 401 corresponds to one of the source electrode or the drain electrode of the transistor Tr2. .

[0156] The conductive layer 401 also functions as a connection wiring to the conductive layer 601 which is a pixel electrode. do.

[0157] The conductive layer 402 corresponds to the other of the source electrode or the drain electrode of the transistor Tr2. .

[0158] The conductive layer 402 also functions as a wiring V (power line).

[0159] A conductive layer 403 and a conductive layer 404 are formed on the semiconductor layer 302 .

[0160] The conductive layer 403 corresponds to one of the source electrode or the drain electrode of the transistor Tr1. .

[0161] The conductive layer 403 is connected to the other of the source and drain of the transistor Tr1. It also functions as a part of the connection wiring for electrically connecting the gate of transistor Tr2.

[0162] The conductive layer 404 corresponds to the other of the source electrode or the drain electrode of the transistor Tr1. .

[0163] The conductive layer 404 also functions as a wiring S (signal line).

[0164] An insulating layer is formed on the conductive layer 401, the conductive layer 402, the conductive layer 403, and the conductive layer 404. 500 has been formed.

[0165] The insulating layer 500 corresponds to an interlayer insulating film.

[0166] On the insulating layer 500, a conductive layer 601 and a conductive layer 602 are formed.

[0167] The conductive layer 601 corresponds to a first electrode (pixel electrode, lower electrode) of the light-emitting element.

[0168] The conductive layer 601 is connected to the conductive layer 401 through a contact hole formed in the insulating layer 500. are electrically connected.

[0169] The conductive layer 602 is connected to the other of the source or drain of the transistor Tr1 and the transistor Tr 2.

[0170] The conductive layer 602 is connected to the conductive layer 4 through a first contact hole formed in the insulating layer 500. 03 and formed in the insulating layer 200 and the insulating layer 500. It is electrically connected to the conductive layer 101 via a contact hole.

[0171] As shown in FIG. 6, the longitudinal direction of the area where the upper and lower conductive layers overlap and the contact hole By making the length of the contact hole parallel to the contact hole length, the area of ​​the contact hole can be increased. This is preferable because it can be done.

[0172] Therefore, in FIG. 6, the longitudinal direction of the first contact hole and the longitudinal direction of the second contact hole The directions are intersecting.

[0173] In order to reduce the number of processes, the first contact hole and the second contact hole are formed in the same process. It is preferable that the conductive layer 601 and the conductive layer 602 are formed in the same step.

[0174] Suppose the other of the source or drain of the transistor Tr1 and the gate of the transistor Tr2 When the conductive layer 403 is brought into contact with the conductive layer 101 in order to electrically connect After the insulating layer 200 is formed and before the insulating layer 500 is formed, a contact hole forming process is performed. A process is required.

[0175] On the other hand, as shown in FIG. 6 and FIG. 7, the conductive layer 602 is connected to the source or drain of the transistor Tr1. The other of the two gates is electrically connected to the gate of the transistor Tr2. By using the insulating layer 200 after forming the insulating layer 200 and before forming the insulating layer 500, The process of making contact holes is unnecessary.

[0176] That is, in the structures of FIG. 6 and FIG. 7, the first contact hole and the second contact hole are Since the insulating layer 200 is formed at the same time, the insulating layer This structure eliminates the need to perform a contact hole forming process before forming 500. do.

[0177] Therefore, the structures shown in Figures 6 and 7 can reduce the contact hole manufacturing process by one. It can be said that there is.

[0178] An insulating layer 700 is formed on the conductive layer 601 and the conductive layer 602 .

[0179] The insulating layer 700 corresponds to a partition layer.

[0180] The insulating layer 700 is provided with an opening for exposing a part of the surface of the conductive layer 601. There are.

[0181] That is, the insulating layer 700 covers the ends of the conductive layer 601 .

[0182] On the conductive layer 601 and the insulating layer 700, an electroluminescent layer 801 (EL layer , electroluminescent layer) is formed.

[0183] A conductive layer 900 is formed on the electroluminescent layer 801 and the insulating layer 700. It is being done.

[0184] The conductive layer 900 corresponds to a second electrode (counter electrode, upper electrode) of the light-emitting element.

[0185] As described above, by using the conductive layer 602 as a connection wiring, the number of steps can be reduced. The structure may be:

[0186] And since the conductive layer 602 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0187] In this embodiment, a channel-etch type TFT is used, but a channel-stop type TFT may also be used. good.

[0188] The light emitting element of this embodiment may be replaced with another display element (liquid crystal element, electrophoretic element, etc.). That's fine.

[0189] That is, this embodiment is applicable to display devices in general.

[0190] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0191] (Embodiment 6) 8 to 9 show an example of a configuration in which a capacitive element is added to the configurations of FIGS. 5 to 7. FIG.

[0192] FIG. 8 corresponds to the circuit diagram of the pixel circuit in FIG.

[0193] FIG. 8 shows an example in which a capacitive element C is added to the circuit shown in FIG.

[0194] One terminal (one electrode) of the capacitance element C is electrically connected to the gate of the transistor Tr2. This is being continued.

[0195] The other terminal (the other electrode) of the capacitance element C is electrically connected to the wiring V (power supply line). do.

[0196] In this embodiment, one electrode of the capacitance element C is also used as the gate electrode of the transistor Tr2. Use.

[0197] The other electrode of the capacitance element C also serves as the wiring V (power supply line).

[0198] Here, FIG. 9 shows a configuration in which the conductive layer 101 in FIG. 6 is extended under the conductive layer 402. do.

[0199] One electrode of the capacitance element C is used as the gate electrode of the transistor Tr2. The aperture ratio is reduced by using the other electrode of element C as wiring V (power supply line) Therefore, a capacitor element can be manufactured without any trouble.

[0200] The light emitting element of this embodiment may be replaced with another display element (liquid crystal element, electrophoretic element, etc.). That's fine.

[0201] That is, this embodiment is applicable to display devices in general.

[0202] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0203] (Embodiment 7) FIG. 10 shows a configuration for increasing the capacitance of a capacitive element.

[0204] FIG. 10A shows a structure in which a conductive layer 603 is added to the structure shown in FIG.

[0205] FIG. 10B corresponds to a cross-sectional view taken along line GH of FIG. 10A.

[0206] The circuit diagram of the pixel circuit in FIG. 10 is as shown in FIG.

[0207] The conductive layer 603 constitutes a part of the other electrode of the capacitor C.

[0208] If the conductive layer 603 is formed in the same process as the conductive layer 601 which becomes the pixel electrode, the number of processes does not increase. This is preferable because it is

[0209] The conductive layer 603 is connected to the conductive layer 402 through a contact hole provided in the insulating layer 500. are electrically connected.

[0210] In order to reduce the contact resistance between the conductive layer 603 and the conductive layer 402, a contact hole is formed. It is preferable to provide a plurality of such portions.

[0211] By adopting the above-mentioned configuration, the width of the other electrode of the capacitance element C can be increased. Therefore, the capacitance of the capacitive element C can be increased.

[0212] And since the conductive layer 603 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0213] In FIG. 10, the conductive layer 403 and the conductive layer 101 may be in direct contact with each other.

[0214] The light emitting element of this embodiment may be replaced with another display element (liquid crystal element, electrophoretic element, etc.). That's fine.

[0215] That is, this embodiment is applicable to display devices in general.

[0216] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0217] (Embodiment 8) FIG. 11 shows a configuration for increasing the capacitance of a capacitive element.

[0218] FIG. 11A shows a structure in which a conductive layer 604 is added to the structure shown in FIG.

[0219] FIG. 11B corresponds to a cross-sectional view of the IJ cross section of FIG. 11A.

[0220] The circuit diagram of the pixel circuit in FIG. 11 is as shown in FIG.

[0221] The conductive layer 604 constitutes a part of one electrode of the capacitance element C.

[0222] If the conductive layer 604 is formed in the same process as the conductive layer 601 which becomes the pixel electrode, the number of processes does not increase. This is preferable because it is

[0223] The conductive layer 604 is connected to the insulating layer 200 through contact holes provided in the insulating layer 500. The conductive layer 101 is electrically connected to the conductive layer 101 via the insulating layer 102 .

[0224] In order to reduce the contact resistance between the conductive layer 604 and the conductive layer 101, a contact hole is provided. It is preferable to provide a plurality of such portions.

[0225] With the above-mentioned configuration, the other electrode of the capacitance element C is connected to one of the electrodes of the capacitance element Since the capacitance of the capacitance element C is increased due to the structure in which the capacitance is sandwiched between the electrodes.

[0226] 11 is the same as the area of ​​the conductive layer 603 in FIG. In 1, the other terminal (the other electrode) of the capacitance element C is connected to one terminal (one electrode) of the capacitance element. Because of the sandwiching structure, the capacitance of the capacitance element C in FIG. 11 is smaller than that of the capacitance element C in FIG. Get bigger.

[0227] And since the conductive layer 604 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0228] In FIG. 11, the conductive layer 403 and the conductive layer 101 may be in direct contact with each other.

[0229] The light emitting element of this embodiment may be replaced with another display element (liquid crystal element, electrophoretic element, etc.). That's fine.

[0230] That is, this embodiment is applicable to display devices in general.

[0231] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0232] (Embodiment 9) FIG. 12 shows a configuration for increasing the capacitance of a capacitive element.

[0233] FIG. 12A shows a structure in which a conductive layer 604 is added to the structure shown in FIG.

[0234] FIG. 12B corresponds to a cross-sectional view taken along the line I2-J2 of FIG. 12A.

[0235] The circuit diagram of the pixel circuit in FIG. 12 is as shown in FIG.

[0236] The conductive layer 604 constitutes a part of one electrode of the capacitance element C.

[0237] If the conductive layer 604 is formed in the same process as the conductive layer 601 which becomes the pixel electrode, the number of processes does not increase. This is preferable because it is

[0238] The conductive layer 604 is connected to the insulating layer 200 through contact holes provided in the insulating layer 500. The conductive layer 101 is electrically connected to the conductive layer 101 via the insulating layer 102 .

[0239] In FIG. 12, an opening is provided in the conductive layer 402 (wiring V (power supply line)). do.

[0240] In addition, in FIG. 12, contact holes provided in the insulating layer 200 and the insulating layer 500 is provided inside an opening provided in the conductive layer 402 (wiring V (power supply line)).

[0241] That is, the conductive layer 604 and the conductive layer 101 are disposed inside the opening provided in the conductive layer 402. The two are electrically connected to each other.

[0242] In order to reduce the contact resistance between the conductive layer 604 and the conductive layer 101, a contact hole is provided. It is preferable to provide a plurality of such portions.

[0243] In addition, when a plurality of contact holes are provided in the insulating layer 200 and the insulating layer 500, the conductive layer It is preferable to provide a plurality of openings in 402 corresponding to a plurality of contact holes.

[0244] With the above-mentioned configuration, the other electrode of the capacitance element C is connected to one of the electrodes of the capacitance element Since the capacitance of the capacitance element C is increased due to the structure in which the capacitance is sandwiched between the electrodes.

[0245] In addition, in FIG. 12, an opening is provided in the conductive layer 402 (wiring V (power line)). Therefore, the size of the conductive layer 604 can be made smaller than that in FIG.

[0246] Therefore, the aperture ratio in FIG. 12 can be made larger than that in FIG.

[0247] And since the conductive layer 604 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0248] In FIG. 12, the conductive layer 403 and the conductive layer 101 may be in direct contact with each other.

[0249] In addition, the light emitting element of this embodiment may be replaced with other display elements (liquid crystal elements, electrophoretic elements, etc.). That's fine.

[0250] That is, this embodiment is applicable to display devices in general.

[0251] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0252] (Embodiment 10) When using a TFT with an inverted staggered structure, the second electrode (opposite electrode, upper It is more preferable to provide an auxiliary wiring (auxiliary electrode) for the second electrode.

[0253] For example, FIG. 13 illustrates a configuration in which a conductive layer 605 is added to the configuration of FIG.

[0254] FIG. 13B corresponds to a cross-sectional view of the KL cross section of FIG. 13A.

[0255] The conductive layer 605 functions as an auxiliary wiring for the conductive layer 900 which serves as a second electrode of the light-emitting element. Yes.

[0256] The conductive layer 605 is electrically connected to the insulating layer 700 through an opening (contact hole). It is electrically connected to layer 900 .

[0257] The conductive layer 605 in FIG. 13 has a shape with a plurality of openings (a lattice or mesh shape). be.

[0258] In FIG. 13, one pixel electrode is arranged in one opening. A structure in which a plurality of pixel electrodes are arranged in the opening may also be used.

[0259] In addition, when a planarizing film is used as the insulating layer 700, the opening ( The contact hole is formed at a position overlapping the conductive layer 102 (wiring G (gate line)). Therefore, the probability that the conductive layer 900 will be broken can be reduced.

[0260] In addition, a dummy semiconductor layer (electrically The isolated semiconductor layer (floating semiconductor layer) is formed through an opening (cone) provided in the insulating layer 700. By arranging the conductive layer 900 at a position overlapping the contact hole, the probability of the conductive layer 900 being broken is reduced. can be reduced.

[0261] And since the conductive layer 605 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0262] In FIG. 13, the conductive layer 403 and the conductive layer 101 may be in direct contact with each other.

[0263] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0264] (Embodiment 11) In FIG. 13, the position overlapping with the opening (contact hole) provided in the insulating layer 700 FIG. 14 shows a structure in which a conductive layer 405 is disposed on the substrate.

[0265] The conductive layer 405 is a dummy electrode (an electrically isolated electrode, a floating electrode).

[0266] The conductive layer 405 is formed in the same process as the source and drain electrodes of the transistor. This is preferable since it does not increase the number of steps.

[0267] By providing the conductive layer 405, the probability that the conductive layer 900 will be broken can be reduced. Cut.

[0268] In addition, a dummy semiconductor layer (electrically The isolated semiconductor layer (floating semiconductor layer) is formed through an opening (cone) provided in the insulating layer 700. By arranging the conductive layer 900 at a position overlapping the contact hole, the probability of the conductive layer 900 being broken is reduced. can be reduced.

[0269] And since the conductive layer 605 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0270] In FIG. 14, the conductive layer 403 and the conductive layer 101 may be in direct contact with each other.

[0271] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0272] (Embodiment 12) 15 and 16 show the opening (contact hole) provided in the insulating layer 700 in FIG. The configuration is such that a junction between the wires is placed at the intersection of the wires.

[0273] FIG. 15 shows a conductive layer 102 corresponding to the wiring G (gate line) and a conductive layer 103 corresponding to the wiring V (power supply line). An opening (contact hole) is provided at the intersection with the electrical layer 402.

[0274] FIG. 16 shows a conductive layer 102 corresponding to the wiring G (gate line) and a conductive layer 103 corresponding to the wiring S (signal line). An opening (contact hole) is provided at the intersection with the electrical layer 404.

[0275] 15 and 16 show that the probability of the conductive layer 900 being broken can be reduced compared to FIG. Cut.

[0276] In addition, a dummy semiconductor layer (electrically The isolated semiconductor layer (floating semiconductor layer) is formed through an opening (cone) provided in the insulating layer 700. By arranging the conductive layer 900 at a position overlapping the contact hole, the probability of the conductive layer 900 being broken is reduced. can be reduced.

[0277] And since the conductive layer 605 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0278] In addition, in FIG. 15 and FIG. 16, even if the conductive layer 403 and the conductive layer 101 are in direct contact with each other, good.

[0279] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0280] (Embodiment 13) 17 and 18 show the opening (contact hole) provided in the insulating layer 700 in FIG. The insulating layer 404 (wiring) is disposed at a position where it overlaps with the conductive layer 404 (wiring).

[0281] When a planarizing film is used as the insulating layer 700, the opening (contact hole) is formed in the conductive layer 40. 4 (wiring), the conductive layer 900 is less likely to break. The rate can be reduced.

[0282] FIG. 18 shows an opening (contact hole) provided in the insulating layer 700 in FIG. A conductive layer 103 is disposed at the overlapping position.

[0283] FIG. 17B is a cross-sectional view of the OP cross section of FIG. 17A.

[0284] FIG. 18B is a cross-sectional view taken along the line QR of FIG. 18A.

[0285] The conductive layer 103 is a dummy electrode (an electrically isolated electrode, a floating electrode).

[0286] If the conductive layer 103 is formed in the same process as the gate electrode used in the transistor, the number of processes increases. This is preferable because

[0287] By providing the conductive layer 103, the probability that the conductive layer 900 is broken can be reduced. Cut.

[0288] In addition, a dummy semiconductor layer (electrically The isolated semiconductor layer (floating semiconductor layer) is formed through an opening (cone) provided in the insulating layer 700. By arranging the conductive layer 900 at a position overlapping the contact hole, the probability of the conductive layer 900 being broken is reduced. can be reduced.

[0289] And since the conductive layer 605 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0290] In addition, in FIG. 17 and FIG. 18, even if the conductive layer 403 and the conductive layer 101 are in direct contact with each other, good.

[0291] In this embodiment, the openings (contact holes) and Although the conductive layer 103 is disposed so as to overlap the conductive layer 404, it may be disposed so as to overlap the conductive layer 402. .

[0292] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0293] (Embodiment 14) 19 and 20 show the opening (contact hole) provided in the insulating layer 700 in FIG. In this embodiment, a conductive layer 104 and a conductive layer 406 are overlapped with each other.

[0294] The conductive layer 104 is a dummy electrode (an electrically isolated electrode, a floating electrode).

[0295] If the conductive layer 104 is formed in the same process as the gate electrode of the transistor, the number of processes increases. This is preferable because

[0296] By providing the conductive layer 104, the probability of the conductive layer 900 being broken can be reduced. Cut.

[0297] The conductive layer 406 is a dummy electrode (an electrically isolated electrode, a floating electrode).

[0298] The conductive layer 406 is formed in the same process as the source and drain electrodes of the transistor. This is preferable since it does not increase the number of steps.

[0299] By providing the conductive layer 406, the probability that the conductive layer 900 will be broken can be reduced. Cut.

[0300] In this embodiment, both the conductive layer 104 and the conductive layer 406 are formed. Alternatively, only one of the insulating layer 04 and the conductive layer 406 may be formed.

[0301] In addition, if a notch is provided in the pixel electrode and a dummy electrode is provided in the notch as shown in FIG. Since the area of ​​the pixel electrode can be made larger than that of FIG. 19, the aperture ratio can be improved. This can be done.

[0302] In addition, a dummy semiconductor layer (electrically The isolated semiconductor layer (floating semiconductor layer) is formed through an opening (cone) provided in the insulating layer 700. By arranging the conductive layer 900 at a position overlapping the contact hole, the probability of the conductive layer 900 being broken is reduced. can be reduced.

[0303] It is also possible to form only a dummy semiconductor layer without forming the dummy electrode.

[0304] And since the conductive layer 605 is formed in the space where the pixel electrode does not exist, It allows you to make effective use of non-existent space.

[0305] In addition, in FIG. 19 and FIG. 20, even if the conductive layer 403 and the conductive layer 101 are in direct contact with each other, good.

[0306] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0307] (Embodiment 15) The shape of the conductive layer 605 is not limited to a shape having a plurality of openings (a lattice shape, a mesh shape). , can be of various shapes.

[0308] For example, as shown in FIG. 21, the conductive layer 102 (wiring G (gate line)) may be linearly aligned. You can do that.

[0309] For example, as shown in FIG. 22, the conductive layer 404 (wiring S (signal line)) may be linearly aligned. That's fine.

[0310] Of course, it may be formed in a linear shape along the conductive layer 402 (wiring V (power supply line)).

[0311] A plurality of conductive layers 605 may be provided.

[0312] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0313] (Embodiment 16) When a plurality of openings (contact holes) are formed in the insulating layer 700, the conductive layer 60 This is preferable because it ensures a reliable electrical connection between the conductive layer 900 and the insulating layer 5 .

[0314] In this case, a plurality of types of forming positions described across a plurality of other embodiments may be combined. For example, a first opening may be provided at a position overlapping with the wiring G (gate line). and providing a second opening at a position where it overlaps with the wiring V (power line).

[0315] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0316] (Embodiment 17) Any circuit can be applied to the pixel circuit of the light emitting device.

[0317] For example, FIG. 23 shows an example of a pixel circuit of a light emitting device.

[0318] FIG. 23 shows a circuit in which a transistor Tr3, a wiring G2, and a wiring R are added to FIG. be.

[0319] The transistor Tr3 is called a reset transistor or an erase transistor. It also says:

[0320] The wiring G2 has the function of supplying a signal that controls the conduction and non-conduction of the transistor Tr3. .

[0321] The line R corresponds to a reset line (erase line).

[0322] The reset line (erase line) supplies a signal to reset the voltage held in the pixel circuit. It has the function of

[0323] The gate of the transistor Tr3 is electrically connected to the wiring G2.

[0324] One of the source and the drain of the transistor Tr3 is electrically connected to the wiring R.

[0325] The other of the source or drain of the transistor Tr3 is electrically connected to the gate of the transistor Tr2. are connected to the network.

[0326] In addition, in FIG. 23, the wiring R and the wiring V may be shared.

[0327] That is, in FIG. 23, the wiring R is not provided, and the source or drain of the transistor Tr3 is One of the terminals may be electrically connected to the wiring V.

[0328] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0329] (Embodiment 18) Any circuit can be applied to the pixel circuit of the light emitting device.

[0330] For example, FIG. 24 shows an example of a pixel circuit of a light emitting device.

[0331] The pixel circuit of the light emitting device shown in FIG. Line S (signal line), wires G1 to G3 (gate lines), wire R (reset line), wire V (power The light emitting element EL includes a light emitting diode (LED), a capacitance element C1, a capacitance element C2, and a light emitting element EL (EL element).

[0332] Transistors Tr1 to Tr6 are either n-channel or p-channel transistors. Either a gate type transistor or a gate type transistor may be used.

[0333] The wiring S is electrically connected to one of the source and drain of the transistor Tr1. It is being done.

[0334] The wiring G1 is electrically connected to the gate of the transistor Tr2 and the gate of the transistor Tr5. are connected to the network.

[0335] The wiring G2 is connected to the gate of the transistor Tr1, the gate of the transistor Tr4, and the capacitance element The resistor C1 is electrically connected to one terminal (one electrode) of the resistor C2.

[0336] The wiring G3 is electrically connected to the gate of the transistor Tr6.

[0337] The wiring R is electrically connected to one of the source and drain of the transistor Tr6. .

[0338] The wiring V is connected to one of the source or drain of the transistor Tr2 and one of the capacitor elements C1. It is electrically connected to a terminal (one of the electrodes).

[0339] The light-emitting element EL is electrically connected to one of the source and drain of the transistor Tr5. is.

[0340] The other terminal (the other electrode) of the capacitance element C1 and the source or drain of the transistor Tr6 the other of the two terminals, the gate of the transistor Tr3, and the source or drain of the transistor Tr4. One of the terminals is electrically connected to the other terminal (the other electrode) of the capacitive element C2.

[0341] The other of the source or drain of the transistor Tr1 and the source or drain of the transistor Tr2 The other of the drains is electrically connected to either the source or the drain of the transistor Tr3. It has been done.

[0342] The other of the source or drain of the transistor Tr3 and the source or drain of the transistor Tr4 The other of the drains is electrically connected to the other of the source or drain of the transistor Tr5. It has been done.

[0343] The operation of the circuit in FIG. 24 will now be described.

[0344] In the first period (reset period), the wiring G3 is selected to turn on the transistor Tr6. The pixel circuit is reset to the on state.

[0345] In the first period, the wiring G1 and the wiring G2 are not selected.

[0346] In the second period (write period), the line G2 is selected, and the transistors Tr1 and Tr2 are turned on. The transistor Tr4 is turned on, and the video signal is written from the line S.

[0347] In the second period, the wiring G1 and the wiring G3 are not selected.

[0348] In the third period (display period), the line G1 is selected, and the transistors Tr2 and A current is supplied to the light-emitting element EL from the wiring V via the transistor Tr3 and the transistor Tr5. .

[0349] In the third period, the wiring G2 and the wiring G3 are not selected.

[0350] In short, the operation of sequentially selecting the wiring G3, the wiring G2, and the wiring G1 is repeated.

[0351] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0352] (Embodiment 19) Any circuit can be applied to the pixel circuit of the light emitting device.

[0353] For example, FIG. 25 shows an example of a pixel circuit of a light emitting device.

[0354] The pixel circuit of the light emitting device shown in FIG. Line S (signal line), wire G1 to wire G3 (gate line), wire V1 to wire V2 (power line), The element C has a light-emitting element EL (EL element).

[0355] The wiring S is electrically connected to one of the source and drain of the transistor Tr1. It is being done.

[0356] The wiring G1 electrically connects the gate of the transistor Tr1 and the gate of the transistor Tr2. are connected to the network.

[0357] The wiring G2 is electrically connected to the gate of the transistor Tr4 and the gate of the transistor Tr5. are connected to the network.

[0358] The wiring G3 is electrically connected to the gate of the transistor Tr6.

[0359] The wiring V1 is electrically connected to one of the source and drain of the transistor Tr3. do.

[0360] The wiring V2 is connected to one of the source or drain of the transistor Tr5 and the transistor Tr6. The transistor is electrically connected to one of the source and drain of the transistor.

[0361] In addition, when the transistors Tr1 to Tr6 are all p-channel transistors, In this case, the first voltage applied to the wiring V1 is set higher than the second voltage applied to the wiring V2. do.

[0362] For example, the first voltage is Vdd (a voltage higher than the reference potential) and the second voltage is Vss (a voltage lower than the reference potential). (voltage lower than the sub-potential).

[0363] On the other hand, when the transistors Tr1 to Tr6 are all n-channel transistors, In this case, the first voltage applied to the wiring V1 is set lower than the second voltage applied to the wiring V2. do.

[0364] For example, the first voltage is Vss (a voltage lower than the reference potential) and the second voltage is Vdd (a voltage higher than the reference potential). (voltage higher than the sub-potential).

[0365] The light-emitting element EL is connected to one of the source and drain of the transistor Tr4 and the transistor T It is electrically connected to the other of the source or drain of r6.

[0366] The other of the source or drain of the transistor Tr1 and the source or drain of the transistor Tr5 The other drain and one terminal (one electrode) of the capacitance element C are electrically connected. do.

[0367] One of the source or drain of the transistor Tr2, the gate of the transistor Tr3, The other terminal (the other electrode) of the capacitive element C is electrically connected.

[0368] The other of the source or drain of the transistor Tr2 and the source or drain of the transistor Tr3 The other of the drains is electrically connected to the other of the source or drain of the transistor Tr4. It has been done.

[0369] The operation of the circuit in FIG. 25 will now be described.

[0370] In the first period, the wiring G1 and the wiring G3 are selected, and the transistors Tr1 and Transistor Tr2 and transistor Tr6 are set to the conductive state.

[0371] Therefore, it is preferable that the wiring G1 and the wiring G3 are electrically connected to each other.

[0372] In addition, the wiring G2 is not selected in the first period.

[0373] In the second period, the line G2 is selected, and the transistors Tr4 and Tr5 is displayed as being in a conductive state.

[0374] In the second period, the wiring G1 and the wiring G3 are not selected.

[0375] When performing the above operation, the following configuration is preferable in terms of simplifying the circuit.

[0376] The wiring G1 and the wiring G3 are electrically connected to the first terminal, and the wiring G2 is electrically connected to the second terminal. Connect to.

[0377] Then, the input signal is input directly to either the first terminal or the second terminal, and the first terminal Alternatively, an inverted signal of the input signal is input to the other second terminal.

[0378] In this case, an input terminal for inputting an input signal and one of the first terminal and the second terminal are The input terminal and the other of the first terminal and the second terminal are electrically connected via an inverter circuit. This is preferable because it allows the circuit to be simplified.

[0379] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0380] (Embodiment 20) A configuration that effectively utilizes the space outside the pixel section where no pixel electrodes are formed. An example is shown below.

[0381] FIG. 26 is a modification of FIG.

[0382] In FIG. 26, the conductive layer 1212 is a flexible printed circuit board (FPC) 1700. The wiring is used as a connection between the etched circuit and the conductive layer 1230.

[0383] That is, a current or voltage is applied from the FPC 1700 to the conductive layer 1230 via the conductive layer 1212. Supplied.

[0384] In addition, the conductive layer 1212 and the conductive layer 1230 are electrically connected at the end of the insulating layer 1130. It has been done.

[0385] The end of the insulating layer 1130 is disposed outside the pixel portion.

[0386] An opening is provided outside the pixel portion, and the conductive layer 1212 is connected to the opening outside the pixel portion. The conductive layer 1230 may be electrically connected to the conductive layer 1230 .

[0387] In addition, a sealing material 1500 is disposed between the end of the insulating layer 1130 and the mounting portion of the FPC 1700. It is placed there.

[0388] An encapsulant 1600 is provided on the encapsulant 1500 .

[0389] As the sealing material, a resin sealing material, glass frit, or the like can be used.

[0390] The sealing body includes a substrate (e.g., a glass substrate, a metal substrate, a plastic substrate, etc.), a sealing A can or the like can be used.

[0391] In addition, below the conductive layer 1212, a conductive layer 1300 and a conductive layer 1400 are disposed.

[0392] In order to reduce the number of steps, the conductive layer 1300 is formed in the same process as the gate electrode of the transistor. It is preferable that the conductive layer is made of a conductive material.

[0393] In order to reduce the number of steps, the conductive layer 1400 is used as a source electrode and a drain electrode of a transistor. It is preferable that the conductive layer is formed in the same process.

[0394] The conductive layer 1300 or the conductive layer 1400 is, for example, a wiring or a dummy electrode used in a light emitting device. (electrically isolated electrode, floating electrode), etc.

[0395] Dummy electrodes (electrically isolated electrodes, floating electrodes) are used in light-emitting devices. An electrode that is electrically isolated from the wiring or electrode.

[0396] In addition, when the insulating layer 1130 is a planarizing film, the conductive layer 1300 and the conductive layer 1400 are insulated. When the insulating layer 1130 is placed in a position overlapping the end of the conductive layer 12 at the end of the insulating layer 1130, 30 is preferable because it can reduce the probability of wire breakage.

[0397] In addition, in the region between the end of the insulating layer 1130 and the mounting portion of the FPC 1700, a conductive By stacking layer 1300, conductive layer 1400, and conductive layer 1212, conductive layer 121 Since no irregularities are formed on the lower layer of 2, breakage of the conductive layer 1212 can be prevented.

[0398] In addition, in FIG. 26, a dummy semiconductor layer (electrically If an isolated semiconductor layer, a floating semiconductor layer, is placed on the conductive layer 1230, the conductive layer 1230 may be broken. This is preferable because it further reduces the probability of this happening.

[0399] The dummy semiconductor layer is preferably formed in the same process as the semiconductor layer of the transistor. stomach.

[0400] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0401] (Embodiment 21) FIG. 27 shows a structure in which the conductive layer 1212 and the conductive layer 1400 in FIG. 26 are connected via a contact hole. The structure is such that the electrodes are electrically connected to each other.

[0402] FIG. 28 shows a structure in which the conductive layer 1300 and the conductive layer 1400 in FIG. 27 are connected via a contact hole. The structure is such that the electrodes are electrically connected to each other.

[0403] With the configuration of FIG. 27, the conductive layer 1400 can be used as an auxiliary wiring.

[0404] With the configuration of FIG. 28, the conductive layer 1300 and the conductive layer 1400 can be used as auxiliary wiring. This can be done.

[0405] Note that the contact hole is preferably provided near an end of the insulating layer 1130. .

[0406] That is, by arranging the end of the insulating layer 1130 close to the position of the contact hole, Since the distance over which only one layer of the layer 1212 is used as a connecting wiring is shortened, the conductive layer 1230 and the F It can reduce the resistance that exists between the PC1700.

[0407] Therefore, one or more contact holes are formed between the edge of the encapsulant 1500 and the insulating layer 1130. It is preferable to provide a plurality of.

[0408] In addition, it is preferable to provide the contact hole in a position close to the mounting portion of the FPC1700. It is.

[0409] In other words, by locating the FPC1700 attachment part and the contact hole close to each other, Since the distance over which only one layer of the conductive layer 1212 is used as wiring is shortened, the conductive layer 1230 and F It can reduce the resistance that exists between the PC1700.

[0410] Therefore, one or more contact holes should be provided at the position overlapping with the FPC1700 mounting part. It is preferable to provide a number.

[0411] The FPC 1700 and the conductive layer 1212 are made of a resin containing conductive particles (e.g., anisotropic conductive The material is fixed using a film or the like.

[0412] Here, by providing projections and recesses on the mounting portion of the FPC 1700, the attachment is ensured.

[0413] Therefore, one or more contact holes should be provided at the position overlapping with the FPC1700 mounting part. It is also preferable to provide a number of such contacts from the viewpoint of ensuring the adhesion between the FPC 1700 and the conductive layer 1212. stomach.

[0414] From the viewpoint of more reliably adhering the FPC 1700 to the conductive layer 1212, It is preferable to provide a plurality of contact holes at positions overlapping with the attachment portion of 700.

[0415] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0416] (Embodiment 22) Modification of the contact structure electrically connecting the conductive layer under the partition layer and the conductive layer over the partition layer Here is an example.

[0417] 29 and 30, a conductive layer 4002 is formed on a substrate 4001 .

[0418] In order to reduce the number of steps, the conductive layer 4002 is formed in the same process as the gate electrode of the transistor. It is preferable.

[0419] An insulating layer 4003 is formed over the conductive layer 4002 .

[0420] A conductive layer 4004 is formed on the insulating layer 4003 .

[0421] In order to reduce the number of steps, the conductive layer 4004 is formed in the same layer as the source and drain electrodes of the transistor. It is preferably formed in one step.

[0422] An insulating layer 4005 is formed over the conductive layer 4004 .

[0423] A conductive layer 4006 is formed over the insulating layer 4005 .

[0424] In order to reduce the number of steps, it is preferable to form the conductive layer 4006 in the same step as the pixel electrode.

[0425] An insulating layer 4007 is formed over the conductive layer 4006 .

[0426] The insulating layer 4007 corresponds to a partition layer and is formed using a planarizing film.

[0427] A conductive layer 4008 is formed over the insulating layer 4007 .

[0428] The conductive layer 4008 corresponds to the upper electrode of the light-emitting element.

[0429] The insulating layer 4007 has an opening.

[0430] Furthermore, the conductive layer 4002 and the conductive layer 4004 are formed in an opening provided in the insulating layer 4007. By being arranged so as to overlap, in the opening provided in the insulating layer 4007 This reduces the probability that the conductive layer 4008 will break.

[0431] Here, FIG. 29A shows an example in which an opening is provided in the conductive layer 4004. In FIG.

[0432] The opening in the conductive layer 4004 is overlapped with the opening in the insulating layer 4007. They are arranged as follows.

[0433] In FIG. 29A, the opening provided in the conductive layer 4004 is a hole provided in the insulating layer 4007. The opening is smaller than the opening in the insulating layer 4007 and is disposed inside the opening in the insulating layer 4007. .

[0434] By adopting the structure shown in FIG. 29(A), the insulating layer 4007 Since unevenness occurs on the inside, the contact area between the conductive layer 4006 and the conductive layer 4008 is increased. This can be done.

[0435] By increasing the contact area between the conductive layer 4006 and the conductive layer 4008, the conductive layer 40 The contact resistance between the conductive layer 4006 and the conductive layer 4008 is reduced.

[0436] Note that it is only necessary to create unevenness on the inside of the opening provided in the insulating layer 4007. A part of the opening in the layer 4004 protrudes from the opening in the insulating layer 4007. It's fine to do so.

[0437] That is, the opening provided in the insulating layer 4007 is provided at least in the conductive layer 4004. The opening has an area that overlaps with the periphery of the opening.

[0438] FIG. 29B shows an example in which an opening is provided in the conductive layer 4002. In FIG.

[0439] The opening in the conductive layer 4002 is overlapped with the opening in the insulating layer 4007. They are arranged as follows.

[0440] In FIG. 29B, the opening provided in the conductive layer 4002 is a hole provided in the insulating layer 4007. The opening is smaller than the opening in the insulating layer 4007 and is disposed inside the opening in the insulating layer 4007. .

[0441] By adopting the structure shown in FIG. 29B, the insulating layer 4007 Since unevenness occurs on the inside, the contact area between the conductive layer 4006 and the conductive layer 4008 is increased. This can be done.

[0442] By increasing the contact area between the conductive layer 4006 and the conductive layer 4008, the conductive layer 40 The contact resistance between the conductive layer 4006 and the conductive layer 4008 is reduced.

[0443] Note that it is only necessary to create unevenness on the inside of the opening provided in the insulating layer 4007. A part of the opening in the layer 4002 protrudes from the opening in the insulating layer 4007. It's fine to do so.

[0444] That is, the opening provided in the insulating layer 4007 is provided at least in the conductive layer 4002. The opening has an area that overlaps with the periphery of the opening.

[0445] FIG. 29C shows an example in which openings are provided in the conductive layer 4002 and the conductive layer 4004 .

[0446] The openings provided in the conductive layer 4002 and the conductive layer 4004 are formed in the insulating layer 4007. The opening is arranged so as to overlap with the opening.

[0447] In FIG. 29C, the openings provided in the conductive layer 4002 and the conductive layer 4004 are insulating. The opening in the insulating layer 4007 is smaller than the opening in the edge layer 4007. is placed to the side.

[0448] By adopting the structure shown in FIG. 29C, the opening in the insulating layer 4007 Since unevenness occurs on the inside, the contact area between the conductive layer 4006 and the conductive layer 4008 is increased. This can be done.

[0449] By increasing the contact area between the conductive layer 4006 and the conductive layer 4008, the conductive layer 40 The contact resistance between the conductive layer 4006 and the conductive layer 4008 is reduced.

[0450] Note that it is only necessary to create unevenness on the inside of the opening provided in the insulating layer 4007. A part of the openings provided in the layer 4002 and the conductive layer 4004 is provided in the insulating layer 4007. It is acceptable for the material to protrude from the opening.

[0451] That is, the opening provided in the insulating layer 4007 is exposed to at least the conductive layer 4002 and the conductive They each have an area that overlaps with the periphery of an opening provided in the layer 4004 .

[0452] On the other hand, from the viewpoint of preventing the conductive layer 4008 from being broken, as shown in FIG. An opening provided in the conductive layer 4004 is disposed inside an opening provided in the layer 4007, and In addition, the opening in the conductive layer 4002 is disposed inside the opening in the conductive layer 4004. It is preferable to place

[0453] In other words, the openings provided in the insulating layer 4007 are larger than the openings provided in the conductive layer 4004. The opening in the conductive layer 4004 is larger than the opening in the conductive layer 4002. Make it larger than the part.

[0454] The above configuration forms a step shape, reducing the probability of the conductive layer 4008 being broken. It is possible.

[0455] FIG. 30(A) shows a modification of FIG. 29(C).

[0456] In FIG. 30A, an opening 4009 is provided in an insulating layer 4007, and a conductive layer An opening 4010 is provided in the conductive layer 4004, and an opening 4011 is provided in the conductive layer 4002. It is being done.

[0457] The opening 4010 is arranged so that a part or the whole of the opening 4010 does not overlap with the opening 4011. It is being done.

[0458] By using the configuration shown in FIG. 30(A), the unevenness can be increased, so that the ) and (B), the contact resistance can be reduced.

[0459] By adopting the configuration of FIG. 30(A), an opening 4010 and an opening 4011 are formed in the opening 4009. The overlapping area (deep groove area) of the portion 4011 is not formed, or the inside of the opening 4009 In addition, the area of ​​the region where the opening 4010 and the opening 4011 overlap (the deep groove region) can be reduced. Therefore, the probability that the conductive layer 4008 will be broken can be reduced.

[0460] The conductive layer 4002 or the conductive layer 4004 is, for example, a wiring or a dummy electrode used in a light emitting device. (electrically isolated electrode, floating electrode), etc.

[0461] Examples of wiring used in a light emitting device include gate wiring, capacitance wiring, signal lines, power supply lines, and consumption lines. A line or the like can be used.

[0462] Dummy electrodes (electrically isolated electrodes, floating electrodes) are used in light-emitting devices. An electrode that is electrically isolated from the wiring or electrode.

[0463] A dummy semiconductor layer (electrically If an isolated semiconductor layer (floating semiconductor layer) is placed, the conductive layer 4008 will be disconnected. This is preferable since the probability is further reduced.

[0464] The dummy semiconductor layer is preferably formed in the same process as the semiconductor layer of the transistor. stomach.

[0465] In addition, when the openings provided in the insulating layer 4007 are provided at the intersections of the wirings (conductive layer 400 In the case where both the conductive layer 4002 and the conductive layer 4004 are wirings, FIG. 30(A) is particularly preferable. .

[0466] Here, in FIG. 30B, an opening provided in the insulating layer 4007 is provided at the intersection of the wiring. In this case, the case shown in FIG. 30(A) is adopted.

[0467] Parasitic capacitance occurs at the intersection of wires, but the parasitic capacitance is limited to the area where two wires overlap each other. occurs in the area.

[0468] Therefore, as shown in FIG. 30(A) and FIG. 30(B), the opening 4010 and the opening 4011 are By displacing the conductive layer 4002 (first wiring) and the conductive layer The area of ​​the region where they overlap with 4004 (second wiring) is reduced.

[0469] Therefore, the parasitic capacitance at the intersection of the wirings can be reduced.

[0470] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0471] (Embodiment 23) The technical idea of ​​reducing parasitic capacitance at the intersections of wiring can be applied to semiconductor devices in general. be.

[0472] The semiconductor device includes any device having a transistor, such as a light-emitting device, a liquid crystal display device, etc. These include equipment, storage devices, CPUs, RFID, etc.

[0473] FIG. 31 shows an example of a semiconductor device.

[0474] FIG. 31(A) shows a cross-sectional view of the intersection of the wiring, and FIG. 31(B) shows a top view of the intersection of the wiring. It shows.

[0475] That is, a conductive layer 4002 is formed on a substrate 4001 .

[0476] The conductive layer 4002 corresponds to the first wiring.

[0477] In order to reduce the number of steps, the conductive layer 4002 is formed in the same process as the gate electrode of the transistor. It is preferable.

[0478] An insulating layer 4003 is formed over the conductive layer 4002 .

[0479] A conductive layer 4004 is formed on the insulating layer 4003 .

[0480] The conductive layer 4004 corresponds to the second wiring.

[0481] In order to reduce the number of steps, the conductive layer 4004 is formed in the same layer as the source and drain electrodes of the transistor. It is preferably formed in one step.

[0482] An insulating layer 4005 is formed over the conductive layer 4004 .

[0483] Parasitic capacitance occurs at the intersection of wires, but the parasitic capacitance is limited to the area where two wires overlap each other. occurs in the area.

[0484] Therefore, by displacing the openings 4010 and 4011 as shown in FIG. Therefore, at the intersection, the conductive layer 4002 (first wiring) and the conductive layer 4004 (second wiring) The area of ​​the region where the and overlap each other decreases.

[0485] Therefore, the parasitic capacitance at the intersection of the wirings can be reduced.

[0486] In addition, since it is sufficient to reduce the area of ​​the overlapping regions of the wiring, , an area where the opening 4010 and the opening 4011 overlap, and an area where the opening 4010 and the opening 4011 overlap It is also possible to have both an area where the two do not overlap.

[0487] FIG. 32 shows an example of a semiconductor device other than a light emitting device.

[0488] FIG. 32A shows an example of a pixel circuit of a liquid crystal display device.

[0489] The circuit in FIG. 32(A) includes a transistor Tr, a capacitance element C, a liquid crystal element LC, and a wiring G (gate It has a line (D line), a line S (signal line), and a line CL (capacitance line).

[0490] The wiring G is electrically connected to the gate of the transistor Tr.

[0491] The wiring S is electrically connected to one of the source and the drain of the transistor Tr.

[0492] The wiring CL is electrically connected to one terminal (one electrode) of the capacitance element C.

[0493] The other of the source or drain of the transistor Tr and the other terminal of the capacitance element C (the other The electrode and the liquid crystal element LC are electrically connected to each other.

[0494] In FIG. 32(A), the combination of two wirings to which the configuration of FIG. 31 can be applied is Examples of such wiring include the wiring G and the wiring S, the wiring G and the wiring CL, and the like.

[0495] In order to reduce the number of processes, the wiring S is connected to the source electrode and drain electrode of the transistor Tr. It is preferable to form them in the same process.

[0496] In order to reduce the number of processes, the wiring G and the wiring CL are the same as the gate electrode of the transistor Tr. It is preferable to form it in a process.

[0497] FIG. 32B shows an example of a cell circuit of a memory device.

[0498] FIG. 32B shows an example of a DRAM.

[0499] The circuit in FIG. 32B includes a transistor Tr, a capacitance element C, a wiring W (word line), and a wiring B (bit line) and wiring CL (capacitance line).

[0500] The wiring W is electrically connected to the gate of the transistor Tr.

[0501] The wiring B is electrically connected to one of the source and the drain of the transistor Tr.

[0502] The wiring CL is electrically connected to one terminal (one electrode) of the capacitance element C.

[0503] The other of the source or drain of the transistor Tr and the other terminal of the capacitance element C (the other The terminals (electrodes) are electrically connected.

[0504] In FIG. 32(B), the combination of two wirings to which the configuration of FIG. 31 can be applied is Examples of such wiring include the wiring G and the wiring S, the wiring G and the wiring CL, and the like.

[0505] In order to reduce the number of processes, the wiring S is connected to the source electrode and drain electrode of the transistor Tr. It is preferable to form them in the same process.

[0506] In order to reduce the number of processes, the wiring G and the wiring CL are the same as the gate electrode of the transistor Tr. It is preferable to form it in a process.

[0507] An example of the configuration based on Figs. 31 and 32 is as follows.

[0508] Configuration A includes at least a transistor, a first wiring, and a second wiring. .

[0509] The first wiring has a first opening and is electrically connected to the gate of the transistor. .

[0510] The second wiring has a second opening and is electrically connected to one of the source and drain of the transistor. are connected to the network.

[0511] The second wiring is formed above or below the first wiring via an insulating layer. Then, it intersects with the first wiring.

[0512] The first opening and the second opening are partially or entirely connected to the intersection of the first wiring and the second wiring. That is, the first opening and the second opening are arranged at an overlapping position. It's fine to do so.

[0513] The first opening and the second opening have a non-overlapping area at the intersection.

[0514] However, in order to reduce parasitic capacitance, the first opening and the second opening are completely connected at the intersection. A non-overlapping configuration is most preferred.

[0515] As the configuration B, at least a transistor, a first wiring, a second wiring, and a third wiring The line and the capacitive element.

[0516] The first wiring has a first opening and is electrically connected to the gate of the transistor. .

[0517] The second wiring is electrically connected to one of the source and the drain of the transistor.

[0518] The third wiring has a third opening and is electrically connected to one terminal (one electrode) of the capacitor. Connected.

[0519] The other of the source or drain of the transistor and the other terminal (the other electrode) of the capacitor element , are electrically connected.

[0520] The third wiring is formed above or below the first wiring via an insulating layer. Then, it intersects with the first wiring.

[0521] The first opening and the third opening are partially or entirely connected to the intersection of the first wiring and the third wiring. That is, the first opening and the third opening are arranged at an overlapping position. It's fine to do so.

[0522] The first opening and the third opening have a non-overlapping area at the intersection.

[0523] However, in order to reduce parasitic capacitance, the first opening and the third opening are completely connected at the intersection. A non-overlapping configuration is most preferred.

[0524] Configuration A and Configuration B may be combined.

[0525] In addition, the transistors, capacitors, wirings, and the like described in this embodiment may be the same as those described in other embodiments. The described configurations are applicable.

[0526] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0527] (Embodiment 24) The materials for each layer will now be described.

[0528] The substrates used are glass substrates, quartz substrates, metal substrates (stainless steel substrates, etc.), semiconductor substrates, etc. The following are examples of the methods that can be used, but are not limited to these.

[0529] A base insulating film may be formed on the substrate.

[0530] The insulating layer can be made of any material that has insulating properties. Insulating film (silicon oxide film, silicon nitride film, silicon oxide film containing nitrogen, nitrogen film containing oxygen) silicon nitride film, aluminum nitride film, aluminum oxide film, hafnium oxide film), organic insulating film Insulating films (polyimide film, acrylic film, siloxane film) can be used, but are not limited to these. The insulating layer may have a single layer structure or a multilayer structure.

[0531] In addition, impurities such as alkali metals used in light-emitting elements are prevented from entering transistors. To prevent this, all insulating layers below the partition layer (interlayer insulating film, gate insulating film, etc.) are made of inorganic insulation. A membrane is preferred.

[0532] The conductive layer can be made of any material that is conductive. Aluminum film, titanium film, molybdenum film, tungsten film, gold film, silver film, copper film, donor source Silicon films containing elements or acceptor elements, films made of various alloys, transparent conductive films (I The conductive layer may be a single layer. It may be a laminated structure.

[0533] The semiconductor layer can be any semiconductor material. Examples of the semiconductor film that can be used include, but are not limited to, a semiconductor film having a conductivity of 100 nm, an oxide semiconductor film, an organic semiconductor film, and the like. The semiconductor layer may be a single layer or a multilayer structure. The semiconductor film (island-shaped semiconductor film) formed on the SOI substrate becomes the semiconductor layer. Transistors formed using silicon wafers are also included in the TFT. In the case of a silicon wafer, the silicon wafer itself corresponds to the semiconductor layer.

[0534] In addition, a donor element or an acceptor element is added to the source region and the drain region of the semiconductor layer. The inclusion of such a metal is preferable since it can reduce the resistance of the source and drain regions. stomach.

[0535] Semiconductor films containing silicon include silicon (Si), silicon germanium (S Examples of suitable materials include, but are not limited to, silicon carbide (SiC), silicon carbide (SiGe), and the like.

[0536] The oxide semiconductor preferably contains indium (In) or zinc (Zn). In particular, it is preferable that the alloy contains both In and Zn.

[0537] In addition, a stabilizer for reducing variations in the electrical characteristics of transistors using oxide semiconductors has been developed. As risers, gallium (Ga), tin (Sn), hafnium (Hf), and aluminum It is preferable that the element contains one or more elements selected from the group consisting of (Al), and lanthanides.

[0538] Lanthanides include lanthanum (La), cerium (Ce), praseodymium (Pr), Neodymium (Nd), Samarium (Sm), Europium (Eu), Gadolinium (Gd) , terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (E r), thulium (Tm), ytterbium (Yb), and lutetium (Lu).

[0539] For example, indium oxide, tin oxide, zinc oxide, etc. are used as oxide semiconductors of single-element metals. It can be used.

[0540] In addition, for example, as a binary metal oxide semiconductor, In-Zn oxide, Sn-Zn oxide, Oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxides, In-Mg oxides Oxides, In-Ga-based oxides, etc. can be used.

[0541] In addition, for example, In-Ga-Zn oxide (IGZ) is used as an oxide semiconductor of a ternary metal. O), In-Sn-Zn oxide, Sn-Ga-Zn oxide, In-Al -Zn-based oxide, In-Hf-Zn-based oxide, In-La-Zn-based oxide, In-Ce- Zn-based oxide, In-Pr-Zn-based oxide, In-Nd-Zn-based oxide, In-Sm-Z n-type oxides, In-Eu-Zn-type oxides, In-Gd-Zn-type oxides, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide Oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In-Lu-Zn ​​oxide Examples of materials that can be used include oxides of Al-Ga-Zn system, Sn-Al-Zn system oxides, and the like.

[0542] In addition, for example, as an oxide semiconductor of a quaternary metal, In-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al -Zn oxide, In-Sn-Hf-Zn oxide, In-Hf-Al-Zn oxide, etc. can be used.

[0543] In this case, for example, In-Ga-Zn oxide is an oxide containing In, Ga, and Zn. It means oxide, and the ratio of In, Ga, and Zn does not matter. Also, In, Ga, and Zn Metal elements other than these may be contained.

[0544] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3) or In: In-Ga-Zn system with an atomic ratio of Ga:Zn=2:2:1 (=2 / 5:2 / 5:1 / 5) It is possible to use oxides having compositions close to those of the oxides.

[0545] Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Sn :Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn=2:1: In-Sn-Zn oxide with an atomic ratio of 5 (=1 / 4:1 / 8:5 / 8) and its neighboring compositions Alternatively, an oxide of the above may be used.

[0546] However, it is not limited to these, and the required semiconductor characteristics (mobility, threshold, variation, etc.) In order to obtain the required semiconductor characteristics, Carrier concentration, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. It is preferable to make the following appropriate.

[0547] The semiconductor layer may be single crystalline or non-single crystalline.

[0548] In the case of non-single crystal, it may be amorphous or polycrystalline. Also, a portion having crystallinity in an amorphous state may be In addition, since amorphous has many defects, non-amorphous is preferable. .

[0549] In addition, when forming a transistor with an inverted staggered structure, the semiconductor layer and the source electrode, In addition, a semiconductor layer containing a donor element or an acceptor element is provided between the semiconductor layer and the drain electrode. An impurity semiconductor layer (buffer layer) may be interposed.

[0550] The donor element for silicon-containing semiconductors is, for example, phosphorus. An example of the acceptor element of the semiconductor is boron.

[0551] When forming an organic EL element, the electroluminescent layer contains at least an organic compound. The light-emitting unit has a light-emitting layer including the

[0552] When forming an organic EL element, the light-emitting unit includes an electron injection layer, an electron transport layer, and a light-emitting layer. , a hole injection layer, a hole transport layer, etc.

[0553] In addition, when forming an organic EL element, a plurality of light-emitting units and a plurality of light-emitting units are formed. By forming a structure having a plurality of charge generating layers, the brightness can be improved. .

[0554] The charge generating layer may be a metal, an oxide conductive material, a laminated structure of a metal oxide and an organic compound, or a metal Mixtures of metal oxides and organic compounds can also be used.

[0555] As the charge generating layer, a laminated structure of a metal oxide and an organic compound, a laminated structure of a metal oxide and an organic compound, When a mixture of these materials is used, holes are injected toward the cathode when a voltage is applied, and the current is diverted toward the anode. This is advantageous because it allows the injection of

[0556] Suitable metal oxides for use in the charge generating layer include vanadium oxide, niobium oxide, tantalum oxide, and Cr oxide, molybdenum oxide, tungsten oxide, manganese oxide, rhenium oxide, etc. It is a transition metal oxide.

[0557] As the organic compound used in the charge generating layer, an amine compound (particularly, an aryl amine compound) is preferably used. Compounds such as carbazole derivatives, aromatic hydrocarbons, and Alq are used to prepare transition metal oxides. It is preferable because it forms a charge transfer complex with

[0558] When forming an inorganic EL element, the electroluminescent layer contains at least an inorganic compound. The light-emitting unit has a light-emitting layer including the

[0559] It is also preferable that the light-emitting layer containing an inorganic compound is sandwiched between a pair of dielectric layers.

[0560] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0561] (Embodiment 25) An example of a method for manufacturing a light-emitting device having a top-gate type TFT will be described.

[0562] First, a semiconductor film is formed on a substrate, and then the semiconductor film is patterned to form island-shaped semiconductor layers. do.

[0563] The semiconductor film may be formed after a base insulating film is formed on the surface of the substrate.

[0564] Furthermore, an island-shaped dummy semiconductor layer may be formed when the semiconductor film is patterned.

[0565] Next, a gate insulating film is formed on the semiconductor layer.

[0566] Next, a conductive film is formed on the gate insulating film, and the conductive film is patterned to form gate electrodes and wiring , island-shaped dummy electrodes, etc. are formed.

[0567] The patterning process is carried out, for example, by forming a mask on a predetermined film (starting film) and then using the mask. In this case, the masking process means processing a predetermined film (starting film) into a predetermined shape and removing the mask.

[0568] Next, a donor element or an acceptor element is added to the semiconductor layer as required.

[0569] Next, a first interlayer insulating film is formed on the gate electrode.

[0570] Next, contact holes are formed in the first interlayer insulating film and the gate insulating film.

[0571] Next, a conductive film is formed on the first interlayer insulating film, and the conductive film is patterned to form a source electrode. , a drain electrode, wiring, an island-shaped dummy electrode, etc. are formed.

[0572] Next, a second interlayer insulating film is formed on the source electrode and the drain electrode.

[0573] Next, a contact hole is formed in the second interlayer insulating film.

[0574] Next, a conductive film is formed on the second interlayer insulating film, and the conductive film is patterned to form a first electrode, Auxiliary wiring, etc. are formed.

[0575] Next, a planarizing film is formed on the first electrode and the auxiliary wiring.

[0576] Next, an opening is formed in the planarizing film.

[0577] If the planarization film is photosensitive, the openings are formed by exposing the planarization film to light and developing it. It can be achieved.

[0578] If the flattening film is non-photosensitive, openings can be formed by patterning. can.

[0579] Next, an electroluminescent layer is formed on the first electrode.

[0580] Next, a second electrode is formed on the electroluminescent layer, the planarizing film, and the auxiliary wiring. Complete.

[0581] In addition, when the electroluminescent layer and the second electrode are formed by a deposition method, the deposition method is By using a deposition mask, the electroluminescent layer and the second electrode are formed in a predetermined shape. can be formed.

[0582] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0583] (Embodiment 26) An example of a method for manufacturing a light-emitting device having a bottom-gate type TFT will be described.

[0584] In this embodiment, an example of a light emitting device having a channel etch type TFT with an inverted staggered structure is shown. show.

[0585] First, a conductive film is formed on a substrate, and then the conductive film is patterned to form gate electrodes, wiring, and island-shaped Dummy electrodes and the like are formed.

[0586] The conductive film may be formed after forming a base insulating film on the surface of the substrate.

[0587] Next, a gate insulating film is formed on the gate electrode.

[0588] A conductive layer in the same layer as the source electrode and the drain electrode and a conductive layer in the same layer as the gate electrode are directly When making a connection, a contact hole is formed in the gate insulating film.

[0589] On the other hand, when forming a connection wiring in the same process as the first electrode (pixel electrode), This eliminates the need for a process for forming contact holes in the gate insulating film.

[0590] Next, a semiconductor film is formed on the gate insulating film, and the semiconductor film is patterned to form island-shaped semiconductor A layer is formed.

[0591] In addition, an impurity semiconductor film containing a donor element or an acceptor element is formed on the semiconductor film. The semiconductor film and the impurity semiconductor film are patterned to form island-shaped semiconductor layers and island-shaped impurity semiconductor layers. A conductive layer may be formed.

[0592] Furthermore, an island-shaped dummy semiconductor layer may be formed when the semiconductor film is patterned.

[0593] Furthermore, when patterning the impurity semiconductor film, an island-shaped dummy impurity semiconductor layer is formed. That's fine.

[0594] Next, a conductive film is formed on the semiconductor layer and the gate insulating film, and the conductive film is patterned. A source electrode, a drain electrode, wiring, an island-shaped dummy electrode, etc. are formed.

[0595] In addition, when an impurity semiconductor layer is formed, the impurity semiconductor layer between the source electrode and the drain electrode The body layer is etched away.

[0596] In addition, the process of patterning the conductive film or the process of removing the impurities between the source electrode and the drain electrode The process of etching and removing the pure semiconductor layer forms a The surface of the semiconductor layer is etched.

[0597] Next, an interlayer insulating film is formed on the source electrode and the drain electrode.

[0598] Next, a first contact hole is formed in the interlayer insulating film, and the interlayer insulating film and the gate insulating film are A second contact hole is formed in the insulating film.

[0599] To reduce the number of steps, the first and second contact holes are formed simultaneously. It is preferable to do so.

[0600] Next, a conductive film is formed on the interlayer insulating film, and the conductive film is patterned to form a first electrode, a connection wire, and a second electrode. Lines, auxiliary wiring, capacitance electrodes, etc. are formed.

[0601] Next, a planarizing film is formed on the first electrode and the auxiliary wiring.

[0602] Next, an opening is formed in the planarizing film.

[0603] If the planarization film is photosensitive, the openings are formed by exposing the planarization film to light and developing it. It can be achieved.

[0604] If the flattening film is non-photosensitive, openings can be formed by patterning. can.

[0605] Next, an electroluminescent layer is formed on the first electrode.

[0606] Next, a second electrode is formed on the electroluminescent layer, the planarizing film, and the auxiliary wiring. Complete.

[0607] In addition, when the electroluminescent layer and the second electrode are formed by a deposition method, the deposition method is By using a deposition mask, the electroluminescent layer and the second electrode are formed in a predetermined shape. can be formed.

[0608] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate.

[0609] (Embodiment 27) The light emitting device and the semiconductor device described in the other embodiments are, for example, mounted on a display unit of an electronic device. It is possible.

[0610] Electronic devices include televisions, computers, cameras, telephones (landline and mobile), mobile phones, Examples of such terminals include, but are not limited to, mobile terminals.

[0611] A part or all of the configuration described in this embodiment may be the same as that described in other embodiments. It may be implemented in combination with some or all of the above as appropriate. [Explanation of symbols]

[0612] 50 Substrates 101 Conductive layer 102 Conductive layer 103 Conductive layer 104 Conductive layer 200 Insulation layer 301 Semiconductor layer 302 Semiconductor layer 401 Conductive layer 402 Conductive layer 403 Conductive layer 404 Conductive layer 405 Conductive Layer 406 Conductive Layer 500 Insulation Layer 601 Conductive layer 602 Conductive layer 603 Conductive layer 604 Conductive layer 605 Conductive Layer 700 Insulation Layer 801 Electroluminescent Layer 900 Conductive layer 1050 Board 1100 Transistor 1110 Semiconductor layer 1111 Insulation layer 1112 Conductive layer 1113 Insulating layer 1114 Conductive layer 1115 Conductive layer 1120 Insulating layer 1130 Insulating layer 1211 Conductive layer 1212 Conductive layer 1220 Electroluminescent Layer 1230 Conductive layer 1300 Conductive layer 1400 Conductive layer 1500 Encapsulating material 1600 Sealed body 1700 FPC 4001 Substrate 4002 Conductive layer 4003 Insulation layer 4004 Conductive layer 4005 Insulation layer 4006 Conductive layer 4007 Insulation layer 4008 Conductive layer 4009 Opening 4010 Opening 4011 Opening Tr Transistor Tr1 Transistor Tr2 Transistor Tr3 Transistor Tr4 Transistor Tr5 Transistor Tr6 Transistor C Capacitive element C1 Capacitive element C2 Capacitor element S wiring R wiring V wiring V1 wiring V2 wiring G wiring G1 Wiring G2 Wiring G3 Wiring CL wiring B Wiring W Wiring EL light emitting element LC Liquid Crystal Device

Claims

1. A pixel portion having a plurality of pixels, At least one of the plurality of pixels is a light-emitting device having a light-emitting element and a transistor electrically connected to the light-emitting element, The pixel unit includes: a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a third conductive layer having a region located on the first insulating layer and functioning as a source electrode or a drain electrode of the transistor; a fourth conductive layer having a region overlapping the second conductive layer via the first insulating layer and having the same material as the third conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer and a region in contact with an upper surface of the fourth conductive layer; a fifth conductive layer having a region located on the second insulating layer and functioning as a first electrode of the light-emitting element; a sixth conductive layer having a region overlapping with the fourth conductive layer via the second insulating layer and having the same material as the fifth conductive layer; an EL layer having a region located on the fifth conductive layer; a third insulating layer having a region located on the fifth conductive layer and a region located on the sixth conductive layer; a seventh conductive layer having a region located on the third insulating layer and functioning as a second electrode of the light-emitting element; the sixth conductive layer has a region that does not overlap the EL layer and overlaps with the second conductive layer; the third insulating layer has an opening; the seventh conductive layer has a region in contact with an upper surface of the sixth conductive layer through the opening in the third insulating layer.

2. A pixel portion having a plurality of pixels, At least one of the plurality of pixels is a light-emitting device having a light-emitting element and a transistor electrically connected to the light-emitting element, The pixel unit includes: a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a third conductive layer having a region located on the first insulating layer and functioning as a source electrode or a drain electrode of the transistor; a fourth conductive layer having a region overlapping the second conductive layer via the first insulating layer and having the same material as the third conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer and a region in contact with an upper surface of the fourth conductive layer; a fifth conductive layer having a region located on the second insulating layer and functioning as a first electrode of the light-emitting element; a sixth conductive layer having a region overlapping with the fourth conductive layer via the second insulating layer and having the same material as the fifth conductive layer; an EL layer having a region located on the fifth conductive layer; a third insulating layer having a region located on the fifth conductive layer and a region located on the sixth conductive layer; a seventh conductive layer having a region located on the third insulating layer and functioning as a second electrode of the light-emitting element; the second conductive layer is provided with an opening; the sixth conductive layer has a region that does not overlap the EL layer and overlaps with the second conductive layer; the third insulating layer has an opening; the seventh conductive layer has a region in contact with an upper surface of the sixth conductive layer through the opening in the third insulating layer.

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