Thermal structure adapted to the height of electronic devices within an integrated circuit (IC) package.

Abstract

The IC package includes a heat generating device and an electrical device on a surface of a substrate, a mold compound disposed on the electrical device, and a thermal structure disposed on the heat generating device without the mold compound to improve heat dissipation. In one example, the thermal structure includes a thermally conductive material (TIM) layer and a heat sink. In one example, the TIM layer extends from the heat generating device to a height below the mold compound, and the heat sink includes a flat outer surface above the heat generating device and the electrical device. In one example, a first heat sink portion of the heat sink on the heat generating device can be of a different thickness than a second heat sink portion of the heat sink on the electrical device. The thermal structure reduces a thermal resistance between the heat generating device and the heat sink.

Description

[Technical field]

[0001] Priority Application This application claims priority to U.S. patent application Ser. No. 17 / 188,236, filed Mar. 1, 2021, and entitled “THERMAL STRUCTURES ADAPTED TO ELECTRONIC DEVICE HEIGHTS IN INTEGRATED CIRCUIT (IC) PACKAGES,” which is incorporated by reference in its entirety.

[0002] The field of the disclosure relates generally to removing excess heat generated within an integrated circuit (IC) package. [Background technology]

[0003] Mobile devices are capable of complex functions provided by an application processor that executes application software. The application processor is typically one of several electronic devices coupled to a substrate in an integrated circuit (IC) package. The IC package may also include circuitry for receiving, amplifying, and transmitting radio frequency (RF) signals to provide wireless interface capabilities. Other electronic devices on the substrate in the IC package include memory chips, power management integrated circuits (PMICs), and surface mounted devices (SMDs). PMICs are active devices used to power other electronic devices such as application processors. SMDs may be passive electrical components required to process RF signals. PMICs and other devices generate large amounts of heat that must be removed from the IC package to avoid negative performance effects caused by high temperatures, and even premature device failure. Therefore, after fixing all components on the substrate in an adhesive encapsulant, a heat dissipation solution (e.g., heat sink or heat pipe) is provided on the exterior of the package to conduct away excess heat generated within the package. Summary of the Invention [Means for solving the problem]

[0004] The embodiments disclosed herein include a thermal structure adapted to the height of an electronic device in an integrated circuit (IC) package. The IC package includes a plurality of electronic devices of different heights coupled to a surface of a substrate. The IC package has a flat outer surface above the electronic devices of different heights. In this regard, a molding compound is disposed on the surface of the substrate to a certain depth that covers the tallest electronic device. A thermal structure is disposed on the surface of the molding compound to dissipate heat generated by the device. The thermal structure may also provide a flat outer surface for the IC package. In existing IC packages, heat generated by a low height heat generating device, such as a power management integrated circuit (PMIC), must be conducted through the thickness of the molding compound to the thermal structure. However, the molding compound is a poor thermal conductor.

[0005] In an exemplary embodiment, an IC package includes a heat-generating device and an electric device on a surface of a substrate, a mold compound disposed on the electric device, and a thermal structure disposed on the heat-generating device without the mold compound to improve heat dissipation. In one example, the thermal structure can include a thermally conductive material (TIM) layer. In another example, the thermal structure can include a heat sink. In one example, the TIM layer extends in a thickness direction from the heat-generating device to a height equal to or less than the height of the mold compound on the electric device (i.e., above the surface), and the heat sink includes a flat outer surface above the heat-generating device and the electric device. In one example, a first heat sink portion of the heat sink on the heat-generating device can be of a different thickness than a second heat sink portion of the heat sink on the electric device. Disposing the TIM layer on the heat-generating device without the mold compound on the heat-generating device reduces thermal resistance between the heat-generating device and the heat sink.

[0006] In this regard, in one aspect, an IC package is disclosed. The IC package includes a substrate including a surface. The IC package also includes a heat generating device on the substrate surface. The heat generating device includes a first surface at a first distance from the surface. The IC package also includes an electrical device on the substrate surface. The electrical device includes a second surface at a second distance from the surface that is greater than the first distance. The IC package also includes a molding compound disposed on the second surface of the electrical device and including a third surface at a third distance from the surface that is greater than the second distance. The IC package also includes a thermal structure formed on the first surface of the heat generating device and on the third surface of the molding compound. The thermal structure includes a flat outer surface.

[0007] In another aspect, a method of fabricating an IC package is disclosed. The method includes coupling a heat generating device to a surface of a substrate. The heat generating device includes a first surface at a first distance from the surface. The method also includes coupling an electrical device to the surface. The electrical device includes a second surface at a second distance from the surface that is greater than the first distance. The method also includes forming a thermal structure on the first surface of the heat generating device, the thermal structure including a flat outer surface spaced apart from the second surface of the electrical device. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional side view of a conventional integrated circuit (IC) package including at least one heat-generating device, a heat sink over the heat-generating device, and a mold compound between the heat-generating device and the heat sink. [Diagram 2] FIG. 2 is a cross-sectional side view of an exemplary IC package including a heat-generating device and a higher electrical device mounted together on a substrate and a thermal structure above the electrical device and above the heat-generating device to improve conduction of heat from the heat-generating device. [Figure 3A] 3A-3C illustrate fabrication stages in a first exemplary process for fabricating the IC package of FIG. 2. [Figure 3B]3A-3C illustrate fabrication stages in a first exemplary process for fabricating the IC package of FIG. 2. [Figure 3C] 3A-3C illustrate fabrication stages in a first exemplary process for fabricating the IC package of FIG. 2. [Figure 3D] 3A-3C illustrate fabrication stages in a first exemplary process for fabricating the IC package of FIG. 2. [Figure 4] 4 is a flow chart illustrating a first exemplary process including the fabrication steps of FIGS. 3A-3D. [Figure 5A] 3A-3C are diagrams of fabrication stages in a second exemplary process for fabricating the IC package of FIG. 2. [Figure 5B] 3A-3C are diagrams of fabrication stages in a second exemplary process for fabricating the IC package of FIG. 2. [Figure 5C] 3A-3C are diagrams of fabrication stages in a second exemplary process for fabricating the IC package of FIG. 2. [Figure 5D] 3A-3C are diagrams of fabrication stages in a second exemplary process for fabricating the IC package of FIG. 2. [Figure 6] 3 is a cross-sectional side view illustrating a first orientation of a thermal structure disposed over a heat-generating device and an electrical device coupled to a substrate in the IC package shown in FIG. 2. [Figure 7] 7 is a cross-sectional side view of an electrical device including the IC package shown in FIG. 2 in the orientation shown in FIG. 6 as part of a thermal management solution. [Figure 8] 7 is a cross-sectional side view of an electrical device including the IC package shown in FIG. 2 in the orientation shown in FIG. 6 as part of a thermal management solution. [Figure 9] 3 is a cross-sectional side view illustrating a second orientation of the thermal structure disposed over the heat-generating device and the electrical device coupled to the substrate in the IC package shown in FIG. 2. [Figure 10] 10 is a cross-sectional side view of an electrical device including the IC package shown in FIG. 2 in the orientation shown in FIG. 9 as part of a thermal management solution. [Figure 11]10 is a cross-sectional side view of an electrical device including the IC package shown in FIG. 2 in the orientation shown in FIG. 9 as part of a thermal management solution. [Figure 12] 3 is a block diagram of an example wireless communication device including a radio frequency (RF) module that includes an IC package that includes the thermal structure of FIG. 2. [Figure 13] FIG. 2 is a block diagram of an exemplary IC package including a heat-generating device and an electrical device on a surface of a substrate, and a thermal structure spaced apart from the electrical device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, according to any of the embodiments shown in FIGS. 2, 3D, and 5D and disclosed herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Several exemplary aspects of the present disclosure will now be described with reference to the drawings. The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.

[0010] The embodiments disclosed herein include a thermal structure adapted to the height of an electronic device in an integrated circuit (IC) package. The IC package includes a plurality of electronic devices of different heights coupled to a surface of a substrate. The IC package has a flat outer surface above the electronic devices of different heights. In this regard, a molding compound is disposed on the surface of the substrate to a certain depth that covers the tallest electronic device. A thermal structure is disposed on the surface of the molding compound to dissipate heat generated by the device. The thermal structure may also provide a flat outer surface for the IC package. In existing IC packages, heat generated by a low height heat generating device, such as a power management integrated circuit (PMIC), must be conducted through the thickness of the molding compound to the thermal structure. However, the molding compound is a poor thermal conductor.

[0011] In an exemplary embodiment, an IC package includes a heat-generating device and an electric device on a surface of a substrate, a mold compound disposed on the electric device, and a thermal structure disposed on the heat-generating device without the mold compound to improve heat dissipation. In one example, the thermal structure can include a thermally conductive material (TIM) layer. In another example, the thermal structure can include a heat sink. In one example, the TIM layer extends in a thickness direction from the heat-generating device to a height equal to or less than the height of the mold compound on the electric device (i.e., above the surface), and the heat sink includes a flat outer surface above the heat-generating device and the electric device. In one example, a first heat sink portion of the heat sink on the heat-generating device can be of a different thickness than a second heat sink portion of the heat sink on the electric device. Disposing the TIM layer on the heat-generating device without the mold compound on the heat-generating device reduces thermal resistance between the heat-generating device and the heat sink.

[0012] FIG. 1 is a cross-sectional side view of a conventional IC package 100 that provides a reference for describing the heat dissipation problem addressed by the embodiments disclosed herein. The IC package 100 includes at least one heat generating device 102 on a surface 104 of a substrate 106, a heat sink 108 above the heat generating device 102, and a mold compound 110 between the heat generating device 102 and the heat sink 108. The heat sink 108 may include a TIM layer (not shown). The IC package 100 also includes at least one electric device 112 on the surface 104 that is taller than the heat generating device 102. In this example, the surface 104 extends in an X-axis direction and a Y-axis direction orthogonal to the X-axis direction. The height of the electric device 112 extends further than the heat generating device 102 in a Z-axis direction orthogonal to the surface 104. The mold compound 110 is disposed on the surface 104 to a depth that covers the electric device 112 and fixes the heat generating device 102 and the electric device 112 on the substrate 106. Parallel to surface 104, mold compound 110 has a flat outer surface 114 on which heat sink 108 is disposed. Heat sink 108 is formed of a material 116 having a high thermal conductivity, such as copper, to remove heat from IC package 100. However, mold compound 110 is a poor thermal conductor. Therefore, mold compound 110 does not effectively conduct heat generated within heat-generating device 102 to heat sink 108, causing a temperature increase in IC package 100.

[0013] The IC package 100 may include an application processor 118 or other devices 120 on the surface 104 or on the opposing surface 122 of the substrate 106. The IC package 100 may include an additional substrate 124 electrically coupled to the substrate 106 as well as to other devices 126. The performance of the application processor 118 and other devices 120 and 126 may be negatively affected by elevated temperatures. In addition, excessive heat may also cause damage to the IC package 100 or premature failure of any devices within the package. Thus, improvements in the heat dissipation capabilities of the IC package 100 are needed.

[0014] 2 is a cross-sectional side view of an exemplary IC package 200 illustrating an exemplary embodiment of the IC package 200 for reference in the following description. The IC package 200 includes a heat generating device 202 and an electrical device 204, each on (e.g., coupled to and / or mounted to) a surface 206 of a substrate 208. The IC package 200 includes a mold compound 210 disposed on the surface 206 of the substrate 208 and on the electrical device 204, but not on the heat generating device 202. The IC package 200 includes a thermal structure 212 arranged on the heat generating device 202. In this manner, thermal resistance between the heat generating device 202 and a flat outer surface 214 of the IC package 200 is reduced.

[0015] In one example, the heat generating device 202 includes a first surface 216 facing the substrate 208. The first surface 216 is spaced a first distance D from the surface 206 in a direction perpendicular to the first surface 216. 1 For example, as shown in FIG. 2, the first surface 216 extends in an X-axis direction and a Y-axis direction perpendicular to the X-axis direction and is spaced apart by a distance D 1 is measured in a Z-axis direction, which is orthogonal to the X-axis and Y-axis directions. In one example, the heat generating device 202 may be a PMIC die or PMIC package 218 disposed within the IC package 200 to power an IC 220, such as an application processor 220 or package. Alternatively, the heat generating device 202 may be an application processor or any integrated circuit or memory, such as a double data rate (DDR) static random access memory (SRAM) or universal flash storage (UFS), or any other type of device mounted on a substrate within an IC package. As shown in FIG. 2, the application processor 220 may be mounted on a back surface 221 of the substrate 208 opposite the front surface 206.

[0016] The electrical device 204 is at a distance D from the surface 206. 1 The larger second distance D 22 includes a second surface 222 at the substrate 208. The electrical device 204 in the example of FIG. 2 may be any surface mounted device (SMD), such as a passive electrical component, that operates in an electrical circuit. In addition, the electrical device 204 may be any active or passive electrical component or device that has a surface that is higher in height above the substrate 208 than the heat generating device 202. In one example, the electrical device 204 is an indicator 224, but may also be a capacitor or resistor. The inductance or Q factor may be increased by increasing the size of the inductor 224. Thus, the distance D of the electrical device 204 to the second surface 222 may be increased by increasing the size of the inductor 224. 2 is at least a distance D from the surface 206 to the first surface 216. 1 It can be more than twice as long.

[0017] The mold compound 210 is disposed on the surface 206 beside the heat generating device 202, the electrical device 204, and other devices 226 on the surface 206. The mold compound 210 is also disposed at a distance D from the surface 206. 2 2. The mold compound 210 is disposed on the second surface 222 of the electrical device 204 at a distance D 2 The larger distance D 3 2. The heat generating device 202 has a third surface 228 at 200. The mold compound 210 is not disposed on the first surface 216 of the heat generating device 202. Rather than filling the space above the first surface 216 with mold compound 210, which is a poor thermal conductor, a thermal structure 212 is disposed on the first surface 216 of the heat generating device 202. The thermal structure 212 also forms the flat outer surface 214 of the IC package 200.

[0018] 2 includes a TIM layer 230 and a heat sink 232. The TIM layer 230 may be, for example, a conductive paste or a conductive tape disposed on the first surface 216 of the heat generating layer 202. The TIM layer 230 may include, for example, metal fillers and / or carbon nanotubes to provide high thermal conductivity. The heat sink 232 has high thermal conductivity and may be, for example, a metal layer such as copper. The thickness T of the TIM layer 230 may be, for example, 100 μm. TIM is the distance D from the first surface 216 of the heat generating device 202 to the surface 206 4 The distance D extends to the fourth surface 234 of the TIM layer 230 at 4 is the distance D of the first surface 216 of the heat generating device 202 1 is greater than the distance D of the third surface 228 of the mold compound 210 from the surface 206. 3 The following is the result.

[0019] The heat sink 232 is disposed on the fourth surface 234 of the TIM layer 230, and also on the third surface 228 of the mold compound 210. The heat sink 232 includes a flat outer surface 214 opposite the fourth surface 234 and the third surface 228 that extends across the heat generating device 202 and the electrical device 204. The flat outer surface 214 is spaced apart from the fourth surface 234 of the TIM layer 230 by a distance D. 4 A fifth distance D from the surface 206 is larger than 5 The fifth distance D 5 is also the distance D of the third surface 228 of the mold compound 210 3 Greater than.

[0020] On the fourth surface 234 of the TIM layer 230, the heat sink 232 is spaced apart by a distance D 5 and distance D 4 The first thickness T corresponds to the difference between HS1 On the third surface 228 of the mold compound 210, the heat sink 232 has a distance D 5 and distance D 3 The second thickness T corresponds to the difference between HS2Within the thermal structure 212, the TIM layer 230 is disposed on the first surface 216 of the heat generating device 202. In this context, "disposed on" means that there is no mold compound 210 between the TIM layer 230 and the first surface 216. The TIM layer 230 may be directly on the first surface 216 without an intervening layer, or there may be one or more intervening layers that are beneficial for thermal conduction with low thermal resistance, for example. Additionally, the heat sink 232 is spaced apart from the first surface 216 by a distance D to provide a low thermal resistance thermal conduction path away from the heat generating device 202 while still providing a flat exterior surface 214 of the IC package 200. 3 and D. 4 According to the first thickness T HS1 and the second thickness T HS2 has.

[0021] In the example of FIG. 2, IC package 200 also has a second surface 222 at a second distance D from surface 206. 2 Distance D is less than or equal to 6 The IC package 200 includes a second heat generating device 236 including a sixth surface 238 at a position between the second heat generating device 236 and the heat sink 232. The IC package 200 includes a second TIM layer 240 on the sixth surface 238 between the second heat generating device 236 and the heat sink 232 to provide a low thermal resistance thermal conduction path from the second heat generating device 236 to the heat sink 232.

[0022] 2, the IC package 200 also includes a third device 242, such as an SMD and / or a passive device. The third device 242 is located at a distance D from the surface 206 of the heat-generating device 202. 1 The third device 242 includes a larger seventh surface 244. The mold compound 210 is disposed on the seventh surface 244 between the third device 242 and the heat sink 232.

[0023] 2 also includes a second substrate 246 coupled to the backside 221 of the substrate 208. Additional IC devices 248 (e.g., memory chips) are coupled to the second substrate 246, for access by, for example, the application processor 220 or other devices on the substrate 208.

[0024] Example dimensions of features of IC package 200 are as follows: - Distance D 1 = ~400 microns (μm), - Distance D 2 = 400μm~750μm, - Distance D 3 = Distance D 2 +>50μm=700μm~1mm, - Distance D 4 = Distance D 1 +100~200μm, - Distance D 5 = Distance D 3 +>25μm, - T HS1 = ~200 μm, and - T HS2 =>25μm.

[0025] IC packages including the exemplary embodiments disclosed herein are not limited to the above dimensions.

[0026] 3A-3D are diagrams of fabrication stages 300A-300D corresponding to steps in a first example of an exemplary process 400 shown in the flowchart of FIG. 4 for fabricating the IC package 200 of FIG. 2. Fabrication stage 300A in FIG. 3A corresponds to bonding a heat-generating device 202 to a surface 206 of a substrate 208 (block 402). The heat-generating device 202 is bonded to a first distance D from the surface 206. 1 3A also corresponds to coupling the electrical device 204 to the surface 206, the electrical device 204 being at a first distance D from the surface 206. 1 The larger second distance D2 The second surface 222 in the first region 222 is included (block 404).

[0027] 3B and 3C correspond to forming a thermal structure 212 on the first surface 216 of the heat generating device 202 and spaced apart from the second surface 222 of the electrical device 204, the thermal structure 212 including a flat outer surface 214 (block 406). As shown in FIG. 3B, forming the thermal structure 212 includes forming a TIM layer 230 on the first surface 216 of the heat generating device 202, the TIM layer 230 including a fourth surface 234. 3C illustrates a fabrication stage 300C in which forming the thermal structure 212 further includes forming a first portion 232A of the heat sink 232 on the fourth surface 234 of the TIM layer 230 and forming a second portion 232B of the heat sink 232 spaced from the second surface 222 of the electrical device 204, the heat sink 232 including the flat outer surface 214 of the thermal structure 212. Forming the first portion 232A of the heat sink 232 includes forming a first thickness T HS1 Forming the second portion 232B of the heat sink 232 includes forming the first portion 232A to have a second thickness T that extends from the flat outer surface 214 but is less than the distance from the flat outer surface 214 to the second surface 222 of the electrical device 204. HS2 forming the second portion 232B of the heat sink 232 having a first surface 222 such that the second portion 232B of the heat sink 232 is spaced apart from the second surface 222 of the electrical device 204.

[0028] In one example, the process 400 may include additional steps (not shown in the flowchart of FIG. 4 ) corresponding to the fabrication stage 300D of FIG. 3D , including disposing the mold compound 210 on the surface 206 of the substrate 208 and on the second surface 222 of the electrical device 204. In one example, disposing the mold compound 210 further includes injecting the mold compound 210 between the second surface 222 of the electrical device 204 and the second portion 232B of the heat sink 232, for example in a transfer molding process. In this regard, the mold compound 210 is injected or possibly pressed between the second portion 232B of the heat sink 232 where the heat sink 232 is spaced from the second surface 222 of the electrical device 204. Because the TIM layer 230 is disposed on the first surface 216 of the heat generating device 202, the mold compound 210 is not injected between the thermal structure 212 and the first surface 216. Thus, heat generated in heat-generating device 202 does not have to travel across the poorly conductive mold compound 210 but instead has a low thermal resistance path to conduct the heat away from IC package 200.

[0029] 5A-5D are diagrams of fabrication stages 500A-500D corresponding to steps in a second example of the exemplary process 400 shown in the flowchart of FIG 4 for fabricating the IC package 200 of FIG 2. Fabrication stage 500A in FIG 5A corresponds to step 402 of bonding the heat-generating device 202 to the surface 206 of the substrate 208, where the heat-generating device 202 is spaced a distance D from the surface 206. 1 5A also corresponds to step 404 of coupling the electrical device 204 to the surface 206, where the electrical device 204 is at a first distance D from the surface 206. 1 The larger second distance D 2 The second surface 222 at

[0030] In contrast to the transfer molding process shown in Figure 3D, the second example of process 400 includes a step corresponding to fabrication stage 500B of Figure 5B of forming mold compound 210 on surface 206 of substrate 208 and on second surface 222 of electrical device 204. The diagram of fabrication stage 500B of Figure 5B shows the result after forming mold compound 210 on first surface 216 of heat generating device 202 and removing mold compound 210 from first surface 216 of heat generating device 202. After removing mold compound 210 from first surface 216, the second example of process 400 proceeds to step 406, which corresponds to fabrication stages 500C and 500D.

[0031] 5C and 5D correspond to step 406 of forming a thermal structure 212 on the first surface 216 of the heat generating device 202 and including a flat outer surface 214 spaced apart from the second surface 222 of the electrical device 204. That is, the fabrication stage 500C diagram of FIG. 5C shows the TIM layer 230 formed on the first surface 216 of the heat generating device 202, and the fabrication stage 500D diagram of FIG. 5D shows the heat sink 232 formed on the fourth surface 234 of the TIM layer 230 and spaced apart from the second surface 222 of the electrical device 204. The mold compound 210 on the second surface 222 of the electrical device 204 spaces the second heat sink portion 232B of the heat sink 232 from the second surface 222 and positions it on the third surface 228 of the mold compound.

[0032] In an alternative example of process 400 (not shown), the mold compound 210 may be selectively deposited to a desired thickness on a desired surface, rather than depositing the mold compound 210 and then removing the mold compound 210 from the first surface 216 of the heat generating device 202, as shown in FIG. 5B.

[0033] Figures 6-11 are provided to illustrate the incorporation of the thermal structure 212 of Figures 2, 3D and 5D into an electrical device as part of an overall thermal management strategy. Figures 6 and 9 are cross-sectional side views illustrating a first and second orientation, respectively, of the structure 600 corresponding to the IC package 200 of Figure 2. Figures 6 and 9 illustrate an orientation of the structure 600 for use in the electrical device shown in Figures 7, 8, 10 and 11. The substrate 602 of Figures 6-11 corresponds to the substrate 208 of Figure 2.

[0034] 7, 8, 10 and 11 show examples of mobile devices 700, 800, 1000, 1100 including a primary cooling solution 604 disposed between a display 606 and an IC package corresponding to IC package 200 of FIG. 2. Mobile devices 700, 800, 1000, 1100 each include an interposer substrate 608 coupled to a back surface 221 of substrate 602 (i.e., opposite front surface 206 of FIG. 2). The example mobile devices 700, 800, 1000, 1100 further include an application processor 610 and printed circuit boards (PCBs) 612 and 614 coupled to the back surface 221 of substrate 602. The examples of mobile devices 700, 800, 1000, 1100 of FIGS. 7, 8, 10 and 11 also include a backside cooling solution 616 coupled to a back cover 618 of the mobile device 700, 800, 1000, 1100.

[0035] 7 shows a first example including a mobile device 700. The structure 600 in the mobile device 700 is oriented with the substrate 602 shown in FIG. 6 facing towards the display 606. A TIM layer 702 is provided between the structure 600 and the primary cooling solution 604. No additional thermal elements are provided between the structure 600 and the back cover 618.

[0036] Figure 8 shows a second example including a mobile device 800. The structure 600 in the mobile device 800 is oriented with the substrate 602 shown in Figure 6 facing towards the display 606. In addition to the TIM layer 802 between the structure 600 and the primary cooling solution 604, the mobile device 800 also includes TIM layers 804 and 806 that conduct heat from the application processor 610 and PCBs 612 and 614 to the back cover 618.

[0037] Figure 9 is a cross-sectional side view showing a second orientation of structure 600 corresponding to IC package 200 of Figure 2. Figure 9 is provided to illustrate an orientation of structure 600 within mobile devices 1000 and 1100 of Figures 10 and 11. Substrate 602 in Figures 9-11 corresponds to substrate 208 of Figure 2.

[0038] 10 shows a third example including a mobile device 1000. The structure 600 in the mobile device 1000 is oriented with the substrate 602 shown in FIG. 9 facing towards the back cover 618. The TIM layer 1002 is provided between the application processor 610 and the primary cooling solution 604. No additional thermal elements are provided between the structure 600 and the back cover 618.

[0039] Fig. 11 shows a fourth example including a mobile device 1100. The structure 600 in the mobile device 1100 is oriented with the substrate 602 shown in Fig. 9 facing towards the back cover 618. A TIM layer 1102 is provided between the application processor 612 and the main cooling solution 606, as in Fig. 10. Additionally, a TIM layer 1104 is provided between the structure 600 and the backside cooling solution 616.

[0040] FIG. 12 illustrates an exemplary wireless communication device 1200 including a radio frequency (RF) component formed from one or more integrated circuits (ICs) 1202, any of which may include an exemplary IC package including a heat-generating device and an electric device on a surface of a substrate, and a thermal structure spaced apart from the electric device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, according to any of the aspects illustrated in FIG. 2, FIG. 3D, and FIG. 5D and disclosed herein. The wireless communication device 1200 may include or be provided within any of the above-mentioned devices, as examples. As illustrated in FIG. 12, the wireless communication device 1200 includes a transceiver 1204 and a data processor 1206. The transceiver 1204 may also be referred to as an RF front-end (RFFE) module 1204. The data processor 1206 may include a memory for storing data and program codes. The transceiver 1204 includes a transmitter 1208 and a receiver 1210 supporting bidirectional communication. In general, the wireless communication device 1200 may include any number of transmitters 1208 and / or receivers 1210 for any number of communication systems and frequency bands. All or a portion of the transceiver 1204 may be implemented on one or more analog ICs, RF ICs, mixed-signal ICs, etc.

[0041] The transmitter 1208 or receiver 1210 may be implemented with a super-heterodyne architecture or a direct-conversion architecture. In a super-heterodyne architecture, a signal is frequency converted between RF and baseband in multiple stages, e.g., from RF to an intermediate frequency (IF) in one stage and then from IF to baseband in another stage. In a direct-conversion architecture, a signal is frequency converted between RF and baseband in one stage. The super-heterodyne architecture and the direct-conversion architecture may use different circuit blocks and / or have different requirements. In the wireless communication device 1200 in FIG. 12, the transmitter 1208 and receiver 1210 are implemented with a direct-conversion architecture.

[0042] On the transmit path, the data processor 1206 processes data to be transmitted and provides I and Q analog output signals to a transmitter 1208. In the example wireless communication device 1200, the data processor 1206 includes digital-to-analog converters (DACs) 1212(1) and 1212(2) to convert digital signals generated by the data processor 1206 into I and Q analog output signals, e.g., I and Q output currents, for further processing.

[0043] Within the transmitter 1208, lowpass filters 1214(1) and 1214(2) filter the I and Q analog output signals, respectively, to remove unwanted signals caused by previous digital-to-analog conversion. Amplifiers (AMPs) 1216(1), 1216(2) amplify the signals from the lowpass filters 1214(1), 1214(2), respectively, and provide I and Q baseband signals. An upconverter 1218 upconverts the I and Q baseband signals with I and Q TX LO signals from a transmit (TX) local oscillator (LO) signal generator 1222 via mixers 1220(1), 1220(2) to provide an upconverted signal 1224. A filter 1226 filters the upconverted signal 1224 to remove unwanted signals caused by frequency upconversion as well as noise in the receive frequency band. A power amplifier (PA) 1228 amplifies the upconverted signal 1224 from filter 1226 to obtain a desired output power level and provides a transmit RF signal. The transmit RF signal is routed through a duplexer or switch 1230 and transmitted via an antenna 1232.

[0044] In the receive path, an antenna 1232 receives a signal transmitted by a base station and provides a received RF signal, which is routed through a duplexer or switch 1230 and provided to a low noise amplifier (LNA) 1234. The duplexer or switch 1230 is designed to operate at a specific RX to TX duplexer frequency separation such that the receive (RX) signal is separated from the TX signal. The received RF signal is amplified by the LNA 1234 and filtered by a filter 1236 to obtain a desired RF input signal. Downconversion mixers 1238(1), 1238(2) mix the output of the filter 1236 with I and Q RX LO signals (i.e., LO_I and LO_Q) from a RX LO signal generator 1240 to generate I and Q baseband signals. The I and Q baseband signals are amplified by AMPs 1242(1), 1242(2) and further filtered by low pass filters 1244(1), 1244(2) to obtain I and Q analog input signals, which are provided to data processor 1206. In this example, data processor 1206 includes analog-to-digital converters (ADCs) 1246(1), 1246(2) to convert the analog input signals to digital signals for further processing by data processor 1206.

[0045] In the wireless communication device 1200 of FIG. 12, a TX LO signal generator 1222 generates I and Q TX LO signals for use in frequency up-conversion, and a RX LO signal generator 1240 generates I and Q RX LO signals for use in frequency down-conversion. Each LO signal is a periodic signal having a particular fundamental frequency. A TX phase-locked loop (PLL) circuit 1248 receives timing information from the data processor 1206 and generates a control signal used to adjust the frequency and / or phase of the TX LO signal from the TX LO signal generator 1222. Similarly, a RX PLL circuit 1250 receives timing information from the data processor 1206 and generates a control signal used to adjust the frequency and / or phase of the RX LO signal from the RX LO signal generator 1240.

[0046] Wireless communication device 1200 including the exemplary IC package including a heat-generating device and an electrical device on a surface of a substrate, and a thermal structure spaced from the electrical device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, as shown in FIGS. 2, 3D, and 5D and according to any of the embodiments disclosed herein, may be provided or integrated within any processor-based device. Examples include, but are not limited to, a set-top box, an entertainment unit, a navigation device, a communication device, a fixed location data unit, a mobile location data unit, a global positioning system (GPS) device, a mobile phone, a cellular phone, a smartphone, a session initiation protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device (e.g., a smart watch, a health or fitness tracker, eyewear, etc.), a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, an avionics system, a drone, and a multicopter.

[0047] In this regard, FIG. 13 illustrates an example of a processor-based system 1300 including an exemplary IC package including a heat-generating device and an electric device on a surface of a substrate, and a thermal structure spaced apart from the electric device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, according to any embodiment shown in FIG. 2, FIG. 3D, and FIG. 5D and disclosed herein. In this example, the processor-based system 1300 includes one or more central processing units (CPUs), sometimes referred to as CPUs or processor cores, each including one or more processors 1304. The CPUs 1302 may have a cache memory 1306 coupled to the processors 1304 for quick access to temporarily stored data. As an example, the processor 1304 may include an exemplary IC package including a heat-generating device and an electric device on a surface of a substrate, and a thermal structure spaced apart from the electric device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, according to any embodiment shown in FIG. 2, FIG. 3D, and FIG. 5D and disclosed herein. The CPU 1302 is coupled to a system bus 1308, which may interconnect master and slave devices included within the processor-based system 1300. As is well known, the CPU 1302 communicates with these other devices by exchanging address, control, and data information via the system bus 1308. For example, the CPU 1302 may communicate bus transaction requests to a memory controller 1310, as an example of a slave device. Although not shown in FIG. 13, multiple system buses 1308 may be provided, with each system bus 1308 constituting a different fabric.

[0048] Other master and slave devices can be connected to the system bus 1308. As shown in FIG. 13, these devices can include, by way of example, a memory system 1312 including a memory controller 1310 and one or more memory arrays 1314, one or more input devices 1316, one or more output devices 1318, one or more network interface devices 1320, and one or more display controllers 1322. Each of the memory system 1312, the one or more input devices 1316, the one or more output devices 1318, the one or more network interface devices 1320, and the one or more display controllers 1322 can include an exemplary IC package including a heat-generating device and an electrical device on a surface of a substrate, and a thermal structure spaced apart from the electrical device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, as shown in FIG. 2, FIG. 3D, and FIG. 5D, and according to any of the embodiments disclosed herein. The input device 1316 can include any type of input device, including, but not limited to, input keys, switches, voice processors, and the like. The output devices 1318 may include any type of output device, including, but not limited to, audio, video, other visual indicators, etc. The network interface device 1320 may be any device configured to enable the exchange of data to and from the network 1324. The network 1324 may be any type of network, including, but not limited to, a wired or wireless network, a private or public network, a local area network (LAN), a wireless local area network (WLAN), a wide area network (WAN), a BLUETOOTH network, and the Internet. The network interface device 1320 may be configured to support any type of desired communication protocol.

[0049] The CPU 1302 may also be configured to access a display controller 1322 via the system bus 1308 to control information sent to one or more displays 1326. The display controller 1322 sends information to the display 1326 for display via one or more video processors 1328, which process the information to be displayed into a format suitable for the display 1326. The display 1326 may include any type of display, including, but not limited to, a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, a light emitting diode (LED) display, and the like. The display controller 1322, the display 1326, and / or the video processor 1328 may include an exemplary IC package including a heat-generating device and an electrical device on a surface of a substrate, and a thermal structure spaced apart from the electrical device and on a first surface of the heat-generating device to reduce thermal resistance for heat dissipation, according to any of the embodiments shown in FIG. 2, FIG. 3D, and FIG. 5D and disclosed herein.

[0050] Those skilled in the art will further appreciate that the various exemplary logic blocks, modules, circuits, and algorithms described in connection with the aspects disclosed herein may be implemented as electronic hardware, instructions stored in a memory or in another computer-readable recording medium and executed by a processor or other processing device, or a combination of both. The master and slave devices described herein may be employed in any circuit, hardware component, IC, or IC chip, as examples. The memory disclosed herein may be any type and size of memory and may be configured to store any type of information desired. To clearly illustrate this interchangeability, various exemplary components, blocks, modules, circuits, and steps have been described above generally in terms of their functions. How such functionality is implemented depends on the particular application, design choices, and / or design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0051] The various example logic blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed using a processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration).

[0052] Aspects disclosed herein may be embodied in hardware and instructions stored in the hardware, which may be present in, for example, a random access memory (RAM), a flash memory, a read only memory (ROM), an electrically programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a register, a hard disk, a removable disk, a CD-ROM, or any other form of computer readable recording medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from the storage medium and write information to the storage medium. Alternatively, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. Alternatively, the processor and the storage medium may reside as discrete components in a remote station, a base station, or a server.

[0053] It should also be noted that the operational steps described in any of the exemplary aspects herein are described to provide illustration and explanation. The described operations may be performed in many different sequences other than the sequence shown. Furthermore, an operation described in a single operational step may actually be performed in several different steps. Furthermore, one or more operational steps described in the exemplary aspects may be combined. It should be understood that the operational steps shown in the flow charts may be subject to many different modifications, as would be readily apparent to one skilled in the art. Those skilled in the art will also understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0054] The above description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other examples. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0055] Example implementations are described in the following numbered embodiments. 1. An integrated circuit (IC) package comprising: a substrate including a surface; a heat-generating device on a surface of the substrate, the heat-generating device including a first surface at a first distance from the surface; an electrical device on a surface of the substrate, the electrical device including a second surface at a second distance from the surface that is greater than the first distance; a mold compound disposed on the second surface of the electrical device and including a third surface at a third distance from the surface that is greater than the second distance; An integrated circuit (IC) package comprising: a thermal structure formed on a first surface of a heat-generating device and on a third surface of a molding compound, the thermal structure including a flat outer surface. 2. The IC package of embodiment 1, wherein the thermal structure further includes a thermally conductive material (TIM) layer on a first surface of the heat-generating device, the thickness of the TIM layer extending from the first surface of the heat-generating device to a fourth surface of the TIM layer at a fourth distance greater than the first distance and less than or equal to a third distance from the surface. 3. The IC package of embodiment 2, wherein the thermal structure further includes a heat sink disposed on a fourth surface of the TIM layer and on the third surface of the mold compound, the heat sink including a flat outer surface at a fifth distance from the surface that is greater than the fourth distance. 4. The IC package of embodiment 3, wherein the heat sink further comprises a first thickness from the fourth surface of the TIM layer to the flat outer surface, and a second thickness from the third surface of the mold compound to the flat outer surface. 5. A second heat generating device including a sixth surface at a sixth distance less than the second distance from the surface of the second surface of the electrical device; The IC package of embodiment 3 or embodiment 4, further comprising: a second TIM layer formed on the sixth surface between the second heat-generating device and the heat sink. 6. A third device further comprising a seventh surface at a seventh distance greater than the first distance from the surface of the first surface of the heat generating device; The IC package of any of embodiments 1-5, wherein a molding compound is disposed on the seventh surface of the third device. 7. The IC package of any of aspects 1-6, wherein the heat-generating device includes a power management integrated circuit (PMIC). 8. The IC package of any of embodiments 1 to 7, wherein the electrical device includes a passive electrical component. 9. The IC package of embodiment 8, wherein the passive electrical component includes one of an inductor, a capacitor, and a resistor. 10. The substrate includes a first substrate further including a second surface; The IC package of any of embodiments 1-9, wherein the IC package further includes an IC or package coupled to the second surface of the first substrate. 11. The IC package of embodiments 1-10, further comprising a second substrate coupled to the second surface of the first substrate. 12. The IC package of any one of aspects 1 to 9, comprising a radio frequency (RF) front-end (RFFE) module. 13. The IC package of any of aspects 1 to 12 incorporated into a device selected from the group consisting of a set-top box, an entertainment unit, a navigation device, a communication device, a fixed location data unit, a mobile location data unit, a global positioning system (GPS) device, a mobile phone, a cellular phone, a smartphone, a session initiation protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, an avionics system, a drone, and a multicopter. 14. A method of making an integrated circuit (IC) package, comprising: coupling a heat generating device to a surface of a substrate, the heat generating device including a first surface at a first distance from the surface; coupling an electrical device to a surface, the electrical device including a second surface at a second distance from the surface that is greater than the first distance; forming a thermal structure on a first surface of the heat generating device, the thermal structure being spaced from a second surface of the electrical device and including a flat outer surface. 15. The method of embodiment 14, wherein the step of forming the thermal structure further comprises forming a thermally conductive material (TIM) layer on the first surface of the heat-generating device, the TIM layer comprising the fourth surface. 16. Forming a first portion of a heat sink on a fourth surface of the TIM layer; and forming a second portion of the heat sink spaced apart from a second surface of the electrical device; The method of embodiment 15, wherein the heat sink comprises a flat outer surface of the thermal structure. 17. The step of forming a heat sink comprises: forming a first portion of the heat sink to have a first heat sink thickness extending from a fourth surface of the TIM layer to a flat outer surface; and forming a second portion of the heat sink to have a second thickness extending from the flat outer surface and less than a distance from the flat outer surface to a second surface of the electrical device. 18. The method of any of aspects 14-17, further comprising disposing a molding compound on the surface of the substrate and on the second surface of the electrical device. 19. The method of embodiment 18, wherein disposing the mold compound includes injecting the mold compound between the second surface of the electrical device and the heat sink in a transfer molding process. 20. The method of any of aspects 14-19, further comprising selectively forming a molding compound on the second surface of the electrical device but not on the first surface of the heat-generating device. 21. Forming a molding compound on the first surface of the heat generating device and on the second surface of the electrical device; 21. The method of any of aspects 14-20, further comprising: removing the mold compound from the first surface of the heat generating device. 22. The method of any of aspects 14 to 21, wherein forming the thermal structure on the first surface of the heat generating device further comprises forming the thermal structure directly on the first surface of the heat generating device without a mold compound between the first surface and the thermal structure. 23. The method of any of embodiments 16-22, wherein the heat sink further comprises a thermally conductive material extending continuously from the first portion to the second portion. [Explanation of symbols]

[0056] 100 Conventional IC Package 102 Heat-generating devices 104 Surface of the board 106 Substrate 108 Heatsink 110 Mold Compound 112 Electrical Devices 114 Flat outer surface 116 Materials with high thermal conductivity 118 Application Processors 120 devices 122 Opposite Surface 124 additional boards 126 devices 200 IC packages 202 Heat-Generating Devices 204 Electrical Devices 206 Surface of the board 208 Substrate 210 Mold Compound 212 Thermal structure 214 Flat outer surface 216 First Surface 218 Power Management Integrated Circuit (PMIC) die or PMIC package 220 Application Processor 221 Back side 222 Second Surface 224 Inductor 226 Devices 228 The Third Surface 230 Thermal Interface Material (TIM) Layer 232 Heat sink 234 The Fourth Surface 236 Secondary Heat-Generating Device 238 The Sixth Surface 240 Second TIM layer 242 Third Device 244 The Seventh Surface 246 Second Board 248 additional IC devices 300A manufacturing stage 300B Manufacturing Stage 300C production stage 300D manufacturing stage 400 Example Process 500A production stage 500B Manufacturing Stage 500C production stage 500D manufacturing stage 600 Structure 602 Substrate 604 Main cooling measures 606 Display 608 Interposer Board 610 Application Processor 612 Printed Circuit Board (PCB) 614 PCB 616 Backside cooling measures 618 Back cover 700 Mobile Devices 702 TIM layer 800 Mobile Devices 802 TIM layer 804 TIM layer 806 TIM layer 1000 Mobile Devices 1002 TIM layer 1100 Mobile Devices 1102 TIM layer 1104 TIM layer 1200 Wireless Communication Devices 1202 Integrated circuits (ICs) 1204 Transceiver 1206 Data Processor 1208 Transmitter 1210 Receiver 1212(1) Digital-to-Analog Converter (DAC) 1212(2) DAC 1214(1) Low-pass filter 1214(2) Low-pass filter 1216(1) Amplifier (AMP) 1216(2) AMP 1218 Upconverter 1220(1) Mixer 1220(2) Mixer 1222 Transmit (TX) Local Oscillator (LO) Signal Generator 1224 upconverted signal 1226 Filter 1228 Power Amplifier (PA) 1230 Switch 1232 Antenna 1234 Low Noise Amplifier (LNA) 1236 Filter 1238(1) Downconversion mixer 1238(2) Downconversion mixer 1240 Receive (RX) Local Oscillator (LO) Signal Generator 1242(1) AMP 1242(2) AMP 1244(1) Low-pass filter 1244(2) Low-pass filter 1246(1) Analog-to-Digital Converter 1246(2) Analog-to-Digital Converter 1248 TX Phase Locked Loop (PLL) Circuit 1250 RX PLL circuit 1300 processor-based systems 1302 Central Processing Unit (CPU) 1304 Processor 1306 Cache Memory 1308 System Bus 1310 Memory Controller 1312 Memory System 1314 Memory Array 1316 Input Devices 1318 Output Device 1320 Network Interface Device 1322 Display Controller 1324 Network 1326 Display 1328 Video Processor

Claims

1. 1. An integrated circuit (IC) package comprising: a substrate including a surface; a heat-generating device on the surface of the substrate, the heat-generating device including a first surface at a first distance from the surface; an electrical device on the surface of the substrate, the electrical device including a second surface at a second distance from the surface that is greater than the first distance; a mold compound disposed on the surface of the substrate and on the second surface of the electrical device, the mold compound including a third surface at a third distance from the surface that is greater than the second distance; a thermal structure formed directly on the first surface of the heat generating device and on the third surface of the molding compound over the electrical device, the thermal structure including a flat outer surface.

2. 2. The IC package of claim 1, wherein the thermal structure further comprises a thermally conductive material, TIM, layer on the first surface of the heat generating device, the thickness of the TIM layer extending from the first surface of the heat generating device to a fourth surface of the TIM layer at a fourth distance greater than the first distance and less than or equal to the third distance from the surface.

3. 3. The IC package of claim 2, wherein the thermal structure further includes a heat sink disposed on the fourth surface of the TIM layer and on the third surface of the mold compound, the heat sink including the flat outer surface at a fifth distance from the surface that is greater than the fourth distance.

4. 4. The IC package of claim 3, wherein the heat sink further comprises a first thickness from the fourth surface of the TIM layer to the flat outer surface, and a second thickness from the third surface of the mold compound to the flat outer surface.

5. a second heat generating device including a sixth surface at a sixth distance less than the second distance from the second surface of the electrical device; 4. The IC package of claim 3, further comprising: a second TIM layer formed on said sixth surface between said second heat generating device and said heat sink.

6. a third device including a seventh surface at a seventh distance greater than the first distance from the first surface of the heat generating device; The IC package of claim 1 , wherein the molding compound is disposed on the seventh surface of the third device.

7. The IC package of claim 1 , wherein said heat generating device comprises a power management integrated circuit, PMIC.

8. the electrical device includes passive electrical components; The IC package of claim 1 , wherein the passive electrical components include one of an inductor, a capacitor, and a resistor.

9. the substrate comprises a first substrate further comprising a second surface; 10. The IC package of claim 1, further comprising an IC or package coupled to the second surface of the first substrate, and further comprising a second substrate coupled to the second surface of the first substrate.

10. 10. The IC package of claim 1, comprising a radio frequency, RF, front end, RFFE, module.

11. 1. A method of making an integrated circuit, IC, or package, comprising: coupling a heat generating device to a surface of a substrate, the heat generating device including a first surface at a first distance from the surface; coupling an electrical device to the surface, the electrical device including a second surface at a second distance from the surface that is greater than the first distance; disposing a mold compound on the surface of the substrate and on the second surface of the electrical device, the mold compound including a third surface at a third distance from the surface that is greater than the second distance; forming a thermal structure directly on the first surface of the heat generating device and on the third surface of the molding compound over the electrical device, the thermal structure including a flat outer surface.

12. The method of claim 11 , wherein forming the thermal structure further comprises forming a thermally conductive material, TIM, layer on the first surface of the heat generating device, the TIM layer including a fourth surface.

13. forming a first portion of a heat sink on the fourth surface of the TIM layer; and forming a second portion of the heat sink spaced apart from the second surface of the electrical device; The method of claim 12 , wherein the heat sink comprises the flat outer surface of the thermal structure.

14. The step of forming the heat sink comprises: forming the first portion of the heat sink to have a first thickness of the heat sink extending from the fourth surface of a TIM layer to the outer flat surface; and forming the second portion of the heat sink to have a second thickness extending from the flat outer surface that is less than a distance from the flat outer surface to the second surface of the electrical device.

15. The method of claim 11 , wherein disposing the mold compound comprises injecting the mold compound between the second surface of the electrical device and a heat sink in a transfer molding process.

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