Hybrid Chemical-Physical Vapor Deposition Process for the Synthesis of Environmental Barrier Coatings

Abstract

A manufacturing process is disclosed for the synthesis of an environmental barrier coating system (EBC) that protects Si-based ceramic matrix composite (CMC) materials from oxidation and volatilization at high temperatures. The manufacturing process is carried out in vacuum and includes depositing a silicon bond coat and an oxygen-containing barrier coating. The process is supported by plasma, preferably a penetration and arc discharge, resulting in complete dissociation of a gas precursor such as silane. Plasma is also used for pretreatment of substrates in a continuous process chain. A deposition system with the essential vacuum and plasma components is disclosed, as well as the EBC coating produced by this process.

Description

[Technical field]

[0001] Scope of the invention The present invention relates to deposition techniques and processes for synthesizing environmental barrier coatings (EBCs) that protect Si-based Ceramic Matrix Composite (CMC) materials from oxidation and volatilization at high temperatures. [Background technology]

[0002] background Silicon carbide (SiC) and silicon nitride based ceramic matrix composite (CMC) materials (both summarized here as “Si-based CMC materials”) are the materials of choice for the hot sections of next generation gas turbine engines due to their high specific strength and their high temperature stability. However, CMCs experience rapid wear in water vapor environments, resulting in a decrease in the mechanical strength and structural integrity of the CMC components. Therefore, Si-based CMCs need to be protected by ceramic environmental barrier coatings (EBCs) to prevent surface wear of these CMC materials. Approaches for coating design are based on the combination of a bond coat and a chemical barrier dedicated to the specific Si-based material. For SiC-based materials, several combinations of bond coat and barrier layers have been investigated in the past. A promising EBC system consists of a silicon bond coat applied to a substrate, followed by a rare earth silicate protective coating layer. Among the rare earth silicates, Yb 2 S 2 O 7 appears to be the most promising candidate due to its low wear rate in water vapor-containing environments, excellent phase stability up to a melting temperature of 1850 °C, and a coefficient of thermal expansion (CTE) that is reasonably well matched to silicon-based CMC substrates.

[0003] There are various techniques for depositing such coatings on SiC-based components utilized in the high temperature sections of gas turbines.

[0004] The air plasma spray process (APS) is widely used for high density EBC deposition. The advantages of this technique are low cost, high deposition rate and wide composition flexibility. However, when coating engine parts with complex geometries such as blades and vanes, the APS process is challenging due to the variations in spray distance and spray angle that cause non-uniform coating microstructure and thickness. Furthermore, control of the interface in APS multilayer coatings and the specific nucleation process can be difficult for deposition in atmospheric conditions. Therefore, there is a need for novel process approaches for EBC deposition for different engine component applications that allow better control of coating microstructure and properties.

[0005] US 2020 / 0039892 A1 describes chemical vapor deposition (CVD) for the deposition of silicon bond coats as part of EBC coatings. The process is realized at deposition pressures ranging from about 115 torr to about 150 torr, corresponding to a range of about 15300 Pa to about 20000 Pa, and utilizes silicon-containing precursors. However, the deposition temperatures required to dissociate the precursors and obtain a crystalline Si coating deposit exceed 900°C, with substrate temperatures of about 1100°C being preferred. High deposition temperatures can cause oxidation of the SiC / SiC CMC substrate, degrading its mechanical properties. Summary of the Invention [Problem to be solved by the invention]

[0006] Objective of the invention In this invention, a hybrid chemical / physical vapor process for the deposition of EBC coatings has been developed. A typical EBC coating consists of the layer stack shown in Figure 1. The hybrid CVD / PVD process allows the deposition of the complete EBC layer stack at relatively low deposition temperatures without breaking the vacuum. The coating consists of a Si bond coat and a Yb-Si-O top coat, and may include additional coatings. [Means for solving the problem]

[0007] Figure 1 shows: 1 Si-based CMC substrate 2 Silicon bond coat interface (optional) 3a, 3b Silicon bond coats that may have modifications with respect to morphology (e.g., grain size) or composition (e.g., incorporation of doping) within the bond coat. 4. A transition layer to a barrier coating (e.g., a silicate) that may differ in composition and structure from the bond coat and / or barrier coating. 5 Barrier coating, here we use Yb-Si-O 6 Topcoat (optional) to improve the properties of the barrier coating, i.e. erosion resistance, water vapor stability, CMAS resistance, etc. [Brief description of the drawings]

[0008] [Figure 1] Schematic of the layer stack deposited by the process of the present invention. The entire layer stack (bond and barrier coatings as well as all additional interfacial coatings) is deposited without breaking the process vacuum, i.e. in one process sequence and plasma environment. [Diagram 2] 2 is a sequence of process steps for the deposition of a silicon bond coat according to the process of the present invention. [Diagram 3] Cross-sectional TEM micrograph of a silicon bond coat with columnar morphology exhibiting columnar widths between 10 nm and 50 nm. [Figure 4]BF-TEM cross section of the SiC-silicon bond coat interface after annealing at 1400 °C while forming dislocations in the SiC substrate. [Diagram 5] Example of a process sequence for the deposition of a complete EBC layer stack consisting of SiC pretreatment / silicon bond coat / barrier coating. [Figure 6] Scanning electron microscope (SEM) cross-sectional micrograph of a SiC-silicon bond coat-Al35Si5O60 layer stack annealed at 1400 °C. [Figure 7] TEM cross section of a SiC substrate with a silicon bond coat (3 μm) and a Yb-Si-O barrier coating (6 μm). [Figure 8] TEM cross section of a SiC substrate with a silicon bond coat (3 μm) and a Yb-Si-O barrier coating (6 μm) after annealing at 1400 °C. [Figure 9] SEM image of the as-deposited Yb-Si-O / Si EBC using the hybrid deposition process. [Figure 10] Schematic of the deposition system for the PVD / CVD hybrid process, including the process sequences for substrate preparation, silicon bond coat and barrier coating deposition. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Description of the invention In the following, the invention will be described with respect to a specific layer stack with reference to Figure 1. The description is intended as an example only and should not be understood as limiting the broader scope of the invention.

[0010] The present invention uses a combination of plasma-activated chemical vapor deposition (CVD) and physical vapor deposition (PVD) processes for EBC deposition. Activation of vapor in a plasma is a method that allows for coating deposition at much lower temperatures than traditional CVD. This is significantly different from traditional chemical vapor deposition, such as that used in U.S. Patent Application Publication No. 2020 / 0039892 A1.

[0011] For a better understanding between the state of the art and the process of the present invention, the sequence of process steps is explained with reference to Figure 2 for the deposition of the silicon bond coat and with reference to Figure 5 for the complete EBC, respectively. In Figure 10, a schematic diagram of a deposition system allowing the deposition of an EBC according to the process of the present invention is shown.

[0012] Silicon bond coats, in the context of EBC layer systems, are Si layers that exhibit excellent chemical and bonding compatibility with the CMC surface. Additionally, silicon bond coatings must have a coefficient of thermal expansion (CTE) close to that of the CMC substrate. Silicon bond coats are typically homogeneous layers that may contain alloying elements in addition to Si.

[0013] The deposition of a silicon bond coat will now be described with reference to Figure 2. Process 100 includes steps 101 loading the substrate, 102 pumping down the deposition chamber, 103 heating the substrate to the required temperature, 104 pre-treating the substrate with plasma, 105 initiating a gas arc discharge and silicon precursor, 106 optional doping from a gas or solid source, 107 depositing the silicon bond coat, 108 cooling the system, and 109 evacuating and unloading the substrate. Steps 103-107 are process steps that utilize a plasma 110.

[0014] A pretreatment step 104 is introduced which is used to clean the substrate and remove native oxides on the substrate. In addition to helping to reduce the deposition temperature, plasma plays an essential role in pretreatment of Si-based substrates. Native oxides on the surface of Si-based substrates can prevent good adhesion of the subsequent silicon bond coat and therefore need to be removed. Removal of native oxides is performed by plasma activation of reactive gases which are utilized to reduce the oxides and form volatile compounds with oxygen which are pumped out. Generation of atomic or ionized hydrogen from a hydrogen discharge is one example of such reactive surface pretreatment or cleaning. Here, an argon / hydrogen discharge with a discharge current of 200 A, a discharge voltage of 50 V, an argon flow rate of 60 sccm (standard cubic centimeters per minute) and a hydrogen flow rate of 300 sccm was used. In such a process, free carbon contaminations are also volatilized. The typical thickness of these oxides or carbon contaminations is on the order of 10 nm.

[0015] Exposure of the as-cleaned substrate surface to the ambient will result in immediate recontamination of the as-treated substrate surface, since such pretreated surfaces are susceptible to reactions with gases in the ambient atmosphere, as known to those skilled in the art of vacuum deposition technology. Therefore, there must be a direct transition without vacuum break to the next process step for the EBC, deposition of the silicon bond coat. All this surface pretreatment, cleaning and controlled vacuum environment ensures better control of the nucleation process of the silicon bond coat on the Si-based substrate, and therefore better formation of the interface.

[0016] The formation of the interface is illustrated in Figure 3, which shows a silicon bond coat synthesized utilizing the process of the present invention. 4) shows a 3 μm thick silicon bond coat deposited from a 3000 sq. m. sintered silicon substrate. Dissociation and activation of silane was achieved by arc discharge in argon working gas with an Ar flow rate of 80 sccm and an arc discharge current of 120 A and an arc voltage of 75 V. A silane flow rate of 250 sccm was utilized. The substrate temperature during deposition was 550° C. FIG. 3 shows a cross-sectional view of a silicon coating on a silicon carbide substrate obtained by transmission electron microscopy (TEM). The interface consists of a nucleation zone about 200 nm thick, after which a transition to columnar growth is seen, demonstrating the possibility of the process of the present invention to achieve columnar growth of silicon already at low temperatures. The Si coating (FIG. 3) has a segmented strain-resistant microstructure.

[0017] In the context of the present invention, a vacuum is defined as a pressure of 1×10 3 Pa but less than 1×10 -6 A pressure of 100 Pa to 0.001 Pa is most preferred. 3 Pressures above 1×10 Pa increase the risk of contamination, while -6 Pressures below Pa extend into the ultra-high vacuum range, where special materials and equipment such as vacuum pumps are required.

[0018] Cross-sectional micrographs obtained by TEM of silicon bond coats deposited on SiC substrates demonstrate that columnar growth can be achieved, and that the plasma treatment of the present invention is a suitable technique for controlling the nucleation and growth of silicon bond coats at low temperatures.

[0019] The excellent adhesion of the silicon bond coat to the substrate is characterized by the formation of dislocations on the substrate surface. This is shown in Figure 4. A bright field (BF) TEM cross section shows the interface between the SiC substrate and the thin silicon bond coat. The micrograph gives the impression of a good quality interface between the SiC and the silicon bond coat. The interface is sharp and there are no visible porosity. The dislocations generated in the SiC substrate by the silicon bond coat after annealing prove the excellent adhesion and stability of this SiC-Si interface. With reference to the above comments, this interface was formed in a vacuum process sequence consisting of a plasma treatment of the SiC surface at a substrate temperature of about 550°C and a second deposition of the silicon bond coat in a plasma environment without breaking the vacuum.

[0020] Another feature of the process of the present invention is the use of an arc discharge for the dissociation of the gas precursor, in this example silane. The high electron current density of the arc discharge, typical parameters for such discharges are 20A-1000A at voltages of 15V-100V, results in complete dissociation of the precursor. This means that about 100% of the Si fed to the system containing the precursor reacts in the chamber. This differs from other types of plasma CVD processes where some amount of unreacted Si-containing (silicon-containing) precursor is pumped away. The complete dissociation also produces silicon coatings that are hydrogen-free or exhibit only negligible hydrogen content in the as-deposited silicon bond coat. This strongly contributes to the stability of the silicon bond coat at high temperatures, since hydrogen contributes to destabilization. The hydrogen content in the silicon bond coat is less than 5 at.%, typically even less than 3 at.%, as measured by Elastic Recoil Detection. It is important that these features of the process of the present invention are realized at moderate temperatures of less than 600°C and at low substrate temperatures.

[0021] The deposition of the Si bond coat is achieved by plasma activation and dissociation of silicon-containing precursors. Various silicon-containing gases can be used as the Si-containing precursors and may include one or more of the following chemicals: silane, disilane, dichlorosilane, trichlorosilane, silicon tetrachloride, methylsilane, silicon tetrafluoride, trimethylsilane, tetramethylsilane, hexachlorodisilane, etc. Typical flow rates of silicon-containing precursor gases range from 1 sccm to 10 l / m, preferably from 10 sccm to 1 l / m. In the following experiments, silane is used as the precursor. For the activation of the precursor, an arc discharge is utilized. This arc discharge is characterized by an electron current between 10 A and 400 A and a discharge voltage between 15 V and 100 V. The arc discharge can be generated by discharge in a noble gas such as argon or by cathodic arc evaporation of a metal target. The high electron current of the arc discharge is very efficient for the dissociation of the silicon-containing precursor. This is a prerequisite for synthesizing silicon coatings with high deposition rates at substrate temperatures below 600°C. The utilization of silicon in the precursor is determined as the ratio of silicon atoms deposited in the chamber to silicon atoms supplied to the chamber by the precursor. The utilization with the process of the present invention is greater than 80%, preferably greater than 90%. Due to the highly efficient dissociation of the silicon-containing precursors enhanced by the argon plasma gas, the coating deposition rate shows almost no dependence from the substrate temperature in the range of 300°C to 600°C. This is an advantage over conventional thermal CVD techniques, where the substrate temperature has a dominant effect on the deposition rate.

[0022] Another advantage of the process of the present invention is the possibility of combining the plasma activated deposition with additional doping sources. As an example, to dope the silicon bond with another element, the process technique allows the silicon-containing precursor to be carried out with an additional gas precursor, such as a carbon or boron-containing precursor, or a combination thereof. Furthermore, the process of the present invention also allows for co-evaporation from the silicon-containing precursor in combination with a solid source. The solid source can be, in particular, the volatilization of a metal or metalloid by cathodic arc evaporation or sputtering. As an example, utilizing the process parameters described above for silicon bond coat deposition, an additional sputter source with an aluminum target can be started to result in doping of the silicon bond coat with aluminum. Also, other targets for sputtering or cathodic arc evaporation can be utilized to dope the silicon bond coat with the appropriate elements. Chemicals containing one or more of the following elements can be incorporated into the silicon bond coat: Al, B, C, O, N, Ga, In, P, Li, Na, K, Ca, Mg, Sr, Ba.

[0023] In Figure 2, all plasma-enhanced process steps are framed by dashed lines. It can be seen that all plasma-based steps are performed throughout the process chain without breaking the vacuum, i.e., from substrate loading until evacuating the deposition system after completing the silicon bond coat deposition. Uninterrupted vacuum processes have the advantage of reduced contamination compared to processes where the vacuum is interrupted.

[0024] In addition to the substrate pretreatment and the deposition of the silicon bond coat, the process of the present invention also includes the synthesis of the complete EBC layer stack. In the process of the present invention, this complete process sequence is also realized in one process, i.e. without vacuum interruption. This is illustrated in the process sequence shown in FIG. 5. The deposition of the complete EBC coating system includes the substrate pretreatment and the deposition of the silicon bond coat as well as the deposition of the barrier top coating. In its simplest form, the deposition of the barrier top coating is performed immediately after the deposition of the silicon bond coat. However, additional layers can be incorporated if there are additional adaptations between the silicon bond coat and the barrier coating required, for example for the purpose of strengthening the water vapor / oxygen diffusion barrier. The process sequence 200 typically includes the steps of loading a SiC-CMC substrate 201, pumping down the deposition chamber 202, heating the substrate to a suitable temperature 203, pre-treating the substrate with plasma 204, initiating gas arc discharge and silicon precursor 205, depositing a silicon bond coat 206, initiating cathodic arc discharge of the Me target 207, initiating silicon precursor (optional) and oxygen 208, depositing a Me-Si-O barrier coating 209, cooling the system 210, and pumping and unloading the SiC-CMC containing EBC 211. In FIG. 5, all of the plasma-based process steps 203-209 are framed by dashed lines 212. It can be seen that all the plasma-based steps are performed without breaking the vacuum. Thus, the vacuum is not broken from the step of loading the substrate to pumping down the deposition system after completion of the entire EBC layer stack.

[0025] In an EBC coating system, the barrier coating acts as a chemical barrier between the silicon bond coating and the barrier coating or top layer. The barrier coating must avoid chemical reactions that could damage the EBC. The barrier coating must protect the bond coating from oxidation and ideally be resistant to water vapor attack.

[0026] FIG. 6 shows a first example of a complete EBC layer stack according to the process of the present invention consisting of a SiC substrate, a silicon bond coat, and an Al-Si-O barrier coating. In this example, a 29 μm thick silicon bond coat was deposited on a pretreated SiC substrate using a silane source. The silane was activated and dissociated in an arc discharge for silicon bond coat synthesis. The arc discharge current was 120 A, the discharge voltage was 75 V, the argon gas flow rate was 80 sccm, and the silane flow rate was 250 sccm. Following silicon bond coat deposition, cathodic arc evaporation was started using an arc current of 145 A, a flow rate of 220 sccm of oxygen, and a flow rate of 66 silane were added to the discharge. The deposition temperature was 550° C. Using these parameters, 30 μm of Al-Si-O was deposited on the Al 35 S 5 O 60 The coating was deposited with an atomic composition of 0.01% Al. In this deposition, the content of Al in the coating was controlled by the evaporation rate from the Al target and the Si content of the coating by the flow of the silane precursor. The oxygen flow rate was adjusted to achieve complete oxidation of Al-Si-O. Figure 6 shows the coating after annealing at 1400 °C. The interface is sharp and no porosity is formed either between the silicon bond coat and SiC or between the silicon bond coat and the Al-Si-O barrier coating.

[0027] Another example of a coating system produced by the process of the present invention is shown in FIG. 7. The figure shows an EBC layer stack consisting of a silicon bond coat and a dense Yb-Si-O barrier coating deposited on a SiC substrate. The figure shows a TEM cross section of the layer stack as deposited. The interface is sharp and porosity-free, indicating good coating adhesion. In this cross section, a few droplets that are likely defects during silicon bond coat deposition and droplets due to cathodic arc evaporation are visible. These droplets and defects are presumed to be unimportant to the functionality of the coating system and typically disappear during annealing (demonstrated in FIG. 8). The substrate surface was pretreated by reactive plasma and a thin silicon bond coat of 3 μm was deposited in an argon arc discharge at a discharge current of 120 A and a discharge voltage of 75 V, utilizing an argon flow of 80 sccm and a silane flow of 250 sccm. After the silicon bond coat was deposited, ytterbium was evaporated from an elemental ytterbium target, which was used as the cathode for the cathodic arc evaporation. An ytterbium (Yb) target was evaporated using an arc current of 120 A, and a Yb-Si-O barrier coating was synthesized using a silane flow of 200 sccm and an oxygen flow of 400 sccm. The deposition temperature was 550°C. 29 S 11 O 59 A barrier coating (measured by EDX) was synthesized. The complete process sequence was realized without breaking vacuum, i.e. in one continuous process sequence.

[0028] Figure 8 shows the layer stack after Figure 7 after annealing at 1400 °C. The interface is still stable and flat, and no pores are formed. In the silicon bond coat, columnar structures are visible, and a thin (about 300 nm) dense silicon oxide is formed on top of the silicon bond coat. A thin (about 200 nm) transition can be seen between the silicon oxide and the Yb-Si-O barrier coating.

[0029] Another example of the present invention is shown in Figure 9, where a complete EBC layer stack was deposited on a SiC substrate with a silicon bond coat of about 30 μm and a Yb-Si-O barrier coating of about 12 μm. The Yb-Si-O coating was about 77% by volume of Yb. 2 S 2 O 7 and about 23% by volume of Yb 2 SiO 5 This demonstrated the flexibility of the process of the present invention for the deposition of EBCs with various chemistries. 2 S 2 O 7 Phase and Yb 2 SiO 5 The phase combination is advantageous for obtaining a barrier coating with a low corrosion rate and a thermal expansion coefficient that is well matched with the CMC substrate. 2 SiO 5 The Yb phase has a particularly low wear rate (sometimes called corrosion rate) in water vapor-containing environments, but has a thermal expansion coefficient that is not well matched to the SiC / SiC CMC substrate. 2 S 2 O 7 has a thermal expansion coefficient that matches well with the SiC / SiC CMC substrate, but the wear rate is 2 SiO 5 Higher than Yb 2 S 2 O 7 Phase and Yb 2 SiO 5 The synthesis of a barrier coating containing both phases allows a technologically efficient combination of these two properties.

[0030] In a further aspect of the invention, the coating method can be used to produce a barrier coating that includes one or more Yb-Si-O phases in combination with at least one second type phase that does not contain Yb. The combination of Yb-Si-O and the second type phase allows for tuning of the thermal expansion coefficient for different substrates and coating layers. The second type phase is Al 2 O 3, alkali metal oxides or alkaline earth metal oxides. In particular, Yb 2 S 2 O 7 or Yb 2 SiO 5 Al 2 O 3 , alkali metal oxides or alkaline earth metal oxides.

[0031] The presented EBC layer stack demonstrates the capability of the process of the present invention to fabricate such structures in one process sequence. Figure 10 shows a schematic of the deposition system utilized in such a process sequence.

[0032] Figure 10 shows the combination of gas sources for working gases such as argon, reactive gases such as oxygen, nitrogen, and hydrocarbons, and a gas source for the Si-containing precursor. These sources can operate alone or in combination with solid sources such as cathodic arc and sputter sources. A very important feature of the process is the plasma utilization. This includes the surface pretreatment that defines reliable conditions for silicon bond coat deposition that helps to create strain-resistant columnar structures. In the synthesis of silicon bond coats, the near complete dissociation of the silicon-containing precursor in the arc discharge is important. This helps to avoid hydrogen incorporation into the silicon bond coat at low deposition temperatures below 600 °C. The optional incorporation of dopants during silicon growth, and the simplicity of adding additional gas or solid sources in this deposition step, contribute to the versatility of the process of the present invention. The plasma enhancement by the arc discharge, independently, is the key to control the deposition rate of the silicon-containing precursor for deposition temperatures between 300 °C and 600 °C. [Explanation of symbols]

[0033] List of codes 1 Board 2 Bond coat interface (optional) 3a Bond Coat 3b. Bond coats, which may have modifications in terms of morphology (e.g., grain size) or composition (e.g., incorporation of doping elements). 4. A transition layer to a barrier coating (e.g., a silicate) that may differ in composition and structure from the bond coat and / or barrier coating. 5. Barrier Coating 6 Optional topcoat to improve the properties of the barrier coating, e.g., erosion resistance, water vapor stability, CMAS resistance, etc.

[0034] 11 Vacuum Deposition Chamber 12 Pumping System 13 Door for loading boards 14 Gas arc discharge sources (multiple) 15 Cathodic Arc Sources(s) 16 Sputtering sources (multiple) 17 Working gas inlets for the operation of the gas arc discharge 18 Gas inlets for reactive gases Gas inlet for 19Si-containing precursors 20 Substrate holder with substrate bias 21 Substrate heater Process sequence for deposition of 100 silicon bond coat 101 Loading the board 102 Pump down deposition chamber 103 Heat the substrate to the required temperature 104 Plasma Pretreatment of Substrates 105 Gas Arc Initiation and Silicon Precursors 106 Doping from gas or solid sources (optional) 107 Silicon bond coat deposition 108 System Cooling 109 Evacuate and unload board 110 Plasma-based process 200 Process sequence for deposition of a complete EBC layer stack 201 Loading of SiC-CMC substrate 202 Pump down deposition chamber 203 Heat the substrate to the appropriate temperature 204 Plasma Pretreatment of Substrates 205 Gas Arc Initiation and Silicon Precursors 206 Silicon bond coat deposition Initiate cathodic arc discharge of 207 Me target 208 Initiation of silicon precursor (optional) and oxygen Deposition of 209Me-Si-O barrier coatings 210 System Cooling Pumping and unloading of SiC-CMC with 211 EBC 212 Plasma-based processing

Claims

1. A manufacturing process for manufacturing an environmental barrier coating (EBC) system on a substrate, the process comprising depositing a silicon bond coat and at least one step of depositing an oxygen-containing barrier coating, The manufacturing process is characterized in that it is carried out in a vacuum environment.

2. The manufacturing process according to claim 1, wherein the manufacturing process includes at least one substrate pretreatment step carried out in a vacuum environment before the step of depositing the silicon bond coat.

3. The manufacturing process according to claim 2, wherein the at least one substrate pretreatment step, the step of depositing the silicon bond coat, and the at least one step of depositing the oxygen-containing barrier coating are part of a vacuum process without interrupting the vacuum during or between the steps.

4. The manufacturing process according to any one of claims 1 to 3, wherein the vacuum environment contains plasma.

5. The manufacturing process according to claim 4, wherein the vacuum environment containing plasma is created in at least one noble gas by at least one arc discharge.

6. The manufacturing process according to claim 5, wherein the at least one arc discharge operates at a discharge current in the range of 20 A to 1000 A and a discharge voltage in the range of 15 V to 100 V.

7. The manufacturing process according to claim 5, wherein the at least one arc discharge is utilized to dissociate at least one silicon-containing precursor.

8. The manufacturing process according to claim 1, wherein the manufacturing process is carried out at a temperature of the substrate below 600 °C.

9. The manufacturing process according to claim 1, wherein the silicon bond coat is deposited to a thickness in the range of 0.01 μm to 500 μm.

10. The manufacturing process according to claim 9, wherein the silicon bond coat is oxidized after deposition.

11. The manufacturing process according to claim 9, wherein the silicon bond coat is doped by sputtering at least one doping element from at least one sputtering source.

12. The manufacturing process according to claim 11, wherein the at least one doping element is one or more elements selected from Al, B, C, O, N, Ga, In, P, Li, Na, K, Ca, Mg, Sr, and Ba.

13. The manufacturing process according to claim 1, wherein the oxygen-containing barrier coating is formed by cathodic arc evaporation of at least one metal target, and the at least one metal target contains Al or at least one rare earth element.

14. The manufacturing process according to claim 13, wherein the cathodic arc evaporation is carried out in an oxygen-containing environment.

15. The manufacturing process according to claim 13, wherein at least one silicon-containing precursor is simultaneously introduced during the cathodic arc evaporation of the at least one metal target.

16. The manufacturing process according to claim 15, wherein the silicon-containing precursor is introduced in a flow rate range of 1 sccm to 10 l / m.

17. wherein the oxygen-containing barrier coating is phase Yb ２ Si ２ O ７ and Yb ２ SiO ５ The manufacturing process according to any one of claims 13 to 15, characterized by comprising the above.

18. The oxygen-containing barrier coating includes at least one Yb—Si—O phase and at least one second type of phase, the second type of phase being Al ２ O ３ , at least one of an alkali metal oxide or an alkaline earth metal oxide, the manufacturing process according to any one of claims 13 to 15.

19. The manufacturing process according to claim 2, wherein the substrate pretreatment step reduces the thickness of the surface oxide to a thickness of less than 30 nm.

20. The manufacturing process according to claim 1, wherein the substrate is made of a ceramic matrix composite (CMC) or contains CMC.

21. A deposition system for manufacturing an environmental barrier coating using the manufacturing process according to claim 1, the deposition system comprising at least one vacuum deposition chamber, at least one pumping system, and at least one plasma source.

22. An environmental barrier coating system manufactured according to the manufacturing process according to claim 1, deposited on a substrate, wherein the interface between the substrate and the silicon bond coat is sharp and pore-free.

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