Display device and array substrate

The antireflection structure on the array substrate using high and low refractive index films addresses the issue of external light reflection, improving visibility in display devices by reducing light interference.

JP2025000213APending Publication Date: 2025-01-07JAPAN DISPLAY INC
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Patent Information

Application Number
JP2023099934
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-06-19
Publication Date
2025-01-07

AI Technical Summary

Technical Problem

Existing display technologies face challenges in reducing external light reflection, which affects visibility in display devices.

Method used

Implementing an antireflection structure on the array substrate using a laminated structure of high and low refractive index films, where a high refractive index film is added or replaced with a higher index film to suppress light reflection from both the conductive film and aperture regions.

Benefits of technology

The antireflection structure effectively reduces external light reflection, enhancing visibility by minimizing light interference and improving image clarity.

✦ Generated by Eureka AI based on patent content.

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Abstract

To reduce reflection of external light.SOLUTION: A display device includes: an organic insulating film 100A; a high refractive index film 400 being in contact with the organic insulating film 100A; a pixel electrode PE being in contact with the high refractive index film 400; a capacitance insulating film CI being in contact with the pixel electrode PE; and a common electrode CE being in contact with the capacitance insulating film CI. In this case, a refractive index of the high refractive index film 400 is higher than a refractive index of the organic insulating film 100A.SELECTED DRAWING: Figure 9
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Description

[Technical field]

[0001] The present invention relates to a technique that is effective when applied to a display device and an array substrate. [Background technology]

[0002] Japanese Patent Application Laid-Open No. 2022-153055 (Patent Document 1) describes a technology relating to a display device and an array substrate in which a thin film transistor having an oxide semiconductor is used. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2022-153055 Summary of the Invention [Problem to be solved by the invention]

[0004] In display devices, it is desirable to reduce reflection of external light in order to improve visibility. [Means for solving the problem]

[0005] In one embodiment, the display device comprises an organic insulating film, a high refractive index film in contact with the organic insulating film, a pixel electrode in contact with the high refractive index film, a capacitive insulating film in contact with the pixel electrode, and a common electrode in contact with the capacitive insulating film, and the refractive index of the high refractive index film is higher than the refractive index of the organic insulating film.

[0006] In one embodiment, the display device comprises a color filter, a high refractive index film in contact with the color filter, a pixel electrode in contact with the high refractive index film, a capacitive insulating film in contact with the pixel electrode, and a common electrode in contact with the capacitive insulating film, and the refractive index of the high refractive index film is higher than the refractive index of the color filter.

[0007] In one embodiment, the array substrate comprises an organic insulating film, a high refractive index film in contact with the organic insulating film, a pixel electrode in contact with the high refractive index film, a capacitive insulating film in contact with the pixel electrode, and a common electrode in contact with the capacitive insulating film, and the refractive index of the high refractive index film is higher than the refractive index of the organic insulating film.

[0008] In one embodiment, the array substrate comprises a color filter, a high refractive index film in contact with the color filter, a pixel electrode in contact with the high refractive index film, a capacitive insulating film in contact with the pixel electrode, and a common electrode in contact with the capacitive insulating film, and the refractive index of the high refractive index film is higher than the refractive index of the color filter. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is an exploded perspective view showing a schematic configuration example of a liquid crystal display device. [Diagram 2] FIG. 2 is a plan view showing a schematic configuration of a display panel. [Diagram 3] FIG. 2 is a plan view showing an example of a planar layout of sub-pixels. [Figure 4] FIG. 2 is a schematic plan view showing some of the elements that constitute a sub-pixel. [Diagram 5] FIG. 5 is a schematic cross-sectional view taken along line AA in FIG. 4. [Figure 6] 1A and 1B are schematic diagrams illustrating examples of the configuration of a conductive film. [Figure 7] FIG. 5 is a schematic plan view in which FIG. 4 is simplified. [Figure 8] FIG. 8 is a schematic cross-sectional view taken along line AA in FIG. [Figure 9] FIG. 8 is a diagram for explaining an embodiment, and is a schematic cross-sectional view corresponding to the cross-section taken along line AA in FIG. 7. [Figure 10] FIG. 8 is a diagram for explaining a modified example, and is a schematic cross-sectional view corresponding to the cross section taken along line AA in FIG. 7. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, embodiments will be described with reference to the drawings.

[0011] Note that the present disclosure is merely an example, and any modifications that a person skilled in the art can easily conceive of while maintaining the gist of the present disclosure are naturally included within the scope of the present disclosure.

[0012] In addition, in order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present disclosure. In this specification and each drawing, elements similar to those shown in the previous drawings are given the same reference numerals, and detailed descriptions may be omitted as appropriate.

[0013] In the present embodiment, as an example, a liquid crystal display device having a liquid crystal display element is disclosed. However, the embodiment does not prevent the application of the technical ideas disclosed in the embodiment to a display device having other types of display elements such as an organic electroluminescence display element, a micro LED, or a mini LED. In addition, the technical ideas disclosed in the embodiment can also be applied to an array substrate and an electronic device having a sensor element such as a capacitance sensor or an optical sensor.

[0014] <Overall configuration of liquid crystal display device> FIG. 1 is an exploded perspective view showing a schematic configuration example of a liquid crystal display device 1. As shown in FIG. As shown in Fig. 1, the X direction, Y direction, and Z direction are defined. The X direction, Y direction, and Z direction are mutually orthogonal, but may intersect at an angle other than a perpendicular angle. Viewing the liquid crystal display device 1 or its components parallel to the Z direction is called a "planar view." The direction indicated by the Z direction arrow is sometimes called "upward," and the opposite direction is sometimes called "downward."

[0015] 1, a liquid crystal display device 1 includes a display panel 2 and a backlight 3. For example, the backlight 3 can be configured as a side-edge type backlight including a light guide LG facing the display panel 2 and a plurality of light-emitting elements LS arranged at positions facing the side surfaces of the light guide LG. However, the backlight 3 is not limited to this, and backlights of various configurations that can supply light necessary for image display can be adopted.

[0016] The planar shapes of the display panel 2 and the light guide LG are, for example, rectangular shapes having long sides along the X direction and short sides along the Y direction, but are not limited to rectangular shapes and may be other shapes.

[0017] The display panel 2 is a liquid crystal panel having light transmissibility, and includes, for example, an array substrate SUB1, a counter substrate SUB2 facing the array substrate SUB1, and a liquid crystal layer LC sealed between the array substrate SUB1 and the counter substrate SUB2. The display panel 2 thus configured has, for example, a rectangular display area DA.

[0018] The liquid crystal display device 1 further includes an optical sheet group 4, and polarizing plates 5 and 6. The optical sheet group 4 is disposed between the light guide LG and the display panel 2. For example, the optical sheet group 4 includes a diffusion sheet DF that diffuses the light emitted from the light guide LG, and a prism sheet PR1 and a prism sheet PR2, each of which has a large number of prisms formed thereon.

[0019] The polarizing plate 5 is disposed between the optical sheet group 4 and the array substrate SUB1. On the other hand, the polarizing plate 6 is disposed above the counter substrate SUB2. Here, the polarization axis of the polarizing plate 5 and the polarization axis of the polarizing plate 6 are in a crossed Nicol relationship in which they are perpendicular to each other.

[0020] The liquid crystal display device 1 configured in this manner can be used in various types of devices, such as head mounted displays, in-vehicle devices, smartphones, tablet terminal devices, mobile phones, personal computers, television receivers, and game devices.

[0021] <Display panel configuration> Next, the configuration of the display panel 2 will be described. FIG. 2 is a plan view showing a schematic configuration of the display panel 2. As shown in FIG. 2, the display panel 2 has a display area DA and a peripheral area SA around the display area DA. For example, as shown in FIG. 2, the lower side of the array substrate SUB1 protrudes in the Y direction further than the counter substrate SUB2. As a result, the array substrate SUB1 has a mounting area MA that does not overlap with the counter substrate SUB2 in a plan view. This mounting area MA constitutes a part of the peripheral area SA.

[0022] In the display area DA, a plurality of pixels PX are arranged in a matrix. Each pixel PX includes a plurality of sub-pixels. For example, in FIG. 2, the pixel PX includes a red sub-pixel SPR, a green sub-pixel SPG, and a blue sub-pixel SPB. However, the pixel PX is not limited to this configuration, and may be configured to include sub-pixels of other colors, typically white.

[0023] As shown in Fig. 2, the display panel 2 includes a plurality of scanning lines G, a plurality of signal lines S (video lines), a scanning driver GD1, a scanning driver GD2, and a selector circuit ST. The plurality of scanning lines G extend in the X direction and are arranged in the Y direction. In contrast, the plurality of signal lines S extend in the Y direction and are arranged in the X direction. Each of the plurality of scanning lines G is connected to the scanning driver GD1 or the scanning driver GD2. Meanwhile, each of the plurality of signal lines S is connected to the selector circuit ST.

[0024] 2, a controller CT is mounted in the mounting area MA. A terminal portion T is provided in the mounting area MA, and a flexible substrate F is connected to the terminal portion T. The controller CT may be mounted on the flexible substrate F. The controller CT is formed of, for example, an IC chip or a circuit element.

[0025] Various types of signals transmitted from an electronic device in which the liquid crystal display device 1 is implemented are output to the controller CT via an integrated circuit mounted on the flexible substrate F. The controller CT inputs these signals and supplies a video signal to the selector circuit ST, while controlling the scan driver GD1, the scan driver GD2, and the selector circuit ST.

[0026] Each of the scan driver GD1 and the scan driver GD2 sequentially supplies scan signals to the plurality of scan lines G. On the other hand, the selector circuit ST sequentially supplies a video signal input from the controller CT to the signal lines S.

[0027] Each pixel PX includes a pixel electrode PE, a switching element SW (thin film transistor), and a common electrode CE to which a common potential is supplied. The switching element SW is connected to the pixel electrode PE, the scanning line G, and the signal line S.

[0028] For example, when the switching element SW is composed of a thin film transistor (field effect transistor), the gate electrode of the thin film transistor is electrically connected to the scanning line G. In addition, the source of the thin film transistor is electrically connected to the signal line S, while the drain of the thin film transistor is electrically connected to the pixel electrode PE.

[0029] When a scanning signal is supplied to the scanning line G, the thin film transistor is turned on and the video signal supplied to the signal line S is supplied to the pixel electrode PE. Meanwhile, the common electrode CE is formed across multiple sub-pixels, and when a video signal is supplied to the pixel electrode PE, a potential difference is generated between the pixel electrode PE and the common electrode CE. The electric field generated by this acts on the liquid crystal layer LC, thereby controlling the alignment direction of the multiple liquid crystal molecules that make up the liquid crystal layer LC.

[0030] For example, in the so-called "vertical electric field method," in which a pixel electrode PE is formed on an array substrate while a common electrode CE is formed on an opposing substrate, and a liquid crystal layer LC is sandwiched between the pixel electrode PE and the common electrode CE, the orientation direction of the multiple liquid crystal molecules that make up the liquid crystal layer LC is controlled by the vertical electric field generated between the pixel electrode PE and the common electrode CE.

[0031] On the other hand, in the so-called "horizontal electric field method," for example, a pixel electrode PE and a common electrode CE are formed on an array substrate, and a horizontal electric field (fringe electric field) leaking from a slit provided in the common electrode CE is utilized, the orientation direction of multiple liquid crystal molecules constituting the liquid crystal layer LC arranged above the array substrate is controlled by the horizontal electric field leaking from the slit.

[0032] As described above, there are two methods for controlling the alignment direction of liquid crystal molecules: the "vertical electric field method" and the "horizontal electric field method." For example, the "horizontal electric field method" has the advantage of being able to provide a wider viewing angle than the "vertical electric field method." In this embodiment, the "horizontal electric field method" is adopted, and the scanning lines G, signal lines S, scanning drivers GD1 and GD2, selector circuits ST, switching elements SW, pixel electrodes PE, and common electrodes CE are formed on the array substrate SUB1.

[0033] <Plane layout configuration of sub-pixels> Next, the planar layout configuration of the sub-pixels will be described. FIG. 3 is a plan view showing an example of a planar layout of sub-pixels. 3, the subpixels are subpixels SPR, SPG, and SPB. A red color filter CFR is disposed in the subpixel SPR, a green color filter CFG is disposed in the subpixel SPG, and a blue color filter CFB is disposed in the subpixel SPB.

[0034] 3, the subpixels SPR, SPG, and SPB are arranged in the X direction in this order. Also, the subpixels SPR, SPB, and SPG are arranged in the Y direction in this order. As a result, the subpixels SPR are arranged in a diagonal direction intersecting the X and Y directions. Similarly, the subpixels SPG are arranged in a diagonal direction, and the subpixels SPB are arranged in a diagonal direction.

[0035] The color filters CFR, CFG, and CFB are arranged in a dot shape (island shape) with respect to the subpixels SPR, SPG, and SPB.

[0036] For example, gaps GP are formed between color filters CFR and CFG adjacent to each other in the Y direction, between color filters CFG and CFB, and between color filters CFB and CFR.

[0037] It should be noted that the planar layout of the subpixels SPR, SPG, and SPB and the color filters CFR, CFG, and CFB is not limited to the planar layout shown in FIG.

[0038] For example, the subpixels SPR may be arranged in the Y direction, the subpixels SPG may be arranged in the Y direction, and the subpixels SPB may be arranged in the Y direction, with the columns of the subpixels SPR, the columns of the subpixels SPG, and the columns of the subpixels SPB arranged in order in the X direction.

[0039] As described above, the liquid crystal display device 1 in the present embodiment has a so-called "COA (Color Filter on Array) structure" in which all of the color filters CFR, CFG, and CFB are disposed on the array substrate SUB1. According to the "COA structure," the color filters and the sub-pixels are provided on the same array substrate SUB1. Therefore, according to the "COA structure," a high-definition liquid crystal display device 1 can be realized without being affected by misalignment between the array substrate SUB1 and the counter substrate SUB2.

[0040] FIG. 4 is a schematic plan view showing some of the elements that constitute a sub-pixel. 4 shows two scanning lines G extending in the X direction and two signal lines S extending in the Y direction intersecting the scanning lines G. An aperture region OR of a sub-pixel is formed in a region surrounded by the two scanning lines G and the two signal lines S. A pixel electrode PE is provided in the aperture region OR so as to overlap the aperture region OR in a plan view.

[0041] A conductive film TML is disposed above the scanning lines G and the signal lines S. This conductive film TML has an X-direction extending portion extending in the X direction and a Y-direction extending portion extending in the Y direction. The X-direction extending portion is provided so as to overlap with the scanning lines G in a planar view. On the other hand, the Y-direction extending portion is provided so as to overlap with the signal lines S in a planar view. Due to these X-direction extending portion and Y-direction extending portion, the conductive film TML has an overall lattice-like planar shape as shown in FIG. 4. This conductive film TML functions as a "light-shielding film" that blocks light.

[0042] 4, the signal line S is connected to the semiconductor layer OS of the thin film transistor constituting the switching element at the contact portion PLG1. In this manner, the contact portion PLG1 has a function of electrically connecting the semiconductor layer OS and the signal line S.

[0043] The semiconductor layer OS extends to intersect with the scanning line G and reach the opening region OR, and is connected to the relay electrode RE at the contact portion PLG2 in the opening region OR. That is, the contact portion PLG2 has a function of electrically connecting the semiconductor layer OS and the relay electrode RE.

[0044] Furthermore, a pixel electrode PE is provided so as to overlap the opening region OR in a plan view, and this pixel electrode PE and the relay electrode RE are connected at the bottom of the contact portion PLG3. That is, a part of the pixel electrode PE is formed inside the contact portion PLG3, and the part of the pixel electrode PE formed inside the contact portion PLG3 and the relay electrode RE are electrically connected at the bottom of the contact portion PLG3. From the above, the pixel electrode PE is electrically connected to the semiconductor layer OS via the relay electrode RE. That is, the contact portion PLG3 has the function of electrically connecting the pixel electrode PE and the relay electrode RE.

[0045] 4, a common electrode CE is provided so as to overlap in plan with all of the elements such as the scanning lines G, the signal lines S, and the conductive film TML, etc. In the opening region OR, a slit SL is provided in the common electrode CE.

[0046] Here, for example, an electric field generated when a potential difference is generated between the common electrode CE and the pixel electrode PE leaks out from the slit SL provided in the common electrode CE. As a result, the lateral electric field leaking out from the slit SL controls the alignment direction of a plurality of liquid crystal molecules constituting the liquid crystal layer disposed above the array substrate. In other words, the slit SL provided in the common electrode CE has the function of applying a lateral electric field to the liquid crystal layer to control the alignment direction of a plurality of liquid crystal molecules. In this manner, the planar layout configuration of the sub-pixels is realized.

[0047] <Cross-sectional structure of sub-pixel> Next, the cross-sectional structure of the sub-pixel will be described. Fig. 5 is a schematic cross-sectional view taken along line AA in Fig. 4. Note that Fig. 5 is a schematic cross-sectional view and does not accurately reflect the cross-section along line AA in Fig. 4. For example, line AA in Fig. 4 intersects with scanning line G twice, but only one scanning line G (gate electrode GE1) is shown in Fig. 5. Also, gate electrode GE2 is shown in Fig. 5, but this gate electrode GE2 is not shown in Fig. 4.

[0048] 5, an insulating layer IL1 is formed on a light-transmitting substrate 10. An insulating layer IL2 is formed on the insulating layer IL1. The substrate 10 is made of, for example, glass, but is not limited to this and may be made of a resin material such as polyimide resin. The insulating layers IL1 and IL2 are made of inorganic insulating films such as silicon nitride films and silicon oxide films.

[0049] 5, a gate electrode GE1 of a thin film transistor (field effect transistor) serving as a switching element is formed on the insulating layer IL2. This gate electrode GE1 functions as a scanning line G. The gate electrode GE1 is made of, for example, a metal material. The gate electrode GE1 may have a single-layer structure made of a single metal material, or may have a multi-layer structure in which different types of metal materials are laminated.

[0050] Next, an insulating layer IL3 is formed on the insulating layer IL2 so as to cover the gate electrode GE1. A semiconductor layer OS is formed on the insulating layer IL3. The insulating layer IL3 is made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film. On the other hand, the semiconductor layer OS is made of an amorphous silicon film or an oxide semiconductor film.

[0051] The semiconductor layer OS functions as a channel of the thin film transistor. That is, a channel is formed in the semiconductor layer OS based on a gate voltage applied to the gate electrode GE1. For example, when a gate voltage equal to or greater than a threshold voltage is applied to the gate electrode GE1, a channel is formed in the semiconductor layer OS. On the other hand, when a gate voltage less than the threshold voltage is applied to the gate electrode GE1, the channel formed in the semiconductor layer OS disappears.

[0052] This makes it possible to control the on / off operation of the thin film transistor based on the gate voltage applied to the gate electrode GE1.

[0053] For example, the semiconductor layer OS is desirably formed of an oxide semiconductor film, because a thin film transistor using an oxide semiconductor film as a channel has an advantage of having higher electron mobility and a very low off-leakage current than a thin film transistor using an amorphous silicon film as a channel.

[0054] 5, an insulating layer IL4 is formed on the insulating layer IL3 so as to cover the semiconductor layer OS. Then, a gate electrode GE2 is formed on the insulating layer IL4. The insulating layer IL4 is made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film. On the other hand, the gate electrode GE2 is made of a metal material, for example. In this manner, the thin-film transistor has the gate electrodes GE1 and GE2 arranged to sandwich the semiconductor layer OS from above and below. In this configuration, for example, a channel can be formed on the lower surface of the semiconductor layer OS by applying a gate voltage equal to or higher than the threshold voltage to the gate electrode GE1 arranged below the semiconductor layer OS, and a channel can also be formed on the upper surface of the semiconductor layer OS by applying a gate voltage equal to or higher than the threshold voltage to the gate electrode GE2 arranged above the semiconductor layer OS.

[0055] That is, in the thin film transistor of the present embodiment, since channels can be formed on both the upper and lower surfaces of the semiconductor layer OS, the current driving force of the thin film transistor can be improved. However, the configuration of the thin film transistor is not limited to this, and the gate electrode GE2 may be omitted. For this reason, for example, the gate electrode GE2 is not illustrated in FIG. 4.

[0056] Next, an insulating layer IL5 is formed on the insulating layer IL4 so as to cover the gate electrode GE2. Then, a source electrode SE is formed on the insulating layer IL5. This source electrode SE functions as a signal line S. The insulating layer IL5 is made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film. On the other hand, the source electrode SE is made of a metal material, for example.

[0057] Here, as shown in FIG. 5, a contact hole CH1 is formed in the insulating layer IL4 and the insulating layer IL5, penetrating these insulating layers to reach the semiconductor layer OS, and in this contact hole CH1, the source electrode SE is electrically connected to the semiconductor layer OS via the contact portion PLG1.

[0058] Next, an insulating layer IL6 is formed on the insulating layer IL5 so as to cover the source electrode SE. This insulating layer IL6 is also made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film. Then, as shown in FIG. 5, a contact hole CH2 is formed penetrating the insulating layer IL6, the insulating layer IL5, and the insulating layer IL4 to reach the semiconductor layer OS. At this time, a relay electrode RE is formed from inside the contact hole CH2 over the insulating layer IL6. The relay electrode RE is made of, for example, a light-transmitting conductive material.

[0059] Subsequently, an insulating layer IL7 is formed so as to fill the inside of the contact hole CH2 and extend over the insulating layer IL6. The insulating layer IL7 is also made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film.

[0060] This forms a contact portion PLG2 having a relay electrode RE connected to the semiconductor layer OS through the contact hole CH2 and an insulating layer IL7 covering the relay electrode RE. As a result, the relay electrode RE is electrically connected to the semiconductor layer OS through the contact portion PLG2. In other words, the relay electrode RE is electrically connected to the drain of the thin film transistor.

[0061] Then, as shown in FIG. 5, the color filter CFB and the color filter CFG are formed on the insulating layer IL7. This realizes a "COA structure" in this embodiment. Next, an organic insulating film 100A is formed so as to cover the color filter CFB and the color filter CFG. The organic insulating film 100A is made of an organic material such as an acrylic resin. A contact hole CH3 is formed in the organic insulating film 100A and the insulating layer IL7, penetrating the organic insulating film 100A and the insulating layer IL7 and reaching the relay electrode RE. A plurality of types of components are embedded in the contact hole CH3 to form a contact portion PLG3. In this manner, in the contact portion PLG3, the pixel electrode PE is electrically connected to the semiconductor layer OS (drain side) via the relay electrode RE.

[0062] Next, the internal and external configuration of the contact portion PLG3 will be described. 5, a relay electrode RE is provided on an insulating layer IL6, and an insulating layer IL7 is disposed so as to cover the relay electrode RE. A color filter CFB and a color filter CFG are provided on the insulating layer IL7. In order to flatten the unevenness caused by the color filter CFB and the color filter CFG, an organic insulating film 100A is provided so as to cover the color filter CFB and the color filter CFG.

[0063] As shown in FIG. 5, the organic insulating film 100A has a contact hole CH3 penetrating the organic insulating film 100A and the insulating layer IL7 to reach the relay electrode RE. A pixel electrode PE made of a light-transmitting conductive material such as ITO is formed on the inner wall of the contact hole CH3. As shown in FIG. 5, the pixel electrode PE is electrically connected to the relay electrode RE at the bottom of the contact hole CH3. Furthermore, a capacitive insulating film CI is formed in the contact hole CH3 and in contact with the pixel electrode PE and the inner wall of the contact hole CH3. The capacitive insulating film CI is made of, for example, a silicon nitride film. Next, a conductive film TML in contact with the capacitive insulating film CI, a common electrode CE in contact with the conductive film TML, and an organic insulating film 100B in contact with the common electrode CE and filling the contact hole CH3 are formed in the contact hole CH3.

[0064] Here, a capacitance is formed by the pixel electrode PE, the capacitance insulating film CI, and the common electrode CE, and when a potential difference is generated between the pixel electrode PE and the common electrode CE, an electric field is induced between the pixel electrode PE and the common electrode CE. Although not shown in Fig. 5, a slit is provided in the common electrode CE, and the electric field leaks out from this slit to the outside of the capacitance. The alignment direction of the liquid crystal molecules is controlled based on the electric field leaking out from the slit.

[0065] The common electrode CE is made of a transparent conductive material such as ITO. In order to reduce the resistance of the common electrode CE, a conductive film TML is provided in contact with the common electrode CE. In other words, the conductive film TML has the function of reducing the resistance of the common electrode CE.

[0066] An example of the configuration of the conductive film TML will be described below. FIG. 6 is a schematic diagram showing a configuration example of the conductive film TML.

[0067] In FIG. 6, the conductive film TML is composed of a laminated film of a titanium film 310, an aluminum film 320, a titanium film 330, an ITO film 340, and a molybdenum film 350. That is, the conductive film TML is composed to include a metal film and a light-transmitting conductive film (metal oxide film). For example, the titanium film 310, the aluminum film 320, the titanium film 330, and the molybdenum film 350 constituting a part of the conductive film TML are metal films with low resistance, and these metal films have a function of reducing the resistance of the common electrode CE. On the other hand, the ITO film 340 is a light-transmitting conductive film, and is composed so that the phase difference between the light transmitted through the ITO film 340 and reflected by the titanium film 330 and the light reflected on the surface of the ITO film 340 is 180 degrees. As a result, the light transmitted through the ITO film 340 and reflected by the titanium film 330 and the light reflected on the surface of the ITO film 340 are offset by interference, and the reflection of external light is suppressed. In this way, the conductive film TML also functions as an anti-reflection film that suppresses reflection of external light.

[0068] 5, a liquid crystal layer LC is disposed above the organic insulating film 100A on which the contact portion PLG3 is formed, with an alignment film 200A therebetween, and a spacer SP is provided above the contact portion PLG3. A substrate 20 is disposed above the liquid crystal layer LC, with an alignment film 200B and an overcoat film OC therebetween. In this manner, the cross-sectional structure of the sub-pixel is realized.

[0069] <Sub-pixel operation> Next, the operation of the sub-pixel will be briefly described. For example, when a scanning signal is supplied to the gate electrodes GE1 and GE2 of a thin-film transistor, which is one of the components of a subpixel, a gate voltage equal to or higher than the threshold voltage is applied to the gate electrodes GE1 and GE2. Then, a channel is formed on both the lower and upper surfaces of the semiconductor layer OS sandwiched between the gate electrodes GE1 and GE2. This electrically connects the source and drain of the thin-film transistor to turn it on. At this time, for example, when a video signal is supplied to the source electrode SE of the thin-film transistor, the video signal is transmitted to the relay electrode RE, which is electrically connected to the drain of the semiconductor layer OS, via the thin-film transistor that is turned on. The video signal is then transmitted from the relay electrode RE to the pixel electrode PE via the contact portion PLG3.

[0070] A capacitance composed of a pixel electrode PE, a common electrode CE, and a capacitance insulating film CI is formed inside and outside the contact portion PLG3, and a video signal is supplied to the pixel electrode PE constituting the capacitance. As a result, a potential difference occurs between the pixel electrode PE and the common electrode CE, and an electric field generated based on this potential difference leaks out from a slit provided in the common electrode CE. Then, the lateral electric field leaking out from the slit controls the orientation direction of multiple liquid crystal molecules constituting the liquid crystal layer LC arranged above the array substrate. As a result, the transmission and blocking of light from the liquid crystal layer LC is controlled in the sub-pixels. This control is performed for all sub-pixels arranged in the display area, and an image is displayed in the display area.

[0071] <Description of Related Art> Next, the related art will be described with reference to the above description. The term "related art" as used herein refers to art that is not publicly known, but has problems that the inventors have found, and is a technology that serves as a premise for the present invention.

[0072] FIG. 7 is a schematic plan view that simplifies FIG. 7 shows two scanning lines G extending in the X direction and two signal lines S extending in the Y direction intersecting the scanning lines G. A conductive film TML is disposed above the scanning lines G and the signal lines S. The conductive film TML has an X-direction extending portion extending in the X direction and a Y-direction extending portion extending in the Y direction. The X-direction extending portion is provided so as to overlap with the scanning lines G in a planar view. On the other hand, the Y-direction extending portion is provided so as to overlap with the signal lines S in a planar view. Due to the X-direction extending portion and the Y-direction extending portion, the conductive film TML has a lattice-like planar shape as a whole, as shown in FIG. 7.

[0073] An aperture region OR of a sub-pixel is formed in a region surrounded by the lattice-shaped conductive film TML. Furthermore, as shown in Fig. 7, a common electrode CE is provided so as to overlap in plan with all of the elements such as the scanning line G, the signal line S, and the conductive film TML. At this time, a slit SL is provided in the common electrode CE in the aperture region OR.

[0074] FIG. 8 is a schematic cross-sectional view taken along the line AA in FIG. In FIG. 8, an organic insulating film 100A is formed so as to cover the color filters CFB, CFG, and CFR arranged at intervals from one another. Then, as shown in FIG. 8, a pixel electrode PE is provided so as to be in contact with the organic insulating film 100A. Furthermore, a capacitive insulating film CI is arranged so as to cover the pixel electrode PE, and a common electrode CE is provided so as to be in contact with the capacitive insulating film CI. At this time, in order to reduce the resistance value of the common electrode CE, a conductive film TML covered by the common electrode CE is formed on the capacitive insulating film CI. Also, a slit SL is formed in the common electrode CE. Note that a capacitance is formed by the pixel electrode PE, the capacitive insulating film CI, and the common electrode CE.

[0075] <Room for improvement> Next, room for improvement in the related art will be described. In order to improve visibility, it is necessary to reduce the reflection of external light. In this regard, the reflection of external light may include, for example, reflection from the region where the conductive film TML is formed and reflection from the opening region OR in FIG.

[0076] Here, in the related technology, as shown in FIG. 6, the conductive film TML is not composed of the titanium film 310, the aluminum film 320, and the titanium film 330, but further includes an ITO film 340 and a molybdenum film 350. As a result, in the conductive film TML in the related technology, a combination of the conductive film TML and a common electrode disposed on the conductive film TML causes thin film interference due to the ITO film 340, the molybdenum film 350, and the common electrode (translucent electrode), and as a result, reflection of external light from the conductive film TML can be suppressed. That is, in the related technology, the configuration of the conductive film TML is improved to suppress reflection of external light from the region where the conductive film TML is formed. In this way, in the related technology, reflection of external light from the region where the conductive film TML is formed can be suppressed.

[0077] On the other hand, the related technology does not pay attention to the reflection of external light from the opening region OR. That is, in order to reduce the reflection of external light, it is useful not only to suppress the reflection of external light from the region where the conductive film TML is formed, but also to suppress the reflection of external light from the opening region OR. Therefore, there is room for improvement in the related technology from the viewpoint of reducing the reflection of external light.

[0078] Therefore, in this embodiment, a device is implemented to overcome the room for improvement that exists in the related art. Specifically, in this embodiment, attention is paid to the reflection of external light from the opening region OR, which is not focused on in the related art, and a device is implemented to not only suppress the reflection of external light from the region where the conductive film TML is formed, but also to reduce the reflection of external light from the opening region OR. The technical idea of ​​this embodiment with this device will be described below.

[0079] <Basic Concept of the Embodiment> The basic idea of ​​this embodiment is to suppress reflection of external light by realizing an anti-reflection structure on an array substrate, which is a component of a display panel. This basic idea includes a first idea of ​​realizing an anti-reflection structure on an array substrate by utilizing a film already provided on the array substrate and adding a new film so as to be in contact with this film, and a second idea of ​​realizing an anti-reflection structure on an array substrate by changing the type of film already provided on the array substrate.

[0080] The basic idea is to utilize the antireflection mechanism of an antireflection film composed of a laminated structure of a high refractive index film and a low refractive index film, for example. Specifically, the antireflection mechanism in an antireflection film composed of a laminated structure of a high refractive index film and a low refractive index film is as follows. That is, when a high refractive index film is formed on a low refractive index film and light is incident from above the high refractive index film, a part of the light is reflected on the surface of the high refractive index film and another part of the light is transmitted through the high refractive index film. The light transmitted through the high refractive index film is reflected at the interface between the high refractive index film and the low refractive index film due to the difference in refractive index between the high refractive index film and the low refractive index film. Therefore, the reflected light returning to the top of the high refractive index film includes a first reflected light reflected on the surface of the high refractive index film and a second reflected light reflected on the interface between the high refractive index film and the low refractive index film.

[0081] In this case, if the thickness of the high refractive index film is set so that the phase difference between the first reflected light and the second reflected light is 180 degrees, the first reflected light and the second reflected light will interfere with each other in a weakening manner. As a result, the intensity of the reflected light returning upward from the high refractive index film is reduced. In this way, the anti-reflection film composed of a laminated structure of a high refractive index film and a low refractive index film reduces reflection by utilizing the anti-reflection mechanism called thin film interference described above.

[0082] In this regard, the basic idea is to suppress reflection of external light from the display panel by realizing an anti-reflection structure in the array substrate that utilizes this anti-reflection mechanism (thin film interference). In particular, the first idea included in the basic idea is to realize an anti-reflection structure in the array substrate by utilizing a low refractive index film already provided in the array substrate and adding a new high refractive index film so as to be in contact with this low refractive index film. On the other hand, the second idea included in the basic idea is to realize an anti-reflection structure in the array substrate by changing the low refractive index film already provided in the array substrate to a high refractive index film.

[0083] In the following, embodiments that embody the above-mentioned basic idea will be described. In particular, in the "embodiment," an embodiment of a first idea included in the basic idea will be described. In contrast, in the "variation," an embodiment of a second idea included in the basic idea will be described.

[0084] <Embodiment> Fig. 9 is a diagram for explaining an array substrate in an embodiment, and is a schematic cross-sectional view corresponding to the cross section taken along line AA in Fig. 7. In particular, Fig. 9 illustrates a region in which a conductive film TML is formed, and an opening region OR. The opening region OR has a region R1 (covered region) covered with a common electrode CE, and a region R2 (slit region) in which a slit SL is formed. Note that Fig. 9 omits the structure below the color filters CFB, CFG, and CFR. That is, although a substrate (translucent substrate) on which switching elements are formed exists below the color filters CFB, CFG, and CFR (see Fig. 5), Fig. 9 omits the illustration of these components.

[0085] In FIG. 9, an organic insulating film 100A is formed so as to cover color filters CFB, CFG, and CFR arranged apart from each other. A high refractive index film 400 is provided so as to contact the organic insulating film 100A. The refractive index of the high refractive index film 400 is higher than that of the organic insulating film 100A. For example, the refractive index of the organic insulating film 100A is about 1.5. In contrast, the refractive index of the high refractive index film 400 is 1.7 or more and 1.9 or less. The high refractive index film 400 is composed of, for example, a silicon nitride film.

[0086] 9, a pixel electrode PE is provided on the high refractive index film 400 in contact with the high refractive index film 400. The pixel electrode PE is made of a light-transmitting conductive material such as ITO. A capacitive insulating film CI is formed on the pixel electrode PE in contact with the pixel electrode PE. The capacitive insulating film CI is made of a silicon nitride film, for example.

[0087] Next, as shown in Fig. 9, a common electrode CE is provided on the capacitive insulating film CI in contact with the capacitive insulating film CI. The common electrode CE is made of a light-transmitting conductive material such as ITO. In order to reduce the resistance value of the common electrode CE, a conductive film TML is provided on the capacitive insulating film CI and is covered by the common electrode CE. Also, as shown in Fig. 9, a slit SL is formed in the common electrode CE.

[0088] <<Features of the Realization>> Next, features of the embodiment will be described. A feature of the embodiment is that, as shown in FIG. 9, a high refractive index film 400 is provided on an organic insulating film 100A. In this case, the organic insulating film 100A is made of a low refractive index film having a refractive index of about 1.5, for example. Meanwhile, the high refractive index film 400 is made of an insulating film having a refractive index of 1.7 or more and 1.9 or less. Specifically, the organic insulating film 100A can be made of an organic material such as an acrylic resin. Meanwhile, the high refractive index film 400 can be made of a silicon nitride film.

[0089] This realizes an anti-reflection structure consisting of a low refractive index film (organic insulating film 100A) and a high refractive index film 400. In particular, in the embodiment shown in Fig. 9, the low refractive index film (organic insulating film 100A) already provided on the array substrate is utilized, and a new high refractive index film 400 is added so as to be in contact with this low refractive index film, thereby realizing an anti-reflection structure on the array substrate, thereby realizing the first idea described above.

[0090] In the embodiment shown in FIG. 9, an antireflection structure consisting of an organic insulating film 100A and a high refractive index film 400 is provided over the region where the conductive film TML is formed and the opening region OR. Therefore, according to the embodiment, even in the opening region OR, which is not focused on in the related art, the reflection of external light can be reduced by the above-mentioned antireflection structure. Therefore, according to the embodiment, not only can the reflection of external light from the region where the conductive film TML is formed be suppressed, but also the reflection of external light from the opening region OR can be suppressed. Therefore, according to the embodiment, the reflection of external light can be further reduced compared to the related art.

[0091] From the viewpoint of effectively suppressing reflection of external light by the antireflection structure, it is effective to design the film thickness of the high refractive index film 400 to a film thickness at which thin film interference is likely to occur. For example, when the high refractive index film 400 and the capacitive insulating film CI are both made of silicon nitride films, it is desirable to set the film thickness of the high refractive index film 400 to be the same as or thicker than the film thickness of the capacitive insulating film CI.

[0092] <Modification> Next, this modified example will be described. Fig. 10 is a diagram for explaining an array substrate in a modified example, and is a schematic cross-sectional view corresponding to the cross section taken along line AA in Fig. 7. Note that in Fig. 10, the structure below color filters CFB, CFG, and CFR is omitted. 10, in this modification, a high refractive index film 400A is provided so as to cover the color filters CFB, CFG, and CFR arranged apart from each other. That is, in this modification, instead of the organic insulating film 100A, which is a low refractive index film having a refractive index of about 1.5, a high refractive index film 400A having a refractive index of 1.7 to 1.9 is adopted. This high refractive index film 400A can be composed of, for example, a silicon nitride film.

[0093] As a result, in this modified example, the second idea of ​​realizing an anti-reflection structure in the array substrate is embodied by changing the low refractive index film (organic insulating film 100A) normally provided in the array substrate to a high refractive index film 400A. In this case, the color filters CFB, CFG and CFR themselves function as low refractive index films, and the anti-reflection structure is realized by the combination of the high refractive index film 400A that is in contact with and covers the color filters CFB, CFG and CFR, and the color filters CFB, CFG and CFR that function as the above-mentioned low refractive index films.

[0094] In particular, in this modification, an antireflection structure consisting of a low refractive index film and a high refractive index film is provided over the region where the conductive film TML is formed and the opening region OR. Therefore, according to this modification, the above-mentioned antireflection structure can reduce the reflection of external light even in the opening region OR, which is not focused on in the related art. Therefore, according to this modification, not only can the reflection of external light from the region where the conductive film TML is formed be suppressed, but also the reflection of external light from the opening region OR can be suppressed. Therefore, according to this modification, the reflection of external light can be further reduced compared to the related art.

[0095] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it is understood that such modifications and alterations also fall within the scope of the present invention. For example, those in which a person skilled in the art appropriately adds, deletes, or modifies the design of the above-mentioned embodiment, or adds, omits, or modifies the conditions of a process, are also included in the scope of the present invention as long as they include the gist of the present invention.

[0096] Furthermore, other effects and advantages brought about by the aspects described in the embodiments that are obvious from the description in this specification or that can be appropriately thought of by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0097] 1 LCD display device 2 Display Panel 3. Backlight 4 Optical sheets 5. Polarizing Plate 6 Polarizing Plate 10 Substrate 20 Substrate 100A Organic Insulating Film 100B Organic insulating film 200A alignment film 200B alignment film 310 Titanium film 320 Aluminum Film 330 Titanium Film 340 ITO film 350 Molybdenum film 400 High refractive index film 400A High refractive index film CE Common electrode CFR Color Filter CFG Color Filter CFB Color Filter CH1 Contact hole CH2 Contact Hole CH3 Contact Hole CI Capacitive insulating film CT Controller DA display area DF Diffusion Sheet F Flexible board G scan line GD1 Scan Driver GD2 Scan Driver GE1 Gate electrode GE2 Gate electrode GP Gap IL1 Insulation layer IL2 Insulation layer IL3 Insulation layer IL4 Insulation Layer IL5 Insulation Layer IL6 Insulation Layer IL7 Insulation Layer LC liquid crystal layer LG light guide LS Light Emitting Element MA implementation area OC overcoat film OR opening area OS semiconductor layer PE pixel electrode PLG1 Contact part PLG2 Contact part PLG3 Contact part PR1 Prism sheet PR2 Prism sheet PX pixels RE relay electrode R1 area R2 area S signal line SA Surrounding Areas SE source electrode SL Slit SP Spacer SPR subpixel SPG Subpixel SPB subpixel ST selector circuit SUB1 Array board SUB2 Opposite board SW Switching element T terminal section TML Conductive Film

Claims

1. An organic insulating film; a high refractive index film in contact with the organic insulating film; a pixel electrode in contact with the high refractive index film; a capacitive insulating film in contact with the pixel electrode; a common electrode in contact with the capacitive insulating film; Equipped with The display device, wherein the refractive index of the high refractive index film is higher than the refractive index of the organic insulating film.

2. 2. The display device according to claim 1, The display device, wherein the refractive index of the high refractive index film is 1.7 or more and 1.9 or less.

3. 2. The display device according to claim 1, The display device, wherein the high refractive index film is a silicon nitride film.

4. 2. The display device according to claim 1, the display device has a color filter in contact with the organic insulating film, The organic insulating film is formed so as to cover the color filter.

5. A color filter; a high refractive index film in contact with the color filter; a pixel electrode in contact with the high refractive index film; a capacitive insulating film in contact with the pixel electrode; a common electrode in contact with the capacitive insulating film; Equipped with The display device, wherein the refractive index of the high refractive index film is higher than the refractive index of the color filter.

6. 6. The display device according to claim 5, The display device, wherein the refractive index of the high refractive index film is 1.7 or more and 1.9 or less.

7. 6. The display device according to claim 5, The display device, wherein the high refractive index film is a silicon nitride film.

8. An organic insulating film; a high refractive index film in contact with the organic insulating film; a pixel electrode in contact with the high refractive index film; a capacitive insulating film in contact with the pixel electrode; a common electrode in contact with the capacitive insulating film; Equipped with The array substrate, wherein the refractive index of the high refractive index film is higher than the refractive index of the organic insulating film.

9. 9. The array substrate according to claim 8, The array substrate, wherein the refractive index of the high refractive index film is 1.7 or more and 1.9 or less.

10. 9. The array substrate according to claim 8, The array substrate, wherein the high refractive index film is a silicon nitride film.

11. 9. The array substrate according to claim 8, the array substrate has a color filter in contact with the organic insulating film, The organic insulating film is formed so as to cover the color filter.

12. A color filter; a high refractive index film in contact with the color filter; a pixel electrode in contact with the high refractive index film; a capacitive insulating film in contact with the pixel electrode; a common electrode in contact with the capacitive insulating film; Equipped with The array substrate, wherein the refractive index of the high refractive index film is higher than the refractive index of the color filter.

13. 13. The display device according to claim 12, The array substrate, wherein the refractive index of the high refractive index film is 1.7 or more and 1.9 or less.

14. 13. The array substrate according to claim 12, The array substrate, wherein the high refractive index film is a silicon nitride film.

Citation Information

Patent Citations

  • Display device

    JP2022153055A